* New: In CRL::RoutingLayerGauge, two new types of gauge are supported:
- Unusable : just do nothing with it, but the layer is stacked.
- BottomPowersupply : can be used for supply routing only, and
is *below* the normal routing layers (instead of on top as
usual).
Both new types must be *below* the real routing layers.
* New: In CRL::RoutingGauge, add a new attribute "firstRoutingLayer"
to give the index (depth) of the first layer usable for routing.
(not Unusable and not BottomPowerSupply)
* New: In Anabatic::Session & Anabatic::NetBuilder, in order to build
the initial wiring, provides (Session) and use (NetBuilder) the
new functions:
- getBuildRoutingLayer(depth)
- getBuildContactLayer(depth)
Thoses functions takes into account (offset) the unusable layers
so depth 0 is the first usable routing layer, and so on.
Previously, the relevant NetBuilder and routing strategies where
directly guessed from the RoutingGauge traits. This is no longer
doable as the combinations increases. Now to configure both the
global and detailed router we need three "parameters" :
1. The routing gauge itself (tells which layers are in which
directions) and how to make the VIAs.
2. The NetBuilder to use, they are identified by strings.
Currently we support:
* "HV,3RL+", for all SxLib derived standard cells.
* "VH,2RL", for hybrid routing (over the cell, but terminals
are also in the first RL).
* "2RL-", for strict channel routing.
* "VH,3RL+", an attempt for FreePDK 45, not optimized enough
to be considered as usable.
3. The routing style, mostly affect the way the GCell grid will be
built.
* VH : first RL is V.
* HV : first RL is H.
* OTH : Run in full over-the-cell mode (needs at least 3RL).
* Channel : Run in *strict* channel routing mode (no routing over
the standard cells).
* Hybrid : Create channels, but can use H tracks over the
standard cells.
Thoses three parameters are partly overlapping and must be sets in
a consistent manner, otherwise strange results may occurs.
* New: CRL::RoutingGauge::getFirstRoutingGauge(), to get the lowest
layer available for routing (not a PinOnly, not a PowerSupply).
* Change: In CRL::RoutingGauge::isHV() and isVH(), were previously
always returning false when the gauge was 2RL only. Now, check
on the first usable RL.
* Bug: In cumulus/plugins.block.configuration._loadRoutingGauge(),
there was a bad computation of the deep RLs when the top layer
was not defined. Occured for 2RL gauges only.
* Bug: In Anabatic::RpsInRow::slacken() (LayerAssign), forgotten curly braces
in the test to skip METAL2 terminals.
* Change: In Etestian::BloatChannel::getDx(), adjust the bloating
policy to converge on Arlet6502. Always ensure that there is
a 50% ratio between terminal used V-tracks and free ones.
If there is more than 80% of terminals, add one more track.
* Bug: In AnabaticEngine & KatanaEngine, KatanaEngine is a derived
class of AnabaticEngine. They uses Anabatic::Configuration
and Katana::Configuration that also derives from each other.
I though I had made one configuration attribute in the base
class that was using the right Configuration. But no. I did
have two configurations attributes, one in AnabaticEngine and
one in KatanaEngine, the later "shadowing" the former. As a
results, parameters modified in AnabaticEngine, *after* the
initial creation of the tool *where never seen* at Katana
level (due to it's own duplicate). What a mess.
Now there is only one attribute in the *base* class Anabatic,
which is created through a new virtual function _createConfiguration()
called in _postCreate() which allocate the right Configuration
according to the dynamic type of the tool (KatanaEngine).
In KatanaEngine, access the configuration through the
attribute (_configuration) and not the accessor (getConfiguration()).
* Bug: In KatanaEngine, no longer directly use the _configuration attribute
(which is not accessible anyway) but the getConfiguration() accessor.
The accessor perform a static_cast from the Super::getConfiguration()
into Katana::Configuration.
Complete cleanup of the various configuration accessors.
* New: AnabaticEngine::setupNetBuilder(), perform an early check
of the requested NetBuilderStyle. The NetBuilderStyle is just a
string that will be matched against the (hard-coded) supported
NetBuilders. Then check the topological characteristics against
the capabilities of the gauge (HV, VH and so on).
Still a bit too hard-coded for now.
This function has been split from AnabaticEngine::_loadGrByNet().
* Change: AnabaticEngine::isChannelStyle() renamed from isChannelMode().
* New: In Anabatic::Configuration, two new attributes to select the
topology and routing style:
- _netBuilderStyle to explicitely select the NetBuilder to use.
It's a string, which is provided by each NetBuilder.
- _routingStyle to define how the overall routing will work.
It's a set of flags (StyleFlags):
* VH : first RL is V.
* HV : first RL is H.
* OTH : Run in full over-the-cell mode (needs at least 3RL).
* Channel : Run in *strict* channel routing mode (no routing over
the standard cells).
* Hybrid : Create channels, but can use H tracks over the
standard cells.
* New: In anabatic/Constants, add StyleFlags to define how the router
should operate (see above).
* Bug: In Anabatic::GCell, in CTOR, no reason to set up the HChannelGCell flag.
* Bug: In Anabatic::GCell::updateDensity(), when computing layers non contiguous
saturation, do not systematically skip RL 0, but only if it's PinOnly.
* Change: In Anabatic::NetBuilder, rename isTwoMetal by isStrictChannel.
* Change: In Anabatic::NetBuilderHV, rename doRp_AccessNorthPin() in
doRp_AccessNorthSouthPin(). More accurate.
* Bug: In NetBuilderHV::_do_1G_xM1_1PinM2(), the wires to connect the M1
terminals where created *twice*. Uterly stupid, there where placed in
overlap by the router!
* New: In AnabaticEngine, new accessors to the NetBuilderStyle and
RoutingStyle, proxies towards Configuration.
* Bug: In Manipulator::relax(), if there are two doglegs to be done, but
they are in the same GCell, only do one (the conflicting interval)
is short.
* Change: In Katana::Session, rename isChannelMode() into isChannelStyle().
* Change: In TrackSegment::isUnbreakable() and isStrap(), return false
when the base segment is a *weak global* (aligned with a global one).
* Change: In Katana::Row::createChannel(), correctly distinguish between
*strict channel* style and *hybrid* style. Tag the GCells as std cells
row or channels only in the former case.
The decoupling of the cell gauge and the routing gauge implies that
the METAL2 & METAL3 terminals of macro blocks cannot be aligned on
the routing tracks anymore. That is, an horizontal METAL2 terminal
will not be on a track axis, but offgrid, so we no longer can use
a METAL2 horizontal segment to connect to it. Making an adjustement
between the offgrid terminal and the on-grid segment has proven
too complex and generating difficult configuration for the router.
Moreover, METLA2 terminal could be fully inside a METAL2 blockage.
So now, when the gauges are decoupled, we connect the METAL2 and
METAL3 the same way we do for METAL1: *from above* in the perpandicular
direction and using a *sliding* VIA. We assume that those kind of
terminals in upper metals are quite long.
* New: In Hurricane::Rectilinear, export the isNonRectangle() method
to the Python interface.
* New: In CRL::RoutingGauge, add function isSuperPitched() with the
associated boolean attribute. Set to true when each pitch of
each layer is independant (not low fractional multiples).
* New: In AnabaticEngine, add the ability to temporarily disable the
canonize() operation (mainly used in dogleg creation).
* New: In AutoSegment::canonize(), do nothing if the operation is
disabled by AnabaticEngine.
* Bug: In Session::_revalidateTopology(), disable the canonization
during the topology updating of a net. Too early canonization
was occuring in makeDogleg() leading to incoherencies when
performing the later canonization stage over the complete net.
Mostly occured in the initial build stage of the net.
* New: In GCell, add function postGlobalAnnotate(), if a layer
is fully blocked (above 0.9), typically, under a blockage,
add a further capacity decrease of 2 on the edges. So we may
handle a modicum of doglegs.
* Bug; In GCell::addBlockage(), removeContact(), removeHSegment()
and removeVSegment(), forgot to set the Invalidated flag.
This may have lead to innacurate densities.
* Change: In GCell::updateDensity(), more complex setting of the
GoStraight flag. This flag is now set if we don't have two
*contiguous* below 60% of density. We need free contiguous
layers to make doglegs.
* New: In NetBuilder, now manage a current state flag along
with the state flag of the *source* GCell. This flag is used
to tell if the GCell needs it's *global* routing to be done
using the upper layers (METAL4 & METAL5) instead of the
lower ones.
* New: In NetBuilder::setStartHook(), set the state flag of the
GCell to ToUpperRouting when processing a global routing
articulation and one of the base layer is obstructed
above 0.9.
In GCell with terminals, also set ToUpperRouting when there
are some in METAL2 / METAL3 and the gauge is not super-pitched.
* New: In NetBuilder, function isInsideBlockage(), to check if a
terminal is completely or partially enclosed in a blockage.
* Change: In NetBuilderHV::doRp_AutoContact(), remove support for
trying to put on grid misaligned METAL2/METAL3.
Instead systematically access them from above.
Do not cover with fixed protection terminals that are already
enclosed in blockages.
* Bug: In NetBuilderHV::doRp_AutoContact(), always add the terminal
contact in the requested GCell and not the target/source one,
in case the terminal span several GCells.
* Change: In NetBuilderHV::doRp_Access(), create the local wiring
according to the RoutingPad layer.
* Change: In NetBuilderHV::_do_xG(), _do_2G(),
create the global wiring in upper layers, according to the
ToUpperRouting flag.
* Change: In NetBuilderHV::_do_xG_xM3(), now delegate to
_do_xG_xM3_baseRouting() and _do_xG_xM3_upperRouting() if the
density at terminal level is above 0.5.
* New: NetBuilderHV::_do_xG_xM3_baseRouting() and
_do_xG_xM3_upperRouting() separated function to manage the
local routing.
* Change: In NetBuilder::_do_globalSegment(), if the currently
processed GCell or it's source is in ToUpperRouting mode,
move up the global segment. Do *not* use the moveUp() function
which would create doglegs unwanted at this stage.
* New: In KatanaEngine::annotateGlobalGraph(), call postGlobalAnnotate()
on the GCell after the blockages have been taken into accound to
add the penalty.
* Bug: In Track::getPrevious(), correctly manage the 0 value for the
index argument. Strange it didn't show earlier.
Same goes for Track::expandFreeInterval().
* New: Python/C++ API level:
* Write a new C++/template wrapper to get rid of boost::python
* The int & long Python type are now merged. So a C/C++ level,
it became "PyLong_X" (remove "PyInt_X") and at Python code
level, it became "int" (remove "long").
* Change: VLSISAPD finally defunct.
* Configuration is now integrated as a Hurricane component,
makes use of the new C++/template wrapper.
* vlsisapd is now defunct. Keep it in the source for now as
some remaining non essential code may have to be ported in
the future.
* Note: Python code (copy of the migration howto):
* New print function syntax print().
* Changed "dict.has_key(k)" for "k" in dict.
* Changed "except Exception, e" for "except Exception as e".
* The division "/" is now the floating point division, even if
both operand are integers. So 3/2 now gives 1.5 and no longer 1.
The integer division is now "//" : 1 = 3//2. So have to carefully
review the code to update. Most of the time we want to use "//".
We must never change to float for long that, in fact, represents
DbU (exposed as Python int type).
* execfile() must be replaced by exec(open("file").read()).
* iter().__next__() becomes iter(x).__next__().
* __getslice__() has been removed, integrated to __getitem__().
* The formating used for str(type(o)) has changed, so In Stratus,
have to update them ("<class 'MyClass'>" instead of "MyClass").
* the "types" module no longer supply values for default types
like str (types.StringType) or list (types.StringType).
Must use "isinstance()" where they were occuring.
* Remove the 'L' to indicate "long integer" (like "12L"), now
all Python integer are long.
* Change in bootstrap:
* Ported Coriolis builder (ccb) to Python3.
* Ported Coriolis socInstaller.py to Python3.
* Note: In PyQt4+Python3, QVariant no longer exists. Use None or
directly convert using the python syntax: bool(x), int(x), ...
By default, it is a string (str).
* Note: PyQt4 bindings & Python3 under SL7.
* In order to compile user's must upgrade to my own rebuild of
PyQt 4 & 5 bindings 4.19.21-1.el7.soc.
* Bug: In cumulus/plugins.block.htree.HTree.splitNet(), set the root
buffer of the H-Tree to the original signal (mainly: top clock).
Strangely, it was only done when working in full chip mode.
* New: In CRL::RoutingLayerGauge, add a new kind of gauge "PowerSupply"
to flag a layer which is dedicated to routing power supplies.
* New: In AllianceFramework, add management of PowerSupply gauge kind.
Exported in the Python interface.
Integrate new features and bug fixes so the Arlet 6502 benchs successfully
passes real DRC with reference industrial tools. Short summary:
* Manage minimum area for VIAs in Katana::Tracks.
* Allow different wire width for wires perpandicular to the prefered
routing direction.
* StackedVIAs used in the clock tree no longer assume an uniform
routing grid (same offset & pitch all the way up).
* Some hard-coded patches in PowerRails for FlexLib.
* New: In CRL/symbolic/cmos/kite.py & cmos45/kite.py, update the
RoutingLayerGauges by adding the new PWireWidth parameter.
Always zero in case of symbolic layout (too fine tuning).
* New: In CRL::RoutingGauge, add accessor to PWireWidth parameter.
Modify the clone method.
* New: In CRL::RoutingLayerGauge, add new parameter "PWireWidth"
to give the width of a wire when it not drawn in the prefered
routing direction. If it is set to zero, the normal width is
used.
* New: In CRL::PyRoutingGauge, export the updated constructor
interface. It is *not* backward compatible, one must add the
PWireWidth parameter in the various kite.py configuration
files (in etc/).
* Change: In AnabaticEngine::_gutAnabatic(), disable the minimum
area detection mechanism, replaced by a more complete one in
Katana::Track. Left commented out for now, but will be removed
in the future.
* Change: In Anabatic::AutoContact::updateLayer(), now systematically
calls setLayerAndWidth() to potentially resize the VIAs. This is
needed in real mode as VIAs are *not* macro-generated but have
their real final size.
* Change: In Anabatic::AutoContact::setLayerAndWidth(), select the
width and height of the contact using the gauge wire width *and*
perpandicular *wire width*.
* Change: In Anabatic::AutoSegment::_initialize(), the "VIA to same cap"
to PWireWidth/2, this will be the size of the VIA in the
non-preferred direction at the end cap (non-square in real mode).
* Change: In Anabatic::AutoSegment::getExtensionCap(), makes different
cases for symbolic and real. Use raw length in real, add half the
wire width in symbolic.
Add a flag to get the extension cap *only*, not increased of
half the minimal spacing.
* Change: In Anabatic::AutoSegment::bloatStackedStrap(), enhanced,
but finally unused...
* New: In Anabatic::AutoSegment::create(), use the PWireWidth when
the segment is not in the preferred routing direction (and of
minimal width).
* New: In Anabatic::Configuration, add new getPWirewidth(),
DPHorizontalWidth() and DPVerticalWidth() accessors.
* Change: In AnabaticEngine::setupPreRouteds(), skip components in
in "cut" material. We are only interested in objects containing
some metal (happens in real mode when VIAs cuts are really there).
* New: In Katana::PowerRailsPlanes::Rail::doLayout(), add an hard-coded
patch that artificially enlarge the *wide wire* so the spacing for
wide wire is enforced. For now, two pitches on each side for
"FlexLib" gauge.
* New: In Katana::Track, add support to find and correct small wire
chunks so they respect the minimum area rules.
Two helper functions:
* ::hasSameLayerTurn(), to find if a a TrackElement as non-zero length
perpandicular is same layer connected to it.
* ::toFoundryGrid(), to ensure that all coordinates will be on the
foundry grid (may move in a more shared location).
* ::expandToMinArea(), try to expand, *in the routing direction*
the too small wire so it respect the minimal area. Check for the
free space in the track.
Track::minExpandArea() go through all the TrackElements in the track
to look for too small ones and correct them.
* Change: In Katana::RoutingPlane, add an accessor to get the tracks.
* New: In KatanaEngine::finalizeLayout(), add a post-treatment to find
for minimal area violations.
* Change: In cumulus/plugins.block.configuration.GaugeConf, add a
routingBb attribute that will serve as a common reference to all
the functions calculation track positions. We must not have two
different reference for the core and the corona. The reference
is always the corona when we working on a complete chip.
* New: In cumulus/plugins.block.configuration.GaugeConf.getTrack(),
Simplified and more reliable way of getting tracks positions.
Use the routingBb.
* New: In cumulus/plugins.block.configuration.GaugeConf.rpAccess(),
Make use of getTrack() to get every metal strap on the right
X/Y position.
* New: In cumulus/plugins.block.configuration.GaugeConf.expandMinArea(),
As those wires are left alone by the router, it is our responsability
to abide by the minimal area rule here. Hence the code duplication
from the router (bad).
Mainly wires made for the clock tree, I mean.
* Bug: In cumulus/plugins.chip.configuration.ChipConf.setupICore(),
the core instance must be placed on the GCell grid, defined by the
slice height (X *and* Y).
* Bug: In cumulus/plugins.chip.corona.Builder(), forgot to use bigvia
for the corners of the inner ring.
* Bug: In cumulus/plugins.chip.pads.corona._createCoreWire(), hard-coded
patch for LibreSOCIO, the power/ground connectors toward the core
are too wide and can create DRC errors when put side by side.
Shrink them by the minimal distance.
* Change: In Hurricane::Isobar/PyHurricane.h, make the hash function use
the DBo id whenever possible instead of the object pointer, fall back
to it for standalone objects (Box like one). The DirectHashMethod()
macro generate a C style function (linkage) which call a template
function "getPyHash<>()" that uses a SFINAE mechanism to select
the right variant.
Create two comparison macros DirectCmpByPtrMethod() and
DirectCmpByValueMethod() to customize the comparison for objects that
have C++ operator==(). So now two boxes with the same contents will
be seen equal by Python. For DBo objects we keep the previous
comparison by C++ pointer.
* New: In bootstrap/coriolisEnv.py, add the "etc" directory to the
PYTHONPATH as initialization are now Python modules.
* New: In Hurricane/analogic, first groundwork for the integration of
PIP/MIM/MOM multi-capacitors. Add C++ and Python interface for the
allocation matrix and the list of capacities values.
* Change: In Hurricane::RegularLayer, add a layer parameter to the
constructor so the association between the RegularLayer and it's
BasicLayer can readily be done.
* Change: In Hurricane::Layer, add a new getCut() accessor to get the
cut layer in ViaLayer.
* Change: In Hurricane::DataBase::get(), the Python wrapper should no
longer consider an error if the data-base has not been created yet.
Just return None.
* Bug: In Isobar::PyLayer::getEnclosure() wrapper, if the overall
enclosure is requested, pass the right parameter to the C++ function.
* Change: In AllianceFramework, make public _bindLibraries() and export
it to the Python interface.
* Change: In AllianceFramework::create(), do not longer call bindLibraries().
This now must be done explicitely and afterwards.
* Change: In AllianceFramework::createLibrary() and
Environement::addSYSTEM_LIBRARY(), minor bug corrections that I don't
recall.
* Change: In SearchPath::prepend(), set the selected index to zero and
return it.
* Change: In CRL::System CTOR, add "etc" to the PYTHONPATH as the
configuration files are now organized as Python modules.
* New: In PyCRL, export the CRL::System singleton, it's creation is no
longer triggered by the one of AllianceFramework.
* New: In CRL/etc/, convert most of the configuration files into the
Python module format. For now, keep the old ".conf", but that are no
longer used.
For the real technologies, we cannot keep the directory name as
"180" or "45" as it not allowed by Python syntax, so we create "node180"
or "node45" instead.
Most of the helpers and coriolisInit.py are no longer used now.
To be removed in future commits after being sure that everything
works...
* Bug: In AutoSegment::makeDogleg(AutoContact*), the layer of the contacts
where badly computed when one end of the original segment was attached
to a non-preferred direction segment (mostly on terminal contacts).
Now use the new AutoContact::updateLayer() method.
* Bug: In Dijkstra::load(), limit symetric search area only if the net
is a symmetric one !
* Change: In Katana/python/katanaInit.py, comply with the new initialisation
scheme.
* Change: In Unicorn/cgt.py, comply to the new inititalization scheme.
* Change: In cumulus various Python scripts remove the call to
helpers.staticInitialization() as they are not needed now (we run in
only *one* interpreter, so we correctly share all init).
In plugins/__init__.py, read the new NDA directory variable.
* Bug: In cumulus/plugins/Chip.doCoronafloorplan(), self.railsNb was not
correctly managed when there was no clock.
* Change: In cumulus/plugins/Configuration.coronaContactArray(), compute
the viaPitch from the technology instead of the hard-coded 4.0 lambdas.
In Configuration.loadConfiguration(), read the "ioring.py" from
the new user's settings module.
* Bug: In stratus.dpgen_ADSB2F, gives coordinates translated into DbU to
the XY functions.
In st_model.Save(), use the VstUseConcat flag to get correct VST files.
In st_net.hur_net(), when a net is POWER/GROUND or CLOCK also make it
global.
* Change: In Oroshi/python/WIP_Transistor.py, encapsulate the generator
inside a try/except block to get prettier error (and stop at the first).
* Bug: In cumulus/plugins/PadsCorona.py, when a pad is at the beginning
or at the end of the side, the pad corona terminal may be outside
the corona range (not directly facing it). In that case, create a
bend to reach it.
Worse, in some case more than one (but likely no more), could be
in that case, so not only do we create a bend but also make a
shift in the bended segment so two consecutive ones are not on the
same axis, causing shorts.
If both end pads of a corner are in that case, we cannot prevent
a short, so at least, issue a warning.
* Bug: In CRL::Vhdl, the Entity::VstUseConcat was not passed correctly
along, so we did get a strange mix of conat and direct assignment.
* New: In Unicorn/cgt.py : added --vst-use-concat options to control
the VST driver behavior.
* Bug: In Hurricane python module, forgot to add the Segment type.
* Change: In Isobar/layer.getEnclosure() wrapper check and cast the Layer
argument into BasicLayer.
* Change: In CRL::RoutingGauge::getLayerGauge(Layer*), getLayerType() and
getLayerDirection() no longer check layer identity based on layer
mask instead of just Layer* pointer. To allow a unified call wether
the layer is real or symbolic.
* Change: In CRL::RoutingLayerGauge::getTrackIndex() and getTrackPositon(),
no longer consider negative indexes as invalid and reset them to
zero. The check for out of bound index is now left to Anabatic &
Katana.
* Change: In CRL/RoutingGauge.getRoutingLayer() and getContactLayer(),
more detailed error message.
* Change: In CRL/RoutingLayerGauge.getTrackIndex() and getTrackPosition(),
indexes are now signed long instead of unsigned.
* Change: In CRL::GdsStream, no longer export empty Cells as structures,
to avoid empty cells in Cadence. To prevent meta-transistors to be
exported as real physical objects.
Also put a hard-coded test to prevent exporting "control_r" model
which is made of AMS standard cells for "amsOTA".
* Change: In CRL/PyRoutingGauge, export the isHV() and isVH() methods so
the Stack can access it.
* Change: In Hurricane/PyCellViewer, export the removeHistory() method.
When a Cell is deleted, it must be also removed from the editor
history. This should be take care of automatically, but for now
we make it manually through scripts.
* Bug: In Anabatic::NetBuilder::doRp_accessAnalog(), the gauge offset
was not taken into account when creating initial Contact on
RoutingPad. The program self corrected afterwards, but with the
display of a disgraceful message.
* Change: In Anabatic::Configuration and Session, export the gauge offsets.
* New: In Commons, inspector support for std::pair<T,U>.
* New: In Hurricane::Layer, ContactLayer & ViaLayer, support for non
square VIAs. The hole (cut) remains square, but the various metal
extensions can now be different in X and Y. The ::getEnclosure()
method now takes a flag EnclosureH / EnclosureV.
* New: In Hurricane::DbU, inspector support for:
std::pair<DbU::Unit,DbU::Unit>
std::array<DbU::Unit,3>
Must be defined here as DbU do not exists yet in Commons.h
* Bug: In Hurricane::Interval::getSize(), when the interval is "full span",
do not return the difference between min and max, but directly DbU::Max.
(the previous result was -1 !)
* New: In CRL Core Python/Technology.py, support for non square VIAs in
the configuration files. Applied to FreePDK 45.
* New: In CRL::RoutingGauge, added a "symbolic" flag to tell if a gauge
is for symbolic layout or not. Exported to Python.
* New: In Anabatic::AutoHorizontal::updatePosition(), differentiated
computation for soure or target taking account of the VIA extension
in the right segment metal (due to non-square VIAs).
* Change: In Anabatic::AutoHorizontal::_makeDogleg(), the dogleg is
UP for HV gauges and DOWN for VH.
* New: In Anabatic::AutoSegment::_initialize(), create a cache of the
various extension length for each layer (viaToTop, viaToBottom,
viaToSame).
New implementation of getExtensionCap() using the previous cached
extension table. See updatePositions().
New static functions to access the extension cache in the header:
getViaTotopCap() ...
* Change: In Anabatic::AutoSegment, in various update methods, updateOrient()
must always be called *before* updatePositions() as extensions are
dependant on source/target.
* New: In Anabatic::AutoSegment::getEndAxes() compute the position of the
first source and last target position (center/axes) on an *aligned*
set of segments.
* New: In Anabatic::AutoSegment, add a new state flag SegAxisFixed to
signal segments that can be put on only one track. Specific case
to VH gauge for a M1 vertical terminal with a M2 vertical segment.
The M2 is effectively bound to the M1 axis position.
* Bug: In Anabatic::NetBuilderVH::_do_xG_xM1_xM3(), in case of E/W global
and only one RoutingPad the connexion to the RoutingPad was duplicated.
It was valid, but totally stupid.
* Bug: In Anabatic::Session::_canonize(), for an aligned segment set,
intersect the user constraints from all segments instead of only
considering the canonical one.
Issue a warning about too tight constraints only for symbolic
gauges. It may be correct for the real ones.
* New: In Katata::DataNegociate::update(), more accurate computation
of the perpandicular free interval. Use segment extension cap
calculation. Create a special case for fixed axis segments allowing
them to find alternative free interval, try under source and under
target as they are likely to be draggable segments.
* Change: In Katana::Manipulator::relax(), use the extension cap value
to compute the axis of the perpandicular segemnts.
* Change: In Katana::Manipulator::moveUp(), now move up the whole set
of aligned segments instead of just the canonical one.
* Change: In Katana::NegociateWindow::loadRoutingPads(), more accurate
TrackMarkers insertions for fixed terminals.
* New: In Katana::RoutingEvent::Key::Compare::operator(), segments with
fixed axis are processed prior to any others.
* New: In Katana::RoutingEventLoop, store segment pointers instead of
ids to generate more accurate error messages.
* Change: In Katana::RoutingPlane::create(), perform local track
assignment only for HV gauges.
* Change: In Katana::SegmentFsm::_slackenLocal(), add a "dragMinimize"
step in the automaton. Mutliple states transitions can occurs in
a row if an action fails.
* New: In Katana::Session::_toIntervalAxis(), normalize interval
bounds so they are on track positions (by shrinking the interval).
* Bug: In Katana::TrackMarker CTOR, the weigh computation was wrong.
* New: In CRL Core, AllianceFramework::getCell(), adds a new Catalog::State
flags to request the loading of a "foreign" cell. That is, a Cell which
is *not* in the Alliance libraries, but in *any* library starting from
the root library. This is a temporary hack to allow the Blif parser to
run.
* New: In CRL Core, RoutingGauge::getHorizontalGauge() and
RoutingGauge::getVerticalGauge() to avoid relying on either metal names
or depth to know the vertical and horizontal default routing
informations. They return the metal layers gauges *closests* to the
substrate which are likely to have the lesser pitch.
* New: In CRL Core, BlifParser, new configuration parameters:
"etesian.cell.zero" & "etesian.cell.one" to figure out what are the
tielow and tiehigh cells (instead of having the ones from sxlib
hardwired).
* New: In Etesian, add support for non-square routing pitchs, that is,
the lowest vertical and horizontal pitches are not equal. Needs to
work with two pitches (H & V) instead of one.
The Configuration associated class now also provides the
RoutingGauge (not only the CellGauge).
Use a new Configuration setting "etesian.feedNames" to set up
the names of the filler cells. This a string of comma separated
cell names.
* New: In Anabatic, Session::_getNearestGridPoint(), use the new
non-square grid scheme.
* Change: In Hurricane Commons.h, even when cdebug print nothing, it slow
down the program (three times for Kite!). Create a macro cdebug_log
which calls cdebug *only* if the debug level is active.
* Change: In Hurricane, in Flags add operator overload for "int" type
and not only "unsigned int". Otherwise the compiler complaints about
ambiguous overload when using enum values which are considered as
"int".
Simpler code for the BaseFlags::contains() method.
Added implicit conversion from BaseFlags toward bool type.
* Change: In Hurricane, in Commons, complete replacement of the previous
two trace systems (trace & ltrace) by a stream-based one.
As it is a true object it is much less fragile than the one based
on defines (but maybe a little slower).
Define a reservation table for the trace levels for all the
Coriolis & Chams components.
* Change: All tools, use the new trace system.
* Bug: In Hurricane, in HApplication, ExceptionWidget ans PyHurricane.h,
forgot to catch the Hurricane::Bug exception which was leading to
terminate() without explanations.
* Change: In Katabatic, In GCellTopology, now support one GCell with
five metal1 terminal of the same net. This unlikely configuration
did appear in the SNX for the first time...
* New: In Hurricane, in DebugSession, add a new method to activate the
trace inconditionally with a certain level.
* New: In Hurricane, in HyperNet, allow copy construction as there is
no reason to disallow it and we need it now.
* New: In Hurricane, in Cell::flattenNets(), add a new option to prevent
the flattening of the clock net(s). For more safety perform the
DeepNet creation *outside* the Collection loop.
* Bug: In Hurricane, in Cell_HyperNetRootNetOccurrences, skip the
DeepNets because they are the result of another flattening operation.
* New: In Isobar, in PyBasicLayer, export C++ method getBlockageLayer().
* New: In Isobar, in PyRoutingGauge, export C++ method getLayerPitch(),
needed by Cumulus plugins.
* New: In Etesian, EtesianEngine::findYSpin() to look for the Y orientation
if some cells are already placed. Typically the buffers of a clock
tree.
Pass the correct orienation to row_compatible_orientation().
Do not try to add feeds in the ISPD05 benchmarks. For now the
benchmarks are detected through their names (unreliable).
* Change: In Knik, in KnikEngine::initGlobalRouting(), allow the clock
to be routed as an ordinary signal when the clock tree is not
used.
* New: In Kite, in BuildPowerRails, management & detection for the
pre-routed clock.
In KiteEngine constructor, early initialization of the blockage
net to avoid later troubles in BuildPowerRails.
* New: In Cumulus, in ChipPlugin, add support for Etesian plus new
configuration parameter 'clockTree.placerEngine' to select between
Mauka and Etesian.
* New: In Cumulus, in BlockCorona, add blockages in the vertical sides
in the vertical layer to prevent the router to use the vertical
tracks in under the prower lines (for example, blockage in M3
with power line M5).
In Cumulus, in ChipConf add attribute to access the blockage net.
* New: In Cumulus, when the clock tree is disabled, do not generate
the last rail around the block (the clock rail).
* Bug: In Cumulus, in ChipConf use the clock pad to guess the clock
signals and *not* the power pad.
Add more meaningful error messages if a pad global signal is
not found (implicit connexion by name).
* Bug: In Cumulus, in ClockTree, compute correctly the cells Y spin,
that is *from the bottom of the cell AB* (not from 'zero').
* New: In CRL Core, in helpers & alliance.conf, set and read a "PAD"
variable to define the pad model name extension ("px" for "sxlib
and "pxr" for vsxlib, this is provisional).
* New: In CRL Core, in plugin.conf, add parameters to define the name
of used for power & clock supply. We may remove the extention in
the future (to be more coherent with the previous modification).
* New: In Cumulus, in chip.Configuration.GaugeConf._rpAccess(), no
longer place the accessing contact *at the center* of the
RoutingPad. It works under sxlib because buffers & registers all
have same size terminals. But this is not true under vsxlib,
leading to misaligned contacts & wires. Now systematically place
on the slice midlle track (maybe with one pitch above or below).
This is still very weak as we do not check if the terminal
reach were the contact is being put. Has to be strenthened in
the future.
* New: In Cumulus, in chip.Configuration.ChipConf, read the new
clock & power pad parameters.
* Change: In Isobar (and all other Python wrappers), uses PyLong instead
of PyInt for DbU conversions. In PyHurricane argument converter,
automatically check for both PyLong and then PyInt.
* Change: In Cumulus, in chip.PadsCorona, more accurate error message
in case of discrepency in global net connections (i.e. no net
of the same name in instance model and instance model owner.
* Change: In Kite, in BuildPowerRails, when looking up at the pads
model name to find "pck_" or "pvddeck_", do not compare the
extension part. But we still use hard-coded stem pad names,
maybe we shouldn't.
* Bug: In Katabatic, in GCellConfiguration::_do_xG_xM1_xM3(), there
was a loop in the search of the best N/E initial RoutingPad.
* Bug: In Kite, in KiteEngine::protectRoutingPads(), *do not* protect
RoutingPads of fixed nets, they are already through the
BuildPowerRails stage (and it's causing scary overlap warning
messages).
* Bug: In Cumulus, in ClockTree.HTreeNode.addLeaf(), do not create
deep-plug when the core is flat (not sub-modules). All the new
nets are at core level.
* Bug: In Cumulus, in ChipPlugin.PlaceCore.doFloorplan(), ensure
that the core is aligned on the GCell grid (i.e. the slice
grid of the overall chip).
* Bug: In Kite, in GCellTopology::_do_xG_xM1_xM3(), infinite loop
while looking for the bigger N-E RoutingPad. Forgot to decrement
the index...
Finally get rid of the demonic code from Wu Yifei...
* New: In Isobar, added encapsulation of Interval (don't know how have
forgotten it for so long).
* Change: In Isobar, In PyLayer, new PyLink_LayerDerived() function to
create/link the C++ object to the correct derived class and not the
base one (PyLayer) which then prevent to use the specialized methods.
Must replace PyLink_Layer() througout all the code.
* Change: In Isobar, in PyPoint the "setX()" & "setY()" methods where
still capitalized.
* Change: In Isobar, in PyQuery, complete the exportation of the C++
interface. remove the code belonging to a more "boost" way of
building the Python interface (will do that in a far future).
* New: In CRL Core, In PyAllianceFramework, export isPad() method.
* Change: In Unicorn, in unicornInit.py, protect the loading of each
single plugin by a "try" / "except" clause to the failing of one
plugins do not stop the loading of the next one.
Pass the same dictionnary argument to unicornHook() as for
ScripMain(), this is more uniform this way.
* New: In Cumulus, complete replacement of the chip placement scripts
from Wu Yifei (at last!). The clock-tree integration is still to
be done.
________________________________________________________________________
* New: In CRL Core, in PyCellGauge, add the missing methods.
* Bug: In Isobar, PyOccurrence_create(), the HTRY/HCATCH block was not
enclosing the constructor of Occurrence, which can throw exceptions.
When an exception was thown the Python interpreter just terminate
with the cryptic message:
"Fatal Python error: Py_EndInterpreter: thread still has a frame"
Reminder to myself: when such a message occurs, it means that the
interpreter did encounter a problem, but it's related to the isobar
interface.
- A complete sweep of cleanup to suppress allmost all compiler warnings.
* ./crlcore:
- New: Extented Python support for all objects needed to configure Coriolis.
- New: Configuration files and load helpers completly written in Python.
An XML emulation mode is still avalaible.
- New: UsersGuide, as a replacement for README, written in ReST.
- New: Start of Doxygen documentation (mostly for documenting the initialisation
objects & methods).
Jean-Paul Chaput