riscv
/
coriolis
mirror of https://gitlab.lip6.fr/vlsi-eda/coriolis.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity
2,990 Commits 18 Branches 8 Tags 96 MiB
Commit Graph

4 Commits

Author SHA1 Message Date
Robert Taylor 9982f21f56 Update repo references in code to point to github 2023-07-16 19:24:53 +00:00
Jean-Paul Chaput 654ae5b8a4 Added compile script for Yosys in docker (for Debian 10). 2020-03-20 15:07:41 +01:00
Jean-Paul Chaput 2af531991e Correct drive of the Pin in AP driver. 
* Bug: In CRL::ApDriver::DumpSegments(), when saving RoutingPads build
    on Pin *not* at the top level (that is, Pin from an instance),
    use the pin's orientation to choose the segment type.
      * NORTH/SOUTH becomes a Vertical.
      * EAST/WEST becomes an Horizontal.
      Formerly, the segment direction was guessed only for the bounding
    box, leading to segments in incorrect directions leading to DRC
    errors (in nmigen/ALU16, net "b(10)").
* Bug: In CRL/symbolic/cmos/technology.py, forgotten import for
    WarningMessage.
 2020-03-20 12:05:12 +01:00
Jean-Paul Chaput 837de500aa Compliance with Debian 10 Buster. 
* Change: In all tools, FindTOOL.cmake, no longer use LIB_SUFFIX to
    search for tool libraries but try "lib64/" then "lib/".
* Change: In bootstrap/socInstaller.py, take Debian 10 into account.
* Change: In bootstrap/docker, move from Debian 9 to Debian 10.
 2020-03-19 18:18:35 +01:00