* Bug: In GdsParser::readStructure(), the Gds::Layer_0_IsBoundary flag
was not taken into account. The abutment box was always forced to
the bounding box, resulting in incorrect cell size (and placement).
In order to better handle colliding cell names coming from multiple
GDS files, now, if a topCell is defined, create a sub-library with
the name of that top cell and put any other model from *that* GDS
file into it. This way, only the top cell will be shown in the
library and sub-cells with common names will be separateds.
Work needed for loading GF180MCU I/O pads.
* New: In Gds::setTopCellname(), specify the name of the top cell
we specifically wants to load from the GDS file.
* New: In GdsStream::getCell(), function to find/create a Cell in
the current library and, if any, the "top cell" dedicated
sub-library.
* Change: In GdsStream::readTextBody(), if the layer material of
the label is "other", do not create a Net with the name of
the label. This should be a pure text label. Use the new
Hurricane::Text Go for that.
Compute the text box in a approximative way. Have to make
it smarter in the future.
* Change: In LefImport::_macroForeignCbk(), change of policy for
loading associated GDS. First, we look if a cell with the
right name exists, in which case we use it. If not, *only*
then, do we try to load from GDS.
This allows to load by ourselves, in a separate way the
GDS. This is more flexible when there are naming issues.
* New: Hurricane::Text Go class, to display text label without the
need of a Net.
* New: In Hurricane::CellWidget, add support to display
Hurricane::Text. Add a new mode to drawDisplayText() : FillBox
so the text is resized to exactly fill the box it is in
(in width).
* Change: In Katana::PowerRailsPlanes::Rail::doLayout(): change the delta
computation. Extend of the pitch *minus* the half wire-width *minus* 1.
So a wire at minimal with will reach exactly the previous and next
track axis. And will not be insterted in them due to the "minus 1".
TrackFixedSegments created at this stage must be flagged as
TElemBlockageNet, so that any overlap between them is not seen as an
error by the track overlap checker.
This was a problem for the clock tree wires which partly uses
pre-fixed wires, but the driver of the H-Tree is a normal signal that
must abide the usual checking.
* Change: In Katana::TrackFixedSegment::getNet(), no longer rely on the
kind of net to choose to return the actual net or the blockage one,
but uses the TElemUseBlockageNet flag.
Jean-Paul Chaput
Robert Taylor
Gabriel Gouvine