* New: In CRL::RoutingLayerGauge, two new types of gauge are supported:
- Unusable : just do nothing with it, but the layer is stacked.
- BottomPowersupply : can be used for supply routing only, and
is *below* the normal routing layers (instead of on top as
usual).
Both new types must be *below* the real routing layers.
* New: In CRL::RoutingGauge, add a new attribute "firstRoutingLayer"
to give the index (depth) of the first layer usable for routing.
(not Unusable and not BottomPowerSupply)
* New: In Anabatic::Session & Anabatic::NetBuilder, in order to build
the initial wiring, provides (Session) and use (NetBuilder) the
new functions:
- getBuildRoutingLayer(depth)
- getBuildContactLayer(depth)
Thoses functions takes into account (offset) the unusable layers
so depth 0 is the first usable routing layer, and so on.
* New: In Technology, in order to support symbolic technology on top
of a real technology using non-generic layer names, it comes in
handy to be able to define layer alias names. Generic *real*
layer names could be defined as alias over the technology
specific ones. Then, we can build the symbolic layers upon
the generic names (so *that* part of the init code can be
shared between techs).
Adds Technology::addLayerAlias()
The semantic of Technology::getLayer() changes a little, it
return the techno layer associtated to the name *or* the
aliased name.
* Bug: In Technology::_addPhysicalRule(), in case of a rule redefinition,
we were using it's name *after* the deletion of the rule object.
Nasty crash.
Improve the error message by giving the name of the conflicting
rule.
* In CRL/helpers.analogtechno, add an addDevice() function to load
analogic devices descriptors (copied from the old init system).
* In CRL/ApParser, if an exception is catched, tells in which file and
line it did occur.
* In Oroshi/dtr.Rules, add a translation step to get the rule names
from the technology. From generic names to actual technology
layer names.
Add some documentation.
* In Oroshi/stack.Stack, get the layers names through dtr.Rules to get
the layers names translated.
Previously, the relevant NetBuilder and routing strategies where
directly guessed from the RoutingGauge traits. This is no longer
doable as the combinations increases. Now to configure both the
global and detailed router we need three "parameters" :
1. The routing gauge itself (tells which layers are in which
directions) and how to make the VIAs.
2. The NetBuilder to use, they are identified by strings.
Currently we support:
* "HV,3RL+", for all SxLib derived standard cells.
* "VH,2RL", for hybrid routing (over the cell, but terminals
are also in the first RL).
* "2RL-", for strict channel routing.
* "VH,3RL+", an attempt for FreePDK 45, not optimized enough
to be considered as usable.
3. The routing style, mostly affect the way the GCell grid will be
built.
* VH : first RL is V.
* HV : first RL is H.
* OTH : Run in full over-the-cell mode (needs at least 3RL).
* Channel : Run in *strict* channel routing mode (no routing over
the standard cells).
* Hybrid : Create channels, but can use H tracks over the
standard cells.
Thoses three parameters are partly overlapping and must be sets in
a consistent manner, otherwise strange results may occurs.
* New: CRL::RoutingGauge::getFirstRoutingGauge(), to get the lowest
layer available for routing (not a PinOnly, not a PowerSupply).
* Change: In CRL::RoutingGauge::isHV() and isVH(), were previously
always returning false when the gauge was 2RL only. Now, check
on the first usable RL.
* Bug: In cumulus/plugins.block.configuration._loadRoutingGauge(),
there was a bad computation of the deep RLs when the top layer
was not defined. Occured for 2RL gauges only.
* Bug: In Anabatic::RpsInRow::slacken() (LayerAssign), forgotten curly braces
in the test to skip METAL2 terminals.
* Change: In Etestian::BloatChannel::getDx(), adjust the bloating
policy to converge on Arlet6502. Always ensure that there is
a 50% ratio between terminal used V-tracks and free ones.
If there is more than 80% of terminals, add one more track.
* Bug: In AnabaticEngine & KatanaEngine, KatanaEngine is a derived
class of AnabaticEngine. They uses Anabatic::Configuration
and Katana::Configuration that also derives from each other.
I though I had made one configuration attribute in the base
class that was using the right Configuration. But no. I did
have two configurations attributes, one in AnabaticEngine and
one in KatanaEngine, the later "shadowing" the former. As a
results, parameters modified in AnabaticEngine, *after* the
initial creation of the tool *where never seen* at Katana
level (due to it's own duplicate). What a mess.
Now there is only one attribute in the *base* class Anabatic,
which is created through a new virtual function _createConfiguration()
called in _postCreate() which allocate the right Configuration
according to the dynamic type of the tool (KatanaEngine).
In KatanaEngine, access the configuration through the
attribute (_configuration) and not the accessor (getConfiguration()).
* Bug: In KatanaEngine, no longer directly use the _configuration attribute
(which is not accessible anyway) but the getConfiguration() accessor.
The accessor perform a static_cast from the Super::getConfiguration()
into Katana::Configuration.
Complete cleanup of the various configuration accessors.
* New: AnabaticEngine::setupNetBuilder(), perform an early check
of the requested NetBuilderStyle. The NetBuilderStyle is just a
string that will be matched against the (hard-coded) supported
NetBuilders. Then check the topological characteristics against
the capabilities of the gauge (HV, VH and so on).
Still a bit too hard-coded for now.
This function has been split from AnabaticEngine::_loadGrByNet().
* Change: AnabaticEngine::isChannelStyle() renamed from isChannelMode().
* New: In Anabatic::Configuration, two new attributes to select the
topology and routing style:
- _netBuilderStyle to explicitely select the NetBuilder to use.
It's a string, which is provided by each NetBuilder.
- _routingStyle to define how the overall routing will work.
It's a set of flags (StyleFlags):
* VH : first RL is V.
* HV : first RL is H.
* OTH : Run in full over-the-cell mode (needs at least 3RL).
* Channel : Run in *strict* channel routing mode (no routing over
the standard cells).
* Hybrid : Create channels, but can use H tracks over the
standard cells.
* New: In anabatic/Constants, add StyleFlags to define how the router
should operate (see above).
* Bug: In Anabatic::GCell, in CTOR, no reason to set up the HChannelGCell flag.
* Bug: In Anabatic::GCell::updateDensity(), when computing layers non contiguous
saturation, do not systematically skip RL 0, but only if it's PinOnly.
* Change: In Anabatic::NetBuilder, rename isTwoMetal by isStrictChannel.
* Change: In Anabatic::NetBuilderHV, rename doRp_AccessNorthPin() in
doRp_AccessNorthSouthPin(). More accurate.
* Bug: In NetBuilderHV::_do_1G_xM1_1PinM2(), the wires to connect the M1
terminals where created *twice*. Uterly stupid, there where placed in
overlap by the router!
* New: In AnabaticEngine, new accessors to the NetBuilderStyle and
RoutingStyle, proxies towards Configuration.
* Bug: In Manipulator::relax(), if there are two doglegs to be done, but
they are in the same GCell, only do one (the conflicting interval)
is short.
* Change: In Katana::Session, rename isChannelMode() into isChannelStyle().
* Change: In TrackSegment::isUnbreakable() and isStrap(), return false
when the base segment is a *weak global* (aligned with a global one).
* Change: In Katana::Row::createChannel(), correctly distinguish between
*strict channel* style and *hybrid* style. Tag the GCells as std cells
row or channels only in the former case.
* New: In CRL::DefExport, checkStatus() has a second argument to display
a more comprehensive error message.
Applied throughout all the DEF callbacks.
* Bug: In CRL::DefExport, the UNIT statement and associated toDefUnits()
functions where wrong. Now always use a UNITS of 1000 in microns.
Then toDefUnits() converts DbU into microns and multiply by 1000.
* Change: In CRL::defExport::_netCbk(), enable the net name renaming
only when the ProtectNetNames flag is set.
* New: In CRL::PyDefExport, also export the flag values to Python.
* In CRL::GdsStream::_staticInit(), all the layers where added to the
translation table, whether or not they where configured for the
GDS stream. So the non GDS configured layers got a GDS layer
id of 0 and were using this case. Either overwriting the legit
layer or creating a new one while it should have been invalid.
Now we check for the hasGds() predicate of the layers.
* In CRL::GdsStream, add a new option to tell that, layer id 0,
if undefined, may be used as the definition of the boudary of
the cell (abutment box).
* In CRL::PyGds, now also export the flags to the Python interface.
The decoupling of the cell gauge and the routing gauge implies that
the METAL2 & METAL3 terminals of macro blocks cannot be aligned on
the routing tracks anymore. That is, an horizontal METAL2 terminal
will not be on a track axis, but offgrid, so we no longer can use
a METAL2 horizontal segment to connect to it. Making an adjustement
between the offgrid terminal and the on-grid segment has proven
too complex and generating difficult configuration for the router.
Moreover, METLA2 terminal could be fully inside a METAL2 blockage.
So now, when the gauges are decoupled, we connect the METAL2 and
METAL3 the same way we do for METAL1: *from above* in the perpandicular
direction and using a *sliding* VIA. We assume that those kind of
terminals in upper metals are quite long.
* New: In Hurricane::Rectilinear, export the isNonRectangle() method
to the Python interface.
* New: In CRL::RoutingGauge, add function isSuperPitched() with the
associated boolean attribute. Set to true when each pitch of
each layer is independant (not low fractional multiples).
* New: In AnabaticEngine, add the ability to temporarily disable the
canonize() operation (mainly used in dogleg creation).
* New: In AutoSegment::canonize(), do nothing if the operation is
disabled by AnabaticEngine.
* Bug: In Session::_revalidateTopology(), disable the canonization
during the topology updating of a net. Too early canonization
was occuring in makeDogleg() leading to incoherencies when
performing the later canonization stage over the complete net.
Mostly occured in the initial build stage of the net.
* New: In GCell, add function postGlobalAnnotate(), if a layer
is fully blocked (above 0.9), typically, under a blockage,
add a further capacity decrease of 2 on the edges. So we may
handle a modicum of doglegs.
* Bug; In GCell::addBlockage(), removeContact(), removeHSegment()
and removeVSegment(), forgot to set the Invalidated flag.
This may have lead to innacurate densities.
* Change: In GCell::updateDensity(), more complex setting of the
GoStraight flag. This flag is now set if we don't have two
*contiguous* below 60% of density. We need free contiguous
layers to make doglegs.
* New: In NetBuilder, now manage a current state flag along
with the state flag of the *source* GCell. This flag is used
to tell if the GCell needs it's *global* routing to be done
using the upper layers (METAL4 & METAL5) instead of the
lower ones.
* New: In NetBuilder::setStartHook(), set the state flag of the
GCell to ToUpperRouting when processing a global routing
articulation and one of the base layer is obstructed
above 0.9.
In GCell with terminals, also set ToUpperRouting when there
are some in METAL2 / METAL3 and the gauge is not super-pitched.
* New: In NetBuilder, function isInsideBlockage(), to check if a
terminal is completely or partially enclosed in a blockage.
* Change: In NetBuilderHV::doRp_AutoContact(), remove support for
trying to put on grid misaligned METAL2/METAL3.
Instead systematically access them from above.
Do not cover with fixed protection terminals that are already
enclosed in blockages.
* Bug: In NetBuilderHV::doRp_AutoContact(), always add the terminal
contact in the requested GCell and not the target/source one,
in case the terminal span several GCells.
* Change: In NetBuilderHV::doRp_Access(), create the local wiring
according to the RoutingPad layer.
* Change: In NetBuilderHV::_do_xG(), _do_2G(),
create the global wiring in upper layers, according to the
ToUpperRouting flag.
* Change: In NetBuilderHV::_do_xG_xM3(), now delegate to
_do_xG_xM3_baseRouting() and _do_xG_xM3_upperRouting() if the
density at terminal level is above 0.5.
* New: NetBuilderHV::_do_xG_xM3_baseRouting() and
_do_xG_xM3_upperRouting() separated function to manage the
local routing.
* Change: In NetBuilder::_do_globalSegment(), if the currently
processed GCell or it's source is in ToUpperRouting mode,
move up the global segment. Do *not* use the moveUp() function
which would create doglegs unwanted at this stage.
* New: In KatanaEngine::annotateGlobalGraph(), call postGlobalAnnotate()
on the GCell after the blockages have been taken into accound to
add the penalty.
* Bug: In Track::getPrevious(), correctly manage the 0 value for the
index argument. Strange it didn't show earlier.
Same goes for Track::expandFreeInterval().
After a Cell has been created in memory (by parsers or Python scripts)
we can annotate it with the Spice parser so it will know the right
order with which to create the subcircuit call ('x').
* New: In CRL::Spice::load(), add support to read the ".subckt" card
and guess the right ordering for generating the 'x' (subcircuit
card call).
* Bug: In Spice::SpiceBit & Spice::BitExtension, when a Net bit property
is removed, if it's the currently cached property in BitExtension
it may lead to a crash. So when a property is destroyed, we must
also clear the cache (see remove(), clearCache() & onReleasedby()).
I'm wary that this could also happen on other kind of cached
extensions...
* New: In CRL::NamingScheme, new method vhdlToVlog() to translate back
VHDL net name into Verilog. Currently only changes "()" into "[]".
Used to generate the commented SPICE interface for Alliance compliance.
* Change: In Spice::Entity, previously all the ordering where removed
between each run of the SPICE parser, but the orders read from
SPICE file (mostly standard cells) must be kept. So add a flag
ReferenceCell to prevent the removal by ::destroyAll().
* Bug: In all CMakeLists.txt, it seems I was doing a worng use of
target_link_library(). No longer add dependencies to the C++ base
library but instead either to the Python associated module or
to the final binaries. This was inderectly causing the linking
problem related to Python (which was a misdirection).
* Bug: Typo in FindLibexecinfo.cmake, do not use FindLib[E]xecinfo.
* Change: In CRL/ccore/CMakeLists.txt, activate SKIP_AUTOMOC on
bison/flex generated files.
* Bug: In viewer/PyHApplication, do not delete the C++ object in
the Python destroy method.
* New: Python/C++ API level:
* Write a new C++/template wrapper to get rid of boost::python
* The int & long Python type are now merged. So a C/C++ level,
it became "PyLong_X" (remove "PyInt_X") and at Python code
level, it became "int" (remove "long").
* Change: VLSISAPD finally defunct.
* Configuration is now integrated as a Hurricane component,
makes use of the new C++/template wrapper.
* vlsisapd is now defunct. Keep it in the source for now as
some remaining non essential code may have to be ported in
the future.
* Note: Python code (copy of the migration howto):
* New print function syntax print().
* Changed "dict.has_key(k)" for "k" in dict.
* Changed "except Exception, e" for "except Exception as e".
* The division "/" is now the floating point division, even if
both operand are integers. So 3/2 now gives 1.5 and no longer 1.
The integer division is now "//" : 1 = 3//2. So have to carefully
review the code to update. Most of the time we want to use "//".
We must never change to float for long that, in fact, represents
DbU (exposed as Python int type).
* execfile() must be replaced by exec(open("file").read()).
* iter().__next__() becomes iter(x).__next__().
* __getslice__() has been removed, integrated to __getitem__().
* The formating used for str(type(o)) has changed, so In Stratus,
have to update them ("<class 'MyClass'>" instead of "MyClass").
* the "types" module no longer supply values for default types
like str (types.StringType) or list (types.StringType).
Must use "isinstance()" where they were occuring.
* Remove the 'L' to indicate "long integer" (like "12L"), now
all Python integer are long.
* Change in bootstrap:
* Ported Coriolis builder (ccb) to Python3.
* Ported Coriolis socInstaller.py to Python3.
* Note: In PyQt4+Python3, QVariant no longer exists. Use None or
directly convert using the python syntax: bool(x), int(x), ...
By default, it is a string (str).
* Note: PyQt4 bindings & Python3 under SL7.
* In order to compile user's must upgrade to my own rebuild of
PyQt 4 & 5 bindings 4.19.21-1.el7.soc.
* Bug: In cumulus/plugins.block.htree.HTree.splitNet(), set the root
buffer of the H-Tree to the original signal (mainly: top clock).
Strangely, it was only done when working in full chip mode.
SPICE simulators don't like to have the same model defined twice.
As we have a "one file per model policy", then we must include the
model file only once. This is particularly critical for standard
cells. So now, the driver include all the models in the top level,
both terminals ans intermediate. And the sub-models include nothing.
We stop at the "TerminalNetlist" level.
Add an option flag througout all the Spice driver hierarchy to
convey that information.
The structure of the driver is copied from the Vhdl one. It is not
integrated as a an AllianceFramework one but as a standalone like
GDS. For now use numerical indexes for electrical nodes but also
support strings. The nets are ordereds in reverse alphabetical
order, but a custom order can be defined, if we read the model
from an external SPICE subckt (to be done).
SPICE saving has also been added to the cumulus/rsave plugin
and the block/chip P&R one.
* New: In CRL::PyCatalog, add the second parameter "add" to getState()
so we can request the creation of the state if needed.
* New: In CRL::PyCatalogState, export setCell() and setInMemory() methods.
* Bug: In CRL::Subckt::createModel(), when a cell has a State entry in
the catalog, also check that it really has a Cell loaded in memory.
If not, throw an exception (and do not crash).
* Change: In Hurricane::NetAlias, store additional data in NetAliasName,
the external status of the former Net. When a Net::merge() is
performed, we must keep track of whether the merged (destroyed)
one was external and keep that information.
Add NetAliasHook::isExternal() & NetAliasHook::setExternal()
virtual methods.
* Change: In Net::getNet() add a new optional argument to allow the
search of the net name in *internal* aliases. Otherwise only the
aliases tagged as *external* will be searched.
It was a bug that, when looking for a Plug master net by name
we got an homonymous internal net. In that case we must only
look for net that are (or where) part of the interface.
* New: In Vhdl::VectorSignal, when a vector contains only one bit,
unvectorize it, like when it is non-contiguous (we use the
isCountiguous() method to carry that information).
* New: In Vhdl::VhdlEntity, Catalog::State and NamingScheme, added
a flag UniquifyUpperCase to uniquify the names in uppercases.
In case of a clash with the same name in lowercase.
Prepend 'u' before all previously uppercased letter. For
example 'VexRiscV' becomes 'uvexuriscuv' (urgh!).
The Catalog flags is exported to Python for use by the blif2vst
script.
* Change: In BlifParser, Model::newOne() and Model::newZero(), return
a new gate each time it is called instead of making just one for
each Model. This way, if two outside nets are connected to one
or zero they do not get merged (should work, but will be less
clear).
* Bug: In BlifParser, Model::connectSubckts(), when looking for the
master net in the instances models (by name), limit the search
to the *external* aliases names.
* Change: In NamingScheme::vlogTovhdl(), reactivate the removal of
two consecutive '_'.
* Change: In cumulus/bin/blif2vst.py, prefix the master cells
(i.e. components) with 'cmpt_' to avoid clash names with signals
in VHDL.
* New: CRL::restoreNetsdirection() (in ToolBox) that checks the coherency
of all Nets direction through a complete hierarchy of cells.
Stops at Cells flagged "TerminalNetlist".
Directions are rebuilt for all the Cells part of the hierarchy
in a bottom up fashion. It is also checked that Nets have only one
driver (we assume there is no three-state busses).
To sort cells in hierarchical order (bottom up according to their
depth), copy the DepthOrder class from the GDSII driver. Will unify
them later.
exported to the Python interface.
* New: In cumulus/tools/blif2vst.py, add a call to restoreNetsdirection()
before saving.
* New: In CRL::RoutingLayerGauge, add a new kind of gauge "PowerSupply"
to flag a layer which is dedicated to routing power supplies.
* New: In AllianceFramework, add management of PowerSupply gauge kind.
Exported in the Python interface.
Integrate new features and bug fixes so the Arlet 6502 benchs successfully
passes real DRC with reference industrial tools. Short summary:
* Manage minimum area for VIAs in Katana::Tracks.
* Allow different wire width for wires perpandicular to the prefered
routing direction.
* StackedVIAs used in the clock tree no longer assume an uniform
routing grid (same offset & pitch all the way up).
* Some hard-coded patches in PowerRails for FlexLib.
* New: In CRL/symbolic/cmos/kite.py & cmos45/kite.py, update the
RoutingLayerGauges by adding the new PWireWidth parameter.
Always zero in case of symbolic layout (too fine tuning).
* New: In CRL::RoutingGauge, add accessor to PWireWidth parameter.
Modify the clone method.
* New: In CRL::RoutingLayerGauge, add new parameter "PWireWidth"
to give the width of a wire when it not drawn in the prefered
routing direction. If it is set to zero, the normal width is
used.
* New: In CRL::PyRoutingGauge, export the updated constructor
interface. It is *not* backward compatible, one must add the
PWireWidth parameter in the various kite.py configuration
files (in etc/).
* Change: In AnabaticEngine::_gutAnabatic(), disable the minimum
area detection mechanism, replaced by a more complete one in
Katana::Track. Left commented out for now, but will be removed
in the future.
* Change: In Anabatic::AutoContact::updateLayer(), now systematically
calls setLayerAndWidth() to potentially resize the VIAs. This is
needed in real mode as VIAs are *not* macro-generated but have
their real final size.
* Change: In Anabatic::AutoContact::setLayerAndWidth(), select the
width and height of the contact using the gauge wire width *and*
perpandicular *wire width*.
* Change: In Anabatic::AutoSegment::_initialize(), the "VIA to same cap"
to PWireWidth/2, this will be the size of the VIA in the
non-preferred direction at the end cap (non-square in real mode).
* Change: In Anabatic::AutoSegment::getExtensionCap(), makes different
cases for symbolic and real. Use raw length in real, add half the
wire width in symbolic.
Add a flag to get the extension cap *only*, not increased of
half the minimal spacing.
* Change: In Anabatic::AutoSegment::bloatStackedStrap(), enhanced,
but finally unused...
* New: In Anabatic::AutoSegment::create(), use the PWireWidth when
the segment is not in the preferred routing direction (and of
minimal width).
* New: In Anabatic::Configuration, add new getPWirewidth(),
DPHorizontalWidth() and DPVerticalWidth() accessors.
* Change: In AnabaticEngine::setupPreRouteds(), skip components in
in "cut" material. We are only interested in objects containing
some metal (happens in real mode when VIAs cuts are really there).
* New: In Katana::PowerRailsPlanes::Rail::doLayout(), add an hard-coded
patch that artificially enlarge the *wide wire* so the spacing for
wide wire is enforced. For now, two pitches on each side for
"FlexLib" gauge.
* New: In Katana::Track, add support to find and correct small wire
chunks so they respect the minimum area rules.
Two helper functions:
* ::hasSameLayerTurn(), to find if a a TrackElement as non-zero length
perpandicular is same layer connected to it.
* ::toFoundryGrid(), to ensure that all coordinates will be on the
foundry grid (may move in a more shared location).
* ::expandToMinArea(), try to expand, *in the routing direction*
the too small wire so it respect the minimal area. Check for the
free space in the track.
Track::minExpandArea() go through all the TrackElements in the track
to look for too small ones and correct them.
* Change: In Katana::RoutingPlane, add an accessor to get the tracks.
* New: In KatanaEngine::finalizeLayout(), add a post-treatment to find
for minimal area violations.
* Change: In cumulus/plugins.block.configuration.GaugeConf, add a
routingBb attribute that will serve as a common reference to all
the functions calculation track positions. We must not have two
different reference for the core and the corona. The reference
is always the corona when we working on a complete chip.
* New: In cumulus/plugins.block.configuration.GaugeConf.getTrack(),
Simplified and more reliable way of getting tracks positions.
Use the routingBb.
* New: In cumulus/plugins.block.configuration.GaugeConf.rpAccess(),
Make use of getTrack() to get every metal strap on the right
X/Y position.
* New: In cumulus/plugins.block.configuration.GaugeConf.expandMinArea(),
As those wires are left alone by the router, it is our responsability
to abide by the minimal area rule here. Hence the code duplication
from the router (bad).
Mainly wires made for the clock tree, I mean.
* Bug: In cumulus/plugins.chip.configuration.ChipConf.setupICore(),
the core instance must be placed on the GCell grid, defined by the
slice height (X *and* Y).
* Bug: In cumulus/plugins.chip.corona.Builder(), forgot to use bigvia
for the corners of the inner ring.
* Bug: In cumulus/plugins.chip.pads.corona._createCoreWire(), hard-coded
patch for LibreSOCIO, the power/ground connectors toward the core
are too wide and can create DRC errors when put side by side.
Shrink them by the minimal distance.
* New: In CRL::AllianceFramework::wrapLibrary(), can now add in the set
of AllianceLibrary one which is wrapped around another one. All the
cells must be already present and do attempt to save them with
AllianceFramework (AP parser will drive nonsensical datas).
* New: In CRL::PyAllianceFramework, export getCatalog(), in PyCatalog,
export the getState(name) method and add a PyCatalog_Link().
In PyCatalogState, add PyCatalogState_Link(), cannot use the
macro because of the C++ name resolution operator (Catalog::State).
* New: In Isobar, export the RoutingPads collection to the Python interface.
* New: In Hurricane::Net, export the getRoutingPads() method to the
Python interface (hence the need of the previous export).
* Change: In Vhdl:::Signal::toVhdlPort(), in Alliance VST signal with
undefined directions are typed "linkage". This may not be compatible
with vasy, so allow to replace them by "in".
* New: In CRL::Catalog::State, add a new flag VstNoLinkage to tell if
the VST driver should not use the "linkage" type.
* Change: In Vhdl::Entity, add a VstNoLinkage flag to disable the use
of the "linkage" type.
* New: In CRL::NamingScheme, add a flag VstNoLowerCase, and its
management it in the Verilog to VHDL converter.
* Change: In CRL::BlifParser::Model::toVhdlModels(), disable the
lowercasing of identifiers. We shouldn't apply Alliance VHDL
subset constraits when reading blif files. So we will see
uppercase identifiers in Coriolis.
* Change: In CRL::VstParser, no longer lowercase identifiers that
are *not* VHDL keywords. Uppercases are legals in VHDL...
* New: In CRL::Catalog::State, add a new flag VstNoLowerCase to
tell if the VST driver should keep the uppercases.
* Change: In CRL::VhdlEntity, add a VstNolowerCase flag to disable
the lowercasing.
* Change: In CRL::vstDriver, lower case the file name if needed.
remove the previously opened filename if it differs from the
lowercased one.
* Change: In UnicornGui CTOR, disable VHDL enforcement for the
Blif parser.
* Change: In CRL::LefParser::_macroCbk(), create a Catalog entry for the
newly read MACRO (that is Cell) and sets the Logical, Physical,
InMemory and TerminalNetlist flags.
* Bug: In CRL::LefParser::_siteCbk(), check for NULL cell gauge.
* New: In CRL::AllianceFramework, add setCellGauge(), to set the default
cell gauge. Exported to Python.
* Change: In CRL/etc/common/technology.py, create variables for VIA
layers, so we can modify their properties afterwards.
* New: In CRL/etc/node45/freepdk45, port the configuration files to the
new Python "importable" format.
Note: in kite.py, all the gauges (Routing & Cells) must be named
"LEF.CoreSite" to please my LEF parser, so it can match the gauge
name with the SITE name for standard cells.
* Bug: In Anabatic::NetBuilderVH::_do_2G(), forgotten to be reimplemented
from the base class. Simply redirect to _do_xG().
* Change: In Katana::PowerRailsPlanes::PowerRailsplanes(), create plane
from the layers in the RoutingGauge and their associated blockages
instead of sweeping through all the basic layers.
Allow to distinguish bewteen "METAL" (symbolic) and "metal" (real).
In the Cell/Instance hierarchy, the "terminal" and "leaf cell" concepts
where not clearly defined and partially overlapping. Now, "Terminal" is
the refer to the physical hierarchy (layout) and "TerminalNetlist" to
the logical hierarchy (netlist). The logical hierarchy can be less deep
than the physical one thanks to a Cell dedicated cell flags. Collections
related to the physical hierarchy keep their old names, the one related
to the logical hierarchy are renamed from "Leaf" to "TerminalNetlist".
The name "Leaf" was too ambiguous (leaf for *what* hierarchy).
* Change: In Hurricane::Device, set the "TerminalNetlist" flag once and
for all. No need set it in all the derived classes again.
* New: In Hurricane::MultiCapacitor, added new parameter "dummy" to
create dummies around the capacity matrix.
* Change: In Hurricane::Cell, remove "Leaf" related methods, replace
them by "TerminalNetlist" one, especially Collections. Now we have
two clear sets of Collections to walkthough the layout or the
netlist.
Change the "Terminal" flag into "TerminalNetlist".
* Change: In Hurricane::CellCollections, rename "Leaf" into
"TerminalNetlist" collections and apply the new semantic to the
locators.
* Change: In Hurricane::DataBase, Leaf to TerminalInstance renaming.
* Change: In Hurricane::DeepNet, Leaf to TerminalInstance renaming.
* Change: In Hurricane::HyperNet, Leaf to TerminalInstance renaming.
* Change: In Hurricane::Instance, Leaf to TerminalInstance renaming.
* Change: In Hurricane::Viewer::HierarchyInformations, Leaf to
TerminalInstance renaming.
* Change: In CRL::AllianceFramework, Leaf to TerminalInstance renaming.
* Change: In CRL::Catalog, Leaf to TerminalInstance renaming.
* Change: In CRL::ApParser, Leaf to TerminalInstance renaming.
* Change: In EtesianEngine::AddFeeds, Leaf to TerminalInstance renaming.
* Bug: In EtesianEngine::resetPlacement, move there the loop over
non terminal netlist instances to flag fully placed sub-blocks
as terminal for the netlist. Only then remove the feed cells
from unplaced instances. Previously, the feed cells where stripped
even from already placed instances.
* Change: In Katana, Leaf to TerminalInstance renaming.
* Bug: In Bora::PyDSlicingNode, allow the range parameter to be the
Python None object when we do not want to pass one but need to
have it as positional parameter.
* Change: In Cumulus/clocktree/ClockTree.py, Leaf to TerminalInstance
renaming.
* New: In CRL/etc/node600/phenitec, ported configuration of Phenitec 0.6um
Compliant with DataBase reset.
* New: In CRL/python/helpers, added function "unloadUserSettings()" to
unload Python modules prior to a full reset.
Added "resetCoriolis()" to perform full DataBase reset.
* Change: In CRL::AllianceFramework, make it a derived class of DBo so
the destroy() is now provided.
* Bug: In CRL::AllianceFramework::getCell(), do not attempt any load if
the library list is empty. Should never occur except in case of a
botched databse reset.
* New: In CRL::AllianceFramework, new method "saveCATAL()" to write back
the catalog of a library and "saveCells()" to write back the cells.
Note: only cells actually loaded in memory will be write back.
* New: In CRL::Catalog, add method "saveToFile()" to write back the CATAL
of a library.
* Change: In CRL::ParserDriver, replace "const string&" by "string"
(improved string support of the GNU STL).
* Change: In CRL::ParserSlot, use string instead of Name.
* Change: In CRL::ApParser, make _layerInformation an ordinary attribute
instead of a static one. This allow for it's correct resetting
across databas resets.
* Change: In CRL::VstParserGrammar, reinitialize Vst::framework at each
parser call. Needed to support database reset.
* New: In Hurricane::DBo, add an object counter to be sure that when
we perform a reset, no remaining DBo is allocated. This is different
of the object id which is ever increasing.
Note that, at reset, we check against "1" remaining element as at
this point only Database is still allocated.
Add a new "resetId()" method. MUST NEVER BE CALLED except by
DataBase::_preDestroy().
* New: In Hurricane::Database, new clear() method to remove the Cells
of all the libraries in reverse hierarchical depth order.
Make use of the new CellsSort class.
* Change: In Hurricane::DataBase::_preDestroy(), call "clear()" and
DBo::resetId().
* Change: In Hurricane::Breakpoint, change the default callback to be
a static function. So we can restore it later.
* Bug: In Hurricane::Instance::_preDestroy(), there was yet another
loop of deletion over a collection for the shared pathes.
Replace it by the repetitive deletion of the first element.
* Bug: In Hurricane::Net::_preDestroy(), RoutingPads must be destroyed
prior to any other component.
* New: In Hurricane::ColorScale, add a "qtFree()" method for freeing
the Qt Brush, Pen & Color.
* New: In Hurricane::DrawingStyle, add a "qtFree()" method for freeing
the Qt Brush, Pen & Color.
* New: In Hurricane::Graphics, add a "disable()" method to call the
various "qtFree()" of the sub-objects.
This commit contains two set of features that should have been commited
separately.
1. Compliance with clang 5.0.1, tested with the RedHat collection
llvm-toolset-7. This allow Coriolis to be compiled under Darwin (MacOS)
with Xcode & macports. The bootstrap install system has been modificated
accordingly.
2. The basic support for routing density driven placement. Related
features are:
* Bloat property. Each Occurrence of an Instance can be individually
bloated. This property not attached to any tool to allow the placer and
router to share it as wanted. Nevertheless, it is defined in Etesian.
* BloatProfile in Katana, add individual Bloat properties to Instances
occurrences based on the East & North overflowed edges of each GCell.
* Support in ToolEngine for a "pass number" of a tool. This pass number
is mainly used to make "per pass" measurements. The MeasureSet system
is improved accordingly to support multiple values of a same measure.
* Embryo of "P&R Conductor" to perform the place & route loop until the
design is successfully placed. May be the first brick of a Silicon
Compiler.
* Change: In boostrap/FindBoostrap.cmake, in setup_boost(), added tag to
the python component for macport (ex: python27).
* Change: In boostrap/build.conf, put etesian before anabatic for
instance occurrence BloatProperty dependency.
Added option support for the "llvm-toolset-7" collection to build
against clang 5.0.1.
* Bug: In Hurricane::getRecord( const pair<T,U>& ), the getSlot<> templates
for first & second arguments must be called with <const T> and <const U>
as the pair itself is const (and not simply <T> & <U>).
* Change: In Hurricane::getSlot() temlate, only use "string" arguments and
not const string&, simpler for template argument deduction.
* Bug: In Hurricane::AnalogCellExtension, the StandardPrivateProperty<>
template has a static member "_name". Clang did show that the template
for this static number has to be put inside the namespace where the
template *is defined* (i.e. Hurricane) instead of the namespace where
it is instanciated (i.e. Analog).
* Bug: In Isobar, Matrix_FromListOfList(), PyInt_AsPlacementStatus() must
be put outside the C linkage back in the Isobar C++ namespace (clang).
* Bug: In Hurricane::DBo::~DBo, and derived add a throw() specification
(clang).
* Bug: In Hurricane::RegularLayer::getEnclosure() & setEnclosure(), change
signature so it matches the one of the base class (clang).
* Bug: In Hurricane::CellPrinter, use double brackets for initializer list
(clang).
* Change: In Hurricane::Breakpoint, reverse the meaning of the error level.
Only error level *lesser or equal* than the stop level will be enabled.
* Bug: In CRL/python/helpers/__init__.loadUserSettings(), must put the
current working directory in the sys.path as in certain configuration
it may not be included.
* Bug: In CRL::ApDriver, DumpSegments(), no longer generate segments when
encountering a RoutingPad on a top-level Pin Occurrence. The segment
was generated in the wrong direction, creating DRC violations on the
"mips_core_flat" example.
* Change: In CRL::Measures, partial re-design of the measurements management.
Now, each kind of measure can accept multiple values put in a vector.
The index is intented to match a tool run number.
* Change: In CRL::Histogram, add support for multiple sets of datas,
indexeds with tool run number.
* Change: In CRL::ToolEngine, add support for multiple pass number, add
addMeasure<> templates for the various data-types.
* Change: In CRL::gdsDriver & CRL::gdsParser(), comment out unused GDS record
name constants.
* New: Etesian::BloatProperty, property to attach to Instance occurrences
that contains the extra number of pitch to add to the cell width.
* Bug: In AutoSegment::CompareByDepthLength, the segment length comparison
was wrong, it was always returning true, which broke the "strick weak
ordering" of the comparison.
This was producing a core-dump in GCell::updateDensity() when sorting
a vector<>. The end() iterator was being dereferenced, leading to the
problem.
* Bug: In Katana::DataSymmetric::checkPairing(), the test for segments
whose axis is perpandicular to the symmetry axis was wrong
("!=" instead of "-").
* New: In Katana/GlobalRoute, new ::selectSegments(), selectOverloadedgcells()
and selectBloatedInstances() to automatically select segments from
overloaded edges, overloaded GCells and bloated cells.
* Change: In KatanaEngine, return a more detailed success state, distinguish
between global and detailed.
Add support for multiple routing iterations.
* New: In cumulus/python/plugins/ConductorPlugin.py, embryo of routing
driven placement.
* Change: In Hurricane::Isobar/PyHurricane.h, make the hash function use
the DBo id whenever possible instead of the object pointer, fall back
to it for standalone objects (Box like one). The DirectHashMethod()
macro generate a C style function (linkage) which call a template
function "getPyHash<>()" that uses a SFINAE mechanism to select
the right variant.
Create two comparison macros DirectCmpByPtrMethod() and
DirectCmpByValueMethod() to customize the comparison for objects that
have C++ operator==(). So now two boxes with the same contents will
be seen equal by Python. For DBo objects we keep the previous
comparison by C++ pointer.
* New: In bootstrap/coriolisEnv.py, add the "etc" directory to the
PYTHONPATH as initialization are now Python modules.
* New: In Hurricane/analogic, first groundwork for the integration of
PIP/MIM/MOM multi-capacitors. Add C++ and Python interface for the
allocation matrix and the list of capacities values.
* Change: In Hurricane::RegularLayer, add a layer parameter to the
constructor so the association between the RegularLayer and it's
BasicLayer can readily be done.
* Change: In Hurricane::Layer, add a new getCut() accessor to get the
cut layer in ViaLayer.
* Change: In Hurricane::DataBase::get(), the Python wrapper should no
longer consider an error if the data-base has not been created yet.
Just return None.
* Bug: In Isobar::PyLayer::getEnclosure() wrapper, if the overall
enclosure is requested, pass the right parameter to the C++ function.
* Change: In AllianceFramework, make public _bindLibraries() and export
it to the Python interface.
* Change: In AllianceFramework::create(), do not longer call bindLibraries().
This now must be done explicitely and afterwards.
* Change: In AllianceFramework::createLibrary() and
Environement::addSYSTEM_LIBRARY(), minor bug corrections that I don't
recall.
* Change: In SearchPath::prepend(), set the selected index to zero and
return it.
* Change: In CRL::System CTOR, add "etc" to the PYTHONPATH as the
configuration files are now organized as Python modules.
* New: In PyCRL, export the CRL::System singleton, it's creation is no
longer triggered by the one of AllianceFramework.
* New: In CRL/etc/, convert most of the configuration files into the
Python module format. For now, keep the old ".conf", but that are no
longer used.
For the real technologies, we cannot keep the directory name as
"180" or "45" as it not allowed by Python syntax, so we create "node180"
or "node45" instead.
Most of the helpers and coriolisInit.py are no longer used now.
To be removed in future commits after being sure that everything
works...
* Bug: In AutoSegment::makeDogleg(AutoContact*), the layer of the contacts
where badly computed when one end of the original segment was attached
to a non-preferred direction segment (mostly on terminal contacts).
Now use the new AutoContact::updateLayer() method.
* Bug: In Dijkstra::load(), limit symetric search area only if the net
is a symmetric one !
* Change: In Katana/python/katanaInit.py, comply with the new initialisation
scheme.
* Change: In Unicorn/cgt.py, comply to the new inititalization scheme.
* Change: In cumulus various Python scripts remove the call to
helpers.staticInitialization() as they are not needed now (we run in
only *one* interpreter, so we correctly share all init).
In plugins/__init__.py, read the new NDA directory variable.
* Bug: In cumulus/plugins/Chip.doCoronafloorplan(), self.railsNb was not
correctly managed when there was no clock.
* Change: In cumulus/plugins/Configuration.coronaContactArray(), compute
the viaPitch from the technology instead of the hard-coded 4.0 lambdas.
In Configuration.loadConfiguration(), read the "ioring.py" from
the new user's settings module.
* Bug: In stratus.dpgen_ADSB2F, gives coordinates translated into DbU to
the XY functions.
In st_model.Save(), use the VstUseConcat flag to get correct VST files.
In st_net.hur_net(), when a net is POWER/GROUND or CLOCK also make it
global.
* Change: In Oroshi/python/WIP_Transistor.py, encapsulate the generator
inside a try/except block to get prettier error (and stop at the first).
* Bug: In cumulus/plugins/PadsCorona.py, when a pad is at the beginning
or at the end of the side, the pad corona terminal may be outside
the corona range (not directly facing it). In that case, create a
bend to reach it.
Worse, in some case more than one (but likely no more), could be
in that case, so not only do we create a bend but also make a
shift in the bended segment so two consecutive ones are not on the
same axis, causing shorts.
If both end pads of a corner are in that case, we cannot prevent
a short, so at least, issue a warning.
* Bug: In CRL::Vhdl, the Entity::VstUseConcat was not passed correctly
along, so we did get a strange mix of conat and direct assignment.
* New: In Unicorn/cgt.py : added --vst-use-concat options to control
the VST driver behavior.
* New: In CRL::AllianceFramework::saveCell(), through the view flag we
can pass an option 'CRL::Catalog::State::VstUseConcat' to tell the
driver tu use or not the concat '&' in PORT MAP statements.
It is not completely clean that the flag for controlling the VST
driver behavior is put in the Catalog states, but it's easier for
now...
And, of course, exported at Python level.
* Bug: In Hurricane python module, forgot to add the Segment type.
* Change: In Isobar/layer.getEnclosure() wrapper check and cast the Layer
argument into BasicLayer.
* Change: In CRL::RoutingGauge::getLayerGauge(Layer*), getLayerType() and
getLayerDirection() no longer check layer identity based on layer
mask instead of just Layer* pointer. To allow a unified call wether
the layer is real or symbolic.
* Change: In CRL::RoutingLayerGauge::getTrackIndex() and getTrackPositon(),
no longer consider negative indexes as invalid and reset them to
zero. The check for out of bound index is now left to Anabatic &
Katana.
* Change: In CRL/RoutingGauge.getRoutingLayer() and getContactLayer(),
more detailed error message.
* Change: In CRL/RoutingLayerGauge.getTrackIndex() and getTrackPosition(),
indexes are now signed long instead of unsigned.
* New: In Hurricane::IntrusiveMap, introduce IntrusiveMapConst which allow
to search with a "const Key&" instead of a "Key", sparing the copy
construction of the Key.
* Change: In Hurricane::Cell::NetMap, use the new kind of map with
"const Name&" key access. This speeds up the Cell::getNet() method
by suppressing one copy construction of a Name, which are costly
after all...
Should review the whole code to use "const Name&" everywhere it
is possible.
* Change: In Hurricane::Entity & Hurricane::DBo, displace the unique
identifier from Entity to DBo (move up to the base class).This
to allow us to build deterministic map of DBo requireds in
UpdateSession (which is built upon a SharedProperty).
WARNING: This break the JSON database exportation support, do not
use it until fixed/rewritten.
* Change: In Hurricane::Layer, add an attribute to know if a layer is
associated to a blockage. Modificate accordingly PyLayer and
BasicLayer.
* Change: In Hurricane::SharedProperty, the set of owners (DBo*) is now
stored in a std::set sorted on the objects Ids, instead of a simple
vector. The linera search time through the std::vector was starting
to show (ISPD05 bigblue1).
* Bug: In Isobar::PyInstance, make full contructor signature (5 arguments)
conform to the C++ one. It was only accepting the four first and
forcing the placement status to be FIXED.
* Bug: In CRL/etc/symbolic/ispd05/kite.conf, update for the new configuration
requirements where all distance must be converted into DbU in the
file itself (use "helpers.l()", "helpers.m()"). Apply to the cell &
routing gauges.
* Bug: In CRL/etc/symbolic/ispd05/technology.conf, update for the new
configuration. "helpers.initTechno()" *must* by called first thing
in this file in order for the Technology to be created.
* New: In CRL::AllianceFramework, add matchCellGauge() &
matchCellgaugeByHeight()
* New: In CRL::CellGauge, add a flag to distinguish gauges meant for
IO Pads and an "isPad()" predicate.
* Change: In CRL::Ispd05Bookshelf, flush the UpdateSession stack every
1000 elements additions. Maybe not necessary now the the UpdateSession
property relies on a std::set instead of a std::vector.
* New: In CRL::LefImport, support for SITE and match/create the appropriate
CellGauge on the fly. Specific support for MACROS that are flagged PAD.
Add a dedicated post-treatment for PAD connectors, extend them toward
the boundary of the nearest abutment box side. Tested only on AMS 350nm
c35b4 for now.
This part is most likely to be tweaked for every kind of real foundry
pad that we may encounter...
* Change: In EtesianEngine::findYSpin(), use the C++ "for" construct to loop
over Collections.
* Change: In Unicorn/cgt.py, register the Python/C++ tutorial support by
default.
* Change: In CRL::DefImport, added callback to read the DEF UNITS statement
and perform a correct length conversion. Previously set to read pseudo
lambdas in hundredth of microns.
Added DefParser::getLefCell() to lookup master cells in the LEF
libraries before looking in the Alliance ones (rooted under "LEF"
library).
* Change: In CRL::LefParser::_pinPostProcess(), when no segment suitable
for terminal connexion is found, add all of them. This is a quick hack
and an a correct policy that match all techno must be implemeneted.
* New: In CRL::pyCRL, add a Python wrapper for DefImport.
* New: In CRL/etc/45/ispd18/ added configuration files for the "real"
technology used by the ISPD18 45nm design benchmarks.
* New: In Hurricane::Isobar::PySegment, added wrapper for getOppositeAnchor().
* Bug: CRL::PyRoutingLayerGauge, Python wrapper of getTrackPosition() was
in fact returning getTrackNumer().
* Bug: In Katana::PowerRailsPlanes::Rail::doLayout(), add the half minimum
distance to the blockage segments extensions. Was causing too near
VIAs is cmos45.
* Change: In cumulus/plugins/ClockTree, correctly manage routing gauge when
the lower pitches (M2/M3) is different from the upper one (M4/M5).
But we still can only do sxlib compliant gauges because we do not
handle a switch in preferred routing directions.
* Bug: In Hurricane::DrawingQuery::drawGo(), forgot to apply translation
on Polygon and Rectilinear.
* Bug: In Hurricane::Rectilinear, forgot implementation of getContour().
Add a new accessor getPoints().
* Bug: In CRL::Blif::load(), do not always enforce translation towards
VHDL names. When loading LEF+gds it may change the Cell names between
the two stages so the gds layout do not get added to the LEF Cell
phantom.
Now add a boolean enforceVhdl argument (may be a flag in the future).
* Bug: In ::GdsStream::operator<<(Cell*), forgot to drive the Rectilinear.
* Change: In CRL::GdsStream, no longer export empty Cells as structures,
to avoid empty cells in Cadence. To prevent meta-transistors to be
exported as real physical objects.
Also put a hard-coded test to prevent exporting "control_r" model
which is made of AMS standard cells for "amsOTA".
* Change: In CRL/PyRoutingGauge, export the isHV() and isVH() methods so
the Stack can access it.
* Change: In Hurricane/PyCellViewer, export the removeHistory() method.
When a Cell is deleted, it must be also removed from the editor
history. This should be take care of automatically, but for now
we make it manually through scripts.
* Bug: In Anabatic::NetBuilder::doRp_accessAnalog(), the gauge offset
was not taken into account when creating initial Contact on
RoutingPad. The program self corrected afterwards, but with the
display of a disgraceful message.
* Change: In Anabatic::Configuration and Session, export the gauge offsets.
* Change: In CRL::Blif, we now can add a list of Hurricane library for
the parser to look for standart cells. If the library list is *empty*
we look use the Alliance mechanism, if not, we look *only* in this
library list. This behavior is implemented in Subckt::createModel(). I
To add a library, use CRL::Blif::add(Library*).
This allow to manage symbolic or real mode loading, it may need
some rework to clarify the interface.
* New: In CRL, implement a GDSII parser. The complete syntax is supported,
but only a few subset is really taken into account. It is intended to
load the layout of standard cells only. The interface of the cell is
provided through a LEF file and it complete layout through the GDSII.
The loader work in a Library way. It takes a Hurricane library as
argument and search in the GDSII library structures with a name
matching the Cell of the library and complete them.
* Change: In Hurricane::Component, put the Contour methods at Component
level so we can use them in a generic way in the CellWidget drawing
primitives.
* New: Hurricane::Rectilinear polygon, for small rectlinear polygons.
Should be less than 100 vertexes. For bigger ones, use Polygon
which allows slanted egdes.
* Bug: In CRL, freepdk_45/technology.conf, there seems to be an incoherency
bettween the GDSII layer numbers as defined in the Cadence FreeePDK45.tf
file and the one used in the supplied layout of the GDSII cells.
For now, we align on the GDSII cells to get nice layouts, but it
has to checked.
* New: In CRL, implement a true GDSII driver. The driver is directly under
CRL and do not use an intermediate structure in vlsisapd. The ASCII
GDSII is removed.
Huge polygons are not supported yet. Have to be split up in
sub-polygons of less than 4000 vertexes.
Symbolic layout can be exported to give a rough idea of the layout
but RDS expension is not applied. Symbolic composite layers are
expansed into their basic layers so the design *looks* normal.
* Deprecated: In CRL, remove all traces of the old XML configuration
parsers. No one needs them now, including Chams.
* Bug: In CRL::BlifParser, before blindly loading the model of a subckt
from disk with AllianceFramework, checks if it is in the Catalog
first. Load with AllianceFramework only cells that are in the
Catalog.
This prevent a file of the same name than a model to be loaded
shadowing the later defintion of the model in the Blif file.
All this is due to the fact that Blif could be non-ordered for
the models...
* Change: In Hurricane::BasicLayer, the "extract number" is replaced
by a GdsLayer and GdsDatatype to generate accurate GDS files.
Even if datatype is 0 most of the time.
Update all the "technology.conf" files in CRL to provide those
two numbers.
Jean-Paul Chaput
Robert Taylor
gatecat
Staf Verhaegen