Added support for MOSIS 180nm SCMOS technology (SCN6M_DEEP).
* New: In CRL Core, added configuration for SCMOS_DEEP symbolic technology
up to 180nm "scmos_deep_018". It is postfixed "_018" because it is not
yet compliant with 130nm (asymetrical VIA metal extensions).
Added the associated real technology SCN6M_DEEP (TSMC 180nm).
This commit is contained in:
Jean-Paul Chaput
parent
e5f3f5d89a
commit
fbeef95c0f
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@ -3,6 +3,8 @@
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install ( DIRECTORY common DESTINATION ${SYS_CONF_DIR}/coriolis2 )
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install ( DIRECTORY cmos DESTINATION ${SYS_CONF_DIR}/coriolis2 )
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install ( DIRECTORY vsc200 DESTINATION ${SYS_CONF_DIR}/coriolis2 )
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install ( DIRECTORY scmos_deep_018 DESTINATION ${SYS_CONF_DIR}/coriolis2 )
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install ( DIRECTORY scn6m_deep DESTINATION ${SYS_CONF_DIR}/coriolis2 )
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install ( DIRECTORY hcmos9 DESTINATION ${SYS_CONF_DIR}/coriolis2 )
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install ( FILES environment.alliance.xml DESTINATION ${SYS_CONF_DIR}/coriolis2 )
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@ -0,0 +1,56 @@
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# -*- Mode:Python; explicit-buffer-name: "alliance.conf<scmos_deep_018>" -*-
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from helpers.Alliance import AddMode
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from helpers.Alliance import Gauge
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allianceTop = '/soc/alliance'
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cellsTop = allianceTop+'/cells/'
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allianceConfig = \
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( ( 'SYMB_TECHNO_NAME' , helpers.symbolicTechno )
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, ( 'REAL_TECHNO_NAME' , helpers.realTechno )
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, ( 'SYMBOLIC_TECHNOLOGY', helpers.symbolicDir+'/technology.conf' )
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, ( 'REAL_TECHNOLOGY' , helpers.realDir +'/technology.conf' )
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, ( 'DISPLAY' , helpers.sysConfDir +'/display.xml' )
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, ( 'CATALOG' , 'CATAL')
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, ( 'WORKING_LIBRARY' , '.')
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, ( 'SYSTEM_LIBRARY' , ( (cellsTop+'vsxlib' , Environment.Append)
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, ) )
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, ( 'SCALE_X' , 100)
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, ( 'IN_LO' , 'vst')
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, ( 'IN_PH' , 'ap')
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, ( 'OUT_LO' , 'vst')
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, ( 'OUT_PH' , 'ap')
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, ( 'POWER' , 'vdd')
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, ( 'GROUND' , 'vss')
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, ( 'CLOCK' , '^ck.*')
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, ( 'BLOCKAGE' , '^blockage[Nn]et*')
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)
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# Format of routingGaugesTable (dictionary):
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# A list of entry of the form:
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# ( METAL_NAME, (Direction, Type, depth, density, offset, pitch, wire_width, via_width) )
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routingGaugesTable = {}
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routingGaugesTable['vsxlib'] = \
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( ( 'METAL1', ( Gauge.Vertical , Gauge.PinOnly, 0, 0.0, 0, 10, 3, 3 ) )
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, ( 'METAL2', ( Gauge.Horizontal, Gauge.Default, 1, 0.0, 0, 10, 3, 3 ) )
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, ( 'METAL3', ( Gauge.Vertical , Gauge.Default, 2, 0.0, 0, 10, 3, 3 ) )
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, ( 'METAL4', ( Gauge.Horizontal, Gauge.Default, 3, 0.0, 0, 10, 3, 3 ) )
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, ( 'METAL5', ( Gauge.Vertical , Gauge.Default, 4, 0.0, 0, 10, 4, 4 ) )
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#, ( 'METAL6', ( Gauge.Horizontal, Gauge.Default, 5, 0.0, 0, 10, 4, 2 ) )
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#, ( 'METAL7', ( Gauge.Vertical , Gauge.Default, 6, 0.0, 0, 10, 4, 2 ) )
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)
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# Format of cellGaugesTable (dictionary):
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# A list of entry of the form:
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# ( METAL_PIN, xy_common_pitch, slice_height, slice_step )
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cellGaugesTable = {}
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cellGaugesTable['vsxlib'] = ('metal2', 10, 100, 10)
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@ -0,0 +1,9 @@
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# -*- Mode:Python; explicit-buffer-name: "display.conf<scmos_deep_018>" -*-
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import helpers
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# Provides standard settings for:
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# - <defaultStyle>
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# - <stylesTable>
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execfile( helpers.sysConfDir+'/common/display.conf' )
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@ -0,0 +1,5 @@
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# -*- Mode:Python; explicit-buffer-name: "hMetis.conf<scmos_deep_018>" -*-
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import helpers
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execfile( helpers.sysConfDir+'/common/hMetis.conf' )
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@ -0,0 +1,23 @@
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# -*- Mode:Python; explicit-buffer-name: "kite.conf<scmos_deep_018>" -*-
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import helpers
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# Contains the layout (shared by all technologies).
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execfile( helpers.sysConfDir+'/common/kite.conf' )
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parametersTable = \
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( ("katabatic.globalLengthThreshold",TypeInt ,1450 ) # Katabatic parameters.
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, ("katabatic.saturateRatio" ,TypePercentage,80 )
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, ("katabatic.saturateRp" ,TypeInt ,8 )
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, ('katabatic.topRoutingLayer' ,TypeString , 'METAL5')
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# Kite parameters.
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, ("kite.hTracksReservedLocal" ,TypeInt ,4 , { 'min':0, 'max':18 } )
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, ("kite.vTracksReservedLocal" ,TypeInt ,3 , { 'min':0, 'max':18 } )
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, ("kite.eventsLimit" ,TypeInt ,4000002 )
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, ("kite.ripupCost" ,TypeInt ,3 , { 'min':0 } )
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, ("kite.strapRipupLimit" ,TypeInt ,16 , { 'min':1 } )
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, ("kite.localRipupLimit" ,TypeInt ,9 , { 'min':1 } )
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, ("kite.globalRipupLimit" ,TypeInt ,5 , { 'min':1 } )
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, ("kite.longGlobalRipupLimit" ,TypeInt ,5 , { 'min':1 } )
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)
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@ -0,0 +1,5 @@
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# -*- Mode:Python; explicit-buffer-name: "mauka.conf<scmos_deep_018>" -*-
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import helpers
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execfile( helpers.sysConfDir+'/common/mauka.conf' )
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@ -0,0 +1,9 @@
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# -*- Mode:Python; explicit-buffer-name: "misc.conf<scmos_deep_018>" -*-
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import helpers
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# Provides standard settings for:
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# # - <defaultStyle>
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# # - <stylesTable>
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#
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execfile( helpers.sysConfDir+'/common/misc.conf' )
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@ -0,0 +1,5 @@
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# -*- Mode:Python; explicit-buffer-name: "nimbus.conf<scmos_deep_018>" -*-
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import helpers
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execfile( helpers.sysConfDir+'/common/nimbus.conf' )
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# -*- Mode:Python; explicit-buffer-name: "patterns.conf<scmos_deep_018>" -*-
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import helpers
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execfile( helpers.sysConfDir+'/common/patterns.conf' )
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@ -0,0 +1,19 @@
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# -*- Mode:Python; explicit-buffer-name: "plugins.conf<scmos_deep_018>" -*-
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import helpers
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# Contains the layout (shared by all technologies).
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#execfile( helpers.sysConfDir+'/common/plugins.conf' )
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# WARNING: Those values have not been adjusted yet for this technologies.
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# Must be done.
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#
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# Parameters for chip plugin.
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parametersTable = \
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( ("chip.block.rails.count" ,TypeInt ,4 )
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, ("chip.block.rails.hWidth" ,TypeInt ,12 )
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, ("chip.block.rails.vWidth" ,TypeInt ,12 )
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, ("chip.block.rails.hSpacing" ,TypeInt ,6 )
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, ("chip.block.rails.vSpacing" ,TypeInt ,6 )
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)
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# -*- Mode:Python; explicit-buffer-name: "stratus1.conf<scmos_deep_018>" -*-
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import helpers
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# Status1 parameters.
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parametersTable = \
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( ("stratus1.mappingName", TypeString, helpers.sysConfDir+"/stratus2sxlib.xml",
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{ 'flags':Cfg.Parameter.Flags.NeedRestart|Cfg.Parameter.Flags.MustExist } )
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, ("stratus1.format" , TypeString, "vst")
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, ("stratus1.simulator" , TypeString, "asimut")
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,)
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execfile( helpers.sysConfDir+'/common/stratus1.conf' )
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# -*- Mode:Python; explicit-buffer-name: "technology.conf<scmos_deep_018>" -*-
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import helpers
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# The informations here are extracted from the Alliance ".rds" file,
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# and must be consistent with it.
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#
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# Provides standard settings for:
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# - <viewerConfig>
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# - <realLayersTable>
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# - <symbolicLayersTable>
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# - <workingLayersTable>
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execfile( helpers.sysConfDir+'/common/technology.conf' )
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# Format of <symbolicRulesTable>:
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# Each entry is a pair of (string, value).
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# * string: a synthetic way to designate the symbolic layer on which
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# it applies, an optional real layer in case where there is
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# more than one, and the dimension name.
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# * value : the rule (dimension) value expressed in lambda.
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symbolicRulesTable = \
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( ('NWELL.nWell.extention.cap' , 4.0)
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, ('PWELL.pWell.extention.cap' , 4.0)
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, ('NTIE.minimum.width' , 3.0)
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, ('NTIE.nWell.extention.cap' , 3.0)
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, ('NTIE.nWell.extention.width' , 1.0)
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, ('NTIE.nImplant.extention.cap' , 3.0)
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, ('NTIE.nImplant.extention.width' , 1.0)
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, ('NTIE.active.extention.cap' , 2.0)
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, ('NTIE.active.extention.width' , 0.0)
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, ('PTIE.minimum.width' , 3.0)
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, ('PTIE.pWell.extention.cap' , 3.0)
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, ('PTIE.pWell.extention.width' , 1.0)
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, ('PTIE.pImplant.extention.cap' , 1.0)
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, ('PTIE.pImplant.extention.width' , 1.0)
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, ('PTIE.active.extention.cap' , 2.0)
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, ('PTIE.active.extention.width' , 0.0)
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, ('NDIF.minimum.width' , 3.0)
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, ('NDIF.nImplant.extention.cap' , 5.0)
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, ('NDIF.nImplant.extention.width' , 3.0)
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, ('NDIF.active.extention.cap' , 2.0)
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, ('NDIF.active.extention.width' , 0.0)
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, ('PDIF.minimum.width' , 3.0)
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, ('PDIF.pImplant.extention.cap' , 5.0)
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, ('PDIF.pImplant.extention.width' , 3.0)
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, ('PDIF.active.extention.cap' , 2.0)
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, ('PDIF.active.extention.width' , 0.0)
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, ('GATE.minimum.width' , 2.0)
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, ('GATE.poly.extention.cap' , 2.5)
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, ('NTRANS.minimum.width' , 2.0)
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, ('NTRANS.nImplant.extention.cap' , 3.0)
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, ('NTRANS.nImplant.extention.width' , 8.0)
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, ('NTRANS.active.extention.cap' , 0.0)
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, ('NTRANS.active.extention.width' , 5.0)
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, ('NTRANS.poly.extention.cap' , 2.5)
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, ('NTRANS.poly.extention.width' , 0.0)
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, ('PTRANS.minimum.width' , 2.0)
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, ('PTRANS.nWell.extention.cap' , 3.0)
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, ('PTRANS.nWell.extention.width' , 8.0)
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, ('PTRANS.pImplant.extention.cap' , 3.0)
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, ('PTRANS.pImplant.extention.width' , 8.0)
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, ('PTRANS.active.extention.cap' , 0.0)
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, ('PTRANS.active.extention.width' , 5.0)
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, ('PTRANS.poly.extention.cap' , 2.5)
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, ('PTRANS.poly.extention.width' , 0.0)
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, ('POLY.minimum.width' , 2.0)
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, ('POLY.poly.extention.cap' , 1.0)
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, ('POLY2.minimum.width' , 2.0)
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, ('POLY2.poly2.extention.cap' , 2.0)
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# Routing Layers.
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, ('METAL1.minimum.width' , 3.0)
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, ('METAL1.metal1.extention.cap' , 2.0)
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, ('METAL2.minimum.width' , 3.0)
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, ('METAL2.metal2.extention.cap' , 2.0)
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, ('METAL3.minimum.width' , 3.0)
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, ('METAL3.metal3.extention.cap' , 2.0)
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, ('METAL4.minimum.width' , 3.0)
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, ('METAL4.metal4.extention.cap' , 2.0)
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, ('METAL5.minimum.width' , 3.0)
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, ('METAL5.metal5.extention.cap' , 2.0)
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, ('METAL6.minimum.width' , 4.0)
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, ('METAL6.metal6.extention.cap' , 4.0)
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, ('METAL7.minimum.width' , 2.0)
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, ('METAL7.metal6.extention.cap' , 4.0)
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, ('METAL8.minimum.width' , 2.0)
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, ('METAL8.metal6.extention.cap' , 4.0)
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# Contacts (i.e. Active <--> Metal).
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, ('CONT_BODY_N.minimum.side' , 2.0)
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, ('CONT_BODY_N.nWell.enclosure' , 3.0)
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, ('CONT_BODY_N.nImplant.enclosure' , 3.0)
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, ('CONT_BODY_N.active.enclosure' , 1.0)
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, ('CONT_BODY_N.metal1.enclosure' , 1.0)
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, ('CONT_BODY_P.minimum.side' , 2.0)
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, ('CONT_BODY_P.pWell.enclosure' , 3.0)
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, ('CONT_BODY_P.pImplant.enclosure' , 3.0)
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, ('CONT_BODY_P.active.enclosure' , 1.0)
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, ('CONT_BODY_P.metal1.enclosure' , 1.0)
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, ('CONT_DIF_N.minimum.side' , 2.0)
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, ('CONT_DIF_N.nImplant.enclosure' , 2.0)
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, ('CONT_DIF_N.active.enclosure' , 1.0)
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, ('CONT_DIF_N.metal1.enclosure' , 1.0)
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, ('CONT_DIF_P.minimum.side' , 2.0)
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, ('CONT_DIF_P.pImplant.enclosure' , 2.0)
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, ('CONT_DIF_P.active.enclosure' , 1.0)
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, ('CONT_DIF_P.metal1.enclosure' , 1.0)
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, ('CONT_POLY.minimum.width' , 2.0)
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, ('CONT_POLY.poly.enclosure' , 1.0)
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, ('CONT_POLY.metal1.enclosure' , 1.0)
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# VIAs (i.e. Metal <--> Metal).
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, ('VIA12.minimum.side' , 3.0)
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, ('VIA12.metal1.enclosure' , 1.0)
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, ('VIA12.metal2.enclosure' , 1.0)
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, ('VIA23.minimum.side' , 3.0)
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, ('VIA23.metal2.enclosure' , 1.0)
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, ('VIA23.metal3.enclosure' , 1.0)
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, ('VIA34.minimum.side' , 3.0)
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, ('VIA34.metal3.enclosure' , 1.0)
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, ('VIA34.metal4.enclosure' , 1.0)
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, ('VIA45.minimum.side' , 3.0)
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, ('VIA45.metal4.enclosure' , 1.0)
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, ('VIA45.metal5.enclosure' , 1.0)
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, ('VIA56.minimum.side' , 4.0)
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, ('VIA56.metal5.enclosure' , 3.0)
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, ('VIA56.metal6.enclosure' , 3.0)
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, ('VIA67.minimum.side' , 2.0)
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, ('VIA67.metal6.enclosure' , 3.0)
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, ('VIA67.metal7.enclosure' , 3.0)
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, ('VIA78.minimum.side' , 2.0)
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, ('VIA78.metal7.enclosure' , 3.0)
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, ('VIA78.metal8.enclosure' , 3.0)
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# Blockages.
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, ('BLOCKAGE1.minimum.width' , 1.0)
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, ('BLOCKAGE1.blockage1.extention.cap' , 2.0)
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, ('BLOCKAGE2.minimum.width' , 2.0)
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, ('BLOCKAGE2.blockage2.extention.cap' , 2.0)
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, ('BLOCKAGE3.minimum.width' , 2.0)
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, ('BLOCKAGE3.blockage3.extention.cap' , 2.0)
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, ('BLOCKAGE4.minimum.width' , 2.0)
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, ('BLOCKAGE4.blockage4.extention.cap' , 2.0)
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, ('BLOCKAGE5.minimum.width' , 2.0)
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, ('BLOCKAGE5.blockage5.extention.cap' , 2.0)
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, ('BLOCKAGE6.minimum.width' , 2.0)
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, ('BLOCKAGE6.blockage6.extention.cap' , 4.0)
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, ('BLOCKAGE7.minimum.width' , 2.0)
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, ('BLOCKAGE7.blockage6.extention.cap' , 4.0)
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, ('BLOCKAGE8.minimum.width' , 2.0)
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, ('BLOCKAGE8.blockage6.extention.cap' , 4.0)
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)
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@ -0,0 +1,31 @@
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# -*- Mode:Python; explicit-buffer-name: "technology.conf<scn6m_deep>" -*-
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technoConfig = { 'name' : 'scn6m_deep'
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, 'gridValue' : 0.005
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, 'gridUnit' : DbU.UnitPowerMicro
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, 'gridsPerLambda': 18
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}
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# Format of an entry in the table:
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# (Symbolic_Name, CIF_Name, GDSII_Number)
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realLayersTable = \
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( ("pWell" , "CWN" , 41)
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, ("nWell" , "CWP" , 42)
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, ("active" , "CAA" , 43)
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, ("pImplant", "CSP" , 44)
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, ("nImplant", "CSN" , 45)
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, ("poly" , "CPG" , 46)
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, ("poly2" , "CM1" , 49) # poly2 is in fact metal1.
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, ("cut0" , "CCC" , 25)
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, ("metal1" , "CM1" , 49)
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, ("cut1" , "CV1" , 50)
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, ("metal2" , "CM2" , 51)
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, ("cut2" , "CV2" , 61)
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, ("metal3" , "CM3" , 62)
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, ("cut3" , "CV3" , 30)
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, ("metal4" , "CM4" , 31)
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, ("cut4" , "CV4" , 32)
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, ("metal5" , "CM5" , 33)
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, ("cut5" , "CV5" , 36)
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, ("metal6" , "CM6" , 37)
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)
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