Fix net creation/lookup ordering in cumulus/core2chip (fuse vss & iovss).
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@ -117,7 +117,9 @@ class CoreToChip ( BaseCoreToChip ):
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chipNet = Net.create( self.chip, ioPadConf.coreSupplyNetName )
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chipNet.setExternal( True )
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chipNet.setType ( Net.Type.GROUND )
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self.icorona.getPlug( coronaNet ).setNet( chipNet )
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coronaPlug = self.icorona.getPlug( coronaNet )
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if not coronaPlug.getNet():
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coronaPlug.setNet( chipNet )
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self.ringNetNames['vss'] = chipNet
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ioPadConf.pads.append( Instance.create( self.chip
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, 'p_vss_{}'.format(ioPadConf.index)
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@ -82,7 +82,9 @@ class CoreToChip ( BaseCoreToChip ):
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chipNet = Net.create( self.chip, ioPadConf.coreSupplyNetName )
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chipNet.setExternal( True )
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chipNet.setType ( Net.Type.GROUND )
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self.icorona.getPlug( coronaNet ).setNet( chipNet )
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coronaPlug = self.icorona.getPlug( coronaNet )
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if not coronaPlug.getNet():
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coronaPlug.setNet( chipNet )
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self.ringNetNames['vss'] = chipNet
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ioPadConf.pads.append( Instance.create( self.chip
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, 'p_vss_{}'.format(ioPadConf.index)
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