remove test from svn source tree
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@ -1,5 +1,5 @@
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// -*-compile-command:"cd ../../../../.. && make"-*-
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// Time-stamp: "2010-08-16 16:52:02" - OpenAccessCommon.h
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// Time-stamp: "2010-08-24 13:07:42" - OpenAccessCommon.h
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// x-----------------------------------------------------------------x
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// | This file is part of the hurricaneAMS Software. |
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// | Copyright (c) UPMC/LIP6 2008-2010, All Rights Reserved |
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@ -1,5 +1,5 @@
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// -*-compile-command:"cd ../../../../.. && make"-*-
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// Time-stamp: "2010-08-18 12:19:15" - OpenAccessDriver.cpp
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// Time-stamp: "2010-08-24 13:35:19" - OpenAccessDriver.cpp
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// x-----------------------------------------------------------------x
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// | This file is part of the hurricaneAMS Software. |
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// | Copyright (c) UPMC/LIP6 2008-2010, All Rights Reserved |
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@ -326,7 +326,8 @@ namespace {
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cerr << " o get value for constraint" << endl;
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long minSize = Hurricane::DbU::getDb(layer->getMinimalSize());
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long minSpace = Hurricane::DbU::getDb(layer->getMinimalSpacing());
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long pitch = Hurricane::DbU::getDb(layer->getPitch());
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// long pitch = Hurricane::DbU::getDb(layer->getPitch());
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long pitch = 1;
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oaLayerConstraint* cMinSize = oaLayerConstraint::create(aOALayer->getNumber(),
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oaLayerConstraintDef::get(oacMinWidth),
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oaIntValue::create(theOATech,minSize));
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@ -339,6 +340,15 @@ namespace {
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oaLayerConstraint* cPitchV = oaLayerConstraint::create(aOALayer->getNumber(),
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oaLayerConstraintDef::get(oacVerticalRouteGridPitch),
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oaIntValue::create(theOATech,pitch));
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{
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oaConstraintDef *def = oaLayerConstraintDef::get(oacVerticalRouteGridPitch);
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oaConstraint *c = oaLayerConstraint::find(getFoundryRules(),
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aOALayer->getNumber(),
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(oaLayerConstraintDef*) def);
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}
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return aOALayer;
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}
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@ -381,7 +391,8 @@ namespace {
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//create and add foundry constraint group for General manufacturing rules
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//and add oaSimpleConstraintType too
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assert(theOATech);
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theOATech->getDefaultConstraintGroup();//add the constraint group for oa2lef
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//add the constraint group for oa2lef
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theOATech->getDefaultConstraintGroup();
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oaConstraintGroup *cgFoundry = theOATech->getFoundryRules();
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}
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@ -569,6 +580,7 @@ namespace {
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cerr << "toOARect" << endl;
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assert(component);
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assert(block);
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assert(_oaTech);
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Component2OARectMap::iterator it = _component2OARect.find(component);
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if (it != _component2OARect.end())
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@ -576,7 +588,7 @@ namespace {
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oaRect* rect = oaRect::create(block,
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toOALayerNum( component->getLayer() ),
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oacDrawingPurposeType,
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oaPurpose::get(_oaTech ,oacDrawingPurposeType)->getNumber(),
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toOABox(component->getBoundingBox()) );
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return rect;
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}
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@ -588,6 +600,7 @@ namespace {
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cerr << "toOAPathSeg" << endl;
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assert(segment);
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assert(blockNet);
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assert(_oaTech);
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Segment2OAPathSegMap::iterator it = _segment2OAPathSeg.find(segment);
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if (it != _segment2OAPathSeg.end())
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@ -606,7 +619,7 @@ namespace {
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oaSegStyle style(segment->getWidth(), oacTruncateEndStyle, oacTruncateEndStyle);
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res = oaPathSeg::create(blockNet->getBlock(),
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toOALayerNum( segment->getLayer() ),
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oacDrawingPurposeType,
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oaPurpose::get(_oaTech ,oacDrawingPurposeType)->getNumber(),
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p1,
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p2,
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style);
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@ -976,6 +989,17 @@ namespace {
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topBlock->getBBox(boundingBox);
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}
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oaUInt4 count = 0;
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oaIter<oaLPPHeader> headers(designCellView->getTopBlock()->getLPPHeaders());
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while (oaLPPHeader* lppHeader = headers.getNext()) {
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cout << "Layer Purpose Pair " << ++count << endl;
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oaLayerNum layerNum = lppHeader->getLayerNum();
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oaPurposeNum purpNum = lppHeader->getPurposeNum();
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cout << "\t Layer = " << layerNum << endl;
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cout << "\t Purpose = " << purpNum << endl;
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}
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return designCellView;
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}
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@ -1054,6 +1078,7 @@ namespace {
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namespace CRL {
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void OpenAccess::oaDriver(const string& path, Cell* cell) {
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cerr << "oaDriver" << endl;
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#ifdef HAVE_OPENACCESS
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oaCell* convertedCell = NULL;
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assert(cell);
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@ -1,28 +0,0 @@
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PROJECT(testOAWrapper)
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CMAKE_MINIMUM_REQUIRED(VERSION 2.4.0)
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LIST(INSERT CMAKE_MODULE_PATH 0 "$ENV{BOOTSTRAP_TOP}/share/cmake/Modules/")
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find_package(Bootstrap REQUIRED)
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setup_project_paths(VLSISAPD)
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setup_project_paths(CORIOLIS)
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LIST(INSERT CMAKE_MODULE_PATH 0 "${CRLCORE_SOURCE_DIR}/cmake_modules/")
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LIST(INSERT CMAKE_MODULE_PATH 0 "${CRLCORE_SOURCE_DIR}/cmake_modules/")
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LIST(INSERT CMAKE_MODULE_PATH 0
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"$ENV{CHAMS_USER_TOP}/share/cmake/Modules/"
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"$ENV{CHAMS_TOP}/share/cmake/Modules/")
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print_cmake_module_path()
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FIND_PACKAGE(HURRICANE REQUIRED)
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FIND_PACKAGE(CORIOLIS REQUIRED)
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FIND_PACKAGE(VLSISAPD REQUIRED)
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FIND_PACKAGE(HURRICANEAMS REQUIRED)
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FIND_PACKAGE(AMSCORE REQUIRED)
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FIND_PACKAGE(Qt4 REQUIRED) # find and setup Qt4 for this project
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FIND_PACKAGE(LibXml2 REQUIRED)
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FIND_PACKAGE(PythonLibs REQUIRED)
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ADD_SUBDIRECTORY(src)
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@ -1,38 +0,0 @@
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TESTDIR= ./testOA
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#TECHNOFILE= /dsk/l1/misc/caba/coriolis-2.x/Linux.SLSoC5x/Release.Shared/install/etc/chams/config.freePDK45.xml
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TECHNOFILE= /dsk/l1/misc/caba/coriolis-2.x/Linux.SLSoC5x_64/Release.Shared/install/etc/chams/config.freePDK45.xml
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M=$$(uname -m)
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all: compile run
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lefTest:
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cd sxlib2lef && make
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compile:
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./compile.sh
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run: compile
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./$(M)/usr/local/bin/testOAWrapper $(TECHNOFILE) $(TESTDIR) 2>&1 | tee $@.log
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cd $(TESTDIR)/OAdrive && oa2lef -lib sxlib -views layout -lef sxlibFromOA.lef
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debug: compile
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gdb -args ./$(M)/usr/local/bin/testOAWrapper $(TECHNOFILE) $(TESTDIR)
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ddd: compile
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ddd -args ./$(M)/usr/local/bin/testOAWrapper $(TECHNOFILE) $(TESTDIR)
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valgrind_simple: compile
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valgrind ./$(M)/usr/local/bin/testOAWrapper $(TECHNOFILE) $(TESTDIR) 2>&1 | tee $@.log
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valgrind_full: compile
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valgrind -v --leak-check=full --show-reachable=yes ./$(M)/usr/local/bin/testOAWrapper $(TECHNOFILE) $(TESTDIR) 2>&1 | tee $@.log
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mrproper: clean
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rm -rf $(TESTDIR) *.log .cadence
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cd sxlib2lef && make mrproper
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clean:
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rm -rf $(M)
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.PHONY: clean mrproper valgrind ddd debug run compile all lefTest
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DEFINE WorkLibrary /dsk/l1/misc/caba/coriolis-2.x/src/crlcore/src/ccore/openaccess/test/testOA/OAdrive/WorkLibrary
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DEFINE myCM_Library /dsk/l1/misc/caba/coriolis-2.x/src/crlcore/src/ccore/openaccess/test/testOA/OAdrive/myCM_Library
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DEFINE sxlibFromOA /dsk/l1/misc/caba/coriolis-2.x/src/crlcore/src/ccore/openaccess/test/testOA/OAdrive/sxlib
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DEFINE sxlibFromLef /dsk/l1/misc/caba/coriolis-2.x/src/crlcore/src/ccore/openaccess/test/sxlib2lef/sxlib
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#!/bin/bash
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ARCH=`uname -m`
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if [ ! -e "./compile.sh" ]; then
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echo "You must run compile.sh in its own direcotry : ./compile.sh"
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exit 1
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fi
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if [ ! -d "$ARCH/build" ]; then
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echo "Creating build directory"
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mkdir -p $ARCH/build
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fi
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cd $ARCH/build && cmake ../.. && make DESTDIR=.. -j2 install
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File diff suppressed because it is too large
Load Diff
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INCLUDE(${QT_USE_FILE})
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INCLUDE_DIRECTORIES ( ${HURRICANE_INCLUDE_DIR}
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${CORIOLIS_INCLUDE_DIR}
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${HURRICANEAMS_INCLUDE_DIR}
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${HURRICANEAMS_GRAPHICAL_INCLUDE_DIR}
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${AMSCORE_INCLUDE_DIR}
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${SCHEMATIC_SOURCE_DIR}/src
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)
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SET ( CPPS main.cpp )
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SET(EXECUTABLE_OUTPUT_PATH ${CMAKE_BINARY_DIR}/bin)
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ADD_EXECUTABLE(testOAWrapper ${QRCS_SRCS} ${MOCS} ${CPPS} ${QRCS})
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TARGET_LINK_LIBRARIES(testOAWrapper ${HURRICANE_LIBRARIES}
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${HURRICANE_PYTHON_LIBRARIES}
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${OPENCHAMS_LIBRARY}
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${CIF_LIBRARY}
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${AGDS_LIBRARY}
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${CORIOLIS_LIBRARIES}
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${HURRICANEAMS_LIBRARIES}
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${AMSCORE_LIBRARIES}
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${OA_LIBRARIES} )
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INSTALL(TARGETS testOAWrapper DESTINATION bin)
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@ -1,206 +0,0 @@
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// -*-compile-command:"cd .. && make"-*-
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// x-----------------------------------------------------------------x
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// | This file is part of |
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// | Copyright (c) UPMC/LIP6 2008-2009, All Rights Reserved |
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// | =============================================================== |
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// | Author : Jean-Manuel Caba |
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// | E-mail : Jean-Manuel.Caba@asim.lip6.fr |
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// x-----------------------------------------------------------------x
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#include <iostream>
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#include <memory>
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#include <assert.h>
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using namespace std;
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#include "hurricane/Cell.h"
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#include "hurricane/Library.h"
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#include "hurricane/DataBase.h"
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using namespace Hurricane;
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#include "crlcore/Catalog.h"
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#include "crlcore/RealTechnologyParser.h"
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#include "crlcore/SymbolicTechnologyParser.h"
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#include "crlcore/AllianceFramework.h"
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#include "hurricaneAMS/environment/AnalogEnv.h"
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#include "hurricaneAMS/devices/SimpleCurrentMirror.h"
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#include "crlcore/GdsDriver.h"
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#include "crlcore/CifDriver.h"
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#include "crlcore/OADriver.h"
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using namespace CRL;
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namespace {
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static string designName = "design";
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static string libName = "WorkLibrary";
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};
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void testCell(Cell* dev,char* pathToTest){
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if(dev){
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cerr << "Cell created" << endl;
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}else{
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cerr << "Cell not created" << endl;
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return;
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}
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cerr << "driving GDS" << endl;
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GdsDriver(dev).save(string(pathToTest) + "/" + getString(dev->getName()) + ".gds");
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cerr << "driving CIF" << endl;
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CifDriver(dev).save(string(pathToTest) + "/" + getString(dev->getName()) + ".cif");
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cerr << "driving OA" << endl;
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OADriver(dev).save(string(pathToTest) + "/OAdrive");
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}
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void testAnalog(char* pathToConf,char* pathToTest){
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auto_ptr<AnalogEnv> aenv(AnalogEnv::create(pathToConf));//create Database ...
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cerr << "analog environment loaded and database created" << endl;
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DataBase* db = DataBase::getDB();
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assert(db != NULL);
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Library* rootLib = db->getRootLibrary();
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if(!rootLib){
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Library::create(db, "RootLibrary");
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rootLib = db->getRootLibrary();
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}
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assert(rootLib != NULL);
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Library* workLibrary = rootLib->getLibrary(libName);
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if(!workLibrary)
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workLibrary = Library::create(rootLib, libName);
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assert(workLibrary != NULL);
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Cell* design = workLibrary->getCell(designName);
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if(!design)
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design = Cell::create(workLibrary, designName);
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assert(design != NULL);
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cerr << "creating cell myCM" << endl;
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bool bulkConnected = true;//bulk connected to source
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Cell* dev = SimpleCurrentMirror::create(workLibrary, Name("myCM"),
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TransistorFamily::NMOS,
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bulkConnected);
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cerr << "testing cell myCM" << endl;
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testCell(dev,pathToTest);
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db->destroy();
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}
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void testNum(char* pathToConf,char* pathToTest,char* cellName){
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cerr << "creating cell from sxlib " << cellName << endl;
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DataBase* db = DataBase::getDB();
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AllianceFramework* af =AllianceFramework::get();
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Cell* cell = af->getCell(cellName, Catalog::State::Views );
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cerr << "testing cell from sxlib "<< cellName << endl;
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testCell(cell,pathToTest);
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}
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int main(int argc,char** argv) {
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if(argc != 3)
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exit(-5);
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testAnalog(argv[1],argv[2]);
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testNum(argv[1],argv[2],"a2_x2");
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testNum(argv[1],argv[2],"a2_x4");
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testNum(argv[1],argv[2],"a3_x2");
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testNum(argv[1],argv[2],"a3_x4");
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testNum(argv[1],argv[2],"a4_x2");
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testNum(argv[1],argv[2],"a4_x4");
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testNum(argv[1],argv[2],"an12_x1");
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testNum(argv[1],argv[2],"an12_x4");
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testNum(argv[1],argv[2],"ao22_x2");
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testNum(argv[1],argv[2],"ao22_x4");
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testNum(argv[1],argv[2],"ao2o22_x2");
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testNum(argv[1],argv[2],"ao2o22_x4");
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testNum(argv[1],argv[2],"buf_x2");
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testNum(argv[1],argv[2],"buf_x4");
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testNum(argv[1],argv[2],"buf_x8");
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testNum(argv[1],argv[2],"fulladder_x2");
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testNum(argv[1],argv[2],"fulladder_x4");
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testNum(argv[1],argv[2],"halfadder_x2");
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testNum(argv[1],argv[2],"halfadder_x4");
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testNum(argv[1],argv[2],"inv_x1");
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testNum(argv[1],argv[2],"inv_x2");
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testNum(argv[1],argv[2],"inv_x4");
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testNum(argv[1],argv[2],"inv_x8");
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testNum(argv[1],argv[2],"mx2_x2");
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testNum(argv[1],argv[2],"mx2_x4");
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testNum(argv[1],argv[2],"mx3_x2");
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testNum(argv[1],argv[2],"mx3_x4");
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testNum(argv[1],argv[2],"na2_x1");
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testNum(argv[1],argv[2],"na2_x4");
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testNum(argv[1],argv[2],"na3_x1");
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testNum(argv[1],argv[2],"na3_x4");
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testNum(argv[1],argv[2],"na4_x1");
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testNum(argv[1],argv[2],"na4_x4");
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testNum(argv[1],argv[2],"nao22_x1");
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testNum(argv[1],argv[2],"nao22_x4");
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testNum(argv[1],argv[2],"nao2o22_x1");
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testNum(argv[1],argv[2],"nao2o22_x4");
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testNum(argv[1],argv[2],"nmx2_x1");
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testNum(argv[1],argv[2],"nmx2_x4");
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testNum(argv[1],argv[2],"nmx3_x1");
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testNum(argv[1],argv[2],"nmx3_x4");
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testNum(argv[1],argv[2],"no2_x1");
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testNum(argv[1],argv[2],"no2_x4");
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testNum(argv[1],argv[2],"no3_x1");
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testNum(argv[1],argv[2],"no3_x4");
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testNum(argv[1],argv[2],"no4_x1");
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testNum(argv[1],argv[2],"no4_x4");
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testNum(argv[1],argv[2],"noa22_x1");
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testNum(argv[1],argv[2],"noa22_x4");
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testNum(argv[1],argv[2],"noa2a22_x1");
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testNum(argv[1],argv[2],"noa2a22_x4");
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testNum(argv[1],argv[2],"noa2a2a23_x1");
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testNum(argv[1],argv[2],"noa2a2a23_x4");
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testNum(argv[1],argv[2],"noa2a2a2a24_x1");
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testNum(argv[1],argv[2],"noa2a2a2a24_x4");
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testNum(argv[1],argv[2],"noa2ao222_x1");
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testNum(argv[1],argv[2],"noa2ao222_x4");
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testNum(argv[1],argv[2],"noa3ao322_x1");
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testNum(argv[1],argv[2],"noa3ao322_x4");
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testNum(argv[1],argv[2],"nts_x1");
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testNum(argv[1],argv[2],"nts_x2");
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testNum(argv[1],argv[2],"nxr2_x1");
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testNum(argv[1],argv[2],"nxr2_x4");
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testNum(argv[1],argv[2],"o2_x2");
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testNum(argv[1],argv[2],"o2_x4");
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testNum(argv[1],argv[2],"o3_x2");
|
||||
testNum(argv[1],argv[2],"o3_x4");
|
||||
testNum(argv[1],argv[2],"o4_x2");
|
||||
testNum(argv[1],argv[2],"o4_x4");
|
||||
testNum(argv[1],argv[2],"oa22_x2");
|
||||
testNum(argv[1],argv[2],"oa22_x4");
|
||||
testNum(argv[1],argv[2],"oa2a22_x2");
|
||||
testNum(argv[1],argv[2],"oa2a22_x4");
|
||||
testNum(argv[1],argv[2],"oa2a2a23_x2");
|
||||
testNum(argv[1],argv[2],"oa2a2a23_x4");
|
||||
testNum(argv[1],argv[2],"oa2a2a2a24_x2");
|
||||
testNum(argv[1],argv[2],"oa2a2a2a24_x4");
|
||||
testNum(argv[1],argv[2],"oa2ao222_x2");
|
||||
testNum(argv[1],argv[2],"oa2ao222_x4");
|
||||
testNum(argv[1],argv[2],"oa3ao322_x2");
|
||||
testNum(argv[1],argv[2],"oa3ao322_x4");
|
||||
testNum(argv[1],argv[2],"on12_x1");
|
||||
testNum(argv[1],argv[2],"on12_x4");
|
||||
testNum(argv[1],argv[2],"one_x0");
|
||||
testNum(argv[1],argv[2],"powmid_x0");
|
||||
testNum(argv[1],argv[2],"rowend_x0");
|
||||
testNum(argv[1],argv[2],"sff1_x4");
|
||||
testNum(argv[1],argv[2],"sff2_x4");
|
||||
testNum(argv[1],argv[2],"sff3_x4");
|
||||
testNum(argv[1],argv[2],"tie_x0");
|
||||
testNum(argv[1],argv[2],"ts_x4");
|
||||
testNum(argv[1],argv[2],"ts_x8");
|
||||
testNum(argv[1],argv[2],"xr2_x1");
|
||||
testNum(argv[1],argv[2],"xr2_x4");
|
||||
testNum(argv[1],argv[2],"zero_x0");
|
||||
|
||||
DataBase::getDB()->destroy();
|
||||
cerr << "ending normally" << endl;
|
||||
return 0;
|
||||
}
|
|
@ -1,17 +0,0 @@
|
|||
|
||||
all: sxlib.lef
|
||||
lef2oa -lib sxlib -lef sxlib.lef
|
||||
oa2lef -lib sxlib -lef sxlib_back.lef
|
||||
|
||||
sxlib.lef:
|
||||
grep -v "END LIBRARY" cmos.lef.bak > sxlib.lef ; for i in $$(cat cells) ; do sxlib2lef $$i ; cat $$i.lef >> sxlib.lef ; done
|
||||
echo "END LIBRARY" >> sxlib.lef
|
||||
cp sxlib.lef sxlib.lef.bak
|
||||
|
||||
mrproper: clean
|
||||
rm -rf sxlib cds.lib .cadence .oalib
|
||||
|
||||
clean:
|
||||
rm -rf *.log *.slog *~ encounter* *.lef
|
||||
|
||||
.PHONY: all mrproper clean
|
|
@ -1,95 +0,0 @@
|
|||
a2_x2
|
||||
a2_x4
|
||||
a3_x2
|
||||
a3_x4
|
||||
a4_x2
|
||||
a4_x4
|
||||
an12_x1
|
||||
an12_x4
|
||||
ao22_x2
|
||||
ao22_x4
|
||||
ao2o22_x2
|
||||
ao2o22_x4
|
||||
buf_x2
|
||||
buf_x4
|
||||
buf_x8
|
||||
fulladder_x2
|
||||
fulladder_x4
|
||||
halfadder_x2
|
||||
halfadder_x4
|
||||
inv_x1
|
||||
inv_x2
|
||||
inv_x4
|
||||
inv_x8
|
||||
mx2_x2
|
||||
mx2_x4
|
||||
mx3_x2
|
||||
mx3_x4
|
||||
na2_x1
|
||||
na2_x4
|
||||
na3_x1
|
||||
na3_x4
|
||||
na4_x1
|
||||
na4_x4
|
||||
nao22_x1
|
||||
nao22_x4
|
||||
nao2o22_x1
|
||||
nao2o22_x4
|
||||
nmx2_x1
|
||||
nmx2_x4
|
||||
nmx3_x1
|
||||
nmx3_x4
|
||||
no2_x1
|
||||
no2_x4
|
||||
no3_x1
|
||||
no3_x4
|
||||
no4_x1
|
||||
no4_x4
|
||||
noa22_x1
|
||||
noa22_x4
|
||||
noa2a22_x1
|
||||
noa2a22_x4
|
||||
noa2a2a23_x1
|
||||
noa2a2a23_x4
|
||||
noa2a2a2a24_x1
|
||||
noa2a2a2a24_x4
|
||||
noa2ao222_x1
|
||||
noa2ao222_x4
|
||||
noa3ao322_x1
|
||||
noa3ao322_x4
|
||||
nts_x1
|
||||
nts_x2
|
||||
nxr2_x1
|
||||
nxr2_x4
|
||||
o2_x2
|
||||
o2_x4
|
||||
o3_x2
|
||||
o3_x4
|
||||
o4_x2
|
||||
o4_x4
|
||||
oa22_x2
|
||||
oa22_x4
|
||||
oa2a22_x2
|
||||
oa2a22_x4
|
||||
oa2a2a23_x2
|
||||
oa2a2a23_x4
|
||||
oa2a2a2a24_x2
|
||||
oa2a2a2a24_x4
|
||||
oa2ao222_x2
|
||||
oa2ao222_x4
|
||||
oa3ao322_x2
|
||||
oa3ao322_x4
|
||||
on12_x1
|
||||
on12_x4
|
||||
one_x0
|
||||
powmid_x0
|
||||
rowend_x0
|
||||
sff1_x4
|
||||
sff2_x4
|
||||
sff3_x4
|
||||
tie_x0
|
||||
ts_x4
|
||||
ts_x8
|
||||
xr2_x1
|
||||
xr2_x4
|
||||
zero_x0
|
|
@ -1,435 +0,0 @@
|
|||
#
|
||||
# $Id: cmos.lef,v 1.6 2005/03/01 14:59:15 jpc Exp $
|
||||
#
|
||||
# /------------------------------------------------------------------\
|
||||
# | |
|
||||
# | A l l i a n c e C A D S y s t e m |
|
||||
# | S i l i c o n E n s e m b l e / A l l i a n c e |
|
||||
# | |
|
||||
# | Author : Jean-Paul CHAPUT |
|
||||
# | E-mail : alliance-users@asim.lip6.fr |
|
||||
# | ================================================================ |
|
||||
# | LEF : "./cmos_12.lef" |
|
||||
# | **************************************************************** |
|
||||
# | U p d a t e s |
|
||||
# | |
|
||||
# \------------------------------------------------------------------/
|
||||
#
|
||||
|
||||
|
||||
VERSION 5.2 ;
|
||||
NAMESCASESENSITIVE ON ;
|
||||
BUSBITCHARS "()" ;
|
||||
DIVIDERCHAR "." ;
|
||||
|
||||
#NOWIREEXTENSIONATPIN ON ;
|
||||
|
||||
|
||||
#UNITS
|
||||
# DATABASE MICRONS 100 ;
|
||||
#END UNITS
|
||||
|
||||
|
||||
LAYER POLY
|
||||
TYPE MASTERSLICE ;
|
||||
END POLY
|
||||
|
||||
|
||||
LAYER VIAP
|
||||
TYPE CUT ;
|
||||
END VIAP
|
||||
|
||||
|
||||
LAYER ALU1
|
||||
TYPE ROUTING ;
|
||||
WIDTH 2.00 ;
|
||||
SPACING 3.00 ;
|
||||
PITCH 5.00 ;
|
||||
DIRECTION VERTICAL ;
|
||||
CAPACITANCE CPERSQDIST 0.000032 ;
|
||||
RESISTANCE RPERSQ 0.100000 ;
|
||||
END ALU1
|
||||
|
||||
|
||||
LAYER VIA1
|
||||
TYPE CUT ;
|
||||
END VIA1
|
||||
|
||||
|
||||
LAYER ALU2
|
||||
TYPE ROUTING ;
|
||||
WIDTH 2.00 ;
|
||||
SPACING 3.00 ;
|
||||
PITCH 5.00 ;
|
||||
DIRECTION HORIZONTAL ;
|
||||
CAPACITANCE CPERSQDIST 0.000032 ;
|
||||
RESISTANCE RPERSQ 0.100000 ;
|
||||
END ALU2
|
||||
|
||||
|
||||
LAYER VIA2
|
||||
TYPE CUT ;
|
||||
END VIA2
|
||||
|
||||
|
||||
LAYER ALU3
|
||||
TYPE ROUTING ;
|
||||
WIDTH 2.00 ;
|
||||
SPACING 3.00 ;
|
||||
PITCH 5.00 ;
|
||||
DIRECTION VERTICAL ;
|
||||
CAPACITANCE CPERSQDIST 0.000032 ;
|
||||
RESISTANCE RPERSQ 0.100000 ;
|
||||
END ALU3
|
||||
|
||||
|
||||
LAYER VIA3
|
||||
TYPE CUT ;
|
||||
END VIA3
|
||||
|
||||
|
||||
LAYER ALU4
|
||||
TYPE ROUTING ;
|
||||
WIDTH 2.00 ;
|
||||
SPACING 3.00 ;
|
||||
PITCH 5.00 ;
|
||||
DIRECTION HORIZONTAL ;
|
||||
CAPACITANCE CPERSQDIST 0.000032 ;
|
||||
RESISTANCE RPERSQ 0.100000 ;
|
||||
END ALU4
|
||||
|
||||
|
||||
LAYER VIA4
|
||||
TYPE CUT ;
|
||||
END VIA4
|
||||
|
||||
|
||||
LAYER ALU5
|
||||
TYPE ROUTING ;
|
||||
WIDTH 2.00 ;
|
||||
SPACING 3.00 ;
|
||||
PITCH 5.00 ;
|
||||
DIRECTION VERTICAL ;
|
||||
CAPACITANCE CPERSQDIST 0.000032 ;
|
||||
RESISTANCE RPERSQ 0.100000 ;
|
||||
END ALU5
|
||||
|
||||
|
||||
LAYER VIA5
|
||||
TYPE CUT ;
|
||||
END VIA5
|
||||
|
||||
|
||||
LAYER ALU6
|
||||
TYPE ROUTING ;
|
||||
WIDTH 2.00 ;
|
||||
SPACING 3.00 ;
|
||||
PITCH 5.00 ;
|
||||
DIRECTION HORIZONTAL ;
|
||||
CAPACITANCE CPERSQDIST 0.000032 ;
|
||||
RESISTANCE RPERSQ 0.100000 ;
|
||||
END ALU6
|
||||
|
||||
|
||||
#VIA CONT_POLY DEFAULT
|
||||
# LAYER POLY ;
|
||||
# RECT -1.50 -1.50 1.50 1.50 ;
|
||||
# LAYER VIAP ;
|
||||
# RECT -0.50 -0.50 0.50 0.50 ;
|
||||
# LAYER ALU1 ;
|
||||
# RECT -1.00 -1.00 1.00 1.00 ;
|
||||
#END CONT_POLY
|
||||
|
||||
|
||||
VIA CONT_VIA DEFAULT
|
||||
LAYER ALU1 ;
|
||||
RECT -1.00 -1.00 1.00 1.00 ;
|
||||
LAYER VIA1 ;
|
||||
RECT -0.50 -0.50 0.50 0.50 ;
|
||||
LAYER ALU2 ;
|
||||
RECT -1.00 -1.00 1.00 1.00 ;
|
||||
END CONT_VIA
|
||||
|
||||
|
||||
VIA CONT_VIA2 DEFAULT
|
||||
LAYER ALU3 ;
|
||||
RECT -1.00 -1.00 1.00 1.00 ;
|
||||
LAYER VIA2 ;
|
||||
RECT -0.50 -0.50 0.50 0.50 ;
|
||||
LAYER ALU2 ;
|
||||
RECT -1.00 -1.00 1.00 1.00 ;
|
||||
END CONT_VIA2
|
||||
|
||||
|
||||
VIA CONT_VIA3 DEFAULT
|
||||
LAYER ALU4 ;
|
||||
RECT -1.00 -1.00 1.00 1.00 ;
|
||||
LAYER VIA3 ;
|
||||
RECT -0.50 -0.50 0.50 0.50 ;
|
||||
LAYER ALU3 ;
|
||||
RECT -1.00 -1.00 1.00 1.00 ;
|
||||
END CONT_VIA3
|
||||
|
||||
|
||||
VIA CONT_VIA4 DEFAULT
|
||||
LAYER ALU5 ;
|
||||
RECT -1.00 -1.00 1.00 1.00 ;
|
||||
LAYER VIA4 ;
|
||||
RECT -0.50 -0.50 0.50 0.50 ;
|
||||
LAYER ALU4 ;
|
||||
RECT -1.00 -1.00 1.00 1.00 ;
|
||||
END CONT_VIA4
|
||||
|
||||
|
||||
VIA CONT_VIA5 DEFAULT
|
||||
LAYER ALU6 ;
|
||||
RECT -1.00 -1.00 1.00 1.00 ;
|
||||
LAYER VIA5 ;
|
||||
RECT -0.50 -0.50 0.50 0.50 ;
|
||||
LAYER ALU5 ;
|
||||
RECT -1.00 -1.00 1.00 1.00 ;
|
||||
END CONT_VIA5
|
||||
|
||||
|
||||
VIARULE TURN_ALU1 GENERATE
|
||||
LAYER ALU1 ;
|
||||
DIRECTION vertical ;
|
||||
|
||||
LAYER ALU1 ;
|
||||
DIRECTION horizontal ;
|
||||
END TURN_ALU1
|
||||
|
||||
|
||||
VIARULE TURN_ALU2 GENERATE
|
||||
LAYER ALU2 ;
|
||||
DIRECTION vertical ;
|
||||
|
||||
LAYER ALU2 ;
|
||||
DIRECTION horizontal ;
|
||||
END TURN_ALU2
|
||||
|
||||
|
||||
VIARULE TURN_ALU3 GENERATE
|
||||
LAYER ALU3 ;
|
||||
DIRECTION vertical ;
|
||||
|
||||
LAYER ALU3 ;
|
||||
DIRECTION horizontal ;
|
||||
END TURN_ALU3
|
||||
|
||||
|
||||
VIARULE TURN_ALU4 GENERATE
|
||||
LAYER ALU4 ;
|
||||
DIRECTION vertical ;
|
||||
|
||||
LAYER ALU4 ;
|
||||
DIRECTION horizontal ;
|
||||
END TURN_ALU4
|
||||
|
||||
|
||||
VIARULE TURN_ALU5 GENERATE
|
||||
LAYER ALU5 ;
|
||||
DIRECTION vertical ;
|
||||
|
||||
LAYER ALU5 ;
|
||||
DIRECTION horizontal ;
|
||||
END TURN_ALU5
|
||||
|
||||
|
||||
VIARULE TURN_ALU6 GENERATE
|
||||
LAYER ALU6 ;
|
||||
DIRECTION vertical ;
|
||||
|
||||
LAYER ALU6 ;
|
||||
DIRECTION horizontal ;
|
||||
END TURN_ALU6
|
||||
|
||||
|
||||
#VIARULE VIA1_HV
|
||||
# LAYER ALU1 ;
|
||||
# DIRECTION VERTICAL ;
|
||||
# OVERHANG 0.50 ;
|
||||
# METALOVERHANG 0.50 ;
|
||||
#
|
||||
# LAYER ALU2 ;
|
||||
# DIRECTION HORIZONTAL ;
|
||||
# OVERHANG 0.50 ;
|
||||
# METALOVERHANG 0.50 ;
|
||||
#
|
||||
# VIA CONT_VIA ;
|
||||
#END VIA1_HV
|
||||
#
|
||||
#
|
||||
#VIARULE VIA2_VH
|
||||
# LAYER ALU2 ;
|
||||
# DIRECTION HORIZONTAL ;
|
||||
# OVERHANG 0.50 ;
|
||||
# METALOVERHANG 0.50 ;
|
||||
#
|
||||
# LAYER ALU3 ;
|
||||
# DIRECTION VERTICAL ;
|
||||
# OVERHANG 0.50 ;
|
||||
# METALOVERHANG 0.50 ;
|
||||
#
|
||||
# VIA CONT_VIA2 ;
|
||||
#END VIA2_VH
|
||||
#
|
||||
#
|
||||
#VIARULE VIA3_VH
|
||||
# LAYER ALU3 ;
|
||||
# DIRECTION HORIZONTAL ;
|
||||
# OVERHANG 0.50 ;
|
||||
# METALOVERHANG 0.50 ;
|
||||
#
|
||||
# LAYER ALU4 ;
|
||||
# DIRECTION VERTICAL ;
|
||||
# OVERHANG 0.50 ;
|
||||
# METALOVERHANG 0.50 ;
|
||||
#
|
||||
# VIA CONT_VIA3 ;
|
||||
#END VIA3_VH
|
||||
|
||||
|
||||
VIARULE genVIA1_HV GENERATE
|
||||
LAYER ALU1 ;
|
||||
DIRECTION VERTICAL ;
|
||||
OVERHANG 0.50 ;
|
||||
METALOVERHANG 0.50 ;
|
||||
|
||||
LAYER ALU2 ;
|
||||
DIRECTION HORIZONTAL ;
|
||||
OVERHANG 0.50 ;
|
||||
METALOVERHANG 0.50 ;
|
||||
|
||||
LAYER VIA1 ;
|
||||
RECT -0.50 -0.50 0.50 0.50 ;
|
||||
SPACING 3.00 BY 3.00 ;
|
||||
END genVIA1_HV
|
||||
|
||||
|
||||
VIARULE genVIA1_VH GENERATE
|
||||
LAYER ALU1 ;
|
||||
DIRECTION HORIZONTAL ;
|
||||
OVERHANG 0.50 ;
|
||||
METALOVERHANG 0.50 ;
|
||||
|
||||
LAYER ALU2 ;
|
||||
DIRECTION VERTICAL ;
|
||||
OVERHANG 0.50 ;
|
||||
METALOVERHANG 0.50 ;
|
||||
|
||||
LAYER VIA1 ;
|
||||
RECT -0.50 -0.50 0.50 0.50 ;
|
||||
SPACING 3.00 BY 3.00 ;
|
||||
END genVIA1_VH
|
||||
|
||||
|
||||
VIARULE genVIA2_VH GENERATE
|
||||
LAYER ALU2 ;
|
||||
DIRECTION HORIZONTAL ;
|
||||
OVERHANG 0.50 ;
|
||||
METALOVERHANG 0.50 ;
|
||||
|
||||
LAYER ALU3 ;
|
||||
DIRECTION VERTICAL ;
|
||||
OVERHANG 0.50 ;
|
||||
METALOVERHANG 0.50 ;
|
||||
|
||||
LAYER VIA2 ;
|
||||
RECT -0.50 -0.50 0.50 0.50 ;
|
||||
SPACING 3.00 BY 3.00 ;
|
||||
END genVIA2_VH
|
||||
|
||||
|
||||
VIARULE genVIA2_HV GENERATE
|
||||
LAYER ALU2 ;
|
||||
DIRECTION VERTICAL ;
|
||||
OVERHANG 0.50 ;
|
||||
METALOVERHANG 0.50 ;
|
||||
|
||||
LAYER ALU3 ;
|
||||
DIRECTION HORIZONTAL ;
|
||||
OVERHANG 0.50 ;
|
||||
METALOVERHANG 0.50 ;
|
||||
|
||||
LAYER VIA2 ;
|
||||
RECT -0.50 -0.50 0.50 0.50 ;
|
||||
SPACING 3.00 BY 3.00 ;
|
||||
END genVIA2_HV
|
||||
|
||||
|
||||
VIARULE genVIA3_VH GENERATE
|
||||
LAYER ALU3 ;
|
||||
DIRECTION HORIZONTAL ;
|
||||
OVERHANG 0.50 ;
|
||||
METALOVERHANG 0.50 ;
|
||||
|
||||
LAYER ALU4 ;
|
||||
DIRECTION VERTICAL ;
|
||||
OVERHANG 0.50 ;
|
||||
METALOVERHANG 0.50 ;
|
||||
|
||||
LAYER VIA3 ;
|
||||
RECT -0.50 -0.50 0.50 0.50 ;
|
||||
SPACING 3.00 BY 3.00 ;
|
||||
END genVIA3_VH
|
||||
|
||||
|
||||
VIARULE genVIA3_HV GENERATE
|
||||
LAYER ALU3 ;
|
||||
DIRECTION VERTICAL ;
|
||||
OVERHANG 0.50 ;
|
||||
METALOVERHANG 0.50 ;
|
||||
|
||||
LAYER ALU4 ;
|
||||
DIRECTION HORIZONTAL ;
|
||||
OVERHANG 0.50 ;
|
||||
METALOVERHANG 0.50 ;
|
||||
|
||||
LAYER VIA3 ;
|
||||
RECT -0.50 -0.50 0.50 0.50 ;
|
||||
SPACING 3.00 BY 3.00 ;
|
||||
END genVIA3_HV
|
||||
|
||||
|
||||
SPACING
|
||||
SAMENET VIAP VIAP 3.00 ;
|
||||
SAMENET VIA1 VIA1 3.00 ;
|
||||
SAMENET VIA2 VIA2 3.00 ;
|
||||
SAMENET VIAP VIA1 3.00 STACK ;
|
||||
SAMENET VIA1 VIA2 3.00 STACK ;
|
||||
SAMENET VIA2 VIA3 3.00 STACK ;
|
||||
SAMENET VIA3 VIA4 3.00 STACK ;
|
||||
SAMENET VIA4 VIA5 3.00 STACK ;
|
||||
SAMENET POLY POLY 3.00 ;
|
||||
SAMENET ALU1 ALU1 3.00 STACK ;
|
||||
SAMENET ALU2 ALU2 3.00 STACK ;
|
||||
SAMENET ALU3 ALU3 3.00 STACK ;
|
||||
SAMENET ALU4 ALU4 3.00 STACK ;
|
||||
SAMENET ALU5 ALU5 3.00 STACK ;
|
||||
SAMENET ALU6 ALU6 3.00 ;
|
||||
END SPACING
|
||||
|
||||
|
||||
SITE core
|
||||
SYMMETRY y ;
|
||||
CLASS CORE ;
|
||||
SIZE 5.00 BY 50.00 ;
|
||||
END core
|
||||
|
||||
|
||||
SITE pad
|
||||
SYMMETRY y ;
|
||||
CLASS PAD ;
|
||||
SIZE 1.00 BY 500.00 ;
|
||||
END pad
|
||||
|
||||
|
||||
SITE corner
|
||||
SYMMETRY y r90 ;
|
||||
CLASS PAD ;
|
||||
SIZE 500.00 BY 500.00 ;
|
||||
END corner
|
||||
|
||||
|
||||
END LIBRARY
|
File diff suppressed because it is too large
Load Diff
|
@ -1,28 +0,0 @@
|
|||
PROJECT(testOAWrapper)
|
||||
|
||||
CMAKE_MINIMUM_REQUIRED(VERSION 2.4.0)
|
||||
|
||||
LIST(INSERT CMAKE_MODULE_PATH 0 "$ENV{BOOTSTRAP_TOP}/share/cmake/Modules/")
|
||||
find_package(Bootstrap REQUIRED)
|
||||
setup_project_paths(VLSISAPD)
|
||||
setup_project_paths(CORIOLIS)
|
||||
|
||||
LIST(INSERT CMAKE_MODULE_PATH 0 "${CRLCORE_SOURCE_DIR}/cmake_modules/")
|
||||
|
||||
|
||||
LIST(INSERT CMAKE_MODULE_PATH 0 "${CRLCORE_SOURCE_DIR}/cmake_modules/")
|
||||
LIST(INSERT CMAKE_MODULE_PATH 0
|
||||
"$ENV{CHAMS_USER_TOP}/share/cmake/Modules/"
|
||||
"$ENV{CHAMS_TOP}/share/cmake/Modules/")
|
||||
print_cmake_module_path()
|
||||
|
||||
FIND_PACKAGE(HURRICANE REQUIRED)
|
||||
FIND_PACKAGE(CORIOLIS REQUIRED)
|
||||
FIND_PACKAGE(VLSISAPD REQUIRED)
|
||||
FIND_PACKAGE(HURRICANEAMS REQUIRED)
|
||||
FIND_PACKAGE(AMSCORE REQUIRED)
|
||||
FIND_PACKAGE(Qt4 REQUIRED) # find and setup Qt4 for this project
|
||||
FIND_PACKAGE(LibXml2 REQUIRED)
|
||||
FIND_PACKAGE(PythonLibs REQUIRED)
|
||||
|
||||
ADD_SUBDIRECTORY(src)
|
|
@ -1,23 +0,0 @@
|
|||
|
||||
TECHNOFILE= /asim/chams/etc/chams/config.freePDK45.xml
|
||||
M=$$(uname -m)
|
||||
|
||||
all: compile
|
||||
|
||||
compile:
|
||||
./compile.sh
|
||||
|
||||
run:
|
||||
./$(M)/usr/local/bin/testOAWrapper \
|
||||
"/dsk/l1/misc/caba/OA_BENCHMARKS/NangateOpenCellLibrary_PDKv1_3_v2009_07/openaccess" \
|
||||
"NangateOpenCellLibrary" \
|
||||
"/dsk/l1/misc/caba/OA_BENCHMARKS/NangateOpenCellLibrary_PDKv1_3_v2009_07/openaccess" \
|
||||
"NCSU_FreePDK_45nm"
|
||||
|
||||
mrproper: clean
|
||||
rm -rf *.log .cadence
|
||||
|
||||
clean:
|
||||
rm -rf $(M)
|
||||
|
||||
.PHONY: clean mrproper compile all run
|
|
@ -1,14 +0,0 @@
|
|||
#!/bin/bash
|
||||
ARCH=`uname -m`
|
||||
|
||||
if [ ! -e "./compile.sh" ]; then
|
||||
echo "You must run compile.sh in its own direcotry : ./compile.sh"
|
||||
exit 1
|
||||
fi
|
||||
|
||||
if [ ! -d "$ARCH/build" ]; then
|
||||
echo "Creating build directory"
|
||||
mkdir -p $ARCH/build
|
||||
fi
|
||||
|
||||
cd $ARCH/build && cmake ../.. && make DESTDIR=.. -j2 install
|
|
@ -1,26 +0,0 @@
|
|||
|
||||
INCLUDE(${QT_USE_FILE})
|
||||
|
||||
INCLUDE_DIRECTORIES ( ${HURRICANE_INCLUDE_DIR}
|
||||
${CORIOLIS_INCLUDE_DIR}
|
||||
${HURRICANEAMS_INCLUDE_DIR}
|
||||
${HURRICANEAMS_GRAPHICAL_INCLUDE_DIR}
|
||||
${AMSCORE_INCLUDE_DIR}
|
||||
${SCHEMATIC_SOURCE_DIR}/src
|
||||
)
|
||||
|
||||
SET ( CPPS main.cpp )
|
||||
|
||||
SET(EXECUTABLE_OUTPUT_PATH ${CMAKE_BINARY_DIR}/bin)
|
||||
ADD_EXECUTABLE(testOAWrapper ${QRCS_SRCS} ${MOCS} ${CPPS} ${QRCS})
|
||||
TARGET_LINK_LIBRARIES(testOAWrapper ${HURRICANE_LIBRARIES}
|
||||
${HURRICANE_PYTHON_LIBRARIES}
|
||||
${OPENCHAMS_LIBRARY}
|
||||
${CIF_LIBRARY}
|
||||
${AGDS_LIBRARY}
|
||||
${CORIOLIS_LIBRARIES}
|
||||
${HURRICANEAMS_LIBRARIES}
|
||||
${AMSCORE_LIBRARIES}
|
||||
${OA_LIBRARIES} )
|
||||
INSTALL(TARGETS testOAWrapper DESTINATION bin)
|
||||
|
|
@ -1,60 +0,0 @@
|
|||
// -*-compile-command:"cd .. && make"-*-
|
||||
// x-----------------------------------------------------------------x
|
||||
// | This file is part of |
|
||||
// | Copyright (c) UPMC/LIP6 2008-2009, All Rights Reserved |
|
||||
// | =============================================================== |
|
||||
// | Author : Jean-Manuel Caba |
|
||||
// | E-mail : Jean-Manuel.Caba@asim.lip6.fr |
|
||||
// x-----------------------------------------------------------------x
|
||||
|
||||
#include <iostream>
|
||||
#include <memory>
|
||||
#include <assert.h>
|
||||
|
||||
using namespace std;
|
||||
|
||||
#include <QtGui>
|
||||
#if (QT_VERSION >= QT_VERSION_CHECK(4,5,0)) and not defined (__APPLE__)
|
||||
# include <QGtkStyle>
|
||||
#endif
|
||||
#include "hurricane/DataBase.h"
|
||||
#include "hurricane/Technology.h"
|
||||
#include "hurricane/Cell.h"
|
||||
|
||||
#include "hurricane/viewer/Graphics.h"
|
||||
#include "hurricane/viewer/CellViewer.h"
|
||||
#include "hurricane/viewer/HApplication.h"
|
||||
|
||||
using namespace Hurricane;
|
||||
|
||||
#include "crlcore/AllianceFramework.h"
|
||||
#include "crlcore/OAParser.h"
|
||||
using namespace CRL;
|
||||
|
||||
int main(int argc,char** argv) {
|
||||
int returnCode=0;
|
||||
|
||||
if(argc!=5)
|
||||
return -1;
|
||||
|
||||
dbo_ptr<AllianceFramework> af(AllianceFramework::create());
|
||||
auto_ptr<DataBase> sys(DataBase::getDB());
|
||||
|
||||
// Cell* cell = af->getCell("inv_x1", Catalog::State::Views );
|
||||
Cell* cell = OAParser(argv[1],argv[2],argv[3],argv[4]).open("INV_X1");
|
||||
|
||||
auto_ptr<QApplication> qa(new HApplication(argc,argv));
|
||||
#if (QT_VERSION >= QT_VERSION_CHECK(4,5,0)) and not defined (__APPLE__)
|
||||
qa->setStyle(new QGtkStyle());
|
||||
#endif
|
||||
|
||||
Graphics::enable();
|
||||
auto_ptr<CellViewer> blockViewer(new CellViewer());
|
||||
blockViewer->setCell(cell);
|
||||
blockViewer->show();
|
||||
|
||||
returnCode = qa->exec();
|
||||
|
||||
cerr << "ending normally ?" << endl;
|
||||
return returnCode;
|
||||
}
|
Loading…
Reference in New Issue