Disable the use of concat '&' in VST port map.

This commit is contained in:
Jean-Paul Chaput 2019-07-31 17:38:35 +02:00
parent d69327d9a9
commit 85e969bca9
1 changed files with 3 additions and 1 deletions

View File

@ -153,8 +153,8 @@ namespace Vhdl {
void VectorPortMap::toVhdlPortMap ( ostream& out, size_t width ) const
{
if (getSignal()->isContiguous()) {
vector<string> mappedNames;
if (getSignal()->isContiguous()) {
int begin = -1;
int end = -1;
int delta = 0;
@ -220,7 +220,9 @@ namespace Vhdl {
mappedNames.push_back( bitp->getName() );
}
}
}
if (mappedNames.size() == 1) {
out << setw(width) << left << _signal->getName() << " => ";
size_t lhsWidth = 90 - tab.getWidth() - width - 4;