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caravel/openlane/caravel_clocking
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kareem c922241c3f reharden: caravel_clocking 
+ add custom interactive script to insert a buffer on user_clk output
and have a large buffer on core_clk
~ change pdn config to match top level
~ change sdc
~ change openlane configuration
 		2022-10-13 10:54:04 -07:00
..
template reharden: caravel_clocking 2022-10-13 10:54:04 -07:00
base.sdc reharden: caravel_clocking 2022-10-13 10:54:04 -07:00
base2.sdc reharden: caravel_clocking 2022-10-13 10:54:04 -07:00
buffer.tcl reharden: caravel_clocking 2022-10-13 10:54:04 -07:00
config.tcl reharden: caravel_clocking 2022-10-13 10:54:04 -07:00
drc_exclude.list reharden: caravel_clocking 2022-10-13 10:54:04 -07:00
interactive.tcl reharden: caravel_clocking 2022-10-13 10:54:04 -07:00
no_synth.list [DATA] Update caravel_clocking module 2021-12-05 19:44:28 +02:00
pin_order.cfg [DATA] Update caravel_clocking module floorplan 2021-11-19 01:26:29 +02:00