mirror of https://github.com/efabless/caravel.git
3 lines
1.4 KiB
Plaintext
3 lines
1.4 KiB
Plaintext
,design,design_name,config,flow_status,total_runtime,routed_runtime,(Cell/mm^2)/Core_Util,DIEAREA_mm^2,CellPer_mm^2,OpenDP_Util,Peak_Memory_Usage_MB,cell_count,tritonRoute_violations,Short_violations,MetSpc_violations,OffGrid_violations,MinHole_violations,Other_violations,Magic_violations,antenna_violations,lvs_total_errors,cvc_total_errors,klayout_violations,wire_length,vias,wns,pl_wns,optimized_wns,fastroute_wns,spef_wns,tns,pl_tns,optimized_tns,fastroute_tns,spef_tns,HPWL,routing_layer1_pct,routing_layer2_pct,routing_layer3_pct,routing_layer4_pct,routing_layer5_pct,routing_layer6_pct,wires_count,wire_bits,public_wires_count,public_wire_bits,memories_count,memory_bits,processes_count,cells_pre_abc,AND,DFF,NAND,NOR,OR,XOR,XNOR,MUX,inputs,outputs,level,EndCaps,TapCells,Diodes,Total_Physical_Cells,suggested_clock_frequency,suggested_clock_period,CLOCK_PERIOD,SYNTH_STRATEGY,SYNTH_MAX_FANOUT,FP_CORE_UTIL,FP_ASPECT_RATIO,FP_PDN_VPITCH,FP_PDN_HPITCH,PL_TARGET_DENSITY,GLB_RT_ADJUSTMENT,STD_CELL_LIBRARY,CELL_PAD,DIODE_INSERTION_STRATEGY
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0,/home/ma/ef/caravel.latest/openlane/mgmt_protect,mgmt_protect,mgmt_protect,flow completed,0h7m3s0ms,0h5m41s0ms,14250.0,0.17600000000000002,7125.0,10.79,741.34,1254,0,0,0,0,0,0,9,70,53,-1,-1,400978,20544,0.0,0.0,-1,0.0,-1,0.0,0.0,-1,0.0,-1,386343993.0,0.0,59.95,26.3,46.54,16.17,-1,388,2353,59,2024,0,0,0,1254,0,0,0,0,0,0,0,0,329,329,1,140,2130,2799,5069,111.11111111111111,9,8,AREA 0,5,50,1,150.5,5.44,0.14,0.05,sky130_fd_sc_hd,0,1
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