kareem b0abb4e164 add chip_io gl ... ~ update interactive script for chip_io.v for recent openlane ~ update config.tcl for recent openlane ~ add a verilog stub for sky130_fd_io__top_xres4v2 as the io verilog models are not readable by yosys		2022-10-11 07:35:13 -07:00
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dv	added netlist for vcs gl_caravel_vcs.list rtl_caravel_vcs.list	2022-10-10 06:23:47 -07:00
gl	add chip_io gl	2022-10-11 07:35:13 -07:00
rtl	Merge pull request #165 from efabless/misc-rtl-changes	2022-10-11 10:48:18 +02:00
stubs	[DATA] Add spare_logic_block	2021-11-24 20:36:23 +02:00