caravel/signoff/digital_pll
Passant 78cec109cc add signoff sdc dir
move sdc generated from openlane to signoff/<design name>/openlane-signoff
rearrange spef directory with RC corners spefs
2022-10-12 07:28:32 -07:00
..
openlane-signoff add signoff sdc dir 2022-10-12 07:28:32 -07:00
OPENLANE_VERSION [DATA] Update digital_pll 2021-12-07 13:19:02 +02:00
PDK_SOURCES [DATA] Add views for caravel_clocking and updated digital_pll clock after constraining clock to 150 MHz 2021-11-15 15:50:43 +02:00
final_summary_report.csv [DATA] Update digital_pll 2021-12-07 13:19:02 +02:00