Tim Edwards 2f6fe69b36 Corrected the gen_gpio_defaults.py script so that it behaves ... correctly no matter how the "gpio_defaults_block.mag" and "gl/gpio_defaults_block.v" are defined. Previously it assumed that they both defined all bits as zero, which was not the case for the layout. Now both define bit value 0x0402 and the script can flip bits either direction as needed in both verilog and layout		2021-12-29 15:42:41 -05:00
..
dv	Added a testbench that exercises the SRAM 2nd (read-only) port, as	2021-12-29 11:24:17 -05:00
gl	Corrected the gen_gpio_defaults.py script so that it behaves	2021-12-29 15:42:41 -05:00
rtl	Added a reference to the new file "gl/mgmt_defines.v" in the	2021-12-24 11:46:34 -05:00
stubs	[DATA] Add spare_logic_block	2021-11-24 20:36:23 +02:00