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riscv
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caravel
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https://github.com/efabless/caravel.git
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64bdd6230d
caravel
/
signoff
/
digital_pll
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manarabdelaty
72b2c724c9
[DATA] Add views for caravel_clocking and updated digital_pll clock after constraining clock to 150 MHz
2021-11-15 15:50:43 +02:00
..
OPENLANE_VERSION
[DATA] Add views for caravel_clocking and updated digital_pll clock after constraining clock to 150 MHz
2021-11-15 15:50:43 +02:00
PDK_SOURCES
[DATA] Add views for caravel_clocking and updated digital_pll clock after constraining clock to 150 MHz
2021-11-15 15:50:43 +02:00
final_summary_report.csv
[DATA] Add views for caravel_clocking and updated digital_pll clock after constraining clock to 150 MHz
2021-11-15 15:50:43 +02:00