mirror of https://github.com/efabless/caravel.git
67 lines
2.2 KiB
Verilog
67 lines
2.2 KiB
Verilog
// SPDX-FileCopyrightText: 2020 Efabless Corporation
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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// SPDX-License-Identifier: Apache-2.0
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`default_nettype none
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`ifndef __GLOBAL_DEFINE_H
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// Global parameters
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`define __GLOBAL_DEFINE_H
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`define MPRJ_IO_PADS_1 19 /* number of user GPIO pads on user1 side */
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`define MPRJ_IO_PADS_2 19 /* number of user GPIO pads on user2 side */
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`define MPRJ_IO_PADS (`MPRJ_IO_PADS_1 + `MPRJ_IO_PADS_2)
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`define MPRJ_PWR_PADS_1 2 /* vdda1, vccd1 enable/disable control */
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`define MPRJ_PWR_PADS_2 2 /* vdda2, vccd2 enable/disable control */
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`define MPRJ_PWR_PADS (`MPRJ_PWR_PADS_1 + `MPRJ_PWR_PADS_2)
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// Analog pads are only used by the "caravan" module and associated
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// modules such as user_analog_project_wrapper and chip_io_alt.
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`define ANALOG_PADS_1 5
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`define ANALOG_PADS_2 6
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`define ANALOG_PADS (`ANALOG_PADS_1 + `ANALOG_PADS_2)
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// Size of soc_mem_synth
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// Type and size of soc_mem
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// `define USE_OPENRAM
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`define USE_CUSTOM_DFFRAM
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// don't change the following without double checking addr widths
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`define MEM_WORDS 256
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// Number of columns in the custom memory; takes one of three values:
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// 1 column : 1 KB, 2 column: 2 KB, 4 column: 4KB
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`define DFFRAM_WSIZE 4
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`define DFFRAM_USE_LATCH 0
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// not really parameterized but just to easily keep track of the number
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// of ram_block across different modules
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`define RAM_BLOCKS 1
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// Clock divisor default value
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`define CLK_DIV 3'b010
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// GPIO control default mode and enable for most I/Os
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// Most I/Os set to be user input pins on startup.
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// NOTE: To be modified, with GPIOs 5 to 35 being set from a build-time-
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// programmable block.
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`define MGMT_INIT 1'b0
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`define OENB_INIT 1'b0
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`define DM_INIT 3'b001
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`endif // __GLOBAL_DEFINE_H
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