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riscv
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caravel
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https://github.com/efabless/caravel.git
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4b762da8e6
caravel
/
verilog
/
dv
/
cocotb
/
tests
/
uart
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M0stafaRady
555488c832
fix timeout values to the passing number of cycles required + 10%
2022-10-01 04:11:46 -07:00
..
uart.py
fix timeout values to the passing number of cycles required + 10%
2022-10-01 04:11:46 -07:00
uart_rx.c
fix timeout values to the passing number of cycles required + 10%
2022-10-01 04:11:46 -07:00
uart_tx.c
Adding cocotb evironment with tests and scripts to run
2022-09-30 03:52:34 -07:00