caravel/signoff/caravan_core/openlane-signoff/46-wire_lengths.csv

net,length_um
net1866,5292.84
net2473,5183.78
net1869,5042.22
mgmt_buffers.mprj_logic1\[329\],4269.9
mgmt_buffers.mprj_logic1\[174\],4198.12
mgmt_buffers.mprj_logic1\[302\],4150.88
mgmt_buffers.mprj_logic1\[179\],4150.41
mgmt_buffers.mprj_logic1\[303\],3985.925
mgmt_buffers.mprj_logic1\[316\],3935.56
mgmt_buffers.mprj_logic1\[326\],3928.98
net2481,3891.71
mgmt_buffers.mprj_logic1\[175\],3882.035
mgmt_buffers.mprj_logic1\[324\],3840.84
mgmt_buffers.mprj_logic1\[313\],3811.955
mgmt_buffers.mprj_logic1\[182\],3803.48
mgmt_buffers.mprj_logic1\[194\],3803.035
mgmt_buffers.mprj_logic1\[299\],3763.02
mgmt_buffers.mprj_logic1\[304\],3757.96
mgmt_buffers.mprj_logic1\[295\],3750.22
mgmt_buffers.mprj_logic1\[314\],3744.14
mgmt_buffers.mprj_logic1\[181\],3693.06
mgmt_buffers.mprj_logic1\[186\],3663.22
net2562,3653.86
net2545,3637.36
mgmt_buffers.mprj_logic1\[306\],3585.74
mgmt_buffers.mprj_logic1\[187\],3559.16
mgmt_buffers.mprj_logic1\[176\],3469.14
mgmt_buffers.mprj_logic1\[199\],3408.56
mgmt_buffers.mprj_logic1\[183\],3307.02
mgmt_buffers.mprj_logic1\[323\],3220.08
mgmt_buffers.mprj2_vdd_logic1,3203.78
mgmt_buffers.mprj_vdd_logic1,3202.27
net11193,2967.51
net2552,2705.84
net2544,2644.06
mgmt_buffers.mprj_logic1\[160\],2525.34
net9002,2505.81
mgmt_buffers.mprj_logic1\[161\],2482.22
soc.core.la_out_storage\[32\],2441.14
net2476,2432.33
_04862_,2393.61
net2118,2390.9
net2558,2382.92
soc.core.la_out_storage\[33\],2361.24
net13037,2312.58
mgmt_buffers.mprj_logic1\[158\],2289.06
mgmt_buffers.mprj_logic1\[151\],2280.97
mgmt_buffers.mprj_logic1\[157\],2269.925
mgmt_buffers.mprj_logic1\[159\],2257.91
mgmt_buffers.mprj_logic1\[154\],2234.645
net1763,2222.5
mgmt_buffers.mprj_logic1\[148\],2161.21
net2577,2098.52
net1858,2058.08
net400,2033.44
mgmt_buffers.mprj_logic1\[198\],2026.3
mgmt_buffers.mprj_logic1\[156\],2015.55
mgmt_buffers.mprj_logic1\[327\],2011.6
net2553,1987.16
soc.core.la_oe_storage\[38\],1985.95
net2486,1972.08
mgmt_buffers.mprj_logic1\[177\],1940.895
net2572,1937.37
mgmt_buffers.mprj_logic1\[291\],1933.25
mgmt_buffers.mprj_logic1\[325\],1928.58
mgmt_buffers.mprj_logic1\[293\],1926.04
net12992,1898.88
soc.core.la_out_storage\[10\],1887.85
mgmt_buffers.mprj_logic1\[162\],1879.16
net405,1870.88
mgmt_buffers.mprj_logic1\[328\],1865.22
soc.core.la_oe_storage\[14\],1861.99
net1854,1835.36
mgmt_buffers.mprj_logic1\[310\],1828.64
mgmt_buffers.mprj_logic1\[166\],1818.28
mgmt_buffers.mprj_logic1\[168\],1810.815
mgmt_buffers.mprj_logic1\[144\],1810.59
net2104,1803.49
mgmt_buffers.mprj_logic1\[321\],1793.79
net10319,1768.21
mgmt_buffers.mprj_logic1\[169\],1763.1
mgmt_buffers.mprj_logic1\[201\],1757.66
mgmt_buffers.mprj_logic1\[188\],1757.54
soc.core.dff2_we\[2\],1754.21
mgmt_buffers.mprj_logic1\[170\],1735.21
mgmt_buffers.mprj_logic1\[320\],1730.975
mgmt_buffers.mprj_logic1\[233\],1725.08
mgmt_buffers.mprj_logic1\[165\],1722.45
mgmt_buffers.mprj_logic1\[131\],1717.08
mgmt_buffers.mprj_logic1\[196\],1715.645
mgmt_buffers.mprj_logic1\[297\],1713.08
mgmt_buffers.mprj_logic1\[288\],1698.53
mgmt_buffers.mprj_logic1\[298\],1696.065
soc.core.dff2_we\[1\],1684.22
mgmt_buffers.mprj_logic1\[171\],1681.375
mgmt_buffers.mprj_logic1\[294\],1681.03
soc.core.la_out_storage\[12\],1680.47
net10750,1680.215
mgmt_buffers.mprj_logic1\[172\],1672.13
net1850,1666.395
mgmt_buffers.mprj_logic1\[197\],1659.52
soc.core.la_oe_storage\[30\],1650.38
soc.core.la_oe_storage\[3\],1649.93
soc.core.dff2_we\[0\],1646.95
mgmt_buffers.mprj_logic1\[284\],1642.98
soc.core.la_oe_storage\[33\],1624.24
mgmt_buffers.mprj_logic1\[305\],1607.69
mgmt_buffers.mprj_logic1\[167\],1607.045
soc.core.la_oe_storage\[32\],1593.08
mgmt_buffers.mprj_logic1\[380\],1587.86
mgmt_buffers.mprj_logic1\[296\],1587.1
soc.core.la_oe_storage\[39\],1581.24
soc.core.multiregimpl35_regs1,1580.8
mgmt_buffers.mprj_logic1\[164\],1555
mgmt_buffers.mprj_logic1\[381\],1550.82
mgmt_buffers.mprj_logic1\[290\],1538.96
mgmt_buffers.mprj_logic1\[240\],1533
_12056_,1529.1
mgmt_buffers.mprj_logic1\[292\],1526.38
mgmt_buffers.mprj_logic1\[289\],1517.62
_04696_,1504.59
net1447,1499.95
net1373,1496.59
_04946_,1493.805
net1863,1492.9
mgmt_buffers.mprj_logic1\[354\],1482.52
net2475,1477.64
mgmt_buffers.mprj_adr_o_core\[6\],1473.14
net13053,1469.56
mgmt_buffers.la_data_in_enable\[24\],1466.84
mgmt_buffers.mprj_logic1\[139\],1464.06
net2583,1463.74
net10405,1462.525
net1495,1454.56
net1492,1453.44
mgmt_buffers.mprj_logic1\[229\],1449.3
mgmt_buffers.mprj_logic1\[319\],1448.72
mgmt_buffers.mprj_logic1\[285\],1448.36
mprj_io_in[20],1442.61
_04694_,1441.51
_04693_,1441.42
net13056,1436.96
_04879_,1433.97
net2495,1424.82
net10357,1417.225
mgmt_buffers.mprj_logic1\[218\],1415.44
soc.core.multiregimpl3_regs1,1410.48
mgmt_buffers.mprj_adr_o_core\[7\],1407.55
net1191,1402.17
mgmt_buffers.mprj_logic1\[377\],1398.37
net4334,1397.09
net3784,1397.005
net2563,1394.82
clknet_3_4_0_mgmt_buffers.caravel_clk,1391.76
soc.core.la_out_storage\[6\],1383.2
mgmt_buffers.mprj_logic1\[375\],1377.56
net13061,1373.44
net2554,1371.52
mgmt_buffers.mprj_sel_o_core\[2\],1370.91
net1362,1359.34
mgmt_buffers.mprj_logic1\[372\],1359.16
mgmt_buffers.mprj_logic1\[317\],1355.97
_04933_,1355.36
net1459,1354.5
net1501,1354.22
gpio_control_in_2\[6\].gpio_logic1,1350.74
net2484,1350.18
mgmt_buffers.mprj_logic1\[286\],1343.85
net1666,1340.635
mgmt_buffers.mprj_logic1\[368\],1340.55
soc.core.la_out_storage\[9\],1338.56
net1297,1338.13
net2111,1336.48
net15,1336.36
net1639,1332.58
net1498,1331.815
net1304,1330.53
soc.core.la_oe_storage\[18\],1329.36
net1360,1327.71
gpio_control_in_2\[6\].user_gpio_in,1325.36
mgmt_buffers.mprj_logic1\[280\],1325.24
net1633,1313.78
mgmt_buffers.mprj_logic1\[226\],1312.975
net12990,1311.78
mgmt_buffers.mprj_logic1\[189\],1311.66
soc.core.la_oe_storage\[22\],1310.69
mgmt_buffers.la_data_in_enable\[94\],1310.48
user_io_out\[20\],1306.99
_04698_,1304.58
net1563,1301.62
net2490,1301.52
net2479,1301.48
mgmt_buffers.mprj_logic1\[369\],1296.66
net1842,1295.66
mgmt_buffers.la_data_in_enable\[38\],1294.2
net1663,1293.63
net1644,1293.03
net1425,1293.02
net1420,1292.87
net1669,1292.33
gpio_control_in_2\[6\].mgmt_ena,1285.99
net1438,1284.165
mgmt_buffers.mprj_ack_i_user,1281.94
net185,1280.66
mgmt_buffers.la_oenb_core\[114\],1280.32
net1637,1278.28
net1649,1276.21
net1671,1275.33
net1668,1274.85
net12989,1272.85
mgmt_buffers.mprj_logic1\[349\],1272.64
net1681,1270.72
soc.core.la_out_storage\[18\],1266.9
net1499,1266.8
net1560,1264.95
net2550,1262.66
net1642,1262.43
net186,1259.64
net1645,1259.59
net1690,1255.92
mgmt_buffers.mprj_logic1\[202\],1254.36
mgmt_buffers.mprj_logic1\[149\],1253.64
net1770,1253.6
soc.core.la_oe_storage\[125\],1252.915
net1496,1252.415
net1646,1252.04
mgmt_buffers.mprj_adr_o_core\[10\],1251.26
net1684,1250.76
net1578,1247.375
net1658,1245.385
net1559,1244.07
net13060,1242.38
net2549,1241.26
mgmt_buffers.mprj_logic1\[5\],1239.42
net13050,1239.22
net1653,1238.975
net436,1237.94
mgmt_buffers.mprj_logic1\[287\],1237.74
net1834,1233.18
net1651,1229.055
mgmt_buffers.mprj_logic1\[353\],1225.3
net329,1223.96
net1675,1223.74
net1640,1222.135
net1491,1219.26
mgmt_buffers.mprj_logic1\[461\],1218.56
soc.core.la_out_storage\[3\],1217.62
net13059,1215.72
net1358,1215.5
mgmt_buffers.mprj_logic1\[356\],1214.82
net1643,1213.65
net1480,1213.31
mgmt_buffers.mprj_adr_o_core\[8\],1212.225
mgmt_buffers.mprj_logic1\[47\],1212.06
net1367,1209.65
net1504,1207.09
net1423,1201.125
net1569,1200.94
mgmt_buffers.mprj_logic1\[318\],1200.58
mgmt_buffers.la_data_in_core\[112\],1199.92
net1494,1197.66
soc.core.la_out_storage\[13\],1196.4
net1686,1195.92
net1435,1195.07
net1689,1193.7
net1678,1192.17
net1421,1190.31
net1664,1189.85
_04930_,1189.225
mgmt_buffers.mprj_logic1\[312\],1188.955
mgmt_buffers.mprj_logic1\[277\],1186.42
net1657,1183.195
net1493,1181.155
mgmt_buffers.mprj_logic1\[178\],1177.945
mgmt_buffers.la_data_in_enable\[13\],1177.9
net2114,1177.53
mgmt_buffers.mprj_logic1\[163\],1177.46
net442,1177.215
net13038,1177.02
net1419,1175.9
net1500,1174.61
net13062,1173.58
_04918_,1173.25
net1687,1171.64
net1449,1171
net12,1170.68
mgmt_buffers.mprj_logic1\[311\],1169.7
mgmt_buffers.mprj_cyc_o_user,1169.34
net1638,1167.815
net1566,1164.905
net1369,1164.57
net1650,1164.02
net1632,1163.74
net1497,1163.01
net1724,1162.755
net1422,1160.08
net1683,1159.06
net1677,1158
net1654,1156.27
net1503,1154.69
net1673,1154.395
net1452,1153.33
net1505,1152.535
net1662,1150.175
net1564,1149.32
_04906_,1147.56
soc.core.la_out_storage\[45\],1144.23
mgmt_buffers.mprj_logic1\[322\],1142.95
mgmt_buffers.la_data_in_core\[37\],1142.89
net1680,1142.35
net1479,1141.58
net2268,1141.22
net12994,1140.34
net2781,1139.24
net1672,1138.24
net1679,1137.92
_04255_,1136.9
_04865_,1135.88
gpio_control_bidir_1\[0\].serial_load_out,1134.42
net1661,1133.81
net1674,1132.94
net540,1132.155
net1676,1128.43
net1665,1126.46
net1667,1125.74
mgmt_buffers.mprj_adr_o_user\[14\],1123.99
net1475,1123.14
net1440,1120.45
net1429,1118.98
soc.core.la_oe_storage\[1\],1118.32
net1445,1117.85
net1655,1117.64
net1682,1116.94
net541,1116.815
_04936_,1116.6
mgmt_buffers.mprj_dat_o_user\[2\],1115.72
net2174,1115.275
net1565,1113.195
net1463,1110.245
net1562,1108.56
net13024,1108.28
net1561,1106.84
net1570,1105.44
mgmt_buffers.la_data_in_enable\[83\],1103.58
mgmt_buffers.mprj_logic1\[191\],1102.86
mgmt_buffers.la_data_in_core\[87\],1100.455
mgmt_buffers.mprj_logic1\[315\],1098.44
net1439,1098.365
net1427,1098.28
net1647,1098
mgmt_buffers.mprj_adr_o_user\[22\],1095.96
_04885_,1094.96
_04257_,1094.025
_04952_,1093.83
net1621,1093.32
net1659,1093.16
net2769,1092.48
net20,1091.74
net13,1087.52
soc.core.la_oe_storage\[42\],1084.95
_04882_,1083.97
net1656,1082.59
net1437,1082.44
net1652,1081.76
mgmt_buffers.mprj_logic1\[269\],1081.12
net1567,1080.845
_04868_,1076.97
mgmt_buffers.mprj_logic1\[362\],1076.92
net2696,1075.6
_04949_,1075.43
net1634,1072.54
_05812_,1071.36
mgmt_buffers.mprj_logic1\[300\],1070.7
net2705,1067.6
mgmt_buffers.mprj_adr_o_core\[13\],1067.45
net1762,1067.04
_04955_,1065.33
net1298,1064.13
net2098,1061.06
net2269,1059.775
net1754,1057.64
net1431,1057.38
net1436,1056.11
net1434,1055.515
net12998,1055.435
net1299,1053.22
mgmt_buffers.mprj_adr_o_user\[18\],1050.44
net1816,1048.5
_04912_,1048.195
net1364,1047.99
mgmt_buffers.mprj_ack_i_core_bar,1047.71
mgmt_buffers.mprj_logic1\[200\],1044.14
net1467,1043.93
_04915_,1043.7
net1641,1042.22
net1736,1042.2
net1618,1041.9
net1691,1041.77
mgmt_buffers.la_oenb_core\[111\],1040.92
mgmt_buffers.mprj_logic1\[224\],1040.9
net1660,1039.72
net1372,1039.58
mgmt_buffers.mprj_adr_o_user\[19\],1039.17
net1636,1037
net2115,1036.94
mgmt_buffers.la_oenb_core\[121\],1035.96
net968,1033.57
mgmt_buffers.mprj_logic1\[207\],1032.12
net1795,1032.08
mgmt_buffers.la_data_in_core\[74\],1031.9
mgmt_buffers.mprj_logic1\[301\],1028.71
net2449,1027.23
net1577,1026.28
_03441_,1024.12
mgmt_buffers.mprj_adr_o_user\[16\],1022.9
net2070,1022.74
net1670,1022.14
mgmt_buffers.mprj_logic1\[279\],1022.12
net1476,1021.39
net2737,1020.22
mgmt_buffers.mprj_logic1\[262\],1020.2
net1568,1018.935
_03427_,1017.165
net1531,1017.11
net23,1017.1
net1444,1017.1
net1432,1016.73
net13032,1016.4
mgmt_buffers.mprj_dat_o_user\[15\],1016.14
net13039,1014.46
mgmt_buffers.mprj_dat_o_user\[11\],1013.88
net1093,1013.72
mgmt_buffers.mprj_logic1\[184\],1013.16
net1738,1012.57
net1428,1011.91
net1760,1011
mgmt_buffers.mprj_logic1\[190\],1008.3
net31,1008.26
mgmt_buffers.mprj_dat_o_user\[7\],1006.78
mgmt_buffers.mprj_logic1\[119\],1005.335
mgmt_buffers.la_data_in_core\[92\],1005.26
net1859,1003.92
net1752,1002.49
net12997,1001.89
mgmt_buffers.mprj_adr_o_user\[20\],1001.38
mgmt_buffers.mprj_logic1\[211\],999.9
net1539,999.28
mgmt_buffers.mprj_logic1\[231\],997.5
net1530,997.06
soc.core.la_oe_storage\[97\],996.56
_04894_,995.995
net1796,994
mgmt_buffers.mprj_adr_o_user\[24\],993.62
net435,992.5
mgmt_buffers.mprj_dat_o_user\[10\],992.16
mgmt_buffers.la_oenb_core\[101\],992.14
net1807,988.18
mgmt_buffers.mprj_logic1\[309\],987.87
net1800,987.78
net1424,987.2
soc.core.hk_dat_i\[10\],986.76
net1579,986.52
net1502,984.385
net1635,983.655
net13025,983.14
mgmt_buffers.mprj_logic1\[281\],982.83
net1788,982.58
_03448_,981.98
net1782,981.82
net13011,981.615
net2535,981.32
mgmt_buffers.mprj_adr_o_user\[21\],980.98
net1366,979.87
net1732,979.77
net2584,979.2
net2448,978.89
net2083,978.7
mgmt_buffers.mprj_dat_o_core\[10\],978.59
net1471,978.475
net1685,977.32
net13030,977.28
mgmt_buffers.mprj_logic1\[195\],976.64
net22,976.4
net13036,976.14
mgmt_buffers.mprj_logic1\[35\],975.6
_04921_,975.35
_04261_,973.82
mgmt_buffers.mprj_dat_o_user\[14\],972.56
mgmt_buffers.la_oenb_core\[120\],972.32
net2457,971.925
net1766,971.82
_03647_,971.45
net2458,971.33
net1393,971.28
mgmt_buffers.mprj_logic1\[458\],971.06
net1779,970.86
net14,970.7
mgmt_buffers.mprj_dat_o_user\[12\],967.7
mgmt_buffers.mprj_adr_o_user\[23\],965.32
net21,962.9
mgmt_buffers.mprj_logic1\[270\],962.69
net972,961.67
net1775,961.46
net455,961.24
_12221_,960.89
soc.core.hk_dat_i\[13\],960.82
_04909_,960.81
net1882,960.69
mgmt_buffers.mprj_dat_o_user\[13\],960.48
net13019,960.28
net1768,960.22
net1688,959.68
net1740,959.36
net1648,958.54
mgmt_buffers.mprj_adr_o_core\[26\],958.2
_04876_,956.7
net2180,956.58
mgmt_buffers.mprj_dat_o_user\[0\],955.66
mgmt_buffers.mprj_dat_o_core\[25\],955.06
mgmt_buffers.la_oenb_core\[108\],953.98
mprj_io_in_3v3[0],953.85
mgmt_buffers.mprj_adr_o_user\[4\],952.66
mgmt_buffers.mprj_logic1\[7\],952.17
mgmt_buffers.mprj_logic1\[308\],952.08
_03772_,951.42
net2542,951.28
soc.core.la_out_storage\[15\],950.75
net13047,949.28
net2728,947.66
net1612,947.63
mgmt_buffers.mprj_adr_o_user\[28\],946.32
_03428_,945.915
net851,945.795
_04859_,945.52
net1370,945.52
soc.core.la_oe_storage\[4\],944.41
net1823,944.34
gpio_control_bidir_1\[0\].resetn,943.74
mgmt_buffers.mprj_logic1\[193\],943.64
net2459,943.49
mgmt_buffers.caravel_rstn,942.98
net434,942.7
net1453,942.325
net2590,941.66
_03444_,940.775
net1787,939.3
net1385,938.67
net1759,937.3
_04258_,937.225
_03778_,937.16
net2766,936.66
net2749,935.5
_11987_,934.96
mgmt_buffers.mprj_logic1\[216\],934.88
mgmt_buffers.mprj_adr_o_core\[21\],934.76
mgmt_buffers.la_data_in_core\[116\],934.56
mgmt_buffers.mprj_logic1\[2\],934.54
mgmt_buffers.mprj_adr_o_core\[16\],933.98
net1455,933.225
soc.core.hk_dat_i\[18\],932.67
net1451,931.66
net1804,930.78
mgmt_buffers.mprj_dat_o_core\[19\],930.48
net1828,929.56
net2462,929
net1624,928.84
net1799,928.82
_04927_,928.34
mgmt_buffers.mprj_adr_o_core\[25\],927.79
net1485,927.71
net13031,927.18
mgmt_buffers.mprj_adr_o_core\[14\],926.8
mgmt_buffers.mprj_logic1\[307\],926.62
net2765,925.84
gpio_control_in_1a\[4\].serial_load_out,925.68
net2470,925.66
net2511,925.51
mgmt_buffers.mprj_logic1\[185\],924.44
mgmt_buffers.mprj_logic1\[260\],923.35
net2108,923.18
net1824,921.68
_04270_,921.12
soc.core.la_oe_storage\[2\],917.54
mgmt_buffers.la_data_in_core\[103\],917.51
net1107,916.85
soc.core.VexRiscv.CsrPlugin_selfException_payload_badAddr\[12\],916.67
mgmt_buffers.mprj_logic1\[278\],915.705
net1615,915.23
gpio_control_in_1a\[4\].serial_clock_out,915.115
mgmt_buffers.mprj_dat_o_user\[18\],914.86
mgmt_buffers.mprj_logic1\[459\],914.24
mgmt_buffers.mprj_logic1\[34\],910.32
soc.core.hk_dat_i\[22\],910.09
mgmt_buffers.mprj_logic1\[192\],909.48
mgmt_buffers.mprj_dat_o_core\[12\],908.83
soc.core.hk_dat_i\[14\],908.19
mgmt_buffers.mprj_logic1\[439\],908.12
net1117,907.95
_04924_,907.12
_04268_,907.075
mgmt_buffers.la_data_in_core\[115\],907
mgmt_buffers.la_data_in_enable\[91\],906.24
net900,905.855
net1114,905.215
net1382,904.765
mgmt_buffers.mprj_logic1\[6\],904.68
net539,904.64
net1486,902.435
mgmt_buffers.la_data_in_core\[108\],902.12
_10770_,902.01
soc.core.hk_dat_i\[2\],900.95
net1582,899.06
mgmt_buffers.la_oenb_core\[116\],898.66
net2182,898.43
net9,898.16
soc.core.la_out_storage\[2\],897.58
mgmt_buffers.la_data_in_mprj_bar\[31\],896.94
mgmt_buffers.mprj_dat_o_user\[17\],895.96
mgmt_buffers.la_data_in_core\[117\],893.94
mgmt_buffers.mprj_logic1\[361\],893.88
net1068,893.06
mgmt_buffers.la_data_in_core\[113\],892.28
net1820,890.94
net2294,890.76
mgmt_buffers.la_data_in_core\[90\],890.56
mgmt_buffers.la_data_in_enable\[120\],889.36
mgmt_buffers.la_oenb_core\[117\],889.12
net1892,889.05
net1383,889
mgmt_buffers.la_oenb_core\[100\],887.835
net1936,887.36
net1546,887.08
mgmt_buffers.mprj_adr_o_core\[27\],886.775
mgmt_buffers.la_data_in_core\[96\],886.68
net2533,885.75
soc.core.la_out_storage\[7\],885.385
net1368,885.16
net1601,885.1
mgmt_buffers.mprj_dat_o_user\[16\],884.72
_04267_,884.64
net8,883.52
net2548,883.16
soc.core.RAM256.WE0\[0\],883.12
mgmt_buffers.mprj_logic1\[457\],882.84
mgmt_buffers.la_oenb_core\[112\],882.18
net13000,881.74
net2772,881.72
_04265_,881.63
net2591,881.6
net1792,881.58
net1302,881.13
net904,879.935
soc.core.VexRiscv.IBusCachedPlugin_cache.io_cpu_decode_data\[20\],879.87
mgmt_buffers.mprj_logic1\[116\],879.68
_03426_,879.66
mgmt_buffers.la_oenb_core\[103\],879.62
soc.core.hk_dat_i\[16\],879.33
net1784,878.335
net3606,877.015
net1742,876.975
net2447,876.7
mgmt_buffers.mprj_logic1\[445\],874.54
net2758,872.86
net1748,872.78
net1487,871.535
net658,871.38
net1825,871.2
net1758,870.68
mgmt_buffers.mprj_adr_o_user\[9\],870.48
net2308,870.24
mgmt_buffers.la_oenb_core\[115\],870.08
soc.core.la_oe_storage\[19\],869.53
soc.core.hk_dat_i\[24\],868.33
net1087,867.62
_04273_,867.34
net2450,867.045
net2160,865.84
mgmt_buffers.mprj_logic1\[456\],864.79
mgmt_buffers.mprj_logic1\[255\],864.44
mgmt_buffers.mprj_logic1\[180\],863.64
mgmt_buffers.mprj_adr_o_user\[26\],863.17
net1430,863.02
net1756,862.78
net978,862.125
mgmt_buffers.mprj_adr_o_user\[27\],861.995
mgmt_buffers.mprj_adr_o_user\[25\],861.94
mgmt_buffers.la_oenb_core\[113\],860.9
net2743,860.56
net2254,860.14
mgmt_buffers.mprj_logic1\[223\],859.84
mgmt_buffers.la_data_in_enable\[23\],859.76
mgmt_buffers.mprj_logic1\[276\],859.33
net829,858.64
net1426,858.45
net2598,858.4
_04700_,858.3
net2821,857.1
net834,856.71
net4625,856.51
net1891,855.82
net1591,855.7
mgmt_buffers.la_data_in_enable\[95\],855.66
_12216_,855.38
mgmt_buffers.la_data_in_core\[104\],855.32
net1776,854.72
net29,853.86
net13049,852.42
_04266_,851.92
mgmt_buffers.la_data_in_core\[109\],851.58
mgmt_buffers.mprj_dat_o_core\[14\],851.43
mgmt_buffers.la_data_in_core\[0\],851.26
net10765,851.185
mgmt_buffers.mprj_adr_o_user\[31\],851.12
net1079,850.84
net2456,849.765
net13040,849.76
mgmt_buffers.mprj_dat_o_user\[20\],848.99
net1371,848.18
_04254_,847.34
mgmt_buffers.mprj_dat_o_user\[19\],846.3
clknet_7_26__leaf_mgmt_buffers.caravel_clk,846.29
net4333,845.955
net417,844.72
net1746,844.32
mgmt_buffers.mprj_logic1\[441\],843.95
gpio_control_bidir_2\[2\].serial_data_in,843.74
net1812,843.05
net11792,842.92
net1049,842.665
mgmt_buffers.mprj_logic1\[282\],842.35
net1602,842.29
net1723,842.07
mgmt_buffers.mprj_adr_o_core\[20\],841.48
soc.core.la_oe_storage\[27\],841.36
net1843,840.86
net1365,840.61
net1190,840.18
_04259_,840.14
mgmt_buffers.mprj_dat_o_user\[23\],839.56
soc.core.hk_dat_i\[26\],839.47
soc.core.la_out_storage\[37\],839.02
mgmt_buffers.mprj_adr_o_user\[29\],838.88
_03424_,838.705
mgmt_buffers.la_data_in_mprj_bar\[25\],837.84
net1443,837.25
_03440_,837.12
net882,836.76
_11205_,835.22
_03421_,835.1
net1217,834.96
net2720,834.62
mgmt_buffers.mprj_dat_o_user\[21\],834.47
_04701_,834.39
net1622,834.135
net2112,834
net2105,833.14
_03653_,833.08
net2818,832.84
net2492,832.6
net2271,832.42
mgmt_buffers.la_data_in_core\[84\],832.28
net1808,832.26
net2119,832.24
mgmt_buffers.mprj_adr_o_core\[23\],830.99
mgmt_buffers.mprj_logic1\[360\],830.96
net644,830.16
net2594,829.92
net984,828.695
mgmt_buffers.mprj_dat_o_user\[26\],828.68
mgmt_io_out\[5\],828.47
mgmt_buffers.mprj_logic1\[460\],828.38
mgmt_buffers.wb_in_enable,827.54
mgmt_buffers.la_data_in_core\[99\],825.72
net1113,825.115
mgmt_buffers.mprj_adr_o_core\[15\],823.7
mgmt_buffers.la_oenb_core\[104\],823.12
mgmt_buffers.la_data_in_core\[122\],822.8
mgmt_buffers.la_data_in_core\[105\],822.2
_04274_,821.98
mgmt_buffers.mprj_dat_o_user\[22\],821
mgmt_buffers.la_oenb_core\[110\],820.78
net2733,820.76
net1613,820.7
mgmt_buffers.mprj_adr_o_core\[24\],820.5
net1021,820.3
mgmt_buffers.mprj_adr_o_user\[30\],819.38
net2520,818.98
mgmt_buffers.la_oenb_core\[123\],818.9
soc.core.mprj_wb_iena_storage,818.715
soc.core.la_out_storage\[30\],817.94
net13046,817.82
mgmt_buffers.mprj_logic1\[265\],817.58
net2468,817.5
net1592,816.98
net1300,816.59
net2259,816.445
net2502,816.36
mgmt_buffers.la_data_in_core\[97\],816.24
net981,816.045
net30,814.94
mgmt_buffers.la_oenb_core\[84\],814.86
mgmt_buffers.la_data_in_core\[101\],814.4
mgmt_buffers.mprj_logic1\[153\],814.24
_03436_,813.755
soc.core.la_oe_storage\[0\],813.59
net1772,813.06
net874,812.97
soc.core.hk_dat_i\[31\],812.53
mgmt_buffers.la_data_in_core\[110\],811.36
net1218,809.74
mgmt_buffers.mprj_logic1\[350\],809.38
net2085,809.26
net1172,808.96
net990,808.93
net970,808.24
_11248_,807.96
net2817,807.52
_04269_,805.72
_11867_,805.57
soc.core.RAM256.SEL0\[0\],804.91
_03433_,804.8
mgmt_buffers.mprj_logic1\[274\],803.99
mgmt_buffers.mprj_logic1\[446\],803.82
_12012_,802.46
mgmt_buffers.mprj_adr_o_core\[22\],802.36
net985,802.155
mgmt_buffers.la_data_in_core\[102\],801.46
mgmt_buffers.mprj_adr_o_core\[28\],801.39
mgmt_buffers.mprj_logic1\[440\],801.12
net1599,801.11
mgmt_buffers.la_oenb_core\[87\],800.86
mgmt_buffers.mprj_dat_o_user\[25\],799.52
_12032_,798.46
soc.core.hk_dat_i\[1\],795.96
mgmt_buffers.mprj_logic1\[1\],795.56
mgmt_buffers.la_data_in_core\[107\],795.16
mgmt_buffers.mprj_logic1\[333\],795.06
mgmt_buffers.la_data_in_core\[100\],794.24
net2284,793.885
mgmt_buffers.mprj_logic1\[283\],793.58
net2081,793.58
soc.core.hk_dat_i\[4\],793.57
net1744,793.52
mgmt_buffers.mprj_adr_o_user\[7\],793.34
net2110,793.24
net2477,793.15
net1610,792.8
net2523,792.12
net1178,792.08
net2209,790.84
mgmt_buffers.la_oenb_core\[109\],790.76
net538,790.66
mgmt_buffers.mprj_logic1\[332\],790.52
net2503,789.58
mgmt_buffers.mprj_dat_o_core\[17\],788.56
net8121,787.355
_04888_,787.24
net560,786.02
net2014,785.18
mgmt_buffers.la_data_in_core\[125\],784.86
net2771,784.16
mgmt_buffers.mprj_adr_o_core\[19\],783.42
net1628,783.42
net2107,783.22
soc.core.la_oe_storage\[23\],783.12
mgmt_buffers.mprj_logic1\[453\],782.48
net1835,782.34
net1609,782.23
mgmt_buffers.la_data_in_core\[88\],781.94
_04271_,781.86
net1478,781.305
mgmt_buffers.mprj_adr_o_core\[31\],781.02
_11302_,780.98
mgmt_buffers.la_data_in_enable\[25\],780.92
net2708,780.88
_11267_,780.65
_11262_,780.6
net2443,779.435
soc.core.dff2_en,779.07
_10540_,778.57
_04260_,778.46
_03432_,778.28
net1035,778.09
net2255,776.745
_12039_,774.69
mgmt_buffers.la_oenb_core\[126\],774.64
net1701,774.625
mgmt_buffers.la_data_in_core\[98\],773.7
mgmt_buffers.mprj_logic1\[455\],772.84
net1606,772.535
_11235_,772.46
net1251,772.05
net1305,771.32
net1536,771.19
net1995,770.775
net1580,770.465
net1295,770.35
_12034_,770.175
mgmt_buffers.mprj_logic1\[448\],769.99
net2299,769.7
mgmt_buffers.la_data_in_core\[106\],769.16
mgmt_buffers.mprj_dat_o_core\[28\],769.04
mgmt_buffers.la_oenb_core\[95\],768.78
net2472,768.36
net1086,768.26
net2166,768.14
net1604,768.05
net1598,767.66
net1765,767.48
mgmt_buffers.mprj_logic1\[436\],766.66
mgmt_buffers.mprj_dat_o_user\[24\],766.56
mgmt_buffers.la_data_in_core\[94\],765.8
mgmt_buffers.mprj_logic1\[230\],765.78
soc.core.RAM256.WE0\[2\],765.53
net1626,765.28
net2539,765.28
net2543,765.1
mgmt_buffers.mprj_logic1\[232\],765.06
soc.core.la_out_storage\[35\],763.52
net2702,760.45
mgmt_buffers.mprj_logic1\[203\],760.05
net12995,759.58
mgmt_buffers.mprj_logic1\[451\],758.34
net3019,757.66
mgmt_buffers.mprj_dat_o_user\[27\],757.44
net1014,756.46
net957,756.2
net2717,755.82
net26,755.31
gpio_control_bidir_1\[0\].user_gpio_in,755.18
soc.core.la_out_storage\[26\],754.8
mgmt_buffers.mprj_dat_i_user\[10\],754.66
net846,754.41
mgmt_buffers.la_data_in_core\[120\],753.32
net588,753.07
mgmt_buffers.la_data_in_mprj_bar\[26\],752.76
net2418,752.435
mgmt_buffers.la_oenb_core\[96\],752.2
net1750,751.86
net2551,751.74
mgmt_buffers.mprj_dat_o_core\[26\],750.78
net542,750.455
net2466,749.54
net1585,748.84
net2820,748.72
mgmt_buffers.mprj_dat_o_core\[16\],748.34
net440,748.3
_03425_,747.9
net1588,747.88
net1595,747.87
net1442,747.7
mgmt_buffers.mprj_logic1\[3\],746.76
net2497,746.64
mgmt_buffers.la_oenb_core\[107\],746.36
net2122,746
net830,745.7
mgmt_buffers.mprj_logic1\[271\],745.66
net4104,745.095
soc.core.la_oe_storage\[127\],744.82
mprj_io_in_3v3[1],744.65
_13970_,743.24
net2464,742.46
mgmt_buffers.mprj_logic1\[234\],742.24
mgmt_buffers.mprj_adr_o_user\[11\],741.97
mgmt_buffers.mprj_dat_o_core\[27\],741.62
net454,741.16
net2541,740.96
pll.clockp_buffer_in\[1\],739.88
net2597,739.36
soc.core.RAM256.WE0\[1\],739.08
mgmt_buffers.mprj_dat_o_core\[9\],738.96
mgmt_buffers.mprj_logic1\[428\],738.16
net2192,737.755
net2536,737.72
mgmt_buffers.mprj_logic1\[136\],737.33
net2091,737.2
mgmt_buffers.mprj_logic1\[48\],737.04
mgmt_buffers.mprj_logic1\[432\],736.58
mgmt_buffers.mprj_dat_o_core\[18\],736.52
net1472,736.09
net1532,735.65
net2093,734.83
mgmt_buffers.mprj_logic1\[449\],734.37
net1048,733.59
net1526,733.45
net2547,732.72
soc.core.RAM256.WE0\[3\],732.14
mgmt_buffers.mprj_logic1\[152\],731.84
net2538,731.8
mgmt_buffers.la_data_in_core\[91\],731.52
net13028,731.37
mgmt_buffers.mprj_logic1\[115\],731
net2759,729.16
net1547,728.58
net1067,728.495
soc.core.hk_dat_i\[5\],727.97
net1211,727.48
net5670,727.275
net2092,727.06
net1540,726.9
_03423_,726.86
_03780_,726.18
net2698,725.56
net4290,724.94
net10744,724.86
mgmt_buffers.mprj_adr_o_core\[30\],724.56
_11311_,724.04
_11218_,723.92
net1603,723.85
soc.core.RAM256.Do0_pre\[0\]\[27\],723.83
net438,722.94
soc.core.hk_dat_i\[12\],722.69
mgmt_buffers.la_data_in_core\[95\],722.38
net1593,722.24
mgmt_buffers.mprj_dat_o_user\[30\],721.74
net439,721.37
net13044,721.18
soc.core.la_out_storage\[27\],720.75
mgmt_buffers.mprj_logic1\[145\],720.14
net2420,718.77
net2164,718.33
mgmt_buffers.mprj_logic1\[344\],718.03
mgmt_buffers.mprj_dat_o_core\[29\],717.9
net2109,717.44
mgmt_buffers.mprj_dat_o_user\[29\],716.56
net2489,716.48
mgmt_buffers.la_oenb_core\[102\],716.42
mgmt_buffers.mprj_dat_o_core\[21\],716.12
net2406,715.38
net1597,715.135
_04264_,714.62
mgmt_buffers.la_oenb_core\[106\],714.54
mgmt_buffers.mprj_adr_o_user\[2\],714.22
soc.core.hk_dat_i\[3\],714.19
net1296,713.96
net1864,713.94
net1868,713.8
soc.core.la_oe_storage\[46\],712.92
mgmt_buffers.mprj_dat_o_core\[22\],712.84
soc.core.la_oe_storage\[111\],712.21
net1979,712
net1255,711.395
net401,711.38
net1767,710.64
net806,710.38
net13042,710.01
net13051,709.44
mgmt_buffers.la_oenb_core\[105\],709.12
mgmt_buffers.la_data_in_core\[89\],709.08
mgmt_buffers.mprj_dat_o_user\[28\],708.88
mgmt_buffers.la_oenb_core\[94\],708.86
net1583,708.1
net1605,708.06
mgmt_buffers.la_data_in_enable\[115\],707.76
mgmt_buffers.la_oenb_core\[98\],707.08
mgmt_buffers.mprj_dat_o_core\[30\],707.02
net1005,705.78
net2527,705.64
mgmt_buffers.mprj_logic1\[155\],705.04
mgmt_buffers.la_oenb_core\[89\],704.7
mgmt_buffers.mprj_logic1\[450\],704.28
net2084,703.88
net1293,703.72
mgmt_buffers.mprj_logic1\[363\],702.52
mgmt_buffers.mprj_logic1\[433\],702.46
net2529,702.36
mgmt_buffers.la_oenb_core\[97\],701.42
net1802,701.28
mgmt_buffers.mprj_dat_i_user\[0\],700.86
mgmt_buffers.mprj_dat_o_core\[8\],700.82
mgmt_buffers.la_data_in_enable\[107\],700.08
net545,698.475
mgmt_buffers.mprj_dat_o_core\[31\],698.18
net1205,697.83
net2825,697.48
net2746,696.98
net2505,696.56
mgmt_buffers.mprj_dat_o_user\[31\],695.64
net1607,695.14
net2512,694.42
net2561,694.36
net1525,694.3
net437,694.14
mgmt_buffers.la_oenb_core\[99\],694.1
net1831,694.06
mgmt_buffers.mprj_logic1\[173\],693.2
net997,692.86
mgmt_buffers.mprj_stb_o_user,692.72
net2724,692.295
mgmt_buffers.mprj_dat_o_core\[24\],692.16
net544,692.13
net1933,691.86
mgmt_buffers.mprj_dat_o_core\[11\],690.04
net1710,689.62
_11282_,689.52
net13055,689.16
soc.core.hk_dat_i\[11\],688.97
mgmt_buffers.mprj_dat_i_core_bar\[16\],688.7
net1340,688.56
net1029,688.51
net1964,688.33
mgmt_buffers.la_oenb_core\[91\],688.02
net1433,687.82
mgmt_buffers.mprj_adr_o_user\[12\],687.58
net2740,687.4
net13057,687.18
mgmt_buffers.mprj_dat_i_user\[11\],687.16
net1586,686.91
net2509,686.82
_11257_,686.71
net2198,686.58
net2528,686.53
net2424,686.42
net13054,686.18
net2463,685.76
net447,685.7
net2208,685.28
net2293,685.14
net2307,685.04
net1109,684.87
mgmt_buffers.mprj_dat_i_core_bar\[0\],684.84
_04263_,684.82
mgmt_buffers.mprj_logic1\[273\],684.62
mgmt_buffers.mprj_dat_o_core\[20\],684.42
soc.core.RAM256.Do0_pre\[0\]\[23\],683.19
net9502,683.04
net1292,682.8
mgmt_buffers.mprj_logic1\[454\],682.59
net1173,682.43
net1325,682.35
mgmt_buffers.la_data_in_enable\[19\],682.28
net1794,682.16
net1010,681.77
net13016,681.7
net2138,681.6
mgmt_buffers.mprj_adr_o_user\[10\],681.42
mgmt_buffers.la_oenb_core\[119\],681.16
net2526,680.59
mgmt_buffers.mprj_logic1\[419\],680.5
net441,680.46
net2540,680.34
net2465,680.32
soc.core.hk_dat_i\[17\],680.21
net1865,680.02
net1719,679.42
_12041_,679.16
mgmt_buffers.la_data_in_enable\[122\],679.14
net2172,678.6
net1337,678.59
_04256_,678.38
mgmt_buffers.la_data_in_core\[10\],678.25
net2471,678.08
mgmt_buffers.mprj_dat_i_user\[8\],677.8
net13048,676.84
mgmt_buffers.la_data_in_core\[111\],676.32
net1136,676.115
net13014,675.48
net1456,675.46
net1474,675.44
net2701,674.79
net743,674.34
net1594,674.1
net450,674
mgmt_io_out\[8\],672.85
net4341,672.795
net2507,672.76
_04891_,672.46
net2508,672.46
net2500,672.16
soc.core.dff2_bus_dat_r\[9\],671.56
net2428,671.23
mgmt_buffers.mprj_logic1\[435\],671.04
_12045_,670.69
mgmt_io_out\[9\],670.51
net866,670.45
soc.core.hk_dat_i\[7\],670.27
net2566,669.96
mgmt_buffers.mprj_logic1\[426\],669.7
net1264,669.5
net2510,668.62
mgmt_buffers.mprj_logic1\[427\],668.4
mgmt_buffers.mprj_logic1\[263\],668.16
net2211,668.09
mgmt_buffers.mprj2_logic1,667.47
net2522,667.18
mgmt_buffers.mprj_logic1\[227\],666.66
net2727,666.66
mgmt_buffers.la_data_in_core\[86\],666.2
mgmt_buffers.la_data_out_core\[126\],666.135
net1797,665.6
mgmt_buffers.mprj_dat_i_core_bar\[6\],665.56
mgmt_buffers.mprj_logic1\[137\],665.52
net1020,665.435
mgmt_buffers.la_data_in_core\[2\],664.66
_12679_,664.65
_04272_,664.43
mgmt_buffers.mprj_dat_o_core\[0\],664.42
net2519,664.42
net1857,664.24
mgmt_buffers.la_oenb_core\[86\],664.02
net2525,663.88
mgmt_buffers.mprj_logic1\[37\],663.74
net897,662.475
mgmt_io_out\[11\],662.47
net1278,662.39
net2524,662.07
mgmt_buffers.mprj_logic1\[452\],662.02
net2220,661.26
mgmt_io_out\[7\],660.55
net2142,660.38
mgmt_buffers.mprj_sel_o_user\[0\],660
net2783,659.96
net833,659.335
net2191,658.98
mgmt_buffers.mprj_dat_i_core_bar\[8\],658.72
soc.core.debug_mode_storage,658.665
net1509,658.46
net1169,658.41
net2499,658.4
mgmt_buffers.mprj_dat_i_core_bar\[5\],658.38
net1627,658.31
soc.core.dff2_bus_dat_r\[6\],658.16
mgmt_buffers.mprj_logic1\[120\],658.08
_11149_,657.82
net2469,657.82
mgmt_buffers.mprj_logic1\[150\],657.765
net1870,657.72
net2482,657.5
net2578,657.08
net403,657
net2517,656.68
net1454,656.12
gpio_control_bidir_2\[2\].shift_register\[0\],655.92
mgmt_buffers.la_data_in_core\[4\],655.92
mgmt_buffers.la_data_in_enable\[116\],655.82
mgmt_buffers.user_clock2,655.74
net2521,655.61
mgmt_buffers.mprj_logic1\[422\],655.6
mgmt_io_out\[35\],655.58
net1783,655.52
net2801,655.38
net558,654.83
net1589,654.58
net546,654.57
mgmt_buffers.mprj_logic1\[133\],654.42
mgmt_buffers.la_data_in_core\[123\],654.34
mgmt_buffers.mprj_logic1\[264\],654.04
mgmt_buffers.la_data_in_core\[83\],653.76
net663,653.18
net1099,653.12
mgmt_buffers.la_data_in_core\[5\],652.8
mgmt_buffers.mprj_dat_i_core_bar\[18\],652.6
net1735,652.4
net1263,652.23
net2417,651.875
soc.core.dff2_bus_dat_r\[5\],651.4
net2571,651.32
mgmt_buffers.mprj_adr_o_user\[5\],651.22
mgmt_buffers.mprj_logic1\[267\],651.14
mgmt_buffers.mprj_dat_o_core\[15\],650.88
mgmt_io_out\[32\],649.94
mgmt_buffers.la_data_in_core\[85\],649.66
net1482,649.57
mgmt_buffers.mprj_dat_i_user\[22\],649.28
mgmt_buffers.mprj_logic1\[252\],649.14
soc.core.la_out_storage\[20\],648.98
mgmt_buffers.mprj_dat_o_core\[13\],648.51
mgmt_buffers.mprj_logic1\[424\],648.46
mgmt_buffers.la_oenb_core\[90\],648.42
net2518,648.03
net2200,647.78
net2494,647.78
mgmt_buffers.mprj_dat_i_user\[15\],647.6
mgmt_buffers.la_data_in_core\[126\],647.26
mgmt_buffers.mprj_logic1\[430\],647.2
_12015_,646.88
net1066,646.87
net2270,646.71
mgmt_buffers.mprj_logic1\[437\],646.68
mgmt_buffers.mprj_adr_o_user\[6\],646.34
mgmt_io_out\[4\],646.23
soc.core.la_out_storage\[97\],645.97
mgmt_buffers.mprj_we_o_user,645.92
net2178,645.9
net1952,645.875
mgmt_buffers.mprj_sel_o_user\[1\],645.5
mgmt_buffers.mprj_dat_i_user\[16\],645.46
gpio_control_in_1a\[5\].shift_register\[0\],644.96
net2506,644.96
net418,644.815
net1060,644.74
net1327,644.72
mgmt_buffers.la_oenb_core\[118\],644.16
_10768_,644.06
mgmt_buffers.la_data_in_enable\[124\],643.64
clknet_7_8__leaf_mgmt_buffers.caravel_clk,643.58
_12043_,643.54
net1508,643.16
mgmt_buffers.la_data_in_core\[124\],643.02
soc.core.hk_dat_i\[21\],642.99
mgmt_io_out\[12\],642.89
mgmt_buffers.mprj_logic1\[414\],642.54
mgmt_buffers.mprj_logic1\[352\],642.24
net2504,642
net2195,641.76
soc.core.slave_sel_r\[5\],641.7
net1018,641.665
mgmt_buffers.mprj_logic1\[44\],641.42
mgmt_buffers.mprj_logic1\[215\],641.28
mgmt_buffers.mprj_dat_i_core_bar\[7\],641.26
net1359,641.255
net2194,640.76
net25,640.71
mgmt_buffers.la_oenb_core\[83\],640.68
mgmt_buffers.mprj_logic1\[247\],640.68
net1600,640.51
net11766,640.3
net2082,638.52
net2515,637.83
soc.core.dff2_bus_dat_r\[0\],637.56
net2303,637.2
_03770_,637.12
mgmt_buffers.mprj_adr_o_core\[12\],636.94
gpio_control_bidir_1\[1\].user_gpio_in,636.68
net1247,636.64
net1616,636.315
net1326,636.24
_04959_,636.06
net1294,636
mgmt_buffers.la_data_in_core\[93\],635.92
net842,635.84
mgmt_buffers.mprj_sel_o_core\[3\],635.52
net2467,635.3
net2739,635.24
mgmt_io_out\[13\],635.11
net13018,634.8
net2557,634.72
mgmt_buffers.la_data_in_core\[14\],634.66
net1177,633.95
mgmt_io_out\[10\],633.93
mgmt_io_out\[34\],633.82
net10116,633.46
net2305,633.43
mgmt_buffers.mprj_logic1\[442\],633.36
mgmt_buffers.mprj_logic1\[429\],633.24
mgmt_buffers.user_reset,632.48
_11245_,632.32
mgmt_buffers.mprj_logic1\[128\],631.94
mgmt_buffers.mprj_logic1\[143\],631.74
mgmt_io_out\[37\],631.72
mgmt_buffers.mprj_adr_o_user\[13\],631.7
mgmt_buffers.la_data_in_core\[82\],631.58
mgmt_buffers.mprj_dat_i_user\[24\],631.12
net2353,630.81
net2516,630.32
mgmt_io_oeb\[36\],630.16
net2042,629.98
net2080,629.72
net2079,629.58
net587,629.22
net2774,628.72
mgmt_buffers.mprj_dat_i_core_bar\[15\],628.16
net2731,628.04
net1867,627.38
net1103,627.195
mgmt_buffers.mprj_logic1\[418\],627.14
net967,626.36
net1778,626.34
mgmt_buffers.mprj_dat_i_core_bar\[9\],625.94
mgmt_buffers.mprj_logic1\[443\],625.84
net2474,625.72
mgmt_buffers.la_data_in_core\[119\],625.54
net11767,625.54
net1721,625.45
_11188_,625.36
net28,625.32
soc.core.la_out_storage\[4\],625.24
mgmt_io_out\[33\],625.06
_12838_,625.015
net2266,624.805
net1468,624.745
_11332_,624.66
net1537,624.61
net2184,624.34
mgmt_buffers.la_data_in_core\[127\],624.12
net1450,623.8
mgmt_buffers.mprj_adr_o_user\[15\],623.76
net1328,623.4
net865,623.15
_11167_,622.88
mgmt_buffers.mprj_dat_i_user\[14\],622.1
net2501,622.04
_11234_,621.89
_11307_,621.66
net2204,621.11
net1548,620.82
mgmt_io_oeb\[37\],620.66
net6,620.18
net2804,620.02
mgmt_io_out\[36\],619.74
net2530,619.39
mgmt_buffers.la_oenb_core\[122\],619.36
net2716,619.36
_11181_,619.28
net1195,619.04
net543,618.68
soc.core.VexRiscv.IBusCachedPlugin_cache.io_cpu_decode_data\[22\],618.54
soc.core.dff2_bus_dat_r\[7\],618.52
mgmt_buffers.mprj_logic1\[431\],618.4
mgmt_buffers.la_data_in_core\[1\],618.26
soc.core.la_out_storage\[25\],618.16
net2427,618.12
mprj_io_in_3v3[26],618.04
net1279,617.82
net1470,617.73
ext_clk_sel,617.2
mgmt_buffers.mprj_dat_i_user\[23\],617.1
net1715,616.595
net1959,616.345
net402,616.14
mgmt_buffers.la_data_in_core\[121\],615.92
_10805_,615.9
net2225,615.74
soc.core.spi_enabled_storage,615.29
net1466,615.28
mgmt_buffers.mprj_logic1\[412\],615.07
net13041,614.62
net905,614.215
mgmt_buffers.mprj_dat_i_user\[18\],614.16
mgmt_buffers.la_oenb_core\[92\],613.62
net1073,613.535
mgmt_buffers.la_data_in_core\[118\],612.76
mgmt_buffers.mprj_dat_i_user\[13\],612.68
_12047_,612.57
net1734,612.56
mgmt_buffers.la_oenb_core\[82\],612.44
net2210,612.39
net465,612.19
net2089,612.18
soc.core.la_oe_storage\[8\],611.815
soc.core.la_out_storage\[62\],611.4
mgmt_buffers.mprj_adr_o_user\[8\],611.36
net1361,611.05
_11256_,610.98
mgmt_io_out\[29\],610.42
net2152,610.38
mgmt_buffers.user_irq_core\[2\],610.32
net1786,610.23
net1076,609.98
net13021,609.82
net2446,609.78
net1142,609.72
net2596,609.38
net1490,609.13
net2491,608.96
mgmt_buffers.mprj_logic1\[416\],608.68
mgmt_buffers.la_oenb_core\[93\],608.52
mgmt_buffers.mprj_logic1\[444\],608.39
net1007,608.325
mgmt_buffers.mprj_logic1\[425\],608.28
mgmt_buffers.mprj_dat_o_user\[3\],608.22
soc.core.la_out_storage\[101\],608.18
net1101,608.12
mgmt_buffers.mprj_logic1\[147\],608
mgmt_buffers.mprj_dat_o_user\[4\],607.56
mgmt_buffers.mprj_dat_i_user\[5\],606.62
soc.core.la_oe_storage\[25\],606.42
mgmt_buffers.mprj_dat_i_user\[26\],606.34
mgmt_io_out\[30\],606.3
_12064_,605.99
soc.core.la_out_storage\[55\],605.7
mgmt_buffers.la_data_out_core\[122\],605.62
net2531,605.395
mgmt_buffers.mprj_logic1\[420\],605.28
net1714,605.09
net2429,604.815
net1619,604.54
mgmt_buffers.la_data_in_core\[8\],604.46
mgmt_buffers.la_data_in_enable\[105\],603.98
net2534,603.84
net552,603.79
mgmt_buffers.la_oenb_core\[127\],603.62
soc.core.la_out_storage\[39\],603.41
net2745,603.24
mgmt_buffers.mprj_logic1\[421\],603.22
net12109,603.06
net1774,602.7
net2537,602.48
mgmt_io_out\[31\],602.44
net1380,602.18
mgmt_buffers.mprj_logic1\[272\],602.08
_11195_,602.06
net2158,601.92
mgmt_buffers.mprj_logic1\[413\],601.85
mgmt_buffers.mprj_dat_i_core_bar\[3\],601.72
net1363,601.52
mgmt_buffers.mprj_dat_i_core_bar\[13\],601.5
mgmt_buffers.mprj_logic1\[241\],601.28
_11297_,601.26
soc.core.spi_mosi,601.01
net1256,600.76
mgmt_buffers.mprj_dat_o_user\[1\],600.74
_11287_,600.72
net2560,600.64
_12323_,600.63
net1100,600.37
mgmt_io_oeb\[35\],600.32
mgmt_buffers.la_data_in_core\[80\],600.22
mgmt_buffers.mprj_dat_i_user\[3\],599.88
mgmt_buffers.mprj_logic1\[407\],599.76
mgmt_buffers.la_data_in_core\[6\],599.02
net2213,598.23
_11208_,598.1
mgmt_buffers.la_data_out_core\[118\],596.94
soc.core.VexRiscv.CsrPlugin_selfException_payload_badAddr\[28\],596.41
net2478,596.32
_11985_,596.28
mgmt_buffers.la_oenb_core\[125\],596.08
net1777,596.06
net2559,596.06
mgmt_buffers.la_data_in_core\[78\],596
net1904,595.54
spi_pll90_sel\[2\],595.48
mgmt_buffers.la_data_out_core\[127\],595.44
mgmt_buffers.mprj_logic1\[141\],595.38
net11829,595.26
net1913,594.96
_03434_,594.94
mgmt_buffers.la_oenb_core\[78\],594.45
mgmt_buffers.la_data_out_core\[123\],594.16
mgmt_buffers.la_data_out_core\[119\],593.68
mgmt_buffers.mprj_logic1\[138\],593.68
net1267,593.68
mgmt_buffers.la_oenb_core\[81\],593.6
mgmt_buffers.mprj_dat_o_user\[6\],593.48
mgmt_buffers.mprj_logic1\[142\],593.22
net677,593.21
net1699,592.83
net883,592.61
mgmt_buffers.mprj_logic1\[246\],592.6
net2754,592.48
mgmt_buffers.mprj_logic1\[393\],592.29
_11219_,592.2
net510,592.19
mgmt_buffers.mprj_dat_i_user\[6\],592.18
clknet_3_2_0_mgmt_buffers.caravel_clk,591.975
net2120,591.84
net2102,591.64
net2581,591.36
net2567,591.3
net1575,591.24
mgmt_buffers.la_data_out_core\[125\],591.02
net1717,590.95
mgmt_buffers.mprj_logic1\[146\],590.91
net804,590.7
net2302,590.505
net1533,590.42
mgmt_buffers.user_irq_core\[0\],590.4
net1343,590.4
net13045,590.4
net11781,590.22
_04262_,589.92
net1348,589.735
net1416,589.46
spi_pll90_sel\[1\],589.18
mgmt_buffers.mprj_dat_i_core_bar\[24\],589.08
net2555,589.02
net662,588.58
net1890,588.45
soc.core.la_oe_storage\[12\],588.3
mgmt_buffers.mprj_adr_o_core\[4\],588.25
net1695,588.22
mgmt_buffers.mprj_dat_i_core_bar\[22\],587.78
net2186,587.78
net2748,587.6
net666,587.46
soc.core.dff2_we\[3\],587.25
net1922,587.135
soc.core.hk_dat_i\[19\],587.11
mgmt_buffers.mprj_adr_o_user\[3\],586.98
net12993,586.89
net13020,586.76
net1910,586.74
soc.core.hk_ack,586.41
net2403,586.26
net993,586.2
net420,586.07
net2187,586.025
net1919,585.96
mgmt_buffers.la_data_out_core\[120\],585.78
net2556,585.6
net1023,585.19
net870,584.435
net2723,584.38
mgmt_buffers.mprj_dat_o_user\[5\],583.98
mgmt_buffers.mprj_logic1\[135\],583.395
spi_pll90_sel\[0\],583.38
net2513,583.36
mgmt_buffers.la_oenb_core\[80\],583.28
mgmt_buffers.user_irq_core\[1\],583.24
net2088,583.18
mgmt_buffers.la_oenb_core\[124\],582.64
_12214_,582.5
net1914,582.5
mgmt_buffers.la_data_in_core\[72\],582.04
net1909,581.9
net1915,581.76
net800,581.58
mgmt_buffers.mprj_dat_i_core_bar\[14\],581.04
net675,580.9
mgmt_buffers.mprj_dat_o_user\[8\],580.88
net426,580.82
mgmt_buffers.mprj_logic1\[129\],580.56
net2197,580.53
mgmt_buffers.mprj_dat_o_user\[9\],580.52
net13005,580.28
mgmt_buffers.la_data_in_core\[81\],580.08
mgmt_buffers.la_data_in_core\[73\],579.88
net13007,579.88
net2719,579.66
net1908,579.3
net422,579.14
mgmt_buffers.la_data_in_core\[114\],578.68
net2576,578.66
net448,578.655
net13052,578.3
net2569,578.24
net828,578.06
mgmt_buffers.mprj_dat_i_user\[7\],577.92
_11296_,577.42
mgmt_buffers.la_data_out_core\[124\],577.06
net1911,576.82
mgmt_buffers.mprj_logic1\[245\],576.44
mgmt_buffers.la_oenb_core\[68\],576.3
mgmt_buffers.la_oenb_core\[88\],576.28
soc.core.VexRiscv.IBusCachedPlugin_cache.io_cpu_decode_data\[28\],576.2
net2574,576.18
net850,576.17
soc.core.hk_dat_i\[20\],576.07
soc.core.la_oe_storage\[13\],575.78
net1846,575.4
net13022,575.36
net551,575.1
net2306,574.97
net13006,574.92
soc.core.la_out_storage\[14\],574.84
net875,574.785
mgmt_buffers.mprj_logic1\[385\],574.72
mgmt_buffers.la_data_in_core\[79\],574.58
net2327,574.45
net1307,573.76
net837,573.715
mgmt_buffers.la_data_in_core\[3\],573.44
net11788,573.22
mgmt_buffers.mprj_logic1\[388\],573.1
net1903,572.26
soc.core.VexRiscv.DebugPlugin_haltIt,572.18
net1541,572.12
net987,572.085
mgmt_buffers.la_data_in_enable\[110\],571.86
soc.core.la_out_storage\[36\],571.74
mgmt_buffers.mprj_logic1\[140\],571.66
net973,571.34
spi_pll_sel\[2\],571.28
mgmt_buffers.mprj_dat_i_core_bar\[26\],571.04
net1384,570.82
net2488,570.82
net10745,570.435
net4310,570.3
net2243,569.82
net1722,569.73
soc.core.la_oe_storage\[98\],569.35
ext_reset,568.82
net1918,568.78
mgmt_buffers.mprj_logic1\[415\],568.3
net2575,567.12
net1906,567.1
mgmt_buffers.la_data_in_core\[70\],566.9
mgmt_buffers.mprj_logic1\[417\],566.88
net2699,566.72
net1381,566.42
net2483,566.34
net1790,565.68
spi_pll_sel\[1\],565.52
soc.core.hk_cyc,565.12
mgmt_buffers.mprj_dat_i_user\[27\],564.66
mgmt_io_out\[28\],564.56
net1120,563.95
net1917,563.92
net2078,563.9
net13004,563.54
net2595,563.34
net1028,562.72
net1174,562.38
net2212,561.59
net2570,561.42
mgmt_buffers.mprj_logic1\[132\],560.97
net1065,560.935
net2498,560.76
mgmt_io_out\[27\],560.64
mgmt_buffers.mprj_logic1\[382\],560.5
net1376,560.5
mgmt_buffers.mprj_dat_i_core_bar\[23\],560.27
net1535,560.26
mgmt_buffers.mprj_dat_i_user\[19\],559.58
soc.core.la_out_storage\[38\],559.58
soc.core.la_oe_storage\[41\],559.565
net19,559.54
net3280,559.525
net2480,559.48
net1916,559.04
mgmt_buffers.la_oenb_core\[75\],559
mgmt_buffers.la_data_in_enable\[123\],558.52
_12026_,558.4
_11291_,558.22
mgmt_buffers.la_data_in_core\[77\],557.98
net1441,557.89
soc.core.hk_dat_i\[25\],557.79
mgmt_buffers.la_data_in_core\[75\],557.28
mgmt_buffers.mprj_dat_i_user\[20\],557.26
mgmt_buffers.mprj_logic1\[408\],557.2
_11286_,556.84
net1810,556.24
soc.core.debug_oeb_storage,556.19
mgmt_io_out\[25\],556.12
net1716,556.12
net13010,556.04
net1907,555.96
_10954_,555.855
soc.core.RAM256.Do0_pre\[0\]\[6\],555.79
net13015,555.68
mgmt_buffers.la_oenb_core\[85\],555.62
net13043,555.32
mgmt_buffers.mprj_dat_i_user\[4\],555.12
net2496,554.96
net4530,554.86
_03435_,554.7
net1798,554.7
_14263_,554.52
_11231_,554.36
net991,554.34
soc.core.la_oe_storage\[45\],554.33
net443,554.24
spi_pll_sel\[0\],553.92
mgmt_io_out\[3\],553.67
net12183,553.39
net1905,553.08
net1458,552.685
_11271_,552.6
mgmt_buffers.mprj_logic1\[51\],552.6
net1696,552.6
net671,552.42
net13017,552.4
net1339,552.34
mgmt_buffers.mprj_logic1\[125\],552.05
net2565,552
user_io_out\[0\],551.78
mgmt_buffers.mprj_dat_i_core_bar\[4\],551.74
_11276_,551.44
net2742,551.02
net1900,550.76
mgmt_buffers.mprj_logic1\[404\],550.62
net1126,550.56
soc.core.hk_dat_i\[0\],550.55
net2439,550.42
net13001,550.24
soc.core.hk_dat_i\[28\],550.03
net2090,549.74
net10787,549.675
_11174_,549.56
net1460,549.1
soc.core.RAM256.Do0_pre\[0\]\[0\],548.89
net451,548.675
net2487,548.66
net2405,548.24
net1118,548.22
net1404,547.99
soc.core.RAM256.Do0_pre\[0\]\[4\],547.91
mgmt_buffers.mprj_dat_i_user\[9\],547.84
soc.core.RAM256.Do0_pre\[0\]\[20\],547.71
net994,547.505
soc.core.RAM256.Do0_pre\[0\]\[7\],547.49
net9433,547.3
net1102,547.225
mgmt_buffers.mprj_adr_o_user\[17\],547.02
mgmt_buffers.la_data_out_core\[116\],546.78
net966,546.52
mgmt_buffers.mprj_logic1\[134\],546.22
net1071,546.12
mgmt_buffers.user_irq_enable\[2\],546.08
soc.core.RAM256.Do0_pre\[0\]\[3\],546.01
mgmt_buffers.la_data_in_enable\[104\],545.58
soc.core.dff2_bus_dat_r\[3\],545.58
soc.core.RAM256.Do0_pre\[0\]\[5\],545.31
net1017,545.01
_12052_,544.92
_11263_,544.86
net2286,544.76
mgmt_buffers.mprj_dat_i_user\[2\],544.56
_03443_,544.25
net593,543.5
net1773,543.18
mgmt_buffers.la_data_in_core\[9\],543.1
net1837,542.7
mgmt_buffers.mprj_sel_o_core\[0\],542.58
net786,542.42
mprj_io_in_3v3[2],542.29
soc.core.RAM256.Do0_pre\[0\]\[15\],542.21
soc.core.la_out_storage\[19\],542.05
mgmt_buffers.mprj_dat_i_core_bar\[10\],542.02
net1025,542.02
soc.core.RAM256.Do0_pre\[0\]\[12\],541.75
mgmt_buffers.la_data_in_core\[69\],541.28
mgmt_buffers.user_irq_enable\[1\],541.22
net483,540.9
net4112,540.82
mgmt_buffers.mprj_dat_i_core_bar\[31\],540.72
net13009,540.7
net2704,540.68
soc.core.RAM256.Do0_pre\[0\]\[11\],540.53
mgmt_buffers.mprj_logic1\[59\],540.37
_11865_,540.21
net12999,539.955
user_io_oeb\[0\],539.93
net1847,539.92
mgmt_buffers.mprj_logic1\[43\],539.82
_12059_,539.74
_03445_,539.68
net11897,539.56
net2044,539.53
net989,539.52
net1826,539.5
net13002,539.44
net423,539.345
soc.core.la_oe_storage\[6\],539.13
mgmt_buffers.la_data_in_enable\[89\],539.08
mgmt_buffers.la_data_in_enable\[125\],538.72
net2086,538.4
net446,538.3
net2493,538.3
net2176,538.26
net2162,538.16
net1266,537.98
net802,537.755
clknet_7_27__leaf_mgmt_buffers.caravel_clk,537.06
_03430_,536.86
soc.core.VexRiscv.CsrPlugin_selfException_payload_badAddr\[24\],536.8
soc.core.RAM256.Do0_pre\[0\]\[2\],536.43
net2792,536.06
net2564,535.88
mgmt_buffers.la_data_out_core\[105\],535.72
mgmt_buffers.la_data_in_enable\[74\],535.22
soc.core.RAM256.Do0_pre\[0\]\[9\],535.2
_12529_,535.11
_03437_,534.925
net1912,534.9
net1209,534.84
net1116,534.74
mgmt_buffers.mprj_logic1\[384\],534.69
mgmt_buffers.mprj_dat_i_user\[31\],534.62
soc.core.RAM256.Do0_pre\[0\]\[19\],533.97
mgmt_buffers.la_data_in_core\[12\],533.9
soc.core.RAM256.Do0_pre\[0\]\[31\],533.83
soc.core.hk_dat_i\[6\],533.75
soc.core.hk_dat_i\[29\],533.23
net24,533.19
net1072,533.1
net1703,533
net2261,532.71
net554,532.46
net2730,532.22
soc.core.VexRiscv.dBus_cmd_payload_address\[0\],531.92
clknet_7_23__leaf_mgmt_buffers.caravel_clk,531.745
mgmt_buffers.mprj_logic1\[130\],531.38
mgmt_buffers.la_data_out_core\[107\],531.3
net2290,530.92
net13003,530.66
net946,530.6
soc.core.la_oe_storage\[7\],530.42
mgmt_buffers.la_data_in_enable\[121\],529.6
mgmt_buffers.mprj_logic1\[409\],529.55
mgmt_buffers.mprj_dat_i_core_bar\[12\],529.39
mgmt_buffers.mprj_logic1\[392\],529.06
mgmt_buffers.mprj_logic1\[434\],528.42
net1781,528.31
net488,528.16
_03431_,527.76
net4670,527.755
net11778,527.44
soc.core.hk_dat_i\[9\],527.39
mgmt_buffers.la_data_in_enable\[99\],527.26
mgmt_buffers.user_irq_enable\[0\],527.14
net13008,527.04
mgmt_buffers.la_data_out_core\[121\],527
soc.core.mgmtsoc_litespimmap_burst_adr\[28\],526.995
net13034,526.96
mgmt_buffers.mprj_logic1\[447\],526.94
mgmt_io_out\[26\],526.64
soc.core.la_oe_storage\[10\],526.49
net929,526.02
mgmt_buffers.mprj_dat_i_core_bar\[20\],525.91
mgmt_buffers.la_data_in_enable\[127\],525.88
soc.core.hk_dat_i\[8\],525.61
mgmt_buffers.mprj_dat_i_core_bar\[2\],525.58
mgmt_buffers.mprj_sel_o_user\[2\],525.58
net569,525.46
mgmt_buffers.la_data_in_enable\[97\],524.9
net2154,524.3
mgmt_buffers.mprj_logic1\[398\],523.88
mgmt_buffers.la_data_in_enable\[102\],523.66
net1739,523.52
mgmt_buffers.mprj_logic1\[386\],523.24
net1928,522.495
net1507,522.26
mgmt_buffers.la_data_out_core\[115\],521.94
net1731,521.86
soc.core.VexRiscv.CsrPlugin_selfException_payload_badAddr\[30\],521.825
net1813,521.6
net1001,521.375
net1713,521.26
net2593,521.06
soc.core.la_oe_storage\[5\],520.79
net2734,520.61
gpio_control_in_2\[6\].gpio_defaults\[0\],520.48
mgmt_buffers.la_data_in_core\[71\],520.46
net879,520.275
mgmt_buffers.mprj_logic1\[389\],520.06
net1110,519.88
net2155,519.79
_04903_,519.63
soc.core.hk_dat_i\[30\],519.51
mgmt_buffers.mprj_logic1\[62\],519.5
net1920,519.47
mgmt_buffers.la_data_in_enable\[126\],519.24
net827,519.155
mgmt_buffers.mprj_dat_i_core_bar\[27\],519.14
mgmt_buffers.la_data_in_core\[7\],519.12
net1210,519.1
net681,518.885
net13035,518.74
gpio_control_in_1a\[0\].user_gpio_in,518.43
net1524,517.96
soc.core.RAM256.Do0_pre\[0\]\[13\],517.91
_10533_,517.27
net862,517.04
mgmt_buffers.la_data_in_core\[76\],516.74
net561,516.64
mgmt_buffers.mprj_logic1\[244\],516.44
mgmt_buffers.la_data_out_core\[106\],516.16
mgmt_io_out\[6\],515.93
net2780,515.46
net2580,515.1
net1220,515.09
user_io_out\[26\],515.05
soc.core.la_out_storage\[0\],515.03
net2532,514.85
net1994,514.79
net550,514.5
mgmt_buffers.mprj_logic1\[53\],514.34
net780,513.9
net2069,513.86
net553,513.84
_03429_,513.04
mgmt_buffers.mprj_logic1\[238\],512.86
_00400_,512.78
net975,512.54
user_io_oeb\[26\],512.24
net2018,512.22
net1391,511.625
soc.core.la_oe_storage\[118\],511.45
_01370_,511.3
mgmt_buffers.la_data_in_enable\[109\],510.94
net2445,510.77
mgmt_buffers.la_oenb_core\[71\],510.6
net1248,510.475
net2066,509.755
net2318,509.665
mgmt_buffers.la_data_out_core\[103\],509.34
net2714,509.32
clknet_1_1_0_mgmt_buffers.caravel_clk,509.3
net559,509.13
mgmt_buffers.mprj_logic1\[123\],508.96
net1886,508.71
net474,508.66
mgmt_buffers.mprj_dat_i_core_bar\[19\],508.42
_11860_,508.32
soc.core.mgmtsoc_litespimmap_burst_adr\[21\],508.315
net1036,508.24
_10807_,507.34
mgmt_buffers.la_data_in_core\[11\],506.84
net1755,506.6
net13033,506.56
net1803,506.32
soc.core.VexRiscv.CsrPlugin_selfException_payload_badAddr\[9\],506.28
net1980,506.08
clknet_3_0_0_mgmt_buffers.caravel_clk,505.6
net1935,505.49
mgmt_buffers.mprj_logic1\[19\],505.48
net2116,505.44
mgmt_buffers.mprj_logic1\[122\],505.38
_11856_,505.34
net1265,505.16
net889,504.95
net2087,504.78
net1129,504.75
net2223,504.645
mgmt_buffers.la_oenb_core\[77\],504.6
_10795_,504.44
soc.core.hk_dat_i\[27\],503.99
mgmt_buffers.la_oenb_core\[1\],503.96
net1346,503.66
mgmt_buffers.mprj_logic1\[127\],503.56
net404,503.42
net1506,503.16
net777,503.095
net1446,502.59
net2586,502.56
soc.core.la_ien_storage\[55\],502.04
net995,501.9
mgmt_buffers.la_data_in_enable\[119\],501.61
_11726_,501.13
soc.core.hk_dat_i\[15\],500.71
mgmt_buffers.mprj_dat_i_user\[1\],500.56
mgmt_buffers.la_data_in_core\[68\],500.4
mgmt_buffers.mprj_logic1\[411\],500.26
mgmt_buffers.la_data_out_core\[104\],500.24
mgmt_buffers.mprj_sel_o_user\[3\],500.24
net2287,500.12
net1105,500.08
net1950,499.935
soc.core.VexRiscv._zz_dBus_cmd_payload_data\[7\],499.84
net761,499.72
net1978,499.66
soc.core.mgmtsoc_litespimmap_burst_adr\[15\],499.275
net1973,499.26
_12054_,498.98
net1253,498.84
net1860,498.74
_11225_,498.64
net665,498.475
net965,498.11
net1940,498.06
soc.core.RAM256.Do0_pre\[0\]\[1\],498.025
soc.core.RAM256.Do0_pre\[0\]\[16\],497.97
net1780,497.94
_11160_,497.84
soc.core.RAM256.Do0_pre\[0\]\[10\],497.83
net881,497.66
net1697,497.56
net12112,497.54
soc.core.la_oe_storage\[16\],497.24
net453,497.24
soc.core.VexRiscv.IBusCachedPlugin_cache.io_mem_rsp_payload_data\[30\],497.08
net2262,497
net2579,495.96
net847,495.52
mgmt_buffers.la_data_in_enable\[92\],495.42
_03768_,495.3
net1977,495.16
net2037,494.96
net2295,494.91
soc.core.la_oe_storage\[122\],494.85
mgmt_buffers.la_oenb_core\[76\],494.78
net969,494.635
net1252,494.53
gpio_control_in_1a\[3\].serial_clock_out,494.49
mgmt_buffers.la_data_in_core\[19\],494.44
net1785,494.44
mgmt_buffers.mprj_logic1\[401\],493.7
net977,493.66
net757,493.65
soc.core.RAM256.Do0_pre\[0\]\[22\],493.25
soc.core.la_oe_storage\[96\],493.055
soc.core.RAM256.Do0_pre\[0\]\[24\],492.47
net458,492.31
_00389_,492.25
_10555_,492.11
soc.core.RAM256.Do0_pre\[0\]\[18\],491.77
mgmt_buffers.la_data_in_enable\[118\],491.48
soc.core.RAM256.Do0_pre\[0\]\[8\],490.89
net399,490.62
soc.core.VexRiscv.dBus_cmd_payload_address\[1\],490.355
net1623,489.78
_03422_,489.48
net2695,489.42
net1121,489.04
mgmt_buffers.la_oenb_core\[79\],488.98
net2442,488.94
net2587,488.94
_13128_,488.86
net3233,488.6
_10881_,488.59
net2103,488.52
net768,488.17
mgmt_buffers.la_data_out_core\[109\],488.02
mgmt_buffers.mprj_logic1\[49\],487.78
pll.enable,487.28
pll.dco,487.04
mgmt_buffers.mprj_logic1\[438\],486.9
net2020,486.39
net1982,486.25
soc.core.spi_clk,486.11
soc.core.VexRiscv.CsrPlugin_selfException_payload_badAddr\[14\],485.78
net557,485.44
net2514,485.24
clknet_7_24__leaf_mgmt_buffers.caravel_clk,484.9
mgmt_buffers.la_data_in_enable\[100\],484.88
net1344,484.775
net7977,484.535
net1262,484.49
mgmt_buffers.la_data_in_core\[64\],484.14
_03439_,484.02
net579,483.85
net2585,483.74
_10561_,483.6
_12687_,483.44
soc.core.RAM256.Do0_pre\[0\]\[26\],483.39
net424,483.18
net1075,482.9
mgmt_buffers.la_oenb_core\[74\],482.8
mgmt_buffers.la_oenb_core\[69\],482.62
net548,482.34
gpio_control_in_1\[4\].serial_load_out,482.24
net861,482.08
net4156,481.73
net573,481.075
soc.core.hk_dat_i\[23\],480.37
soc.core.RAM256.Do0_pre\[0\]\[14\],480.31
net1793,480.14
clknet_3_7_0_mgmt_buffers.caravel_clk,479.9
_03447_,479.72
net891,479.72
net520,479.65
net1273,479.33
mgmt_buffers.mprj_dat_i_user\[12\],479.24
soc.core.VexRiscv.CsrPlugin_selfException_payload_badAddr\[11\],479.24
net1249,479.18
net2117,479.14
mgmt_buffers.mprj_logic1\[54\],479.02
net13058,478.48
net1151,478.1
net2300,477.585
net1061,477.1
soc.core.la_oe_storage\[11\],476.96
mgmt_buffers.la_oenb_core\[73\],476.66
net1733,476.44
net1821,476.34
mgmt_buffers.la_data_in_enable\[98\],475.7
mgmt_buffers.mprj_logic1\[423\],475.44
net765,475.355
net1938,475.3
mgmt_buffers.la_data_in_core\[13\],475.2
net1805,475.1
soc.core.la_oe_storage\[20\],474.74
mgmt_buffers.la_oenb_core\[0\],474.7
net2425,474.67
_14022_,474.18
mgmt_buffers.la_oenb_core\[72\],474.16
mgmt_buffers.la_data_in_core\[65\],474.06
net1970,473.87
net654,473.765
soc.core.la_out_storage\[41\],473.325
net4239,473.305
net1534,472.7
_00476_,472.42
mgmt_buffers.la_oenb_core\[14\],471.3
net841,471.24
soc.core.mgmtsoc_litespimmap_burst_adr\[14\],471.1
net753,470.885
net1338,470.78
net1730,470.61
mgmt_buffers.la_data_out_core\[102\],470.42
_11857_,470.38
net2068,469.98
net1032,469.94
net11834,469.58
net2226,469.43
net1769,469.28
mgmt_buffers.la_data_in_enable\[85\],469.26
net1356,469.26
mgmt_buffers.la_oenb_core\[10\],469.18
net1743,469.18
net2134,469.07
soc.core.RAM256.Do0_pre\[0\]\[17\],468.9
net657,468.66
net2404,468.53
net1809,468.44
net913,468.2
soc.core.la_out_storage\[47\],468.12
net1620,468.08
net1939,466.89
mgmt_buffers.la_data_out_core\[110\],466.6
net10696,466.535
net798,466.435
net1849,466.38
mgmt_buffers.la_data_out_core\[111\],466.2
net1946,466.015
net1801,465.96
net930,465.87
user_io_out\[1\],465.82
net456,465.76
_10823_,465.72
_12217_,465.415
mgmt_buffers.mprj_logic1\[15\],465.4
_14156_,465.01
clknet_7_17__leaf_mgmt_buffers.caravel_clk,464.69
_03438_,464.46
net1058,464.3
net794,464.22
net556,464.18
net1745,464.12
_00398_,463.97
soc.core.mgmtsoc_litespimmap_burst_adr\[22\],463.91
net3573,463.89
net1464,463.67
soc.core.RAM256.Do0_pre\[0\]\[21\],463.39
net1581,463.36
clknet_7_25__leaf_mgmt_buffers.caravel_clk,463.28
net844,462.815
net2419,462.7
_11868_,462.62
net4270,462.395
soc.core.la_oe_storage\[103\],462.325
mgmt_buffers.la_oenb_core\[2\],462.22
net449,461.94
net2170,461.935
net2485,461.9
_14087_,461.8
net764,461.73
net2019,461.62
net1757,461.52
net1016,461.35
_04275_,461.3
net2568,461.08
soc.core.la_oe_storage\[34\],461.07
_03740_,461
net11849,460.86
mgmt_buffers.la_data_in_enable\[32\],460.82
net1596,460.8
net2573,460.7
_03757_,460.54
soc.core.RAM256.Do0_pre\[0\]\[25\],460.41
soc.core.dff2_bus_dat_r\[10\],460.18
soc.core.VexRiscv._zz_execute_BRANCH_CTRL\[0\],460.075
net811,459.96
mgmt_buffers.mprj_logic1\[75\],459.82
_00391_,459.58
net2046,459.32
net1106,459.01
_12250_,458.73
net626,458.72
gpio_control_bidir_2\[2\].mgmt_ena,458.24
net1394,458.2
net1216,458.16
clknet_0_mgmt_buffers.caravel_clk,458.07
clknet_7_73__leaf_mgmt_buffers.caravel_clk,457.69
soc.core.VexRiscv.CsrPlugin_selfException_payload_badAddr\[22\],457.64
gpio_control_bidir_2\[2\].gpio_logic1,457.34
net963,457.33
net2248,457.28
mgmt_buffers.la_oenb_core\[5\],457.115
mgmt_buffers.mprj_logic1\[391\],457.04
net1194,457.035
mgmt_buffers.la_data_out_core\[77\],456.92
net2073,456.9
mgmt_buffers.la_data_in_enable\[77\],456.75
mgmt_buffers.la_data_in_core\[67\],456.64
net1030,456.2
mgmt_buffers.la_data_in_enable\[106\],456.18
clknet_7_16__leaf_mgmt_buffers.caravel_clk,456.14
net2288,455.56
_12014_,454.9
net1584,454.77
net2196,454.74
net645,454.68
net1726,454.345
net586,454.28
net5806,454.28
net1215,453.39
_01366_,453.22
net1975,453.16
net3502,453.125
net1355,452.625
net1538,452.44
mgmt_buffers.la_data_out_core\[95\],452.34
net899,452.1
net669,452.04
net1749,452.02
net864,451.96
net11956,451.6
net1074,451.09
mgmt_buffers.la_data_in_enable\[93\],451.08
soc.core.VexRiscv.CsrPlugin_selfException_payload_badAddr\[10\],450.84
gpio_control_in_1\[4\].serial_clock_out,450.78
net2071,450.74
net555,450.5
user_io_oeb\[1\],450.05
net1213,449.98
net473,449.96
mgmt_buffers.la_data_in_core\[23\],449.94
gpio_control_bidir_2\[0\].serial_clock_out,449.52
net747,449.46
net2843,449.36
net2061,449.29
mgmt_buffers.la_oenb_core\[70\],449.1
net2244,448.885
mgmt_buffers.la_data_in_enable\[111\],448.88
mgmt_buffers.la_data_in_core\[22\],448.74
net958,448.7
net1706,448.36
net2762,448.16
_11283_,448.11
net1390,447.99
net10738,447.98
net679,447.94
net2035,447.85
mgmt_buffers.mprj_adr_o_core\[9\],447.74
net1885,447.47
gpio_control_bidir_2\[0\].serial_load_out,447.24
net898,447.025
net2034,446.96
soc.core.VexRiscv.CsrPlugin_selfException_payload_badAddr\[29\],446.72
mgmt_buffers.la_data_out_core\[100\],446.42
net1031,446.06
net656,445.88
net2345,445.87
_03785_,445.825
net1098,445.675
net11764,445.54
_12144_,445.23
_11317_,445.14
net1288,444.92
mgmt_buffers.la_data_in_core\[17\],444.9
net793,444.66
mgmt_buffers.la_data_out_core\[101\],444.58
net1140,444.33
_02582_,444.16
net9945,444.08
net2435,443.98
net3999,443.94
_03442_,443.78
net17,443.64
net616,443.56
_11157_,443.4
soc.core.RAM256.Do0_pre\[0\]\[30\],442.83
net838,442.765
net1119,442.74
gpio_control_bidir_2\[2\].gpio_defaults\[0\],442.58
_11871_,442.54
clknet_7_39__leaf_mgmt_buffers.caravel_clk,442.335
net2130,442.15
net1342,442.12
net2301,442.035
net2199,442.03
net1257,442.01
net3661,442
soc.core.RAM256.Do0_pre\[0\]\[28\],441.97
mgmt_buffers.la_data_in_core\[66\],441.54
mgmt_buffers.mprj_logic1\[38\],441.15
net709,441.14
mgmt_buffers.la_data_out_core\[96\],440.38
soc.core.VexRiscv.IBusCachedPlugin_cache.io_cpu_decode_data\[26\],440.37
net1462,440.155
mgmt_buffers.la_data_out_core\[99\],439.87
mgmt_buffers.la_data_in_enable\[101\],439.84
mgmt_buffers.mprj_sel_o_core\[1\],439.76
soc.core.VexRiscv.IBusCachedPlugin_cache.io_mem_rsp_payload_data\[29\],439.56
mgmt_buffers.la_data_out_core\[98\],439.48
net431,439.39
mgmt_buffers.la_data_in_enable\[103\],439.22
_12011_,439.16
net986,439.15
net1289,439.1
_13125_,439.02
net974,438.99
_10552_,438.73
net595,438.47
soc.core.RAM256.Do0_pre\[0\]\[29\],438.46
_11873_,438.38
soc.core.VexRiscv.CsrPlugin_selfException_payload_badAddr\[25\],438.01
mgmt_buffers.la_data_in_enable\[82\],437.95
soc.core.VexRiscv._zz_execute_SRC2\[16\],437.86
gpio_control_bidir_2\[2\].user_gpio_in,437.79
net1162,437.6
net729,437.48
soc.core.la_out_storage\[34\],437.41
net11765,437.36
net1078,437.355
net853,437.35
clknet_7_85__leaf_mgmt_buffers.caravel_clk,437.32
_11972_,437.12
net3972,436.975
mgmt_buffers.la_oenb_core\[9\],436.96
net581,436.86
net2260,436.85
soc.core.la_oe_storage\[36\],436.74
net1937,436.715
net580,436.66
soc.core.VexRiscv.IBusCachedPlugin_cache.io_mem_rsp_payload_data\[28\],436.62
_03782_,436.51
_12180_,436.475
net1845,436.2
net652,436.135
mgmt_buffers.la_data_in_core\[15\],436.08
net2588,435.76
net2193,435.2
soc.core.spimaster_storage\[2\],435.14
net563,434.795
net1064,434.34
mgmt_buffers.mprj_adr_o_core\[29\],434.29
_03640_,434.27
soc.core.mgmtsoc_litespimmap_burst_cs,434.14
net1002,434.03
mgmt_buffers.mprj_logic1\[212\],433.9
net1761,433.9
net909,433.865
net1702,433.8
mgmt_buffers.la_data_out_core\[97\],433.74
net1876,433.71
mgmt_buffers.mprj_logic1\[55\],433.63
clknet_7_56__leaf_mgmt_buffers.caravel_clk,433.58
_04995_,433.485
net476,433.36
_11322_,433.34
clknet_5_0_0_mgmt_buffers.caravel_clk,433.32
mgmt_buffers.mprj_dat_o_core\[7\],433.16
mgmt_buffers.mprj_logic1\[77\],433.1
net570,433.08
net466,432.97
net680,432.9
net1125,432.655
mgmt_buffers.mprj_dat_i_core_bar\[11\],432.24
net1033,432.065
net926,431.74
net1614,431.68
mgmt_io_out\[2\],431.57
mgmt_buffers.mprj_dat_i_core_bar\[1\],431.48
soc.core.dff2_bus_dat_r\[29\],431.34
net653,431.23
_03683_,430.86
soc.core.la_oe_storage\[9\],430.79
soc.core.la_out_storage\[57\],430.78
_13156_,430.715
_11327_,430.66
net1611,430.56
net433,430.53
mprj_io_in_3v3[25],430.42
net2121,430.28
net1617,430.14
gpio_control_in_2\[6\].serial_load,430.12
net2422,429.93
net1818,429.72
net1226,429.565
mgmt_buffers.la_oenb_core\[65\],429.52
net445,429.515
_11140_,429.48
net482,429.34
mgmt_buffers.la_data_in_enable\[76\],429.29
soc.core.dff2_bus_dat_r\[30\],428.92
net1841,428.66
net927,428.48
net428,428.475
net1392,428.385
net676,428.235
net784,427.83
soc.core.la_oe_storage\[99\],427.82
soc.core.VexRiscv._zz_dBus_cmd_payload_data\[3\],427.75
net1729,427.54
mgmt_buffers.la_oenb_core\[3\],427.48
net1545,427.4
mgmt_buffers.mprj_logic1\[121\],427.28
_12569_,427.195
clknet_7_66__leaf_mgmt_buffers.caravel_clk,426.955
mgmt_buffers.la_data_in_core\[16\],426.76
net1981,426.33
soc.core.mgmtsoc_litespimmap_burst_adr\[23\],426.3
net730,426.26
mgmt_buffers.mprj_logic1\[266\],426.18
net490,426.175
net1448,425.155
net1853,424.82
_03446_,424.64
net12116,424.58
net1259,424.41
net674,424.4
net1855,424.22
_03764_,424.155
mgmt_buffers.la_data_in_core\[20\],423.92
net11879,423.78
_11872_,423.76
net945,423.71
net1817,423.66
soc.core.spimaster_storage\[8\],423.43
_12503_,423.12
soc.core.mgmtsoc_litespimmap_burst_adr\[18\],423.08
mgmt_buffers.la_data_out_core\[71\],423.06
net924,422.54
_02358_,422.095
net1128,422.01
mgmt_buffers.mprj_logic1\[126\],422
net2059,420.69
soc.core.la_ien_storage\[50\],420.56
net3889,420.41
net2097,420.31
net11874,420.3
net16,420.13
net895,420.12
mgmt_buffers.mprj_logic1\[64\],420.06
mgmt_buffers.mprj_logic1\[124\],419.86
mgmt_buffers.la_data_out_core\[114\],419.76
net4608,419.46
mgmt_buffers.la_data_out_core\[1\],419.32
_10548_,418.98
mgmt_buffers.la_data_out_core\[7\],418.88
net1962,418.72
net2131,418.55
net1080,418.515
soc.core.debug_in,418.23
_05028_,418.09
gpio_control_in_2\[6\].shift_register\[1\],417.78
mgmt_buffers.la_data_out_core\[113\],417.62
soc.core.VexRiscv.IBusCachedPlugin_cache.io_cpu_decode_data\[23\],417.54
net1037,417.46
net1022,417.34
net1287,417.235
clknet_7_48__leaf_mgmt_buffers.caravel_clk,417.08
net843,416.915
net1851,416.88
net4469,416.44
soc.core.VexRiscv.IBusCachedPlugin_cache.io_cpu_decode_data\[18\],416.38
net1789,416.22
clknet_2_1_0_mgmt_buffers.caravel_clk,415.8
net2592,415.64
net923,415.22
net2775,415.08
net1069,415.005
mgmt_buffers.la_data_out_core\[94\],414.98
net667,414.96
net2582,414.84
mgmt_buffers.la_data_in_enable\[81\],414.76
net1608,414.63
soc.core.VexRiscv.HazardSimplePlugin_writeBackWrites_valid,414.61
gpio_control_in_1a\[3\].serial_load_out,414.6
net1275,414.53
soc.core.la_ien_storage\[52\],414.39
_14284_,414.36
soc.core.dff2_bus_dat_r\[19\],414.34
soc.core.VexRiscv.IBusCachedPlugin_cache.io_cpu_decode_data\[21\],414.28
net2253,414.175
_12142_,413.745
net1261,413.735
mgmt_buffers.mprj_dat_o_core\[2\],413.72
soc.core.VexRiscv.CsrPlugin_selfException_payload_badAddr\[21\],413.56
clknet_3_5_0_mgmt_buffers.caravel_clk,413.54
mgmt_buffers.la_data_in_core\[18\],413.3
soc.core.VexRiscv.CsrPlugin_selfException_payload_badAddr\[18\],413.115
mgmt_buffers.mprj_logic1\[221\],412.96
net1123,412.93
net748,412.89
net1130,412.49
net2711,412.46
net1712,412.29
net1517,412.06
net762,411.985
net796,411.82
mgmt_buffers.mprj_logic1\[275\],411.73
net1833,411.72
soc.core.mgmtsoc_litespimmap_burst_adr\[27\],411.715
soc.core.la_oe_storage\[17\],411.55
net886,411.525
mgmt_buffers.la_data_out_core\[117\],411.46
mgmt_buffers.la_oenb_core\[6\],411.44
clknet_1_0_0_mgmt_buffers.caravel_clk,411.22
net2074,410.83
net1224,410.72
mgmt_buffers.mprj_logic1\[112\],410.65
mgmt_buffers.mprj_logic1\[400\],410.65
_11971_,410.44
soc.core.VexRiscv._zz_execute_SRC2\[17\],410.44
_11152_,410.36
net12610,410.3
mgmt_buffers.mprj_dat_o_core\[1\],410.24
soc.core.la_oe_storage\[104\],410.235
net1003,410.19
soc.core.la_ien_storage\[9\],410.08
net2247,409.85
net1488,409.74
flash_csb_oeb,409.71
net3195,409.68
net1956,409.65
clknet_7_7__leaf_mgmt_buffers.caravel_clk,409.26
mgmt_buffers.mprj_dat_o_core\[4\],409.2
mgmt_buffers.mprj_logic1\[219\],409.14
net1026,409.13
net1753,408.78
_03665_,408.3
clknet_7_64__leaf_mgmt_buffers.caravel_clk,408.2
clknet_7_58__leaf_mgmt_buffers.caravel_clk,408.02
net775,407.965
net3434,407.955
soc.core.VexRiscv.execute_LightShifterPlugin_isActive,407.72
soc.core.dff2_bus_dat_r\[13\],407.52
clknet_7_112__leaf_mgmt_buffers.caravel_clk,407.38
net2802,407.22
soc.core.la_out_storage\[61\],407.2
net477,407.09
net1708,407.02
net2297,406.86
net1814,406.84
net858,406.695
net421,406.275
net1314,406.24
_12501_,406.12
mgmt_buffers.mprj_logic1\[390\],405.84
net670,405.82
_04744_,405.74
net1124,405.72
net2251,405.58
_13019_,405.4
soc.core.dff2_bus_dat_r\[28\],405.18
net1277,405.13
mgmt_buffers.mprj_logic1\[84\],404.85
net12089,404.82
soc.core.VexRiscv._zz_dBus_cmd_payload_data\[6\],403.84
soc.core.RAM256.Do0_pre\[1\]\[1\],403.64
mgmt_buffers.la_data_in_enable\[80\],403.44
clknet_7_102__leaf_mgmt_buffers.caravel_clk,402.5
net3206,402.45
_11881_,402.285
_06133_,402.16
net1379,402.12
soc.core.dff2_bus_dat_r\[14\],402.04
net860,401.96
net5274,401.52
soc.core.spi_miso,401.31
net1839,401.24
net12624,401.16
net1704,401.115
net1829,400.96
net814,400.46
_00113_,400.455
mgmt_buffers.mprj_logic1\[405\],400.42
_14295_,400.16
mgmt_buffers.la_data_in_core\[25\],400
soc.core.VexRiscv.decode_to_execute_RS1\[8\],399.795
net964,399.43
net1054,399.24
net1024,399.18
net2017,399.17
_05065_,399.08
mgmt_buffers.la_data_in_core\[21\],399
net944,398.99
mgmt_buffers.la_oenb_core\[64\],398.9
mgmt_buffers.mprj_logic1\[220\],398.84
soc.core.VexRiscv.IBusCachedPlugin_cache.io_cpu_decode_data\[17\],398.815
net873,398.81
_11869_,398.68
mgmt_buffers.mprj_logic1\[85\],398.52
net2072,398.45
net10629,398.275
net2263,397.94
net648,397.93
net781,397.92
net779,397.64
net11270,397.4
mgmt_buffers.mprj_dat_o_core\[6\],397.37
mgmt_buffers.mprj_logic1\[118\],397.34
net795,397.22
net1050,397.215
net2153,397.035
mgmt_buffers.la_data_in_enable\[79\],397
net1290,396.92
net979,396.69
soc.core.VexRiscv.CsrPlugin_selfException_payload_badAddr\[23\],396.58
net574,396.58
mgmt_buffers.mprj_logic1\[111\],396.53
mgmt_buffers.la_data_out_core\[87\],396.44
mgmt_buffers.mprj_logic1\[82\],396.4
clknet_7_34__leaf_mgmt_buffers.caravel_clk,396.4
net1477,396.32
net2027,396.26
mgmt_buffers.mprj_dat_o_core\[5\],396.06
mgmt_buffers.la_data_in_enable\[96\],395.8
net1711,395.8
net1009,395.58
soc.core.RAM256.Do0_pre\[1\]\[31\],395.56
net919,395.56
net9399,395.55
_13988_,395.48
net1457,395.4
gpio_control_in_1a\[1\].user_gpio_in,395.25
_12560_,395
_03748_,394.83
net869,394.83
net877,394.8
soc.core.la_oe_storage\[58\],394.375
net3895,394.26
soc.core.la_oe_storage\[55\],394.255
_04942_,394.24
mgmt_buffers.la_data_in_core\[39\],394.24
net600,394.12
net885,394.085
net2021,394.02
net1728,393.96
mgmt_buffers.mprj_logic1\[251\],393.86
net809,393.66
net1819,393.615
_13388_,393.4
net649,393.36
net1737,393.34
net960,393.225
net11807,393.16
net998,393.11
net2075,393.04
net11802,393
soc.core.dff2_bus_dat_r\[8\],392.86
net3183,392.8
net469,392.62
clknet_7_106__leaf_mgmt_buffers.caravel_clk,392.58
clknet_3_3_0_mgmt_buffers.caravel_clk,392.3
_11244_,392.08
net462,392.055
net1168,391.84
_11968_,391.78
gpio_control_bidir_2\[2\].shift_register\[2\],391.76
net11817,391.4
net11949,391.375
net13027,390.77
mgmt_buffers.la_data_out_core\[84\],390.76
soc.core.VexRiscv.IBusCachedPlugin_cache.io_mem_rsp_payload_data\[25\],390.27
net12625,390.24
net2412,390.13
net8839,390.03
soc.core.VexRiscv.IBusCachedPlugin_cache._zz_banks_0_port1\[22\],389.9
net1932,389.89
net2043,389.88
net2267,389.8
mgmt_buffers.mprj_logic1\[79\],389.56
_05064_,389.515
mgmt_buffers.la_oenb_core\[4\],389.32
_02462_,389.06
mgmt_buffers.mprj_logic1\[68\],389.04
net11858,388.86
mgmt_buffers.la_data_in_enable\[75\],388.84
net4271,388.82
net2252,388.635
_12540_,388.63
clknet_3_1_0_mgmt_buffers.caravel_clk,388.46
net832,388.17
net2207,388.14
net896,388.12
clknet_7_14__leaf_mgmt_buffers.caravel_clk,388.01
net925,387.82
net4281,387.6
net2310,387.295
flash_csb_frame,387.29
soc.core.la_oe_storage\[21\],386.995
_11328_,386.8
net2185,386.77
mgmt_buffers.la_oenb_core\[66\],386.64
clknet_7_72__leaf_mgmt_buffers.caravel_clk,386.6
net2136,386.52
mgmt_buffers.mprj_logic1\[113\],386.11
_00393_,385.82
_03450_,385.76
_12025_,385.6
mgmt_buffers.la_data_out_core\[89\],385.28
net34,385.22
soc.core.VexRiscv._zz_execute_SHIFT_CTRL\[0\],385.2
mgmt_buffers.mprj_logic1\[410\],384.74
net11944,384.74
net478,384.7
net890,384.67
_03449_,384.64
mgmt_buffers.la_data_out_core\[82\],384.6
_03766_,384.43
mgmt_buffers.la_data_out_core\[86\],384.42
gpio_control_in_1\[0\].serial_clock_out,384.26
gpio_control_bidir_2\[1\].user_gpio_in,384.2
net742,384.11
_03677_,384.08
net1395,384.04
mgmt_buffers.mprj_logic1\[406\],383.96
_11303_,383.84
net1357,383.66
soc.core.la_out_storage\[96\],383.62
net2157,383.59
soc.core.la_out_storage\[122\],383.51
soc.core.VexRiscv.memory_to_writeBack_MEMORY_ADDRESS_LOW\[1\],383.42
net2029,383.37
net2123,383.28
net1947,383.1
soc.core.VexRiscv._zz_execute_SRC2\[31\],383.06
net1951,382.76
net2156,382.76
net502,382.6
soc.core.spimaster_storage\[1\],382.46
clknet_7_65__leaf_mgmt_buffers.caravel_clk,382.46
net1481,382.4
net1111,382.36
net11771,382.32
mgmt_buffers.mprj_logic1\[83\],382.24
soc.core.dff2_bus_dat_r\[4\],382.24
net582,382.215
mgmt_buffers.mprj_logic1\[8\],382.18
gpio_control_in_1a\[2\].serial_clock_out,382.1
net2264,381.52
mgmt_buffers.la_data_in_core\[41\],381.34
mgmt_buffers.la_oenb_core\[67\],381.2
pll.resetb,380.87
net2148,380.69
_03451_,380.66
clknet_7_12__leaf_mgmt_buffers.caravel_clk,380.615
mgmt_buffers.la_data_out_core\[91\],380.52
net2460,380.4
net817,380.28
net1806,380.26
net12128,379.96
net2434,379.955
clknet_3_6_0_mgmt_buffers.caravel_clk,379.89
mgmt_buffers.mprj_logic1\[204\],379.84
soc.core.la_oe_storage\[120\],379.5
soc.core.VexRiscv.CsrPlugin_selfException_payload_badAddr\[19\],379.42
net2375,379.42
soc.core.RAM256.Do0_pre\[1\]\[27\],379.34
soc.core.dff2_bus_dat_r\[20\],379.28
mgmt_buffers.mprj_logic1\[114\],379.2
net2317,379.12
net497,379.1
net2224,379.08
mgmt_buffers.mprj_logic1\[402\],378.7
mgmt_buffers.la_data_in_enable\[88\],378.54
net1929,378.09
soc.core.la_out_storage\[99\],378.06
net1963,377.89
soc.core.la_out_storage\[103\],377.84
_03452_,377.82
gpio_control_in_1a\[2\].serial_load_out,377.81
net495,377.8
net1741,377.6
net766,377.4
gpio_control_in_1a\[0\].serial_clock_out,377.36
net1112,377.1
net35,377.08
net2335,377
net1308,376.87
clknet_7_63__leaf_mgmt_buffers.caravel_clk,376.86
mgmt_buffers.mprj_dat_o_core\[3\],376.82
_12682_,376.36
net1771,376.36
net1709,376.27
net1725,376.12
net1083,375.83
mgmt_buffers.mprj_logic1\[61\],375.76
net1331,375.565
net419,375.5
clknet_7_120__leaf_mgmt_buffers.caravel_clk,375.495
mgmt_buffers.la_data_out_core\[108\],375.44
net684,375.405
net3832,375.35
net3347,375.14
net971,375.13
soc.core.la_oe_storage\[15\],374.76
net2124,374.76
net11796,374.76
soc.core.mgmtsoc_litespimmap_burst_adr\[19\],374.63
clknet_7_29__leaf_mgmt_buffers.caravel_clk,374.62
clknet_7_19__leaf_mgmt_buffers.caravel_clk,374.54
net568,374.055
net1465,374.02
mgmt_buffers.la_data_in_enable\[72\],373.88
net1244,373.325
net739,373.275
_12071_,373.23
mgmt_buffers.la_data_out_core\[92\],373.06
net932,373.04
soc.core.mgmtsoc_litespimmap_burst_adr\[16\],372.99
net5559,372.9
soc.core.mgmtsoc_litespimmap_burst_adr\[8\],372.66
clknet_7_28__leaf_mgmt_buffers.caravel_clk,372.28
_03696_,371.96
_13387_,371.915
net11798,371.84
soc.core.VexRiscv.execute_to_memory_MEMORY_ENABLE,371.795
net917,371.53
net931,371.41
net1473,371.32
net728,370.9
net647,370.875
net808,370.79
soc.core.mgmtsoc_litespimmap_burst_adr\[17\],370.76
_04967_,370.62
gpio_control_bidir_2\[1\].gpio_logic1,370.38
net928,370.195
net2334,370.12
_14120_,369.23
net11968,369.14
soc.core.la_oe_storage\[119\],369.1
clknet_5_2_0_mgmt_buffers.caravel_clk,369.03
net1484,368.92
soc.core.la_oe_storage\[70\],368.89
net500,368.86
net3531,368.34
mgmt_buffers.mprj_logic1\[379\],368.28
mgmt_buffers.la_data_in_enable\[1\],368.02
mgmt_buffers.mprj_logic1\[258\],367.74
_10550_,367.18
net2147,367.155
_14043_,367.06
net2033,367.05
net1004,367.02
soc.core.la_oe_storage\[37\],366.54
net1115,366.54
mgmt_buffers.la_data_in_enable\[8\],366.28
_12107_,366.03
net463,365.9
mgmt_buffers.mprj_dat_i_core_bar\[17\],365.74
net4218,365.7
mgmt_buffers.la_data_out_core\[93\],365.68
mgmt_buffers.la_data_in_core\[46\],365.58
net425,365.58
net2415,365.14
_12481_,364.96
flash_io0_do,364.92
clknet_7_30__leaf_mgmt_buffers.caravel_clk,364.72
soc.core.VexRiscv.execute_CsrPlugin_csr_3008,364.675
net578,364.5
net871,364.475
soc.core.dff2_bus_dat_r\[2\],364.46
net682,364.26
mgmt_buffers.la_oenb_core\[62\],364.24
net2276,364.22
net1223,364.16
soc.core.RAM256.Do0_pre\[1\]\[0\],364.14
clknet_7_104__leaf_mgmt_buffers.caravel_clk,364.08
net959,364.03
net468,363.9
net2041,363.835
mgmt_buffers.la_data_out_core\[112\],363.76
mgmt_buffers.la_data_in_enable\[87\],363.74
soc.core.la_out_storage\[21\],363.66
clknet_7_110__leaf_mgmt_buffers.caravel_clk,363.555
mgmt_buffers.mprj_logic1\[383\],363.5
net2222,363.34
net1522,363.32
soc.core.mgmtsoc_litespimmap_burst_adr\[29\],363.31
net444,362.89
net2232,362.78
_04713_,362.76
net1027,362.75
net914,362.655
_10959_,362.48
mgmt_buffers.la_data_in_enable\[84\],362.46
clknet_7_74__leaf_mgmt_buffers.caravel_clk,362.215
soc.core.la_oe_storage\[26\],362.195
net1791,362.06
net2065,361.86
net1871,361.28
net1987,361.015
net1747,360.9
porb_l,360.89
mgmt_buffers.la_data_in_enable\[86\],360.88
_00416_,360.72
_11153_,360.62
net1884,360.47
_11266_,360.36
soc.core.la_oe_storage\[54\],360.355
_11928_,360.28
_12000_,360.24
net1276,360.12
net2423,360.11
net982,359.94
clknet_7_57__leaf_mgmt_buffers.caravel_clk,359.92
mgmt_buffers.mprj_dat_i_user\[17\],359.8
mgmt_buffers.mprj_logic1\[9\],359.75
soc.core.VexRiscv.CsrPlugin_selfException_payload_badAddr\[27\],359.435
net2273,359.395
_03688_,359.38
_12019_,359.32
mgmt_buffers.mprj_logic1\[46\],359.2
net1122,359.12
net2024,358.91
net2190,358.55
net1139,358.435
net1469,358.42
clknet_7_101__leaf_mgmt_buffers.caravel_clk,358.28
mgmt_buffers.la_data_out_core\[79\],358.2
mgmt_io_oeb\[1\],358.105
_11158_,358.06
net976,358.06
_12539_,358.05
net790,357.98
net1815,357.94
net1084,357.71
net2402,357.41
_10827_,357.34
_11978_,357.12
_12062_,357.01
net4813,356.77
_11331_,356.76
net11776,356.68
_04716_,356.56
gpio_control_bidir_1\[1\].serial_load_out,356.515
mgmt_buffers.la_data_in_enable\[7\],356.24
net1227,356.12
net740,356.05
net1019,355.91
mgmt_buffers.la_oenb_core\[13\],355.9
gpio_control_bidir_1\[1\].serial_clock_out,355.88
clknet_7_21__leaf_mgmt_buffers.caravel_clk,355.48
_03732_,355.45
net892,355.37
net12209,355.22
net1417,354.975
_12541_,354.88
_12562_,354.875
net1830,354.84
flash_io0_oeb,354.62
net2426,354.605
net1705,354.44
net2589,354.26
mgmt_buffers.la_data_out_core\[3\],354.18
net3891,353.99
net746,353.975
net2650,353.6
_04714_,353.58
net2410,353.575
net1574,353.565
net782,353.43
_11323_,353.42
net2165,352.95
net11786,352.86
_14201_,352.755
net460,352.52
net11823,352.46
mgmt_buffers.mprj_logic1\[261\],352.44
net1378,352.43
net1250,352.42
net1158,352.24
net852,352.2
soc.core.la_oe_storage\[126\],352.12
net480,352.1
net571,352.085
soc.core.VexRiscv.IBusCachedPlugin_cache.io_cpu_decode_data\[5\],351.93
gpio_control_in_1a\[0\].serial_load_out,351.76
net912,351.36
clknet_7_47__leaf_mgmt_buffers.caravel_clk,351.3
net831,351.18
user_io_out\[2\],351.12
clknet_7_35__leaf_mgmt_buffers.caravel_clk,350.935
clknet_7_46__leaf_mgmt_buffers.caravel_clk,350.92
net1523,350.9
net2258,350.9
net1707,350.88
net432,350.735
soc.core.VexRiscv.IBusCachedPlugin_cache.io_cpu_decode_data\[15\],350.68
mgmt_buffers.la_data_in_enable\[11\],350.66
net1971,350.66
net11233,350.52
clknet_5_21_0_mgmt_buffers.caravel_clk,350.47
net10791,350.435
porb_h,350.33
net1081,350.24
net2146,350.18
net2140,350.15
net2218,350.075
_14029_,350.01
net1887,349.995
soc.core.la_out_storage\[23\],349.99
net920,349.98
soc.core.la_oe_storage\[73\],349.78
net650,349.72
clknet_2_3_0_mgmt_buffers.caravel_clk,349.68
net2401,349.635
_12322_,349.61
net8554,349.6
net1993,349.555
clknet_7_32__leaf_mgmt_buffers.caravel_clk,349.46
soc.core.VexRiscv.externalInterruptArray_regNext\[3\],349.1
gpio_control_in_1\[0\].serial_load_out,349.06
mgmt_buffers.la_data_in_enable\[114\],349.06
soc.core.la_oe_storage\[51\],349.02
net10354,349.01
net459,348.975
net2163,348.57
_12036_,348.515
_12287_,348.435
mgmt_buffers.mprj_logic1\[57\],348.22
net3568,348.18
net4007,348.07
mgmt_buffers.mprj_logic1\[45\],347.94
soc.core.slave_sel_r\[4\],347.92
net950,347.83
mgmt_buffers.mprj_dat_i_core_bar\[21\],347.82
net537,347.755
clknet_7_20__leaf_mgmt_buffers.caravel_clk,347.7
soc.core.VexRiscv._zz_execute_SRC2\[15\],347.66
net1573,347.615
net750,347.32
net880,347.275
_03926_,347.25
soc.core.mgmtsoc_vexriscv_debug_bus_ack,347.08
mgmt_buffers.la_data_out_core\[10\],347.06
net2396,346.95
soc.core.VexRiscv._zz_execute_SRC2\[11\],346.56
mgmt_buffers.mprj_logic1\[52\],346.5
net619,346.42
mgmt_buffers.mprj_logic1\[403\],346.32
gpio_control_bidir_1\[0\].gpio_logic1,345.88
net467,345.815
net2239,345.78
mgmt_buffers.la_oenb_core\[7\],345.68
_03689_,345.64
_13358_,345.58
net2189,345.565
net464,345.52
soc.core.la_oe_storage\[29\],345.28
soc.core.la_oe_storage\[79\],345.19
net584,345.17
net534,345.16
net1822,345.02
mgmt_buffers.la_data_out_core\[4\],344.96
soc.core.la_out_storage\[54\],344.82
mgmt_buffers.la_oenb_core\[60\],344.8
_03840_,344.78
_03929_,344.6
mgmt_buffers.la_data_in_enable\[73\],344.07
mgmt_buffers.la_data_out_core\[76\],343.8
mgmt_buffers.mprj_logic1\[254\],343.79
net567,343.74
soc.core.uart_enabled_storage,343.64
net1720,343.63
_10537_,343.56
clknet_7_38__leaf_mgmt_buffers.caravel_clk,343.38
soc.core.la_out_storage\[46\],343.35
net710,343.16
net791,342.87
soc.core.la_oe_storage\[105\],342.78
mprj_io_in_3v3[3],342.74
net2399,342.705
soc.core.dff2_bus_dat_r\[11\],342.58
_03702_,342.46
net8823,342.44
mgmt_buffers.mprj_logic1\[268\],342.4
net591,342.22
soc.core.la_out_storage\[52\],342.2
clknet_7_36__leaf_mgmt_buffers.caravel_clk,342.135
mgmt_buffers.mprj_logic1\[117\],342
soc.core.la_oe_storage\[62\],342
mgmt_buffers.mprj_logic1\[66\],341.88
clknet_7_5__leaf_mgmt_buffers.caravel_clk,341.655
net2168,341.44
net43,341.35
net721,341.32
clknet_7_15__leaf_mgmt_buffers.caravel_clk,341.17
_11232_,341.04
mgmt_buffers.la_data_in_enable\[117\],340.96
soc.core.la_out_storage\[42\],340.87
net1149,340.815
net1,340.8
soc.core.la_oe_storage\[102\],340.77
soc.core.VexRiscv.decode_to_execute_RS1\[28\],340.68
_11874_,340.66
clknet_7_77__leaf_mgmt_buffers.caravel_clk,340.66
mgmt_buffers.la_data_out_core\[74\],340.62
net2257,340.345
_12251_,340.09
soc.core.VexRiscv.CsrPlugin_selfException_payload_badAddr\[26\],340.08
clknet_7_55__leaf_mgmt_buffers.caravel_clk,340.06
net12622,340.04
soc.core.VexRiscv._zz_execute_SRC2\[12\],340
net999,339.57
soc.core.la_oe_storage\[56\],339.05
_05048_,338.96
net1976,338.875
_04944_,338.69
net1553,338.565
_12496_,338.46
net937,338.03
gpio_control_in_1a\[1\].serial_clock_out,337.94
soc.core.la_out_storage\[114\],337.7
net605,337.66
soc.core.mgmtsoc_litespimmap_burst_adr\[13\],337.545
net519,337.46
_10527_,337.32
_12498_,337.1
net3066,337.09
_13426_,337.05
net2150,336.96
_01368_,336.855
net915,336.68
_12519_,336.57
net1901,336.54
net1153,336.44
net2227,336.37
clknet_2_2_0_mgmt_buffers.caravel_clk,336.31
_11204_,336.26
gpio_control_bidir_1\[0\].serial_clock_out,336.24
gpio_control_in_1\[1\].serial_load_out,336.24
net878,336.16
net564,335.97
net2228,335.95
net1827,335.94
net3702,335.92
soc.core.spimaster_storage\[3\],335.775
net1418,335.76
soc.core.la_oe_storage\[52\],335.64
soc.core.VexRiscv.CsrPlugin_selfException_payload_badAddr\[8\],335.42
net12991,335.42
soc.core.dff2_bus_dat_r\[12\],335.38
net10815,335.335
net513,335.32
mgmt_buffers.mprj_logic1\[396\],335.26
_11306_,335.24
net9631,335.24
net2414,335.12
_11172_,334.98
soc.core.VexRiscv._zz_execute_SHIFT_CTRL\[1\],334.78
net1921,334.74
_11917_,334.59
_11318_,334.38
gpio_control_in_1\[1\].serial_clock_out,334.38
net2054,334.28
net771,334.1
net36,334.08
net2237,334.05
net3397,334
_11186_,333.94
net565,333.88
net9076,333.86
net908,333.8
soc.core.dff2_bus_dat_r\[25\],333.78
net2291,333.76
_04939_,333.74
net4016,333.735
pll.ringosc.dstage\[5\].id.out,333.72
net2285,333.7
net726,333.675
mgmt_buffers.la_data_out_core\[64\],333.66
_12069_,333.49
gpio_control_in_1\[5\].gpio_defaults\[0\],333.43
mgmt_buffers.la_oenb_core\[11\],333.36
mgmt_buffers.la_oenb_core\[58\],333.34
net636,333.34
soc.core.mgmtsoc_litespimmap_burst_adr\[12\],333.285
_03003_,333.28
net732,333.175
net4050,333.16
mgmt_buffers.la_oenb_core\[16\],333.14
soc.core.VexRiscv.decode_to_execute_RS1\[24\],332.92
net835,332.82
_14241_,332.78
clknet_7_43__leaf_mgmt_buffers.caravel_clk,332.76
soc.core.multiregimpl127_regs1,332.74
soc.core.la_out_storage\[50\],332.64
net3644,332.265
mgmt_buffers.la_data_out_core\[75\],332.18
soc.core.VexRiscv.IBusCachedPlugin_cache.io_cpu_fetch_mmuRsp_physicalAddress\[28\],331.79
net640,331.72
net6226,331.66
net2016,331.61
_10871_,331.54
net1406,331.5
soc.core.la_oe_storage\[57\],331.485
net1405,331.38
soc.core.RAM256.Do0_pre\[1\]\[2\],331.34
net1214,331.34
net12623,331.3
soc.core.VexRiscv.IBusCachedPlugin_cache._zz_banks_0_port1\[20\],331.28
_11397_,331.18
mgmt_buffers.la_data_out_core\[2\],331.18
_12512_,331.08
net1934,331.005
net9735,330.98
clknet_7_11__leaf_mgmt_buffers.caravel_clk,330.92
mgmt_buffers.la_data_in_enable\[78\],330.74
net673,330.74
net772,330.74
_12513_,330.5
soc.core.la_out_storage\[44\],330.44
clknet_7_114__leaf_mgmt_buffers.caravel_clk,330.415
soc.core.la_oe_storage\[114\],330.25
mgmt_buffers.la_oenb_core\[15\],330.18
net1984,330.085
net1056,330.06
clknet_7_9__leaf_mgmt_buffers.caravel_clk,329.9
soc.core.dff2_bus_dat_r\[15\],329.84
clknet_7_92__leaf_mgmt_buffers.caravel_clk,329.78
net1104,329.35
soc.core.VexRiscv.IBusCachedPlugin_cache._zz_banks_0_port1\[17\],329.295
net8904,329.26
net12628,329.16
clknet_7_122__leaf_mgmt_buffers.caravel_clk,329.06
soc.core.la_oe_storage\[108\],328.955
net1094,328.76
net1132,328.76
net1587,328.74
soc.core.la_oe_storage\[112\],328.735
soc.core.la_oe_storage\[47\],328.67
net2416,328.54
net678,328.52
net1811,328.5
net2031,328.445
net583,328.43
net1949,328.13
net754,328.12
net1183,327.9
net2040,327.8
mgmt_buffers.la_data_in_core\[62\],327.64
net11264,327.62
mgmt_buffers.caravel_clk2,327.5
net9152,327.495
soc.core.la_out_storage\[98\],327.01
soc.core.la_out_storage\[104\],326.96
net628,326.68
net2009,326.645
mgmt_buffers.mprj_dat_i_user\[21\],326.6
mgmt_buffers.mprj_logic1\[345\],326.54
net12626,326.44
net2067,326.37
gpio_control_in_1\[2\].serial_load_out,326.35
net1996,326.34
_04651_,326.3
net9095,326.28
soc.core.multiregimpl4_regs0,326.27
gpio_control_in_1a\[1\].serial_load_out,326.25
_04900_,326.2
net2230,326.135
net1926,326.13
net625,326.12
net4268,326.12
mgmt_buffers.la_oenb_core\[8\],326.02
soc.core.la_out_storage\[43\],325.66
soc.core.la_out_storage\[49\],325.66
soc.core.mgmtsoc_litespimmap_burst_adr\[20\],325.59
_10771_,325.32
net1131,325.22
_01364_,325.19
mgmt_buffers.la_data_out_core\[65\],325
mgmt_buffers.mprj_logic1\[109\],324.83
mgmt_buffers.mprj_logic1\[42\],324.78
net2214,324.77
mgmt_buffers.mprj_dat_i_user\[25\],324.76
net3356,324.665
net1212,324.39
_12525_,324.27
net12105,324.26
_03845_,324.22
_12502_,324.14
_14124_,324.1
clknet_7_4__leaf_mgmt_buffers.caravel_clk,324.055
net1134,324.04
net602,324
net1483,323.95
_10958_,323.94
_03491_,323.78
net2036,323.5
mgmt_buffers.la_data_in_core\[57\],323.42
mgmt_buffers.mprj_logic1\[4\],323.28
net2793,323.28
net596,323.26
net872,323.24
net38,323.04
net2311,322.895
soc.core.VexRiscv.CsrPlugin_selfException_payload_badAddr\[20\],322.8
soc.core.VexRiscv._zz_execute_SRC2_CTRL\[1\],322.74
net1554,322.675
soc.core.VexRiscv.decode_to_execute_RS1\[11\],322.67
soc.core.RAM256.SEL0\[1\],322.56
net1135,322.42
soc.core.VexRiscv.IBusCachedPlugin_cache.io_cpu_decode_data\[19\],322.38
net486,322.22
net505,322.16
net8344,322.16
net2221,322.06
net572,322.02
mgmt_buffers.la_data_out_core\[0\],321.94
_10534_,321.81
net2201,321.69
net668,321.54
net884,321.42
net2144,321.23
_12509_,321.2
net741,321.17
_10886_,320.965
net471,320.915
mgmt_buffers.la_oenb_core\[23\],320.86
mgmt_buffers.la_data_out_core\[83\],320.84
mgmt_buffers.la_data_out_core\[85\],320.84
mgmt_buffers.la_data_in_enable\[112\],320.8
soc.core.VexRiscv._zz_execute_SRC1_CTRL\[0\],320.8
flash_clk_frame,320.74
soc.core.la_oe_storage\[35\],320.59
net1333,320.58
_12515_,320.35
mgmt_buffers.mprj_logic1\[56\],320.335
net3696,320.3
net2188,320.22
net1960,320.16
net2421,320.16
soc.core.la_oe_storage\[116\],320.11
net9559,320.06
net1764,320
mgmt_buffers.mprj_logic1\[78\],319.9
net1986,319.9
_05044_,319.82
net2000,319.82
mgmt_buffers.la_data_in_enable\[113\],319.54
net1154,319.53
_12514_,319.14
_14583_,318.86
net416,318.7
soc.core.multiregimpl113_regs1,318.5
gpio_control_in_1\[3\].serial_load_out,318.43
net2326,318.3
mgmt_buffers.mprj_dat_i_core_bar\[25\],318.28
net3155,318.235
soc.core.la_oe_storage\[50\],318.21
mgmt_buffers.mprj_logic1\[89\],317.96
mgmt_buffers.la_data_in_core\[24\],317.94
soc.core.spimaster_storage\[13\],317.94
mgmt_buffers.la_data_in_enable\[3\],317.76
_03671_,317.52
net475,317.475
_14106_,317.47
mgmt_buffers.la_data_out_core\[6\],317.3
net2304,317.3
net1944,317.175
net731,317.16
net643,317.08
soc.core.la_oe_storage\[84\],317.07
net839,316.96
flash_clk_oeb,316.84
net1127,316.72
mgmt_buffers.la_data_out_core\[11\],316.56
_12423_,316.54
net3032,316.3
net655,316.2
net1692,316.16
clknet_5_10_0_mgmt_buffers.caravel_clk,316.155
gpio_control_in_1\[2\].serial_clock_out,316.12
net1236,315.91
net736,315.86
net530,315.8
net1246,315.67
_05027_,315.605
net10825,315.545
soc.core.mgmtsoc_litespimmap_burst_adr\[25\],315.54
mgmt_buffers.mprj_logic1\[250\],315.51
net2159,315.44
clknet_7_42__leaf_mgmt_buffers.caravel_clk,315.4
_11046_,315.38
net2867,315.335
net3864,315.28
soc.core.la_out_storage\[48\],315.24
net2256,315.035
soc.core.la_oe_storage\[87\],315.02
net2023,315.02
soc.core.la_out_storage\[40\],314.94
net1096,314.92
net2281,314.85
_01373_,314.82
net7321,314.74
net7385,314.7
net623,314.395
mgmt_buffers.la_oenb_core\[61\],314.34
_11281_,314.32
_13302_,314.26
_04661_,314.18
_11261_,314.16
net1630,314.035
_13779_,314.03
net826,313.87
soc.core.mgmtsoc_litespimmap_burst_adr\[24\],313.82
net2296,313.8
soc.core.la_oe_storage\[113\],313.77
mgmt_buffers.la_data_out_core\[90\],313.72
_03720_,313.6
mgmt_buffers.mprj_logic1\[65\],313.54
mgmt_buffers.mprj_logic1\[14\],313.52
soc.core.VexRiscv.IBusCachedPlugin_cache._zz_banks_0_port1\[19\],313.48
net549,313.43
soc.core.la_out_storage\[109\],313.41
_11163_,313.35
net2139,313.32
net646,313.15
gpio_control_in_1\[5\].gpio_defaults\[10\],312.95
net2238,312.72
net1085,312.54
net1399,312.525
net509,312.4
_14046_,312.36
net493,312.305
net2292,312.21
net1137,312.12
soc.core.la_out_storage\[56\],312.095
net45,312.06
net2052,312.03
clknet_7_105__leaf_mgmt_buffers.caravel_clk,312
soc.core.VexRiscv.execute_CsrPlugin_csr_834,311.96
soc.core.VexRiscv.RegFilePlugin_regFile\[29\]\[2\],311.84
clknet_7_93__leaf_mgmt_buffers.caravel_clk,311.8
net3213,311.74
soc.core.VexRiscv.CsrPlugin_selfException_payload_badAddr\[16\],311.71
net1043,311.695
_12495_,311.66
soc.core.VexRiscv._zz_execute_SRC1_CTRL\[1\],311.62
soc.core.RAM256.Do0_pre\[1\]\[30\],311.58
clknet_7_96__leaf_mgmt_buffers.caravel_clk,311.56
soc.core.gpio_oe_storage,311.54
soc.core.la_out_storage\[83\],311.52
clknet_7_41__leaf_mgmt_buffers.caravel_clk,311.44
soc.core.VexRiscv.execute_CsrPlugin_csr_4032,311.37
soc.core.VexRiscv.memory_to_writeBack_MEMORY_ADDRESS_LOW\[0\],311.3
soc.core.la_oe_storage\[94\],311.26
soc.core.VexRiscv.IBusCachedPlugin_cache.io_cpu_decode_data\[30\],311.15
mgmt_buffers.la_data_in_enable\[108\],311.04
net769,311.035
_03659_,310.85
net1520,310.75
soc.core.VexRiscv.externalInterruptArray_regNext\[1\],310.64
_12521_,310.54
_03676_,310.4
mgmt_buffers.mprj_logic1\[12\],310.38
net575,310.32
net773,310.23
net1852,310.14
net2216,310.125
net2249,310.06
clknet_7_13__leaf_mgmt_buffers.caravel_clk,310.04
_12522_,310.03
clknet_7_67__leaf_mgmt_buffers.caravel_clk,309.98
_12230_,309.94
net1862,309.94
net1927,309.94
net1160,309.93
mgmt_buffers.la_oenb_core\[52\],309.68
net3215,309.61
net859,309.58
_12504_,309.54
net1967,309.5
net2395,309.455
net2236,309.355
soc.core.la_oe_storage\[121\],309.3
net517,309.3
net2128,309.24
net849,309.22
net956,309.12
clknet_7_89__leaf_mgmt_buffers.caravel_clk,309.06
net2064,309.015
_11226_,308.94
mgmt_buffers.la_data_out_core\[88\],308.9
_03767_,308.86
_04666_,308.86
mgmt_buffers.mprj_logic1\[367\],308.84
_14765_,308.81
_10650_,308.74
net3615,308.72
net8351,308.49
net822,308.42
mgmt_buffers.la_data_in_enable\[5\],308.38
gpio_control_bidir_2\[2\].shift_register\[1\],308.35
net2283,308.15
soc.core.VexRiscv.decode_to_execute_RS1\[18\],307.96
soc.core.la_oe_storage\[24\],307.815
soc.core.RAM256.Do0_pre\[1\]\[23\],307.78
net4200,307.76
net1150,307.71
soc.core.la_oe_storage\[61\],307.68
soc.core.mgmtsoc_litespimmap_burst_adr\[26\],307.515
net607,307.42
net11833,307.42
net618,307.395
net479,307.3
net32,307.24
clknet_7_107__leaf_mgmt_buffers.caravel_clk,307.04
net13012,307.02
net6161,306.815
_00027_,306.76
_13642_,306.755
mgmt_buffers.la_data_out_core\[16\],306.74
mgmt_buffers.la_data_out_core\[5\],306.74
_11193_,306.66
net33,306.64
net1590,306.64
net724,306.53
net2461,306.48
net2438,306.41
_12523_,306.22
mgmt_buffers.la_data_in_enable\[4\],306.12
net738,306.07
soc.core.la_oe_storage\[40\],306.04
net2313,305.935
_12252_,305.9
net3521,305.815
net1521,305.8
soc.core.la_out_storage\[51\],305.62
_11347_,305.56
_12494_,305.56
net1219,305.5
net733,305.46
_14580_,305.4
net708,305.24
net12251,305.02
soc.core.la_out_storage\[106\],304.94
net512,304.68
gpio_control_bidir_2\[2\].gpio_defaults\[1\],304.52
mgmt_buffers.la_data_out_core\[73\],304.32
clknet_7_22__leaf_mgmt_buffers.caravel_clk,304.315
_03664_,304.3
net6438,304.12
net2063,304.1
net3093,304.1
_10564_,304.06
_10441_,304.04
net3525,304.02
_00405_,303.6
mgmt_buffers.la_data_out_core\[12\],303.54
net484,303.44
soc.core.la_oe_storage\[124\],303.32
net840,303.3
soc.core.la_oe_storage\[43\],303.015
soc.core.mgmtsoc_litespimmap_burst_adr\[0\],303
_10885_,302.94
soc.core.VexRiscv._zz_execute_SRC2\[19\],302.8
net11859,302.78
gpio_control_in_1\[3\].serial_clock_out,302.74
net1848,302.68
_04667_,302.62
_12049_,302.62
net2362,302.48
_14579_,302
net1516,301.98
net2371,301.98
mgmt_buffers.la_data_out_core\[8\],301.96
user_io_oeb\[2\],301.93
_14584_,301.92
clock_core,301.92
net576,301.89
_03760_,301.8
net983,301.61
net10816,301.595
net1163,301.48
net2177,301.445
net1272,301.425
_12508_,301.36
clknet_7_53__leaf_mgmt_buffers.caravel_clk,300.975
mgmt_buffers.la_data_in_core\[63\],300.84
_03790_,300.82
net2309,300.69
_03682_,300.64
net3165,300.395
_11301_,300.38
soc.core.la_out_storage\[105\],300.34
soc.core.VexRiscv.decode_to_execute_RS1\[29\],300.265
net727,300.18
soc.core.la_out_storage\[60\],300.12
_05066_,299.96
net2028,299.9
_11255_,299.84
mgmt_buffers.la_data_in_core\[55\],299.68
net1008,299.62
net9676,299.52
net501,299.44
net2282,299.37
_12499_,299.34
net10777,299.23
net2990,299.22
_04292_,299.16
net598,298.91
net2398,298.89
net2245,298.86
net2706,298.83
net2275,298.73
mgmt_buffers.la_oenb_core\[12\],298.64
mgmt_buffers.mprj_logic1\[102\],298.57
net951,298.53
mgmt_buffers.la_data_out_core\[13\],298.5
mgmt_buffers.la_data_in_enable\[90\],298.36
mgmt_buffers.la_data_in_core\[52\],298.26
mgmt_buffers.la_data_in_core\[59\],298.24
net1166,298.24
net608,298.21
_04965_,298.18
_11878_,298.16
mgmt_buffers.la_data_out_core\[78\],298.06
net2060,297.99
net12591,297.94
mgmt_buffers.la_data_out_core\[80\],297.9
net1238,297.82
net611,297.755
net2026,297.74
net1260,297.68
net3596,297.64
_04991_,297.62
mgmt_buffers.la_data_in_enable\[12\],297.58
soc.core.VexRiscv.externalInterruptArray_regNext\[7\],297.46
net2411,297.38
soc.core.la_out_storage\[17\],297.34
mgmt_buffers.la_oenb_core\[18\],297.32
mgmt_buffers.mprj_dat_i_user\[28\],297.3
net472,297.29
net2205,297.25
net3403,297.175
net621,297.14
net1514,296.94
net4707,296.89
net745,296.87
soc.core.la_oe_storage\[115\],296.81
net707,296.76
mgmt_buffers.la_data_out_core\[70\],296.66
net515,296.6
soc.core.VexRiscv._zz_lastStageRegFileWrite_payload_address\[13\],296.46
net1145,296.16
soc.core.VexRiscv.dBus_cmd_payload_address\[3\],296.04
net5,295.97
mgmt_buffers.la_data_in_core\[58\],295.2
net2175,295.05
clknet_7_115__leaf_mgmt_buffers.caravel_clk,295
mgmt_buffers.mprj_logic1\[74\],294.72
mgmt_buffers.la_data_out_core\[72\],294.64
mgmt_buffers.la_data_out_core\[66\],294.42
_12037_,294.04
clknet_7_18__leaf_mgmt_buffers.caravel_clk,293.98
_03745_,293.96
net1953,293.96
clknet_7_99__leaf_mgmt_buffers.caravel_clk,293.9
net2057,293.86
net4069,293.74
gpio_control_in_1a\[2\].user_gpio_in,293.67
net491,293.54
clknet_7_100__leaf_mgmt_buffers.caravel_clk,293.41
mgmt_buffers.la_oenb_core\[57\],293.06
_03895_,292.995
_03751_,292.92
mgmt_buffers.la_data_out_core\[81\],292.92
net1055,292.71
net907,292.68
net2360,292.6
_04834_,292.58
net1291,292.57
clknet_7_78__leaf_mgmt_buffers.caravel_clk,292.04
net1409,291.925
soc.core.VexRiscv.IBusCachedPlugin_cache.io_mem_rsp_payload_data\[18\],291.82
soc.core.la_out_storage\[84\],291.55
clknet_5_14_0_mgmt_buffers.caravel_clk,291.52
net1241,291.5
soc.core.RAM256.Do0_pre\[1\]\[3\],291.48
soc.core.la_oe_storage\[60\],291.48
net1240,291.405
_10830_,291.4
net1549,291.24
soc.core.VexRiscv.dBusWishbone_DAT_MISO\[24\],291.2
net622,291.18
_12497_,291.17
_03920_,290.97
net2133,290.955
_10414_,290.825
net627,290.8
net9007,290.8
_04743_,290.78
mgmt_buffers.mprj_logic1\[60\],290.76
net461,290.28
_03830_,290.27
net507,290.09
net1694,290.04
_01380_,289.945
soc.core.la_out_storage\[5\],289.73
soc.core.VexRiscv.IBusCachedPlugin_cache._zz_banks_0_port1\[18\],289.58
soc.core.la_oe_storage\[101\],289.51
net1511,289.48
soc.core.VexRiscv._zz_execute_SRC2\[3\],289.4
soc.core.spimaster_storage\[10\],289.34
user_io_out\[25\],289.33
net734,289.22
net594,289.07
net521,289.02
_11211_,288.96
net1856,288.88
_13020_,288.87
_11980_,288.86
net2202,288.8
net639,288.78
net2129,288.7
net2272,288.7
net3257,288.66
net2169,288.53
net1349,288.26
gpio_control_in_1\[5\].mgmt_ena,288.22
net1377,288.13
mgmt_buffers.la_oenb_core\[55\],287.78
net9763,287.74
soc.core.VexRiscv.IBusCachedPlugin_cache._zz_banks_0_port1\[15\],287.7
net2816,287.695
mgmt_io_out\[1\],287.69
soc.core.la_oe_storage\[28\],287.59
_12506_,287.58
soc.core.VexRiscv.CsrPlugin_selfException_payload_badAddr\[7\],287.5
net1528,287.48
soc.core.la_oe_storage\[83\],287.28
net8712,287.19
net2342,287.18
_12511_,287.06
net1840,287.02
_13793_,286.91
soc.core.RAM256.Do0_pre\[1\]\[29\],286.72
_10544_,286.61
net9854,286.6
net1461,286.585
mgmt_buffers.mprj_dat_i_core_bar\[29\],286.54
net1832,286.46
net1883,286.43
net2217,286.2
mgmt_buffers.la_data_in_core\[51\],286
net1063,285.91
mgmt_buffers.mprj_dat_i_user\[29\],285.82
clknet_7_79__leaf_mgmt_buffers.caravel_clk,285.82
net12599,285.82
clknet_7_2__leaf_mgmt_buffers.caravel_clk,285.76
net533,285.62
soc.core.VexRiscv.IBusCachedPlugin_cache._zz_banks_0_port1\[16\],285.6
mgmt_buffers.mprj_logic1\[257\],285.5
mgmt_buffers.mprj_dat_i_core_bar\[28\],285.42
mgmt_buffers.mprj_logic1\[58\],285.24
net2095,285.22
soc.core.VexRiscv.execute_CsrPlugin_csr_833,285.16
net887,285.115
soc.core.VexRiscv.dBus_cmd_payload_address\[8\],285.04
net1510,285.04
_13409_,285.02
mgmt_buffers.mprj_adr_o_core\[17\],284.84
net3127,284.83
net522,284.74
mgmt_buffers.la_oenb_core\[17\],284.66
clknet_7_3__leaf_mgmt_buffers.caravel_clk,284.635
soc.core.VexRiscv.IBusCachedPlugin_cache.io_mem_rsp_payload_data\[17\],284.58
soc.core.mgmtsoc_vexriscv_i_cmd_payload_data\[2\],284.5
soc.core.litespi_grant,284.44
_14055_,284.34
net1836,284.32
soc.core.dff2_bus_dat_r\[23\],284.3
net1222,284.26
_03765_,284.2
mgmt_buffers.mprj_dat_i_user\[30\],284.2
net943,284.18
soc.core.mgmtsoc_litespimmap_burst_adr\[5\],284.13
net807,284.08
net4466,284.08
_04899_,284.06
soc.core.mgmtsoc_litespimmap_burst_adr\[9\],283.98
net1062,283.96
mgmt_buffers.mprj_logic1\[387\],283.9
net2039,283.76
net2003,283.64
net1529,283.54
_03855_,283.41
net2062,283.375
net760,283.28
net744,283.25
mgmt_buffers.la_data_in_core\[42\],283.24
net2367,283.18
mgmt_buffers.user_clock,282.94
mgmt_buffers.la_oenb_core\[56\],282.88
net783,282.56
net1489,282.52
soc.core.la_oe_storage\[110\],282.51
soc.core.VexRiscv.IBusCachedPlugin_cache._zz_banks_0_port1\[21\],282.48
net2280,282.29
net498,282.095
net4630,282
net1270,281.94
soc.core.VexRiscv.IBusCachedPlugin_cache.io_mem_rsp_payload_data\[19\],281.78
net1323,281.72
net638,281.65
net12061,281.39
_10449_,281.27
mgmt_buffers.mprj_logic1\[63\],281.24
net2858,281.24
net1844,281.12
mgmt_buffers.la_oenb_core\[59\],281.02
mgmt_buffers.la_oenb_core\[63\],281.02
gpio_control_bidir_1\[1\].gpio_logic1,280.98
_13017_,280.92
gpio_control_bidir_2\[0\].user_gpio_in,280.86
net1189,280.8
mgmt_buffers.la_data_in_core\[61\],280.78
net696,280.73
_12050_,280.72
net7286,280.7
net489,280.66
net2378,280.66
_03798_,280.6
net525,280.58
clknet_7_45__leaf_mgmt_buffers.caravel_clk,280.575
_10777_,280.56
mgmt_buffers.la_data_out_core\[15\],280.56
soc.core.mgmtsoc_vexriscv_i_cmd_payload_data\[4\],280.38
_13772_,280.26
mgmt_buffers.la_data_in_mprj_bar\[18\],280.06
clknet_7_98__leaf_mgmt_buffers.caravel_clk,280.06
net3641,280.02
net921,279.92
net1146,279.875
net3533,279.78
mgmt_buffers.mprj_logic1\[103\],279.77
clknet_7_87__leaf_mgmt_buffers.caravel_clk,279.64
net1082,279.495
net641,279.49
net1053,279.485
net457,279.48
net2161,279.42
net615,279.23
_11993_,279.18
mgmt_buffers.la_data_out_core\[9\],279.18
_14949_,278.885
_03773_,278.78
_12289_,278.72
net2430,278.67
_00117_,278.625
net3877,278.4
net3089,278.32
_11905_,278.12
net3131,277.99
net1170,277.915
net1958,277.9
net651,277.78
net2151,277.78
clknet_7_127__leaf_mgmt_buffers.caravel_clk,277.62
net2770,277.62
net4952,277.62
_03835_,277.54
_14585_,277.4
mgmt_buffers.mprj_logic1\[81\],277.4
flash_io0_di,277.16
mgmt_buffers.la_oenb_core\[53\],277.08
_10956_,276.73
net716,276.675
net12592,276.64
clknet_7_69__leaf_mgmt_buffers.caravel_clk,276.57
net2350,276.54
_10558_,276.5
net2358,276.45
net11810,276.37
net759,276.21
net2394,276.21
clknet_5_8_0_mgmt_buffers.caravel_clk,276.14
net624,276.08
clknet_7_103__leaf_mgmt_buffers.caravel_clk,275.96
net3871,275.96
soc.core.VexRiscv.dBus_cmd_payload_address\[10\],275.9
net1319,275.83
net1957,275.78
net1515,275.765
_10793_,275.76
net664,275.74
_13600_,275.6
soc.core.VexRiscv._zz_execute_SRC2\[13\],275.6
soc.core.VexRiscv.when_DebugPlugin_l260,275.54
_03763_,275.52
net163,275.395
_14907_,275.06
net876,275.06
net2381,275.06
mgmt_buffers.mprj_dat_i_core_bar\[30\],275
net815,274.745
net10836,274.575
soc.core.la_out_storage\[29\],274.52
net3879,274.32
clknet_7_54__leaf_mgmt_buffers.caravel_clk,274.26
net1965,274.25
mgmt_io_oeb\[0\],274.23
_11999_,274.22
mgmt_buffers.la_data_out_core\[69\],274.22
net10365,274.15
clknet_7_44__leaf_mgmt_buffers.caravel_clk,274.115
net1000,273.82
net1930,273.79
_14578_,273.66
mgmt_buffers.mprj_logic1\[76\],273.64
net511,273.5
_00000_,273.48
net3332,273.38
net706,273.31
_00025_,273.22
gpio_control_in_1\[5\].shift_register\[1\],273.18
gpio_control_bidir_2\[0\].gpio_logic1,272.9
soc.core.multiregimpl134_regs1,272.9
net11793,272.88
mgmt_buffers.la_data_in_enable\[69\],272.84
net2015,272.74
net1751,272.68
net1147,272.62
net1727,272.465
soc.core.la_out_storage\[22\],272.42
net792,272.38
soc.core.la_oe_storage\[123\],272.35
net2349,272.34
soc.core.mgmtsoc_litespimmap_burst_adr\[6\],272.245
soc.core.multiregimpl135_regs1,272.2
net2171,272.135
mgmt_buffers.la_oenb_core\[19\],272.12
soc.core.VexRiscv.dBus_cmd_payload_address\[2\],272.12
clknet_7_33__leaf_mgmt_buffers.caravel_clk,272.04
soc.core.la_oe_storage\[107\],271.84
net504,271.77
soc.core.mgmtsoc_litespimmap_burst_adr\[3\],271.535
_10821_,271.32
net2351,271.24
soc.core.VexRiscv._zz_lastStageRegFileWrite_payload_address\[14\],271.14
_03754_,270.84
net1208,270.76
net1354,270.675
net2356,270.54
net2058,270.52
_10536_,270.37
_04656_,270.22
soc.core.RAM256.Do0_pre\[1\]\[4\],270.18
clknet_7_97__leaf_mgmt_buffers.caravel_clk,269.96
_12492_,269.92
net162,269.92
_12488_,269.88
net1972,269.74
mgmt_buffers.mprj_logic1\[371\],269.71
soc.core.la_oe_storage\[89\],269.7
net2324,269.6
net12750,269.6
net12627,269.48
soc.core.VexRiscv.IBusCachedPlugin_cache.io_mem_rsp_payload_data\[22\],269.26
net2126,269.24
soc.core.VexRiscv._zz_execute_SRC2\[14\],269.04
net10726,268.985
mgmt_buffers.la_data_in_core\[54\],268.83
net3515,268.71
net2167,268.67
soc.core.la_oe_storage\[44\],268.605
mgmt_buffers.la_data_in_enable\[10\],268.58
mgmt_buffers.la_data_in_core\[60\],268.32
clknet_5_26_0_mgmt_buffers.caravel_clk,268.19
net2056,268.15
net911,268.12
net947,267.97
mgmt_buffers.mprj_logic1\[259\],267.94
net1718,267.9
net1341,267.86
_11045_,267.48
net2051,267.3
net1992,267.14
net1881,267.095
net9127,267.08
_11316_,266.98
_05052_,266.875
mgmt_buffers.la_data_in_enable\[70\],266.72
soc.core.la_oe_storage\[68\],266.65
_11169_,266.62
net631,266.6
soc.core.VexRiscv.decode_to_execute_RS2\[21\],266.54
soc.core.VexRiscv.IBusCachedPlugin_cache._zz_banks_0_port1\[23\],266.46
net2137,266.42
mgmt_buffers.mprj_we_o_core,266.28
_12137_,266.24
net10681,266.17
net813,266.115
mgmt_buffers.la_data_in_enable\[2\],266.08
clknet_7_40__leaf_mgmt_buffers.caravel_clk,266.06
mgmt_buffers.mprj_logic1\[70\],266.04
_03670_,265.96
net1698,265.915
_14574_,265.72
soc.core.la_out_storage\[87\],265.72
net776,265.375
net2007,265.21
net44,265.2
mgmt_buffers.la_data_in_enable\[6\],265.18
net1519,265.16
_12493_,265.01
soc.core.la_out_storage\[120\],265
gpio_control_in_1a\[3\].user_gpio_in,264.88
mgmt_buffers.la_data_out_core\[14\],264.88
net535,264.78
net4141,264.66
_15167_,264.52
net3418,264.505
_10873_,264.455
net3504,264.45
net562,264.415
net992,264.37
soc.core.VexRiscv.dBus_cmd_payload_address\[17\],264.24
net2819,264.14
soc.core.la_out_storage\[11\],264.08
net532,264.055
net868,264.02
net4574,263.93
net629,263.92
clknet_5_15_0_mgmt_buffers.caravel_clk,263.895
net4543,263.86
soc.core.la_ien_storage\[31\],263.84
net10623,263.815
flash_io0_ieb,263.76
mgmt_buffers.la_data_in_enable\[66\],263.72
_05423_,263.6
net12630,263.58
soc.core.mgmtsoc_litespimmap_burst_adr\[1\],263.57
net2364,263.39
net778,263.31
net1282,263.31
net2022,263.22
soc.core.VexRiscv.dBus_cmd_payload_address\[11\],263.18
soc.core.la_ien_storage\[41\],263.18
net661,263.15
_03769_,263.08
net2141,263.02
_12681_,263
mgmt_buffers.mprj_logic1\[106\],262.95
net3729,262.92
gpio_control_in_1\[5\].shift_register\[9\],262.9
net2005,262.89
net2143,262.715
_03777_,262.7
net916,262.6
net3499,262.56
flash_io1_ieb,262.53
net949,262.495
soc.core.VexRiscv._zz_execute_SRC2_CTRL\[0\],262.46
_11986_,262.43
_01391_,262.37
soc.core.mgmtsoc_litespimmap_burst_adr\[7\],262.35
soc.core.la_out_storage\[8\],262.28
clknet_leaf_1115_mgmt_buffers.caravel_clk,262.275
_11191_,262.26
mgmt_buffers.mprj_logic1\[69\],262.22
mgmt_buffers.la_data_in_enable\[0\],262.16
net787,262.15
_11321_,262.02
mgmt_buffers.mprj_logic1\[67\],261.88
net3247,261.88
soc.core.la_out_storage\[125\],261.835
_05789_,261.77
mgmt_buffers.la_oenb_core\[21\],261.54
_03641_,261.49
gpio_control_in_1\[4\].user_gpio_in,261.41
soc.core.VexRiscv.decode_to_execute_RS1\[26\],261.28
soc.core.RAM256.Do0_pre\[1\]\[28\],261.24
net812,261.21
_12475_,261.14
_13599_,261.1
net3055,261.02
net11779,261.01
_12424_,261
net942,260.53
net2274,260.525
net2235,260.495
net2354,260.46
net10818,260.405
soc.core.la_oe_storage\[49\],260.38
net4139,260.36
soc.core.VexRiscv.CsrPlugin_csrMapping_writeDataSignal\[3\],260.34
net720,260.26
net758,260.16
soc.core.mgmtsoc_vexriscv_i_cmd_payload_data\[12\],260.08
net4462,259.92
gpio_control_in_1\[1\].user_gpio_in,259.86
mgmt_buffers.mprj_logic1\[256\],259.84
mgmt_buffers.la_oenb_core\[24\],259.82
net11848,259.82
soc.core.VexRiscv._zz_lastStageRegFileWrite_valid,259.8
net3852,259.74
_11877_,259.68
net2011,259.675
_00014_,259.56
net4369,259.54
net980,259.49
net10160,259.42
net1274,259.36
net2323,259.35
soc.core.VexRiscv.dBus_cmd_payload_address\[4\],259.26
soc.core.VexRiscv.decode_to_execute_RS2\[11\],259.26
soc.core.la_oe_storage\[100\],259.17
soc.core.mgmtsoc_litespimmap_burst_adr\[4\],259.17
net2791,259.16
_05424_,258.99
net2127,258.975
soc.core.multiregimpl99_regs1,258.94
soc.core.la_out_storage\[28\],258.88
_14590_,258.85
soc.core.la_out_storage\[1\],258.815
_04591_,258.68
net40,258.64
net2278,258.52
net3786,258.5
net39,258.48
_04663_,258.32
net11900,258.32
soc.core.uart_tx_fifo_readable,258.12
soc.core.dbg_uart_dbg_uart_tx,258.11
mgmt_buffers.la_data_out_core\[23\],258.1
net725,257.84
net503,257.7
net1051,257.695
gpio_control_in_1\[3\].user_gpio_in,257.59
net37,257.34
soc.core.dbg_uart_data\[11\],257.33
net8861,257.32
net686,257.2
net1006,257.155
mgmt_buffers.la_data_out_core\[22\],257.06
soc.core.spimaster_storage\[4\],257
_10882_,256.92
net494,256.89
net722,256.89
net6710,256.52
soc.core.spimaster_storage\[7\],256.42
net659,256.335
net1152,256.29
_12408_,256.22
net3671,256.2
soc.core.mgmtsoc_bus_errors\[14\],256.12
mgmt_buffers.mprj_logic1\[80\],256.08
clknet_7_75__leaf_mgmt_buffers.caravel_clk,256.065
_11982_,255.95
net1258,255.78
net1544,255.66
net1193,255.65
clknet_7_91__leaf_mgmt_buffers.caravel_clk,255.64
soc.core.la_oe_storage\[65\],255.6
soc.core.la_out_storage\[58\],255.6
net1861,255.6
_03714_,255.52
net2373,255.355
net702,255.2
mgmt_buffers.mprj_logic1\[394\],255.14
mgmt_buffers.mprj_logic1\[205\],255.12
_00399_,255.1
net1077,255.06
_11326_,254.98
soc.core.multiregimpl128_regs1,254.98
clknet_7_68__leaf_mgmt_buffers.caravel_clk,254.91
net1057,254.735
mgmt_buffers.la_data_in_enable\[18\],254.64
_11387_,254.63
soc.core.VexRiscv.dBus_cmd_payload_address\[12\],254.62
net2013,254.59
soc.core.VexRiscv.IBusCachedPlugin_cache.io_cpu_decode_data\[16\],254.58
net770,254.52
_13124_,254.19
user_io_out\[3\],254.16
_11897_,254.14
clknet_5_16_0_mgmt_buffers.caravel_clk,254.12
clknet_7_119__leaf_mgmt_buffers.caravel_clk,254.06
mgmt_buffers.la_data_out_core\[18\],254.02
mgmt_buffers.mprj_adr_o_core\[18\],254.02
soc.core.la_oe_storage\[31\],254
net10708,253.945
net2760,253.86
soc.core.RAM256.Do0_pre\[1\]\[26\],253.84
flash_io1_do,253.83
net2380,253.755
net3230,253.68
net12631,253.66
_12507_,253.64
_14589_,253.6
soc.core.dff2_bus_dat_r\[21\],253.5
_11923_,253.4
net1625,253.335
mgmt_buffers.mprj_logic1\[395\],253.24
_10829_,253.16
_14146_,253
_14199_,252.94
net41,252.86
net11803,252.82
net8975,252.78
mgmt_buffers.la_oenb_core\[54\],252.76
net2840,252.74
_12125_,252.62
mgmt_buffers.la_oenb_core\[50\],252.6
user_io_oeb\[25\],252.6
net524,252.6
net516,252.48
net10478,252.355
net1207,252.31
net12020,252.18
soc.core.la_out_storage\[94\],252.15
net2546,251.94
mgmt_buffers.mprj_logic1\[249\],251.86
net2145,251.815
net518,251.8
net4205,251.645
_13765_,251.54
net1164,251.46
flash_io1_oeb,251.31
net1925,251.195
net2344,251.13
_12625_,251.02
net1184,251.005
net2432,250.975
soc.core.la_out_storage\[90\],250.89
_03915_,250.86
net617,250.78
_01365_,250.64
net954,250.615
net1838,250.56
net801,250.54
soc.core.VexRiscv.decode_to_execute_RS1\[5\],250.48
_04996_,250.45
net4054,250.34
mgmt_buffers.mprj_logic1\[91\],250.32
net4361,250.3
net1148,250.14
gpio_control_in_1\[5\].shift_register\[2\],250.1
soc.core.VexRiscv.decode_to_execute_RS2\[8\],249.93
soc.core.VexRiscv._zz_execute_SRC2\[18\],249.92
soc.core.VexRiscv.BranchPlugin_branchExceptionPort_payload_badAddr\[28\],249.72
net11845,249.7
_12145_,249.56
clknet_5_23_0_mgmt_buffers.caravel_clk,249.53
net3114,249.5
mprj_io_in[18],249.49
soc.core.mgmtsoc_litespimmap_burst_adr\[11\],249.18
soc.core.la_out_storage\[123\],249.14
soc.core.la_out_storage\[119\],249.11
net996,249.04
_14588_,248.92
soc.core.la_out_storage\[16\],248.875
net867,248.86
net2,248.72
net2183,248.7
net1225,248.675
net845,248.67
_03779_,248.64
net5597,248.51
_10559_,248.5
net3985,248.48
net2002,248.43
clknet_5_24_0_mgmt_buffers.caravel_clk,248.36
soc.core.VexRiscv.CsrPlugin_mepc\[18\],248.34
net12629,248.3
_10530_,248.23
clknet_5_31_0_mgmt_buffers.caravel_clk,248.22
net2382,248.18
_03925_,248.175
soc.core.VexRiscv.decode_to_execute_RS1\[7\],248.16
net1192,248.04
soc.core.la_oe_storage\[66\],248.01
soc.core.VexRiscv.dBus_cmd_payload_address\[16\],247.92
net10678,247.915
net1059,247.895
net2794,247.75
net2135,247.69
net523,247.68
net4198,247.55
soc.core.la_out_storage\[113\],247.505
soc.core.VexRiscv.dBus_cmd_payload_address\[13\],247.32
mgmt_buffers.mprj_logic1\[370\],247.28
soc.core.la_out_storage\[64\],247.24
net955,247.24
net2359,247.18
_03850_,247.15
net2049,247.125
soc.core.VexRiscv.decode_to_execute_RS2\[14\],246.96
soc.core.VexRiscv.IBusCachedPlugin_cache.io_cpu_fetch_mmuRsp_physicalAddress\[29\],246.74
net531,246.7
_14582_,246.6
net613,246.5
mgmt_buffers.mprj_logic1\[50\],246.46
mgmt_buffers.la_data_in_core\[53\],246.42
_11210_,246.36
net1070,246.255
net751,246.13
_11984_,246.05
net2407,245.94
net2992,245.87
clknet_7_6__leaf_mgmt_buffers.caravel_clk,245.86
net10406,245.77
net1894,245.74
net1245,245.73
soc.core.uart_tx_fifo_level0\[4\],245.72
net906,245.65
net2241,245.54
soc.core.RAM256.Do0_pre\[1\]\[5\],245.48
_03813_,245.47
net3281,245.38
net1411,245.2
clknet_7_82__leaf_mgmt_buffers.caravel_clk,245.16
clknet_5_1_0_mgmt_buffers.caravel_clk,245.12
net894,245.03
_14189_,244.8
soc.core.VexRiscv.dBus_cmd_payload_address\[14\],244.4
net1015,244.38
gpio_control_in_1\[0\].user_gpio_in,244.31
soc.core.la_out_storage\[118\],244.12
mgmt_buffers.mprj_logic1\[105\],244.07
_04596_,243.94
net1945,243.8
mgmt_buffers.mprj_logic1\[253\],243.76
net1197,243.75
mgmt_buffers.mprj_logic1\[104\],243.59
mgmt_buffers.la_data_in_enable\[71\],243.51
soc.core.RAM256.Do0_pre\[1\]\[8\],243.48
net1221,243.44
net3734,243.42
soc.core.la_out_storage\[121\],243.41
soc.core.la_oe_storage\[71\],243.33
mgmt_buffers.la_data_out_core\[25\],243.06
_03776_,243.02
net2132,243
_12061_,242.985
soc.core.la_out_storage\[127\],242.83
soc.core.la_out_storage\[102\],242.785
_03747_,242.7
net10698,242.635
_11184_,242.58
_14322_,242.38
_03661_,242.17
_11164_,242.16
mgmt_buffers.mprj_logic1\[71\],242.06
net577,242.06
mgmt_buffers.mprj_logic1\[87\],242.04
_14134_,242
gpio_control_in_1\[2\].user_gpio_in,241.98
soc.core.VexRiscv.IBusCachedPlugin_cache.io_mem_rsp_payload_data\[20\],241.98
net2319,241.93
net2289,241.84
net2038,241.82
mgmt_buffers.la_data_in_core\[56\],241.68
net2321,241.585
_14099_,241.47
net672,241.4
net797,241.4
mgmt_buffers.la_data_out_core\[20\],241.38
_12022_,241.295
net2436,241.2
clknet_5_11_0_mgmt_buffers.caravel_clk,241.2
net10660,241.165
clknet_7_88__leaf_mgmt_buffers.caravel_clk,241.12
net1254,241.1
soc.core.VexRiscv.dBus_cmd_payload_address\[5\],241.02
net2343,241.01
soc.core.spimaster_storage\[9\],240.88
mgmt_buffers.la_data_in_core\[27\],240.76
net1955,240.76
net805,240.66
_13421_,240.56
mgmt_buffers.mprj_logic1\[22\],240.5
net2845,240.48
_03775_,240.44
mprj_io_in_3v3[24],240.32
net910,240.3
clknet_7_95__leaf_mgmt_buffers.caravel_clk,240.3
net3186,240.24
net1052,240.21
net938,240.11
net4914,239.94
net1542,239.865
_05032_,239.7
clknet_7_37__leaf_mgmt_buffers.caravel_clk,239.64
net610,239.58
net637,239.46
_05422_,239.4
net2709,239.35
_04586_,239.34
soc.core.VexRiscv.decode_to_execute_RS2\[18\],239.34
clknet_5_4_0_mgmt_buffers.caravel_clk,239.22
net4417,239.22
mgmt_buffers.la_data_in_enable\[15\],239.16
soc.core.VexRiscv.BranchPlugin_branchExceptionPort_payload_badAddr\[7\],238.92
net12181,238.92
mgmt_buffers.mprj_logic1\[107\],238.77
pll.pll_control.oscbuf\[0\],238.62
net9108,238.6
_03658_,238.52
_08036_,238.5
mgmt_buffers.mprj_logic1\[72\],238.5
soc.core.la_out_storage\[73\],238.43
net1159,238.4
net2322,238.385
net1347,238.34
net2277,238.34
net2181,238.32
net3276,238.21
soc.core.la_oe_storage\[117\],238.18
soc.core.VexRiscv.dBus_cmd_payload_address\[9\],238.1
soc.core.la_oe_storage\[91\],238
_14179_,237.92
net4496,237.76
soc.core.dff2_bus_dat_r\[18\],237.56
net4790,237.5
soc.core.la_out_storage\[116\],237.44
net2409,237.38
_14587_,237.34
clknet_7_123__leaf_mgmt_buffers.caravel_clk,237.32
soc.core.VexRiscv.IBusCachedPlugin_cache.io_mem_rsp_payload_data\[24\],237.29
soc.core.la_out_storage\[126\],237.26
_03756_,237.14
net1999,237.09
net1133,236.995
net1989,236.77
_14044_,236.74
net1232,236.58
net1138,236.54
soc.core.VexRiscv.IBusCachedPlugin_cache.io_cpu_fetch_mmuRsp_physicalAddress\[22\],236.48
_12765_,236.45
net1042,236.45
clknet_7_10__leaf_mgmt_buffers.caravel_clk,236.42
net1144,236.37
net1196,236.33
net803,236.32
net1237,236.205
net1332,236.18
net1988,236.08
mgmt_buffers.la_oenb_core\[27\],236.04
_11170_,235.96
net1141,235.96
net4135,235.955
soc.core.mgmtsoc_vexriscv_i_cmd_payload_wr,235.925
net2106,235.92
net1095,235.8
_03649_,235.73
_11988_,235.5
soc.core.VexRiscv.decode_to_execute_RS1\[31\],235.49
_12030_,235.4
net3603,235.34
clknet_7_90__leaf_mgmt_buffers.caravel_clk,235.3
_14592_,235.26
mgmt_buffers.mprj_logic1\[376\],235.23
net1408,235.125
_10563_,235
soc.core.VexRiscv.externalInterruptArray_regNext\[0\],234.94
soc.core.VexRiscv.CsrPlugin_mip_MEIP,234.71
net1998,234.705
mgmt_buffers.mprj_logic1\[73\],234.7
net1527,234.59
_05987_,234.54
soc.core.la_oe_storage\[64\],234.5
_03808_,234.49
_13754_,234.47
mgmt_buffers.mprj_dat_o_core\[23\],234.46
_12023_,234.32
soc.core.VexRiscv._zz_dBus_cmd_payload_data\[5\],234.32
_10546_,234.3
soc.core.la_out_storage\[100\],234.3
net1943,234.195
mgmt_buffers.la_data_out_core\[68\],234.02
_12489_,233.905
net2050,233.85
_03646_,233.84
mprj_io_in[16],233.83
_10529_,233.82
_03652_,233.76
net6822,233.7
soc.core.VexRiscv.decode_to_execute_RS2\[9\],233.66
mgmt_buffers.la_data_out_core\[24\],233.62
soc.core.la_oe_storage\[78\],233.615
_12637_,233.58
_14591_,233.58
net4685,233.49
soc.core.la_out_storage\[107\],233.47
mgmt_buffers.la_oenb_core\[51\],233.4
_14593_,233.38
net10582,233.38
soc.core.VexRiscv.CsrPlugin_csrMapping_writeDataSignal\[7\],233.355
net1334,233.27
net2242,233.2
net10692,233.15
clknet_leaf_969_mgmt_buffers.caravel_clk,233.02
net2032,232.95
soc.core.VexRiscv.execute_CsrPlugin_csr_835,232.875
net603,232.875
net10147,232.875
_03759_,232.84
_11967_,232.74
_11904_,232.6
_03738_,232.57
mgmt_buffers.mprj_logic1\[359\],232.56
mgmt_buffers.la_data_out_core\[19\],232.42
net2250,232.34
net3472,232.34
mgmt_buffers.la_oenb_core\[20\],232.3
net2441,232.12
_14256_,232.04
soc.core.VexRiscv.IBusCachedPlugin_cache.io_cpu_fetch_mmuRsp_physicalAddress\[23\],232.02
net2234,232.015
mgmt_io_out\[0\],231.91
net1572,231.87
net2329,231.86
mgmt_buffers.mprj_logic1\[213\],231.76
soc.core.RAM256.Do0_pre\[1\]\[6\],231.66
_11932_,231.59
soc.core.la_out_storage\[63\],231.425
soc.core.VexRiscv.dBus_cmd_payload_address\[15\],231.42
net2030,231.335
net2333,231.33
soc.core.mgmtsoc_bus_errors\[13\],231.3
net4421,231.3
net7569,231.1
net1518,231.06
soc.core.dff2_bus_dat_r\[31\],231.04
net3724,231.04
_03803_,231.03
mgmt_buffers.la_data_out_core\[63\],231.02
mgmt_buffers.la_data_out_core\[26\],230.86
clknet_7_113__leaf_mgmt_buffers.caravel_clk,230.84
net4263,230.56
net10136,230.54
net12603,230.54
net2328,230.51
net2846,230.47
net2397,230.415
_03774_,230.32
gpio_control_bidir_1\[0\].mgmt_ena,230.255
_03642_,230.19
mprj_io_in[17],230.13
soc.core.VexRiscv.decode_to_execute_RS1\[6\],230.04
soc.core.la_oe_storage\[81\],230.04
soc.core.la_oe_storage\[59\],229.96
mgmt_buffers.mprj_logic1\[399\],229.76
net2413,229.5
_03890_,229.49
net566,229.44
net630,229.44
net11775,229.42
net9617,229.34
net1413,229.295
clknet_leaf_987_mgmt_buffers.caravel_clk,229.26
soc.core.VexRiscv.execute_CsrPlugin_csr_772,229.14
net1271,229.025
net1318,229.02
_03726_,228.98
soc.core.la_oe_storage\[63\],228.9
_13586_,228.88
mgmt_buffers.mprj_logic1\[397\],228.83
_13997_,228.81
soc.core.VexRiscv.CsrPlugin_selfException_payload_badAddr\[15\],228.72
_12483_,228.68
net737,228.63
_10804_,228.615
mgmt_buffers.mprj_logic1\[110\],228.33
net2149,228.24
soc.core.VexRiscv.dBus_cmd_payload_address\[18\],228.02
_03868_,227.92
_01369_,227.88
net3319,227.875
soc.core.la_ien_storage\[39\],227.835
soc.core.mgmtsoc_master_tx_fifo_source_payload_width\[2\],227.7
net2332,227.68
_11336_,227.6
soc.core.multiregimpl116_regs1,227.56
net836,227.32
soc.core.VexRiscv.IBusCachedPlugin_cache._zz_when_Fetcher_l398\[2\],227.26
net481,227.2
_14077_,227.02
_04601_,227.015
net1186,226.97
net2431,226.97
net2025,226.93
soc.core.la_out_storage\[79\],226.92
net10281,226.895
net2454,226.77
mgmt_buffers.mprj_logic1\[208\],226.64
clknet_7_126__leaf_mgmt_buffers.caravel_clk,226.6
net2379,226.56
mgmt_buffers.la_oenb_core\[22\],226.48
soc.core.la_oe_storage\[92\],226.475
_11908_,226.42
net12228,226.38
soc.core.VexRiscv.BranchPlugin_branchExceptionPort_payload_badAddr\[23\],226.3
_03843_,226.22
clknet_7_108__leaf_mgmt_buffers.caravel_clk,226.22
mgmt_buffers.mprj_logic1\[108\],226.12
mgmt_buffers.la_data_in_core\[50\],226.06
soc.core.la_out_storage\[110\],225.96
gpio_control_in_1a\[4\].user_gpio_in,225.84
net3648,225.835
net635,225.8
soc.core.multiregimpl124_regs1,225.78
soc.core.VexRiscv._zz_CsrPlugin_csrMapping_readDataInit\[3\],225.72
mgmt_buffers.la_data_out_core\[67\],225.7
soc.core.VexRiscv.decode_to_execute_RS1\[30\],225.635
net1991,225.52
net2053,225.49
net1231,225.25
clknet_7_125__leaf_mgmt_buffers.caravel_clk,225.24
mgmt_buffers.la_oenb_core\[25\],225.16
soc.core.VexRiscv.CsrPlugin_selfException_valid,225.16
_11178_,225.12
mgmt_buffers.la_oenb_core\[45\],225.035
net514,225.015
net1374,224.99
net606,224.64
soc.core.VexRiscv.BranchPlugin_branchExceptionPort_payload_badAddr\[2\],224.53
net2387,224.5
net1941,224.44
net1143,224.41
net4494,224.36
_14211_,224.26
_03771_,224.18
_03704_,224.16
_04303_,224.12
_12542_,223.92
soc.core.VexRiscv.execute_CsrPlugin_csr_768,223.9
net2778,223.9
net1558,223.83
net589,223.82
net12172,223.72
net470,223.715
soc.core.la_oe_storage\[48\],223.66
net4828,223.64
soc.core.VexRiscv.IBusCachedPlugin_cache.io_cpu_fetch_mmuRsp_physicalAddress\[6\],223.52
_12009_,223.46
net10898,223.37
_10390_,223.335
net1923,223.335
net11822,223.32
net12602,223.26
soc.core.VexRiscv.decode_to_execute_RS1\[20\],223.24
_04664_,223.2
net2246,223.16
soc.core.la_out_storage\[69\],222.98
net9455,222.96
soc.core.la_out_storage\[115\],222.8
_03695_,222.74
net4126,222.74
net3829,222.7
net3036,222.64
net2377,222.615
_11258_,222.58
_11150_,222.52
net857,222.42
_11337_,222.325
net2173,222.3
_11250_,222.24
net634,222.24
net1513,222.2
_03698_,222.19
_11246_,222.1
soc.core.VexRiscv._zz_dBus_cmd_payload_data\[1\],221.9
_04662_,221.82
net1167,221.58
net10276,221.575
net10754,221.495
clknet_7_109__leaf_mgmt_buffers.caravel_clk,221.46
soc.core.VexRiscv.decode_to_execute_RS1\[3\],221.45
net2231,221.32
mgmt_buffers.mprj_logic1\[90\],221.275
net2390,221.265
soc.core.VexRiscv.decode_to_execute_RS1\[23\],221.24
_14108_,221.2
net1239,221.2
net953,221.14
_03870_,220.99
net3780,220.98
net952,220.69
_12484_,220.68
mprj_io_in[21],220.65
_11974_,220.64
net1877,220.62
_00390_,220.56
net752,220.52
_03708_,220.46
net11806,220.42
_03673_,220.35
_11183_,220.3
_05005_,220.28
soc.core.dbg_uart_address\[9\],220.19
soc.core.la_out_storage\[82\],220.05
net854,220.035
soc.core.VexRiscv.IBusCachedPlugin_cache.io_cpu_fetch_mmuRsp_physicalAddress\[11\],220
net2366,219.92
pll_clk,219.91
net11770,219.9
net1345,219.77
_12898_,219.68
_10562_,219.6
net2384,219.54
_11516_,219.46
soc.core.VexRiscv.decode_to_execute_SRC_LESS_UNSIGNED,219.355
_11889_,219.28
net3952,219.28
_12568_,219.105
pll.ireset,219.1
soc.core.la_ien_storage\[60\],219.06
net1902,218.9
net4248,218.86
net633,218.72
soc.core.la_oe_storage\[76\],218.615
net2455,218.56
soc.core.la_oe_storage\[85\],218.54
soc.core.VexRiscv._zz_execute_SRC2\[9\],218.26
soc.core.VexRiscv.decode_to_execute_RS2\[17\],218.24
net2206,218.24
net10464,218.14
soc.core.spi_master_control_storage\[9\],218.09
_12020_,217.84
soc.core.la_oe_storage\[106\],217.81
soc.core.la_out_storage\[78\],217.81
net3249,217.56
net11838,217.46
_03796_,217.4
clknet_leaf_1031_mgmt_buffers.caravel_clk,217.36
net2315,217.285
soc.core.la_ien_storage\[2\],217.26
soc.core.VexRiscv.BranchPlugin_branchExceptionPort_payload_badAddr\[6\],217.08
net427,217.02
net3050,217.02
clknet_7_111__leaf_mgmt_buffers.caravel_clk,216.98
soc.core.VexRiscv._zz_execute_SRC2\[7\],216.96
soc.core.VexRiscv.IBusCachedPlugin_cache.io_cpu_decode_data\[29\],216.955
soc.core.VexRiscv.dBus_cmd_payload_address\[7\],216.82
soc.core.mgmtsoc_litespimmap_burst_adr\[2\],216.81
net13029,216.73
soc.core.VexRiscv._zz_execute_SRC2\[2\],216.64
soc.core.VexRiscv.dBus_cmd_payload_address\[19\],216.62
_12058_,216.555
_03791_,216.55
net1889,216.55
_11200_,216.46
soc.core.la_ien_storage\[6\],216.39
_10769_,216.37
soc.core.VexRiscv._zz_execute_SRC2\[8\],216.15
net2316,216.08
soc.core.la_ien_storage\[8\],216.02
clknet_7_31__leaf_mgmt_buffers.caravel_clk,216
soc.core.VexRiscv.decode_to_execute_RS1\[16\],215.9
net12604,215.9
net11839,215.895
net4397,215.88
_00028_,215.86
soc.core.VexRiscv.dBus_cmd_payload_address\[24\],215.58
soc.core.la_oe_storage\[109\],215.54
soc.core.la_oe_storage\[74\],215.51
net9201,215.26
soc.core.VexRiscv.BranchPlugin_branchExceptionPort_payload_badAddr\[27\],215.24
mgmt_buffers.mprj_logic1\[217\],215.08
soc.core.VexRiscv.decode_to_execute_RS1\[19\],214.99
net723,214.93
_04653_,214.9
soc.core.la_oe_storage\[53\],214.86
net9730,214.86
clknet_7_76__leaf_mgmt_buffers.caravel_clk,214.83
net3279,214.82
net1242,214.77
soc.core.multiregimpl125_regs1,214.72
net1108,214.66
soc.core.serial_tx,214.61
_03885_,214.53
mgmt_buffers.la_data_in_enable\[14\],214.51
soc.core.la_out_storage\[111\],214.47
soc.core.VexRiscv.decode_to_execute_RS1\[9\],214.42
gpio_control_in_2\[0\].user_gpio_in,214.32
net7076,214.26
soc.core.dff2_bus_dat_r\[22\],214.18
_14132_,214.16
soc.core.spimaster_storage\[15\],214.08
_10870_,214.07
_00003_,214.02
net11986,213.96
net620,213.935
soc.core.la_out_storage\[89\],213.86
_03838_,213.76
clknet_leaf_1125_mgmt_buffers.caravel_clk,213.76
mgmt_buffers.la_data_out_core\[62\],213.62
soc.core.RAM256.Do0_pre\[1\]\[24\],213.54
net2340,213.49
mgmt_buffers.mprj_logic1\[374\],213.48
_03731_,213.44
net3983,213.44
net9956,213.44
soc.core.multiregimpl4_regs1,213.38
_11870_,213.36
_03762_,213.34
net632,213.3
gpio_control_bidir_1\[0\].gpio_defaults\[0\],213.19
_11315_,213.14
soc.core.la_ien_storage\[58\],213.04
_14142_,212.885
gpio_control_in_2\[5\].user_gpio_in,212.85
net11923,212.825
_11722_,212.74
soc.core.VexRiscv.dBus_cmd_payload_address\[25\],212.72
soc.core.VexRiscv.CsrPlugin_selfException_payload_badAddr\[17\],212.665
mgmt_buffers.la_data_in_enable\[60\],212.66
net1336,212.66
net2125,212.66
net527,212.62
net10211,212.615
net12019,212.6
net3554,212.54
net2784,212.52
net962,212.415
net1990,212.38
net2229,212.225
_13158_,212.07
net11812,212.04
net3774,211.98
soc.core.VexRiscv._zz_lastStageRegFileWrite_payload_address\[12\],211.96
_05055_,211.94
mprj_io_in[19],211.85
net1280,211.75
_14031_,211.72
net1410,211.675
soc.core.VexRiscv.CsrPlugin_mstatus_MIE,211.49
net1165,211.46
net526,211.335
net888,211.33
_03679_,211.28
soc.core.multiregimpl117_regs1,211.26
_00395_,211.1
net4009,211.02
net3795,211.01
net10216,211
soc.core.VexRiscv.BranchPlugin_branchExceptionPort_payload_badAddr\[30\],210.96
soc.core.la_out_storage\[108\],210.94
_04587_,210.82
net1301,210.8
_10423_,210.78
gpio_control_in_1a\[0\].mgmt_ena,210.78
soc.core.VexRiscv.CsrPlugin_csrMapping_writeDataSignal\[31\],210.775
soc.core.VexRiscv.decode_to_execute_RS2\[30\],210.67
_12215_,210.66
_03568_,210.64
soc.core.la_out_storage\[65\],210.56
net691,210.46
_03827_,210.385
soc.core.multiregimpl130_regs1,210.28
rstb_h,210.24
mgmt_buffers.la_data_in_enable\[65\],210.2
_14883_,210.12
soc.core.VexRiscv._zz_when_DebugPlugin_l244,210.12
soc.core.mgmtsoc_litespimmap_burst_adr\[10\],210.12
net4261,209.98
soc.core.VexRiscv.dBus_cmd_payload_address\[31\],209.86
clknet_leaf_1132_mgmt_buffers.caravel_clk,209.86
_03833_,209.84
net11985,209.8
soc.core.VexRiscv.IBusCachedPlugin_cache.io_cpu_decode_data\[2\],209.795
soc.core.VexRiscv.decode_to_execute_RS2\[27\],209.74
soc.core.la_ien_storage\[1\],209.74
net11811,209.74
soc.core.la_oe_storage\[90\],209.72
net8137,209.7
soc.core.VexRiscv.decode_to_execute_RS2\[16\],209.66
soc.core.la_ien_storage\[16\],209.66
soc.core.gpio_ien_storage,209.58
net4597,209.58
_14187_,209.52
soc.core.la_ien_storage\[3\],209.52
net10628,209.505
net988,209.43
_14112_,209.42
net1948,209.39
soc.core.la_ien_storage\[27\],209.32
net452,209.3
net1931,209.29
net821,209.24
net1230,209.24
_04646_,209.08
soc.core.la_out_storage\[59\],208.94
_14088_,208.82
gpio_control_in_2\[1\].user_gpio_in,208.71
net11500,208.66
mgmt_buffers.mprj_logic1\[92\],208.62
net5537,208.58
soc.core.la_out_storage\[70\],208.41
net12611,208.4
pll_clk90,208.35
_13584_,208.28
_02770_,208.26
mgmt_buffers.la_data_out_core\[57\],208.24
_04592_,208.18
_03644_,208.07
gpio_control_in_2\[5\].gpio_logic1,207.96
soc.core.la_oe_storage\[86\],207.945
_11148_,207.94
soc.core.dbg_uart_tx_data_uartwishbonebridge_rs232phytx_next_value_ce2,207.815
soc.core.la_oe_storage\[69\],207.75
clknet_7_94__leaf_mgmt_buffers.caravel_clk,207.735
net585,207.7
net2374,207.7
clknet_7_60__leaf_mgmt_buffers.caravel_clk,207.62
mprj_io_in[24],207.55
soc.core.spimaster_storage\[11\],207.495
net1320,207.48
net1543,207.45
net719,207.44
_13758_,207.34
net2047,207.245
net1571,207.18
net2045,207.16
net4243,207.09
net11801,207.06
_12473_,207.025
soc.core.VexRiscv.IBusCachedPlugin_cache._zz_when_Fetcher_l398\[1\],206.98
clknet_5_7_0_mgmt_buffers.caravel_clk,206.98
_04631_,206.84
_03655_,206.83
_11893_,206.74
soc.core.VexRiscv.CsrPlugin_csrMapping_writeDataSignal\[11\],206.74
net2348,206.67
net2233,206.63
soc.core.la_ien_storage\[5\],206.6
net415,206.56
_00011_,206.46
clknet_2_0_0_mgmt_buffers.caravel_clk,206.4
net9818,206.38
_13786_,206.09
_03878_,206.06
_03875_,206.05
soc.core.multiregimpl123_regs1,205.78
_04606_,205.74
soc.core.VexRiscv._zz_execute_SRC2\[6\],205.74
soc.core.uart_tx_fifo_level0\[1\],205.635
net11816,205.32
mgmt_buffers.la_data_out_core\[17\],205.24
soc.core.VexRiscv.DBusSimplePlugin_memoryExceptionPort_valid,205.22
clknet_leaf_667_mgmt_buffers.caravel_clk,205.08
mgmt_buffers.la_data_in_core\[45\],205.06
soc.core.VexRiscv.IBusCachedPlugin_cache.io_cpu_fetch_mmuRsp_physicalAddress\[24\],205
soc.core.serial_rx,204.97
net2101,204.965
_14601_,204.92
mgmt_buffers.la_data_out_core\[52\],204.9
soc.core.spi_master_miso\[3\],204.88
soc.core.la_ien_storage\[14\],204.815
net1235,204.72
net2751,204.6
_10835_,204.58
mgmt_buffers.mprj_logic1\[0\],204.55
mgmt_buffers.la_data_in_enable\[68\],204.54
_03750_,204.52
_11864_,204.41
mgmt_buffers.la_data_in_enable\[64\],204.36
_04658_,204.28
soc.core.multiregimpl121_regs1,204.28
mgmt_buffers.la_oenb_core\[49\],204.24
mgmt_buffers.mprj_logic1\[373\],204.06
_03533_,204
mgmt_buffers.la_data_in_enable\[67\],203.97
net2004,203.96
mgmt_buffers.mprj_logic1\[243\],203.92
mgmt_buffers.la_data_in_enable\[9\],203.86
mgmt_buffers.la_data_out_core\[54\],203.86
soc.core.mgmtsoc_bus_errors\[20\],203.78
net13026,203.7
soc.core.dff2_bus_dat_r\[27\],203.68
net10413,203.575
clknet_7_0__leaf_mgmt_buffers.caravel_clk,203.52
soc.core.VexRiscv.IBusCachedPlugin_cache.io_cpu_fetch_mmuRsp_physicalAddress\[7\],203.5
gpio_control_bidir_1\[1\].mgmt_ena,203.395
net2408,203.36
net4594,203.33
soc.core.VexRiscv.IBusCachedPlugin_cache.io_cpu_fetch_mmuRsp_physicalAddress\[27\],203.3
net922,203.27
soc.core.VexRiscv.BranchPlugin_branchExceptionPort_payload_badAddr\[29\],203.24
net2330,203.225
net2113,203.22
_03563_,203.18
_11998_,202.83
mgmt_buffers.la_data_in_enable\[63\],202.83
mprj_io_in_3v3[6],202.79
_13862_,202.77
_11190_,202.715
net863,202.54
net8172,202.44
soc.core.interface10_bank_bus_dat_r\[19\],202.36
net1187,202.34
_13980_,202.16
soc.core.VexRiscv.IBusCachedPlugin_cache._zz_banks_0_port1\[24\],202.06
_03858_,202.01
_12017_,201.86
net1097,201.86
soc.core.VexRiscv.IBusCachedPlugin_cache.io_cpu_fetch_mmuRsp_physicalAddress\[19\],201.845
_12486_,201.68
net4323,201.615
net506,201.58
net2707,201.52
soc.core.VexRiscv.IBusCachedPlugin_cache.io_cpu_fetch_mmuRsp_physicalAddress\[17\],201.39
clknet_5_6_0_mgmt_buffers.caravel_clk,201.3
net2094,201.24
soc.core.RAM256.Do0_pre\[1\]\[25\],201.22
net2279,201.18
net2240,201.11
mgmt_buffers.la_data_in_enable\[20\],201.03
soc.core.VexRiscv.externalInterruptArray_regNext\[2\],201.02
net901,201.02
_05026_,201.005
soc.core.VexRiscv.decode_to_execute_RS1\[25\],201
gpio_control_in_1a\[0\].gpio_logic1,200.96
_03863_,200.84
soc.core.la_oe_storage\[67\],200.83
net529,200.76
_13974_,200.68
_11177_,200.58
net2987,200.48
_04611_,200.42
net10346,200.275
net10401,200.135
soc.core.la_out_storage\[53\],200.12
mprj_io_in_3v3[5],200.02
soc.core.multiregimpl122_regs1,199.94
_04671_,199.92
_14054_,199.9
net3557,199.805
_08233_,199.745
mgmt_buffers.la_data_in_core\[30\],199.7
soc.core.VexRiscv.CsrPlugin_mepc\[19\],199.67
net2829,199.66
net2337,199.58
mprj_io_in[22],199.55
_11260_,199.44
soc.core.la_oe_storage\[88\],199.43
_11990_,199.42
net2372,199.26
mgmt_buffers.la_data_out_core\[30\],199.04
net2433,198.94
_12536_,198.92
_08146_,198.84
gpio_control_in_2\[4\].user_gpio_in,198.8
net4696,198.68
soc.core.VexRiscv._zz_CsrPlugin_csrMapping_readDataInit\[2\],198.64
mgmt_buffers.mprj_logic1\[86\],198.62
_01375_,198.6
soc.core.mgmtsoc_master_tx_fifo_source_payload_width\[1\],198.6
mgmt_buffers.la_data_out_core\[50\],198.58
_11991_,198.54
soc.core.VexRiscv._zz_RegFilePlugin_regFile_port0\[10\],198.48
soc.core.VexRiscv._zz_execute_SRC2\[5\],198.475
_03716_,198.26
_04691_,198.16
mgmt_buffers.la_data_in_core\[47\],198.14
soc.core.multiregimpl105_regs1,198.14
user_io_out\[24\],198.13
net6032,198.12
net10120,198.02
_12490_,197.94
net695,197.89
net609,197.8
net11797,197.8
clknet_5_5_0_mgmt_buffers.caravel_clk,197.66
soc.core.VexRiscv.RegFilePlugin_regFile\[25\]\[2\],197.6
net3011,197.56
net2393,197.55
soc.core.RAM256.Do0_pre\[1\]\[7\],197.44
_11863_,197.43
mprj_io_in[12],197.41
soc.core.VexRiscv._zz_RegFilePlugin_regFile_port1\[29\],197.38
soc.core.la_out_storage\[91\],197.33
_03888_,197.31
soc.core.la_ien_storage\[47\],197.27
soc.core.VexRiscv.decode_to_execute_RS1\[17\],197.26
net2314,197.2
_14219_,197.16
soc.core.multiregimpl126_regs1,197.04
_00026_,196.94
soc.core.VexRiscv.IBusCachedPlugin_cache.io_cpu_fetch_mmuRsp_physicalAddress\[15\],196.8
_03829_,196.64
soc.core.la_out_storage\[117\],196.64
soc.core.la_oe_storage\[72\],196.56
_11619_,196.445
soc.core.VexRiscv.decode_to_execute_RS1\[12\],196.42
user_io_oeb\[3\],196.37
clknet_leaf_486_mgmt_buffers.caravel_clk,196.34
_11879_,196.31
soc.core.VexRiscv.decode_to_execute_MEMORY_ENABLE,196.28
net12241,196.23
_03753_,196.22
clknet_leaf_381_mgmt_buffers.caravel_clk,196.04
_00022_,195.94
net2352,195.81
net2265,195.775
_03883_,195.64
mprj_io_in_3v3[9],195.62
_13424_,195.57
net3562,195.52
net763,195.46
soc.core.VexRiscv.dBus_cmd_payload_address\[6\],195.4
soc.core.VexRiscv.IBusCachedPlugin_cache.io_cpu_fetch_mmuRsp_physicalAddress\[10\],195.39
gpio_control_bidir_2\[1\].gpio_outenb,195.38
clknet_leaf_561_mgmt_buffers.caravel_clk,195.36
soc.core.spimaster_storage\[0\],195.32
net4102,195.32
net10030,195.32
soc.core.la_out_storage\[112\],195.26
soc.core.VexRiscv.externalInterruptArray_regNext\[5\],195.2
net9847,195.12
soc.core.VexRiscv._zz_lastStageRegFileWrite_payload_address\[28\],195.11
soc.core.la_oe_storage\[82\],194.97
soc.core.VexRiscv.dBus_cmd_halfPipe_payload_address\[1\],194.95
mgmt_buffers.la_data_out_core\[55\],194.82
net799,194.76
net2885,194.72
_03055_,194.7
soc.core.la_oe_storage\[93\],194.64
_10565_,194.56
net1899,194.56
net774,194.535
net1924,194.525
_12108_,194.5
mgmt_buffers.la_oenb_core\[46\],194.44
net10361,194.415
_11242_,194.36
_12028_,194.36
net10368,194.34
mgmt_buffers.la_data_out_core\[58\],194.3
gpio_control_in_2\[4\].resetn,194.27
soc.core.la_out_storage\[24\],194.26
net1997,194.26
mprj_io_in_3v3[12],194.19
_10776_,194.185
gpio_control_in_2\[2\].user_gpio_in,194.06
net3948,194.06
_11203_,193.98
_00084_,193.96
_10391_,193.94
soc.core.VexRiscv._zz_RegFilePlugin_regFile_port0\[3\],193.94
soc.core.multiregimpl129_regs1,193.94
soc.core.litespiphy_state\[1\],193.8
_03934_,193.7
soc.core.VexRiscv.IBusCachedPlugin_cache._zz_when_Fetcher_l398\[0\],193.66
net893,193.61
soc.core.la_out_storage\[74\],193.55
net2346,193.54
soc.core.VexRiscv.IBusCachedPlugin_cache.io_cpu_decode_data\[27\],193.515
_03873_,193.48
gpio_control_in_2\[1\].gpio_logic1,193.4
net1412,193.4
soc.core.la_ien_storage\[4\],193.3
soc.core.VexRiscv.BranchPlugin_branchExceptionPort_payload_badAddr\[3\],193.29
net755,193.265
gpio_control_in_2\[3\].user_gpio_in,193.17
mgmt_buffers.la_data_out_core\[21\],193.14
net11785,193.02
_03744_,192.96
_04626_,192.94
_04676_,192.94
_03045_,192.9
_03656_,192.89
soc.core.la_ien_storage\[43\],192.85
net4480,192.85
_04681_,192.84
mprj_io_in_3v3[13],192.82
soc.core.VexRiscv.DBusSimplePlugin_memoryExceptionPort_payload_badAddr\[17\],192.8
clknet_leaf_548_mgmt_buffers.caravel_clk,192.72
mprj_io_dm[39],192.67
_10556_,192.66
_11251_,192.62
_03667_,192.55
_14209_,192.55
soc.core.VexRiscv.dBus_cmd_payload_address\[20\],192.48
_11964_,192.47
net4027,192.46
net11857,192.42
mprj_io_in_3v3[8],192.41
net8959,192.24
_13182_,192.02
_04849_,192
net2298,192
net3587,191.98
mgmt_buffers.mprj_logic1\[339\],191.9
net528,191.9
net2076,191.9
soc.core.VexRiscv.BranchPlugin_branchExceptionPort_payload_badAddr\[5\],191.85
net12605,191.84
mprj_io_in[9],191.83
_11886_,191.74
net4811,191.66
_12070_,191.64
soc.core.VexRiscv.IBusCachedPlugin_cache.io_cpu_fetch_mmuRsp_physicalAddress\[25\],191.62
net12633,191.38
_14175_,191.32
_14838_,191.3
_04654_,191.22
mgmt_buffers.la_data_in_core\[38\],191.11
soc.core.interface6_bank_bus_dat_r\[29\],191.11
_13973_,191.06
_11151_,191.05
net9444,190.98
gpio_control_bidir_2\[1\].mgmt_ena,190.84
net3118,190.75
net7504,190.74
soc.core.la_out_storage\[68\],190.7
net2386,190.635
net1309,190.615
net8610,190.58
gpio_mode0_core,190.3
net2832,190.28
net4292,190.24
net3222,190.155
clknet_leaf_1006_mgmt_buffers.caravel_clk,190.1
net12621,190.08
net1375,190.06
net7372,190.06
net11990,190.04
net2096,189.84
_04829_,189.82
net3776,189.82
_00220_,189.8
net3748,189.79
net12613,189.78
soc.core.la_ien_storage\[54\],189.62
soc.core.mgmtsoc_bus_errors\[6\],189.58
clknet_leaf_1111_mgmt_buffers.caravel_clk,189.52
net12635,189.5
user_gpio_noesd[17],189.25
mgmt_buffers.la_data_out_core\[56\],189.24
net2339,189.215
net1407,189.195
net410,189.18
net2347,189.165
soc.core.mgmtsoc_bus_errors\[10\],189.16
net1512,189.115
_04727_,189.1
mgmt_buffers.mprj_logic1\[242\],189.05
mgmt_buffers.la_data_in_enable\[51\],188.92
gpio_control_in_2\[0\].gpio_logic1,188.88
mgmt_buffers.la_data_in_core\[26\],188.86
net406,188.82
clknet_7_61__leaf_mgmt_buffers.caravel_clk,188.8
net4452,188.66
_04686_,188.58
_03710_,188.52
_01374_,188.48
net10079,188.46
mprj_io_in_3v3[7],188.44
gpio_control_in_1\[5\].user_gpio_in,188.39
clknet_7_70__leaf_mgmt_buffers.caravel_clk,188.38
soc.core.multiregimpl115_regs1,188.36
mprj_io_in_3v3[11],188.34
mprj_io_in[26],188.29
_14009_,187.905
_14253_,187.9
soc.core.VexRiscv.IBusCachedPlugin_cache.io_cpu_fetch_mmuRsp_physicalAddress\[2\],187.9
net9861,187.9
_14002_,187.8
_04641_,187.76
net12598,187.7
net485,187.64
_04683_,187.42
mgmt_buffers.la_data_out_core\[31\],187.38
_11243_,187.36
_14804_,187.34
net11864,187.24
soc.core.VexRiscv.CsrPlugin_mtval\[3\],187.2
net2010,187.14
net918,187.135
net4508,187.08
net2440,186.96
_14669_,186.7
net687,186.635
soc.core.spi_master_clk_divider1\[13\],186.63
soc.core.VexRiscv.dBusWishbone_DAT_MISO\[0\],186.62
clknet_7_80__leaf_mgmt_buffers.caravel_clk,186.6
gpio_control_in_2\[3\].gpio_logic1,186.54
soc.core.spi_master_control_re,186.515
net1313,186.46
_03910_,186.44
soc.core.VexRiscv.BranchPlugin_branchExceptionPort_payload_badAddr\[26\],186.415
_14028_,186.32
soc.core.VexRiscv.execute_arbitration_haltByOther,186.26
net856,186.2
_04678_,186.18
user_gpio_analog[17],186.18
_14800_,186.12
_03905_,186.08
net660,186.08
net1269,185.94
net4247,185.82
mgmt_buffers.la_oenb_core\[41\],185.7
_12356_,185.62
net2694,185.59
mprj_io_in_3v3[10],185.585
soc.core.VexRiscv._zz_RegFilePlugin_regFile_port0\[24\],185.58
clknet_5_13_0_mgmt_buffers.caravel_clk,185.58
net1157,185.42
net2215,185.42
soc.core.multiregimpl111_regs1,185.38
net2886,185.235
soc.core.interface6_bank_bus_dat_r\[4\],185.22
soc.core.VexRiscv.CsrPlugin_mepc\[25\],185.18
net10085,185.08
net3335,185.06
soc.core.gpioin4_gpioin4_irq,185.02
net4003,185.02
net12218,185
_00080_,184.98
net12086,184.98
net3728,184.72
_14024_,184.7
_05050_,184.66
soc.core.mgmtsoc_reload_storage\[22\],184.58
mprj_io_in[15],184.41
net1875,184.365
soc.core.VexRiscv.CsrPlugin_mepc\[31\],184.32
gpio_control_in_2\[7\].serial_load,184.2
_05069_,184.135
clknet_7_59__leaf_mgmt_buffers.caravel_clk,184.06
net3688,183.98
_11970_,183.86
_11969_,183.78
net1983,183.78
net715,183.77
mgmt_buffers.la_data_in_enable\[61\],183.68
net5483,183.66
_02345_,183.58
net1312,183.565
mgmt_buffers.mprj_logic1\[378\],183.56
net3850,183.52
mgmt_buffers.la_data_out_core\[47\],183.32
soc.core.multiregimpl119_regs1,183.32
net9981,183.22
_14708_,183.18
net12634,183.18
_04544_,183.08
net2355,182.995
_12547_,182.92
soc.core.VexRiscv.IBusCachedPlugin_cache.io_cpu_fetch_mmuRsp_physicalAddress\[9\],182.885
net4801,182.88
net10156,182.88
_11418_,182.86
_11182_,182.84
mgmt_buffers.mprj_logic1\[96\],182.76
_10644_,182.755
soc.core.VexRiscv.CsrPlugin_csrMapping_writeDataSignal\[30\],182.695
net11984,182.66
_04808_,182.56
_04688_,182.54
mgmt_buffers.la_data_in_enable\[59\],182.54
_00321_,182.52
gpio_control_in_2\[2\].gpio_logic1,182.48
_10542_,182.46
_12517_,182.42
clknet_leaf_61_mgmt_buffers.caravel_clk,182.35
net612,182.2
soc.core.multiregimpl101_regs1,182.08
_11866_,182.04
soc.core.la_oe_storage\[77\],182.03
net4228,181.96
_11533_,181.76
clknet_7_116__leaf_mgmt_buffers.caravel_clk,181.755
soc.core.VexRiscv.CsrPlugin_mepc\[28\],181.68
_10796_,181.67
soc.core.multiregimpl104_regs1,181.64
net10779,181.54
pll.clockp_buffer_in\[0\],181.38
mgmt_buffers.mprj_logic1\[95\],181.26
net9965,181.24
_14817_,181.23
_04668_,181.2
soc.core.multiregimpl110_regs1,181.18
soc.core.interface6_bank_bus_dat_r\[21\],181.1
_11556_,181.08
net1557,181.02
soc.core.la_out_storage\[71\],180.98
_04992_,180.97
soc.core.la_ien_storage\[61\],180.96
net4446,180.95
mgmt_buffers.mprj_logic1\[98\],180.92
net6832,180.92
net11999,180.92
net2006,180.75
net10526,180.68
_00031_,180.62
soc.core.la_ien_storage\[36\],180.62
net2385,180.61
soc.core.interface9_bank_bus_dat_r\[15\],180.6
soc.core.mgmtsoc_vexriscv_i_cmd_payload_data\[1\],180.52
net3994,180.52
soc.core.VexRiscv.IBusCachedPlugin_cache.io_cpu_decode_data\[6\],180.46
user_io_out\[13\],180.43
_01382_,180.3
por_l,180.28
net1888,180.23
_01381_,180.2
_03674_,180.11
_14560_,180.06
_10400_,179.96
soc.core.interface6_bank_bus_dat_r\[7\],179.96
soc.core.VexRiscv.CsrPlugin_mtval\[9\],179.86
net9422,179.78
net11795,179.74
net2782,179.71
net429,179.65
net1285,179.63
net7506,179.6
net9862,179.6
_03573_,179.54
net701,179.54
_12476_,179.52
clknet_leaf_963_mgmt_buffers.caravel_clk,179.49
gpio_control_in_2\[4\].gpio_logic1,179.4
_10399_,179.3
_12680_,179.3
_00362_,179.26
soc.core.interface10_bank_bus_dat_r\[18\],179.19
soc.core.mgmtsoc_vexriscv_i_cmd_payload_data\[3\],179.18
net1206,179.18
soc.core.la_oe_storage\[75\],179.16
soc.core.VexRiscv._zz_execute_BRANCH_CTRL\[1\],179.08
soc.core.multiregimpl10_regs1,179.08
soc.core.interface10_bank_bus_dat_r\[17\],179.06
net11818,178.96
net4484,178.955
_10669_,178.86
net10104,178.855
mprj_io_in[14],178.85
net3179,178.82
_11239_,178.78
clknet_leaf_533_mgmt_buffers.caravel_clk,178.65
_11320_,178.54
net935,178.47
soc.core.VexRiscv.decode_to_execute_RS2\[24\],178.42
_03932_,178.4
net5043,178.4
_10388_,178.38
net4433,178.355
soc.core.VexRiscv.BranchPlugin_branchExceptionPort_payload_badAddr\[8\],178.3
_00394_,178.18
net1188,178.09
_04673_,178.06
soc.core.VexRiscv.execute_to_memory_INSTRUCTION\[5\],178.06
net700,178.05
net3465,178
_05041_,177.98
net536,177.91
soc.core.dff2_bus_dat_r\[17\],177.9
net2735,177.815
gpio_control_in_2\[7\].user_gpio_in,177.75
pll.pll_control.tint\[0\],177.725
_00006_,177.68
soc.core.multiregimpl114_regs1,177.62
clknet_leaf_1041_mgmt_buffers.caravel_clk,177.58
_14035_,177.54
soc.core.multiregimpl102_regs1,177.52
_13718_,177.46
_12228_,177.45
net12988,177.44
_05504_,177.34
soc.core.multiregimpl103_regs1,177.34
_12231_,177.32
soc.core.interface10_bank_bus_dat_r\[20\],177.3
net2896,177.285
net3996,177.28
net3294,177.26
net3223,177.215
mgmt_buffers.la_data_in_enable\[62\],177.2
net3205,177.145
net12612,177.14
soc.core.VexRiscv.dBus_cmd_payload_address\[26\],177.02
soc.core.la_oe_storage\[80\],176.89
soc.core.memdat_3\[1\],176.86
net10293,176.755
net599,176.72
net2887,176.72
net11787,176.7
net10236,176.655
soc.core.mgmtsoc_scratch_storage\[17\],176.58
_14198_,176.55
net5452,176.515
net3204,176.48
_04232_,176.3
clknet_7_117__leaf_mgmt_buffers.caravel_clk,176.3
net1202,176.15
_04608_,176.1
_00081_,176
soc.core.VexRiscv.RegFilePlugin_regFile\[25\]\[1\],176
mprj_io_in[23],175.97
_11220_,175.9
_03662_,175.82
net412,175.82
clknet_leaf_848_mgmt_buffers.caravel_clk,175.82
soc.core.multiregimpl95_regs1,175.76
net11922,175.72
mprj_io_in[4],175.61
soc.core.VexRiscv.CsrPlugin_mepc\[22\],175.55
soc.core.mgmtsoc_irq,175.48
net4339,175.48
_03936_,175.44
clknet_leaf_104_mgmt_buffers.caravel_clk,175.4
net3585,175.38
soc.core.VexRiscv.decode_to_execute_RS2\[22\],175.32
mprj_io_in[25],175.31
net2388,175.3
_04636_,175.28
net2048,175.26
_00418_,175.22
mgmt_buffers.la_data_in_enable\[16\],175.16
net9659,175.1
net1898,175.05
soc.core.VexRiscv.decode_to_execute_RS2\[26\],175.02
_14013_,174.94
gpio_mode1_core,174.94
_11075_,174.895
gpio_control_bidir_1\[0\].gpio_defaults\[1\],174.79
soc.core.VexRiscv.dBus_cmd_halfPipe_payload_address\[0\],174.79
net1966,174.68
mgmt_buffers.la_oenb_core\[30\],174.62
_12082_,174.6
net11884,174.56
net2437,174.535
soc.core.VexRiscv.dBus_cmd_payload_address\[22\],174.5
soc.core.VexRiscv.IBusCachedPlugin_cache.io_cpu_fetch_mmuRsp_physicalAddress\[21\],174.46
net1303,174.445
net11870,174.42
_00004_,174.36
net689,174.325
net11919,174.32
soc.core.mgmtsoc_vexriscv_i_cmd_payload_data\[6\],174.215
_02687_,174.04
mgmt_buffers.la_oenb_core\[39\],174
clknet_leaf_651_mgmt_buffers.caravel_clk,173.935
mgmt_buffers.mprj_logic1\[101\],173.905
_10748_,173.84
mgmt_buffers.mprj_logic1\[25\],173.76
soc.core.VexRiscv.dBus_cmd_payload_address\[28\],173.76
net12364,173.7
mgmt_buffers.la_data_in_core\[32\],173.68
clknet_leaf_372_mgmt_buffers.caravel_clk,173.68
net2768,173.62
net713,173.59
net1161,173.56
_14882_,173.46
net3886,173.38
_10458_,173.28
soc.core.spimaster_storage\[12\],173.22
net1556,173.19
net1942,173.12
soc.core.VexRiscv.dBusWishbone_DAT_MISO\[26\],172.98
_11995_,172.96
net810,172.94
_11280_,172.9
mgmt_buffers.la_data_in_core\[33\],172.88
net3317,172.86
net4553,172.84
clknet_7_52__leaf_mgmt_buffers.caravel_clk,172.82
net789,172.765
_03548_,172.74
net4117,172.7
net4122,172.59
net6528,172.54
_03880_,172.53
net12620,172.46
soc.core.multiregimpl15_regs1,172.4
net2336,172.385
soc.core.VexRiscv.dBus_cmd_payload_address\[29\],172.38
net3163,172.19
net12616,172.16
net1088,172.14
clknet_leaf_891_mgmt_buffers.caravel_clk,172.14
_11161_,172.1
soc.core.VexRiscv.decode_to_execute_RS2\[12\],172.1
net3494,172.06
soc.core.mgmtsoc_value\[24\],172.02
net3288,171.99
_12143_,171.96
net11404,171.94
net11780,171.94
net12600,171.94
_06029_,171.9
net4468,171.82
net1047,171.8
net413,171.75
_03553_,171.74
net3772,171.74
gpio_out_core,171.64
net2331,171.56
net2744,171.56
_04229_,171.54
_11223_,171.46
soc.core.interface6_bank_bus_dat_r\[6\],171.36
_00380_,171.3
_04869_,171.28
net1351,171.235
clknet_5_3_0_mgmt_buffers.caravel_clk,171.22
_11523_,171.18
net1324,171.12
mgmt_buffers.mprj_logic1\[206\],171.08
net11,171.08
net2219,171.04
soc.core.VexRiscv.CsrPlugin_mepc\[30\],170.955
_04665_,170.91
soc.core.RAM256.Do0_pre\[1\]\[10\],170.88
clknet_7_62__leaf_mgmt_buffers.caravel_clk,170.88
mgmt_buffers.la_data_in_mprj_bar\[42\],170.86
net407,170.83
mgmt_buffers.la_oenb_core\[48\],170.8
_04659_,170.76
net10432,170.535
soc.core.interface6_bank_bus_dat_r\[5\],170.36
mprj_io_in[8],170.33
_11909_,170.26
soc.core.VexRiscv._zz_2,170.26
net3597,170.245
_11895_,170.2
user_io_oeb\[13\],170.14
net2312,170.12
soc.core.VexRiscv.execute_to_memory_ALIGNEMENT_FAULT,170.06
clknet_leaf_382_mgmt_buffers.caravel_clk,170.02
user_io_out\[4\],170
mgmt_buffers.la_oenb_core\[47\],169.84
gpio_control_in_1a\[4\].shift_register\[12\],169.64
net2203,169.62
clknet_leaf_914_mgmt_buffers.caravel_clk,169.6
_02779_,169.55
soc.core.la_ien_storage\[71\],169.52
_03680_,169.41
soc.core.RAM256.Do0_pre\[1\]\[22\],169.4
soc.core.VexRiscv.CsrPlugin_mtval\[1\],169.32
soc.core.interface10_bank_bus_dat_r\[23\],169.32
net1306,169.32
net10415,169.295
net3904,169.28
soc.core.VexRiscv._zz_RegFilePlugin_regFile_port0\[5\],169.2
net2392,169.105
clknet_leaf_672_mgmt_buffers.caravel_clk,169.04
clknet_leaf_605_mgmt_buffers.caravel_clk,169.02
net4067,169
mprj_io_in[6],168.95
mgmt_buffers.la_data_in_core\[48\],168.9
_03523_,168.86
net3665,168.8
_12487_,168.74
soc.core.VexRiscv.dBus_cmd_payload_address\[21\],168.7
net2767,168.68
net3432,168.67
_03853_,168.66
clknet_leaf_697_mgmt_buffers.caravel_clk,168.6
clknet_leaf_644_mgmt_buffers.caravel_clk,168.5
_10774_,168.48
soc.core.interface6_bank_bus_dat_r\[17\],168.46
net11850,168.42
net2376,168.4
net496,168.28
mgmt_buffers.la_data_in_enable\[21\],168.18
_03860_,168.11
net3441,167.93
soc.core.VexRiscv._zz_dBus_cmd_payload_data\[0\],167.84
net2736,167.82
_04657_,167.78
net2844,167.78
net10509,167.73
_12567_,167.72
_03728_,167.58
net749,167.55
net3882,167.54
net3308,167.53
soc.core.VexRiscv._zz_CsrPlugin_csrMapping_readDataInit\[1\],167.505
clknet_leaf_954_mgmt_buffers.caravel_clk,167.5
net10128,167.5
mgmt_buffers.mprj_logic1\[210\],167.48
net2453,167.42
net690,167.395
soc.core.multiregimpl109_regs1,167.34
net7735,167.34
_11916_,167.14
soc.core.la_ien_storage\[34\],167.14
net2001,167.09
soc.core.interface6_bank_bus_dat_r\[3\],167.06
soc.core.VexRiscv.IBusCachedPlugin_cache.io_cpu_decode_data\[25\],167.04
soc.core.VexRiscv.BranchPlugin_branchExceptionPort_payload_badAddr\[4\],167.01
soc.core.VexRiscv.dBusWishbone_ADR\[0\],167.01
_14558_,166.98
net1387,166.945
_01393_,166.94
net1243,166.92
gpio_control_in_2\[7\].gpio_logic1,166.82
net11835,166.8
clknet_5_29_0_mgmt_buffers.caravel_clk,166.78
net8972,166.78
net10448,166.705
_03466_,166.68
mgmt_buffers.mprj_logic1\[94\],166.66
_11313_,166.62
soc.core.VexRiscv.CsrPlugin_mepc\[10\],166.6
_03742_,166.56
net1353,166.56
_05014_,166.48
soc.core.VexRiscv.CsrPlugin_mtval\[2\],166.44
_11416_,166.42
_12582_,166.38
_14853_,166.38
_04643_,166.34
net3658,166.34
net11918,166.24
clknet_5_25_0_mgmt_buffers.caravel_clk,166.2
clknet_5_27_0_mgmt_buffers.caravel_clk,166.19
net4234,166.06
_12237_,166.02
net3902,165.965
net9573,165.9
net3069,165.88
_00381_,165.86
_04886_,165.85
net46,165.84
net3651,165.75
_00102_,165.705
net3802,165.68
mgmt_buffers.la_data_in_enable\[17\],165.62
mgmt_buffers.la_oenb_core\[29\],165.6
net10,165.6
net3897,165.58
_14098_,165.57
mgmt_buffers.la_data_in_mprj\[57\],165.54
net8794,165.5
soc.core.la_out_storage\[76\],165.44
net10056,165.38
soc.core.VexRiscv.IBusCachedPlugin_cache.lineLoader_flushCounter\[1\],165.37
_11678_,165.36
soc.core.VexRiscv.dBus_cmd_payload_address\[23\],165.28
net2837,165.28
net1414,165.08
mgmt_buffers.mprj_logic1\[248\],165.03
_03052_,164.98
mprj_io_in[10],164.97
soc.core.VexRiscv.externalInterruptArray_regNext\[4\],164.96
_03691_,164.86
net940,164.83
soc.core.dff2_bus_dat_r\[24\],164.7
net2980,164.68
net9523,164.68
_05002_,164.67
net3899,164.66
net601,164.52
soc.core.VexRiscv.CsrPlugin_mtvec_base\[6\],164.51
_10810_,164.46
net11828,164.44
net12601,164.38
net9020,164.36
_11536_,164.34
soc.core.VexRiscv.CsrPlugin_mepc\[23\],164.32
net11901,164.26
net4124,164.255
net3839,164.2
net4005,164.18
net10345,163.99
_11858_,163.94
_04826_,163.92
clknet_leaf_944_mgmt_buffers.caravel_clk,163.84
soc.core.VexRiscv._zz_RegFilePlugin_regFile_port0\[8\],163.775
_03931_,163.72
net9058,163.7
net788,163.66
soc.core.VexRiscv.CsrPlugin_mtvec_base\[15\],163.52
net3888,163.52
net12618,163.5
mgmt_buffers.la_oenb_core\[42\],163.43
mgmt_buffers.mprj_logic1\[209\],163.42
soc.core.interface10_bank_bus_dat_r\[15\],163.42
_11876_,163.4
_10856_,163.37
soc.core.la_ien_storage\[62\],163.32
_03734_,163.22
soc.core.dbg_uart_address\[17\],163.14
_11236_,163.12
gpio_outenb_core,163.12
soc.core.VexRiscv.CsrPlugin_mepc\[29\],163.04
net614,163
clknet_leaf_971_mgmt_buffers.caravel_clk,163
mprj_io_in[11],162.97
net3820,162.94
net11873,162.94
_00317_,162.9
_01460_,162.86
net11815,162.79
net2831,162.78
net11784,162.75
_10657_,162.74
_00085_,162.715
soc.core.VexRiscv.dBusWishbone_DAT_MISO\[31\],162.68
net9987,162.64
net2179,162.6
_03893_,162.58
soc.core.VexRiscv._zz_execute_SRC2\[4\],162.58
gpio_control_in_1a\[3\].gpio_logic1,162.5
net1415,162.5
clknet_7_118__leaf_mgmt_buffers.caravel_clk,162.5
clknet_7_71__leaf_mgmt_buffers.caravel_clk,162.48
clknet_leaf_376_mgmt_buffers.caravel_clk,162.4
net3343,162.4
soc.core.la_ien_storage\[119\],162.32
soc.core.VexRiscv.dBusWishbone_DAT_MISO\[3\],162.3
mgmt_buffers.mprj_logic1\[13\],162.28
soc.core.interface6_bank_bus_dat_r\[2\],162.26
soc.core.VexRiscv.DBusSimplePlugin_memoryExceptionPort_payload_badAddr\[28\],162.21
mgmt_buffers.la_data_in_core\[49\],162.2
soc.core.VexRiscv.IBusCachedPlugin_cache.lineLoader_address\[13\],162.1
soc.core.VexRiscv.IBusCachedPlugin_cache.io_cpu_decode_data\[24\],162.095
net4488,162.04
net9576,161.96
_14530_,161.88
soc.core.la_out_storage\[93\],161.82
soc.core.VexRiscv._zz_execute_SRC2\[10\],161.8
clknet_leaf_569_mgmt_buffers.caravel_clk,161.68
net2320,161.665
_03686_,161.66
net11791,161.66
net12596,161.66
net10525,161.64
_03913_,161.62
clknet_leaf_129_mgmt_buffers.caravel_clk,161.515
_14947_,161.5
_13781_,161.34
soc.core.VexRiscv.CsrPlugin_csrMapping_writeDataSignal\[23\],161.335
net1198,161.28
soc.core.RAM256.Do0_pre\[1\]\[20\],161.26
net2357,161.24
net11883,161.22
_03818_,161.21
_03814_,161.17
_04674_,161.08
net1552,161.08
clknet_5_20_0_mgmt_buffers.caravel_clk,161
_13976_,160.98
net4091,160.98
_04801_,160.955
_08229_,160.945
net2842,160.88
net9762,160.855
soc.core.multiregimpl120_regs1,160.84
net4618,160.82
mprj_io_in[5],160.79
_10389_,160.78
net3649,160.64
mgmt_buffers.la_oenb_core\[31\],160.6
_03871_,160.57
_12605_,160.54
net1400,160.505
soc.core.VexRiscv.CsrPlugin_mepc\[15\],160.365
net1985,160.33
net2860,160.32
_14083_,160.29
_03668_,160.2
clknet_7_121__leaf_mgmt_buffers.caravel_clk,160.2
net3706,160.2
_04846_,160.18
net2824,160.18
_11859_,160.16
net11773,160.16
soc.core.multiregimpl107_regs1,160.08
net10168,160.04
soc.core.VexRiscv.decode_to_execute_SRC_USE_SUB_LESS,160.01
_11325_,160
_03650_,159.9
soc.core.VexRiscv.CsrPlugin_mepc\[20\],159.78
net3252,159.725
_04616_,159.72
_11229_,159.7
net1315,159.67
net4208,159.64
mgmt_buffers.mprj_logic1\[365\],159.6
net590,159.595
soc.core.VexRiscv.decode_to_execute_RS1\[22\],159.56
_04628_,159.54
net2773,159.515
_03848_,159.5
_10850_,159.48
net11769,159.47
net767,159.45
net1879,159.43
clknet_leaf_847_mgmt_buffers.caravel_clk,159.4
clknet_leaf_1152_mgmt_buffers.caravel_clk,159.36
_13095_,159.34
_13419_,159.3
soc.core.VexRiscv.dBusWishbone_ADR\[2\],159.265
_04814_,159.24
soc.core.VexRiscv.dBus_cmd_payload_address\[27\],159.2
net4489,159.18
net3800,159.1
_00417_,159.04
net10152,158.955
_04669_,158.94
soc.core.dbg_uart_address\[1\],158.92
_00406_,158.9
net8595,158.85
mgmt_buffers.la_data_in_mprj\[71\],158.845
mgmt_buffers.la_data_in_mprj\[30\],158.725
gpio_control_bidir_2\[2\].gpio_outenb,158.66
net10070,158.62
_03722_,158.58
net819,158.53
net642,158.525
_03693_,158.52
soc.core.la_ien_storage\[56\],158.52
clknet_leaf_1161_mgmt_buffers.caravel_clk,158.52
net4662,158.52
_14030_,158.48
net11690,158.48
net9085,158.475
soc.core.interface10_bank_bus_dat_r\[22\],158.46
soc.core.VexRiscv.IBusCachedPlugin_cache.io_cpu_fetch_mmuRsp_physicalAddress\[16\],158.44
soc.core.la_ien_storage\[57\],158.32
soc.core.VexRiscv.dBusWishbone_ADR\[1\],158.285
_01451_,158.26
soc.core.mgmtsoc_bus_errors\[5\],158.26
net3881,158.26
_11273_,158.23
_00363_,158.22
_13147_,158.22
clknet_leaf_1080_mgmt_buffers.caravel_clk,158.22
soc.core.interface6_bank_bus_dat_r\[0\],158.2
_01392_,158.16
_11238_,158.16
soc.core.litespi_state\[0\],158.16
net4283,158.16
net487,158.14
clknet_leaf_119_mgmt_buffers.caravel_clk,158.08
mgmt_buffers.la_data_in_mprj\[13\],157.935
soc.core.VexRiscv.IBusCachedPlugin_cache.io_cpu_decode_data\[31\],157.86
pll.ringosc.c\[1\],157.84
soc.core.interface4_bank_bus_dat_r\[2\],157.78
_12612_,157.765
_04940_,157.75
_14819_,157.74
net12617,157.6
gpio_control_in_1\[3\].gpio_logic1,157.58
_05031_,157.52
soc.core.VexRiscv._zz_dBus_cmd_payload_data\[23\],157.52
net9921,157.34
soc.core.dbg_uart_data\[22\],157.24
soc.core.VexRiscv._zz_execute_SRC2\[21\],157.2
soc.core.VexRiscv._zz_RegFilePlugin_regFile_port0\[25\],157.12
_04603_,157.08
soc.core.VexRiscv.execute_to_memory_INSTRUCTION\[7\],157.08
net3846,157.065
_03049_,157.06
gpio_control_bidir_1\[0\].shift_register\[0\],157.06
gpio_control_bidir_2\[2\].gpio_defaults\[10\],157.01
net11777,156.98
net11540,156.94
_11330_,156.92
soc.core.la_ien_storage\[118\],156.875
_04638_,156.84
soc.core.la_ien_storage\[113\],156.84
net4763,156.84
_13777_,156.79
_11285_,156.66
net3235,156.64
_11557_,156.61
soc.core.VexRiscv.HazardSimplePlugin_writeBackWrites_payload_address\[2\],156.6
_04679_,156.54
net27,156.52
net11600,156.52
soc.core.VexRiscv.IBusCachedPlugin_cache.io_cpu_fetch_mmuRsp_physicalAddress\[18\],156.495
clknet_leaf_71_mgmt_buffers.caravel_clk,156.46
net2830,156.44
gpio_control_bidir_2\[0\].resetn_out,156.42
mgmt_buffers.la_oenb_core\[44\],156.42
soc.core.VexRiscv.CsrPlugin_csrMapping_writeDataSignal\[20\],156.375
gpio_control_bidir_2\[1\].serial_load,156.36
_12491_,156.34
net4709,156.34
soc.core.gpioin1_gpioin1_irq,156.26
net3840,156.26
net6501,156.22
gpio_control_in_1a\[1\].shift_register\[0\],156.16
net11573,156.16
net9813,156.085
net10006,156.04
net4636,155.985
net7954,155.975
clknet_7_1__leaf_mgmt_buffers.caravel_clk,155.915
soc.core.VexRiscv.DBusSimplePlugin_memoryExceptionPort_payload_badAddr\[16\],155.91
soc.core.mgmtsoc_bus_errors\[9\],155.84
_04853_,155.76
soc.core.VexRiscv.BranchPlugin_branchExceptionPort_payload_badAddr\[31\],155.76
_12520_,155.73
_14076_,155.72
net4246,155.705
_10421_,155.7
soc.core.la_out_storage\[124\],155.66
gpio_control_bidir_1\[0\].serial_load,155.62
soc.core.VexRiscv.dBusWishbone_WE,155.62
net1389,155.58
net11951,155.48
soc.core.VexRiscv.decode_to_execute_RS1\[14\],155.475
soc.core.VexRiscv.CsrPlugin_csrMapping_writeDataSignal\[4\],155.45
_11162_,155.4
soc.core.VexRiscv._zz_RegFilePlugin_regFile_port0\[28\],155.4
soc.core.mgmtsoc_vexriscv_debug_bus_dat_r\[1\],155.34
clknet_leaf_1073_mgmt_buffers.caravel_clk,155.3
net11853,155.26
net10194,155.25
net6644,155.2
pll.ringosc.dstage\[0\].id.in,155.155
_03036_,155.14
soc.core.VexRiscv._zz_RegFilePlugin_regFile_port1\[25\],155.14
clknet_7_81__leaf_mgmt_buffers.caravel_clk,155.14
net10469,155.14
_13972_,155.12
net1286,155.02
soc.core.VexRiscv.CsrPlugin_mtval\[18\],154.99
_13298_,154.98
_12181_,154.96
soc.core.gpioin5_gpioin5_irq,154.96
net855,154.92
_09162_,154.905
clknet_leaf_594_mgmt_buffers.caravel_clk,154.88
_03558_,154.84
soc.core.VexRiscv._zz_CsrPlugin_csrMapping_readDataInit\[0\],154.82
_14017_,154.74
soc.core.mgmtsoc_vexriscv_i_cmd_payload_data\[0\],154.74
soc.core.gpioin0_gpioin0_irq,154.72
clknet_leaf_117_mgmt_buffers.caravel_clk,154.72
_03737_,154.68
_04684_,154.64
net1550,154.605
_04236_,154.59
soc.core.multiregimpl118_regs1,154.58
_10547_,154.55
net3029,154.48
net11409,154.48
net816,154.46
soc.core.interface6_bank_bus_dat_r\[28\],154.44
_00343_,154.4
net3254,154.38
_13389_,154.375
_11217_,154.37
net1039,154.29
net10258,154.215
soc.core.la_out_storage\[86\],154.18
net3560,154.14
_12485_,154.12
net848,154.1
net4694,154.06
net11958,154.06
soc.core.multiregimpl112_regs1,154.04
clknet_7_84__leaf_mgmt_buffers.caravel_clk,154.04
_00386_,154.02
net8138,154.02
soc.core.VexRiscv._zz_dBus_cmd_payload_data\[27\],154
net1012,154
clknet_leaf_341_mgmt_buffers.caravel_clk,153.99
_00121_,153.94
_14021_,153.94
net10355,153.935
mgmt_buffers.la_data_in_enable\[58\],153.92
soc.core.VexRiscv.IBusCachedPlugin_cache.io_cpu_fetch_mmuRsp_physicalAddress\[26\],153.89
_02787_,153.87
_12138_,153.86
_03725_,153.7
net2369,153.7
clknet_5_18_0_mgmt_buffers.caravel_clk,153.7
soc.core.la_ien_storage\[40\],153.68
_03538_,153.66
net8688,153.66
_12241_,153.64
_00112_,153.595
soc.core.la_ien_storage\[49\],153.58
soc.core.interface11_bank_bus_dat_r\[6\],153.52
net11877,153.5
_03035_,153.44
_14231_,153.42
net3380,153.4
soc.core.VexRiscv._zz_RegFilePlugin_regFile_port1\[3\],153.34
_12727_,153.3
net12636,153.3
user_io_oeb\[24\],153.22
_03707_,153.2
_11265_,153.18
_04871_,153.14
mgmt_buffers.mprj_logic1\[88\],153.1
net2869,153.06
_03543_,152.96
mgmt_buffers.mprj_logic1\[235\],152.905
soc.core.la_ien_storage\[17\],152.9
soc.core.multiregimpl88_regs1,152.88
_14065_,152.76
soc.core.interface6_bank_bus_dat_r\[1\],152.76
net3745,152.76
net4939,152.68
soc.core.dbg_uart_address\[0\],152.67
_03701_,152.46
net5334,152.415
_13089_,152.41
clknet_leaf_996_mgmt_buffers.caravel_clk,152.36
net3051,152.345
user_io_out\[12\],152.34
mgmt_buffers.la_data_in_mprj_bar\[15\],152.28
net3099,152.265
_14050_,152.24
_14220_,152.16
_12461_,152.06
_04832_,152.05
net12171,152.04
_11495_,151.96
net10180,151.945
net12996,151.945
soc.core.VexRiscv.CsrPlugin_mtval\[11\],151.92
_12232_,151.9
mgmt_buffers.la_data_out_core\[28\],151.86
net3917,151.86
net4555,151.86
pll.pll_control.oscbuf\[1\],151.78
net1179,151.76
_11147_,151.7
net5812,151.69
net12071,151.68
net2338,151.665
net7952,151.64
_00326_,151.62
mgmt_buffers.mprj_logic1\[236\],151.61
_09209_,151.605
_12245_,151.54
soc.core.VexRiscv.IBusCachedPlugin_cache.io_cpu_fetch_mmuRsp_physicalAddress\[30\],151.54
_03900_,151.52
_11110_,151.495
_11254_,151.46
soc.core.VexRiscv.dBus_cmd_payload_address\[30\],151.41
mgmt_buffers.la_data_out_core\[33\],151.36
soc.core.uart_irq,151.36
soc.core.multiregimpl13_regs1,151.35
net11953,151.32
mgmt_buffers.la_oenb_core\[32\],151.26
_12726_,151.22
user_gpio_noesd[1],151.22
net2861,151.21
user_io_out\[19\],151.16
net5293,151.16
net12103,151.14
net10595,151.12
clknet_leaf_981_mgmt_buffers.caravel_clk,151.1
clknet_leaf_1032_mgmt_buffers.caravel_clk,151.1
net11872,151.1
net10221,151.065
net3068,151.015
mgmt_buffers.la_data_in_enable\[57\],150.98
net3612,150.98
soc.core.VexRiscv._zz_dBus_cmd_payload_data\[4\],150.96
soc.core.la_ien_storage\[0\],150.96
net6406,150.92
soc.core.VexRiscv.IBusCachedPlugin_cache.decodeStage_mmuRsp_physicalAddress\[25\],150.9
soc.core.VexRiscv.CsrPlugin_mtvec_base\[8\],150.88
soc.core.multiregimpl16_regs1,150.86
clknet_leaf_76_mgmt_buffers.caravel_clk,150.7
net1555,150.65
net1872,150.65
soc.core.spi_master_mosi_sel\[1\],150.595
clknet_7_86__leaf_mgmt_buffers.caravel_clk,150.56
mgmt_buffers.la_oenb_core\[37\],150.54
net7,150.54
net2968,150.46
net5958,150.46
_03578_,150.42
_12686_,150.42
soc.core.dff2_bus_dat_r\[16\],150.42
gpio_control_in_1a\[5\].user_gpio_in,150.395
soc.core.VexRiscv._zz_RegFilePlugin_regFile_port0\[29\],150.39
mgmt_buffers.la_data_in_mprj_bar\[30\],150.35
_11335_,150.34
mgmt_buffers.la_data_in_enable\[22\],150.3
soc.core.spi_master_cs,150.24
_00116_,150.135
soc.core.VexRiscv.RegFilePlugin_regFile\[23\]\[19\],150.12
net11878,150.035
soc.core.VexRiscv._zz_RegFilePlugin_regFile_port0\[14\],149.97
soc.core.la_ien_storage\[105\],149.96
_12087_,149.92
net6861,149.92
_00358_,149.9
_05013_,149.88
_11546_,149.84
_14794_,149.84
net2835,149.84
_03886_,149.78
_14561_,149.7
_03799_,149.67
soc.core.RAM256.Do0_pre\[1\]\[9\],149.62
_13763_,149.52
_03487_,149.48
soc.core.VexRiscv.CsrPlugin_csrMapping_writeDataSignal\[2\],149.475
net3270,149.46
_10884_,149.44
_12584_,149.44
net1038,149.44
net3305,149.36
_00407_,149.34
net2100,149.25
net2747,149.24
soc.core.VexRiscv.IBusCachedPlugin_cache._zz_fetchStage_read_waysValues_0_tag_valid_2\[6\],149.23
_08250_,149.22
_14006_,149.2
net181,149.2
net4464,149.18
gpio_control_bidir_2\[0\].gpio_outenb,149.16
soc.core.VexRiscv._zz_RegFilePlugin_regFile_port0\[0\],149.1
net3818,149.04
_08978_,148.94
_10319_,148.94
_11405_,148.94
net1631,148.92
_14019_,148.82
soc.core.VexRiscv.execute_arbitration_isValid,148.68
soc.core.VexRiscv._zz_dBus_cmd_payload_data\[20\],148.64
mgmt_buffers.la_data_in_enable\[53\],148.62
_03528_,148.6
soc.core.VexRiscv._zz_RegFilePlugin_regFile_port0\[1\],148.6
soc.core.VexRiscv.debug_bus_rsp_data\[1\],148.58
_11953_,148.56
_14275_,148.5
user_gpio_noesd[2],148.49
mgmt_buffers.la_data_in_core\[28\],148.48
_12093_,148.45
soc.core.VexRiscv.CsrPlugin_mtval\[16\],148.4
_04919_,148.28
soc.core.multiregimpl93_regs1,148.28
net5899,148.28
_12247_,148.27
_03794_,148.26
_04881_,148.24
net8996,148.24
soc.core.la_out_storage\[75\],148.19
_04840_,148.14
net2826,148.14
net4062,148.14
user_gpio_noesd[5],148.08
mgmt_buffers.la_data_in_mprj\[25\],148.025
clknet_leaf_12_mgmt_buffers.caravel_clk,147.98
_02799_,147.96
_12580_,147.88
soc.core.gpioin2_gpioin2_irq,147.84
net10746,147.84
_13346_,147.82
net2862,147.8
soc.core.VexRiscv.CsrPlugin_csrMapping_writeDataSignal\[28\],147.79
_03940_,147.78
_13487_,147.775
_03946_,147.76
net13183,147.76
_02348_,147.68
_11891_,147.64
net4435,147.62
net693,147.56
user_io_out\[11\],147.53
net1185,147.515
net398,147.475
_10539_,147.46
soc.core.spi_master_mosi_sel\[0\],147.43
user_io_out\[9\],147.37
net10807,147.33
_14039_,147.32
_11310_,147.3
soc.core.VexRiscv.CsrPlugin_mtval\[15\],147.28
_03643_,147.26
_14320_,147.22
soc.core.VexRiscv._zz_dBus_cmd_payload_data\[12\],147.2
_00339_,147.18
_14242_,147.14
net4938,147.12
net1402,147.07
user_gpio_noesd[6],147.05
net2993,147.025
mgmt_buffers.mprj_logic1\[331\],147
clknet_5_30_0_mgmt_buffers.caravel_clk,146.98
_04896_,146.9
_04623_,146.84
soc.core.mgmtsoc_value_status\[11\],146.8
soc.core.mgmtsoc_vexriscv_debug_bus_dat_r\[4\],146.755
net10382,146.735
net1155,146.72
soc.core.la_ien_storage\[59\],146.7
soc.core.VexRiscv.dBusWishbone_DAT_MOSI\[23\],146.66
mprj_io_in_3v3[4],146.63
net3630,146.62
net508,146.6
mgmt_buffers.la_data_in_mprj_bar\[20\],146.55
net3743,146.49
_02631_,146.47
net10374,146.45
net3189,146.4
mgmt_buffers.la_data_out_core\[42\],146.38
clknet_leaf_610_mgmt_buffers.caravel_clk,146.38
net2718,146.38
net3956,146.38
gpio_control_in_1\[1\].gpio_logic1,146.32
soc.core.la_out_storage\[66\],146.32
_00333_,146.22
_12665_,146.2
soc.core.interface6_bank_bus_dat_r\[30\],146.2
net3805,146.2
net4096,146.2
net3152,146.13
net3214,146.115
soc.core.VexRiscv.CsrPlugin_csrMapping_writeDataSignal\[29\],146.055
_13984_,146.04
soc.core.interface10_bank_bus_dat_r\[9\],146.04
soc.core.spi_master_miso\[1\],146.04
net4040,146
net3124,145.98
clknet_leaf_989_mgmt_buffers.caravel_clk,145.96
_14072_,145.94
net10767,145.89
gpio_control_bidir_2\[2\].pad_gpio_outenb,145.8
net3315,145.8
soc.core.VexRiscv.CsrPlugin_csrMapping_writeDataSignal\[25\],145.785
_00119_,145.78
net10492,145.75
soc.core.VexRiscv._zz_RegFilePlugin_regFile_port1\[28\],145.74
soc.core.uart_tx_pending,145.74
net11840,145.74
_04811_,145.72
soc.core.mgmtsoc_reload_storage\[0\],145.7
_13737_,145.68
clknet_leaf_388_mgmt_buffers.caravel_clk,145.68
net12140,145.68
net12124,145.66
net12440,145.66
_04234_,145.62
_00079_,145.56
soc.core.VexRiscv.IBusCachedPlugin_cache.io_cpu_decode_data\[3\],145.54
mgmt_buffers.la_data_in_core\[43\],145.52
soc.core.spi_master_miso\[0\],145.5
soc.core.multiregimpl91_regs1,145.36
soc.core.VexRiscv.RegFilePlugin_regFile\[17\]\[0\],145.34
clknet_leaf_592_mgmt_buffers.caravel_clk,145.33
soc.core.VexRiscv.RegFilePlugin_regFile\[5\]\[4\],145.32
mgmt_buffers.la_data_out_core\[59\],145.26
_10764_,145.24
mgmt_buffers.la_data_in_core\[29\],145.24
soc.core.VexRiscv.RegFilePlugin_regFile\[1\]\[4\],145.22
_04753_,145.18
clknet_leaf_973_mgmt_buffers.caravel_clk,145.14
clknet_leaf_665_mgmt_buffers.caravel_clk,145.12
user_gpio_noesd[4],145.11
soc.core.VexRiscv.RegFilePlugin_regFile\[16\]\[16\],145.05
_13828_,145.025
net4160,145.02
mgmt_buffers.la_data_in_enable\[41\],144.95
_10412_,144.92
mprj_io_in[13],144.89
_04805_,144.88
user_gpio_analog[2],144.88
soc.core.VexRiscv.RegFilePlugin_regFile\[23\]\[0\],144.86
mgmt_buffers.la_data_in_core\[34\],144.84
_03459_,144.78
mgmt_buffers.la_data_out_core\[27\],144.78
net4565,144.78
net2741,144.74
_00387_,144.72
net2943,144.72
soc.core.VexRiscv.CsrPlugin_csrMapping_writeDataSignal\[14\],144.715
net3095,144.715
_11887_,144.7
soc.core.multiregimpl97_regs1,144.68
_04935_,144.62
soc.core.memdat_3\[0\],144.62
net12538,144.6
mprj_io_out[26],144.57
_03823_,144.53
_03898_,144.52
net4632,144.5
user_gpio_noesd[0],144.49
net12028,144.46
_00325_,144.44
net3916,144.43
_14850_,144.4
clknet_leaf_510_mgmt_buffers.caravel_clk,144.38
net1403,144.33
_12673_,144.265
net8663,144.26
net3605,144.25
net1203,144.215
_10826_,144.18
soc.core.mgmtsoc_vexriscv_debug_bus_dat_r\[24\],144.16
net692,144.14
soc.core.VexRiscv.RegFilePlugin_regFile\[9\]\[0\],144.125
_04689_,144.06
_14702_,144.06
soc.core.mgmtsoc_bus_errors\[4\],144.015
soc.core.VexRiscv.CsrPlugin_mtval\[13\],144
soc.core.multiregimpl106_regs1,143.98
net547,143.96
_03921_,143.91
soc.core.dbg_uart_bytes_count\[1\],143.88
user_gpio_analog[9],143.88
net4145,143.82
_11875_,143.8
_14889_,143.8
_04629_,143.78
_14215_,143.78
net11974,143.78
soc.core.interface6_bank_bus_dat_r\[25\],143.76
mask_rev\[3\],143.75
soc.core.VexRiscv.CsrPlugin_csrMapping_writeDataSignal\[12\],143.735
_12853_,143.715
soc.core.VexRiscv.CsrPlugin_mepc\[17\],143.66
net785,143.64
_11901_,143.6
gpio_control_bidir_2\[2\].pad_gpio_out,143.56
user_gpio_analog[7],143.52
clknet_leaf_385_mgmt_buffers.caravel_clk,143.52
user_gpio_analog[6],143.44
net683,143.44
soc.core.VexRiscv.IBusCachedPlugin_cache.io_cpu_decode_data\[12\],143.42
_00359_,143.4
_04609_,143.38
_00009_,143.36
_10820_,143.28
user_gpio_analog[0],143.28
soc.core.mgmtsoc_litespisdrphycore_sr_out\[12\],143.24
_14533_,143.22
_14535_,143.2
mgmt_buffers.caravel_clk,143.18
clknet_leaf_113_mgmt_buffers.caravel_clk,143.115
user_gpio_analog[8],143.11
_09230_,143.105
soc.core.VexRiscv.CsrPlugin_csrMapping_writeDataSignal\[6\],143.095
user_gpio_analog[14],143.09
user_gpio_analog[1],143.03
net11382,143
clknet_leaf_1159_mgmt_buffers.caravel_clk,142.98
_11362_,142.955
mgmt_buffers.la_data_in_mprj_bar\[52\],142.95
_10957_,142.92
_12630_,142.92
soc.core.VexRiscv.RegFilePlugin_regFile\[15\]\[0\],142.86
clknet_5_19_0_mgmt_buffers.caravel_clk,142.82
net3129,142.8
net8067,142.8
net11960,142.79
mgmt_buffers.la_data_out_core\[61\],142.74
soc.core.VexRiscv.when_DebugPlugin_l261_1,142.72
gpio_control_in_1\[4\].gpio_logic1,142.64
net11772,142.64
clknet_leaf_1194_mgmt_buffers.caravel_clk,142.6
_11439_,142.54
net2451,142.54
_14645_,142.44
_03911_,142.42
_03944_,142.38
net4220,142.37
user_gpio_analog[12],142.29
user_gpio_analog[5],142.27
clknet_leaf_171_mgmt_buffers.caravel_clk,142.26
user_gpio_analog[4],142.18
net204,142.155
_09168_,142.14
_04295_,142.12
_12708_,142.12
soc.core.multiregimpl92_regs1,142.08
soc.core.VexRiscv.decode_to_execute_RS1\[2\],142.02
net11586,142
net1283,141.975
_06035_,141.92
soc.core.VexRiscv.CsrPlugin_mepc\[8\],141.9
net3541,141.9
user_gpio_analog[10],141.87
_11198_,141.86
user_gpio_analog[16],141.85
soc.core.VexRiscv.CsrPlugin_mepc\[21\],141.84
net941,141.785
soc.core.multiregimpl38_regs1,141.76
user_gpio_analog[11],141.74
net10396,141.725
_03741_,141.58
soc.core.VexRiscv.RegFilePlugin_regFile\[1\]\[28\],141.54
net11895,141.54
_14041_,141.52
soc.core.multiregimpl98_regs1,141.52
soc.core.VexRiscv.dBusWishbone_ADR\[9\],141.5
net11557,141.48
clknet_leaf_337_mgmt_buffers.caravel_clk,141.44
_03923_,141.43
_00070_,141.4
net10613,141.4
net4118,141.38
net2892,141.36
_11888_,141.32
user_gpio_analog[15],141.3
net10148,141.19
net2361,141.18
_11482_,141.16
_14315_,141.16
user_gpio_analog[13],141.16
_14121_,141.14
_03483_,141.1
soc.core.VexRiscv.RegFilePlugin_regFile\[21\]\[2\],141.08
_04644_,141
_10766_,140.98
soc.core.dbg_uart_tx_data_uartwishbonebridge_rs232phytx_next_value2\[0\],140.92
soc.core.interface10_bank_bus_dat_r\[21\],140.88
mgmt_buffers.la_data_in_enable\[54\],140.815
soc.core.dff2_bus_dat_r\[1\],140.76
net11824,140.72
_02356_,140.68
_04432_,140.68
net5133,140.64
_00076_,140.485
_11680_,140.48
clknet_leaf_56_mgmt_buffers.caravel_clk,140.455
clknet_leaf_879_mgmt_buffers.caravel_clk,140.44
net12094,140.42
_04376_,140.4
mgmt_buffers.la_data_in_mprj\[26\],140.38
_10942_,140.36
gpio_control_in_1\[0\].gpio_logic1,140.36
net11854,140.36
_12579_,140.29
user_gpio_noesd[3],140.28
user_gpio_noesd[13],140.27
net10250,140.26
soc.core.uart_tx_fifo_consume\[3\],140.255
net2928,140.24
net3747,140.2
net4703,140.2
_14105_,140.16
net5129,140.14
net9885,140.1
clknet_5_17_0_mgmt_buffers.caravel_clk,140.08
gpio_control_bidir_1\[1\].gpio_defaults\[0\],140.07
user_gpio_noesd[11],140.07
net2958,140.06
net4647,140.02
_14164_,139.98
mgmt_buffers.la_data_in_core\[44\],139.84
mprj_io_in[3],139.81
clknet_leaf_1066_mgmt_buffers.caravel_clk,139.8
soc.core.slave_sel_r\[1\],139.78
mprj_io_oeb[0],139.75
soc.core.VexRiscv._zz_CsrPlugin_csrMapping_readDataInit\[7\],139.735
_03719_,139.72
soc.core.VexRiscv.dBusWishbone_DAT_MISO\[30\],139.72
_04613_,139.62
_11504_,139.555
soc.core.VexRiscv._zz_RegFilePlugin_regFile_port0\[15\],139.5
gpio_control_bidir_1\[0\].serial_data_in,139.455
net711,139.41
_00083_,139.4
user_gpio_noesd[7],139.33
soc.core.VexRiscv.IBusCachedPlugin_cache._zz_fetchStage_read_waysValues_0_tag_valid_2\[7\],139.315
user_gpio_analog[3],139.31
clknet_leaf_233_mgmt_buffers.caravel_clk,139.3
clknet_leaf_1020_mgmt_buffers.caravel_clk,139.3
_10672_,139.28
mgmt_buffers.la_oenb_core\[36\],139.25
net4400,139.24
net1700,139.22
net9616,139.22
_11305_,139.2
soc.core.VexRiscv.IBusCachedPlugin_cache.lineLoader_wordIndex\[1\],139.2
soc.core.VexRiscv.CsrPlugin_mepc\[9\],139.16
_02658_,139.08
net12152,139.08
user_gpio_noesd[15],139.05
soc.core.VexRiscv.RegFilePlugin_regFile\[25\]\[0\],139.02
soc.core.la_out_storage\[77\],139.02
user_gpio_noesd[12],139.02
_12839_,139
net3060,138.92
net10057,138.86
_02623_,138.82
_11212_,138.82
_14264_,138.82
soc.core.VexRiscv.DBusSimplePlugin_memoryExceptionPort_payload_badAddr\[6\],138.82
_10940_,138.74
_11778_,138.74
_10773_,138.66
mgmt_buffers.mprj_logic1\[357\],138.66
user_gpio_noesd[10],138.6
soc.core.interface9_bank_bus_dat_r\[16\],138.58
user_gpio_noesd[16],138.58
user_gpio_noesd[8],138.52
net10178,138.5
user_gpio_noesd[9],138.39
soc.core.mgmtsoc_vexriscv_transfer_complete,138.37
clknet_leaf_1047_mgmt_buffers.caravel_clk,138.36
_03918_,138.335
net12016,138.28
clknet_leaf_1117_mgmt_buffers.caravel_clk,138.26
soc.core.VexRiscv._zz_RegFilePlugin_regFile_port1\[24\],138.2
net12925,138.16
_00118_,138.14
_10946_,138.14
net10150,138.14
net3592,138.12
_13992_,138.1
net4093,138.1
net4558,138.09
net4893,138.09
_00099_,138.065
net7749,138.055
_03462_,137.98
soc.core.interface10_bank_bus_dat_r\[27\],137.98
_03804_,137.89
_03906_,137.89
_10543_,137.86
_12925_,137.86
soc.core.dff2_bus_dat_r\[26\],137.86
soc.core.VexRiscv.externalInterruptArray_regNext\[6\],137.84
net3137,137.84
user_gpio_noesd[14],137.82
net10861,137.82
clknet_leaf_282_mgmt_buffers.caravel_clk,137.8
_04230_,137.74
net308,137.68
soc.core.VexRiscv.dBusWishbone_DAT_MISO\[20\],137.6
net9734,137.59
_14531_,137.58
clknet_leaf_353_mgmt_buffers.caravel_clk,137.58
_11528_,137.56
net3217,137.54
net3172,137.52
net12258,137.5
net499,137.48
net699,137.435
net1233,137.43
net10204,137.43
clknet_leaf_277_mgmt_buffers.caravel_clk,137.42
net825,137.415
net13174,137.4
_12467_,137.385
_14153_,137.32
_00005_,137.28
gpio_control_bidir_2\[0\].mgmt_ena,137.26
soc.core.interface10_bank_bus_dat_r\[24\],137.26
net12898,137.22
net11490,137.21
soc.core.VexRiscv.lastStagePc\[10\],137.2
_13731_,137.18
soc.core.interface10_bank_bus_dat_r\[25\],137.16
soc.core.gpioin3_gpioin3_edge_storage,137.155
clknet_leaf_122_mgmt_buffers.caravel_clk,137.12
soc.core.la_ien_storage\[51\],137.1
net10282,137.08
net3823,137.06
net3269,137
net12169,136.94
soc.core.la_out_storage\[92\],136.93
_14318_,136.905
net4170,136.88
gpio_control_bidir_2\[2\].shift_register\[3\],136.86
net4133,136.82
net6359,136.82
net3704,136.8
soc.core.VexRiscv.dBusWishbone_ADR\[8\],136.705
net8814,136.7
soc.core.spi_master_clk_divider1\[4\],136.66
gpio_control_in_2\[5\].serial_clock,136.64
soc.core.mgmtsoc_litespisdrphycore_sr_out\[23\],136.62
user_io_out\[14\],136.61
net697,136.58
_12841_,136.54
net1204,136.54
soc.core.VexRiscv.dBusWishbone_DAT_MISO\[1\],136.5
net8813,136.48
_13410_,136.46
net11821,136.41
net3783,136.4
soc.core.VexRiscv._zz_CsrPlugin_csrMapping_readDataInit\[4\],136.39
_00139_,136.38
_04817_,136.38
mgmt_buffers.la_oenb_core\[38\],136.28
soc.core.interface10_bank_bus_dat_r\[14\],136.26
net3267,136.14
clknet_leaf_433_mgmt_buffers.caravel_clk,136.08
gpio_control_in_2\[5\].serial_data_in,136.06
net12240,136.06
net2365,136.055
net818,135.985
_14282_,135.98
net3576,135.98
mgmt_buffers.la_data_in_mprj\[42\],135.97
mgmt_buffers.la_data_in_enable\[56\],135.9
soc.core.VexRiscv.CsrPlugin_csrMapping_writeDataSignal\[18\],135.775
net756,135.75
net140,135.74
net694,135.73
_12690_,135.72
_09093_,135.7
mgmt_buffers.la_data_in_core\[35\],135.7
_11175_,135.68
soc.core.interface10_bank_bus_dat_r\[26\],135.68
net3510,135.66
net8779,135.66
_04872_,135.52
net1229,135.51
gpio_control_in_1a\[4\].gpio_logic1,135.48
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[0\]\[11\],135.47
net4032,135.42
net12057,135.4
_03793_,135.36
_13267_,135.36
net10843,135.36
net3090,135.32
_09234_,135.315
_05038_,135.28
_11355_,135.28
_00357_,135.26
_14125_,135.26
mgmt_buffers.la_data_out_core\[45\],135.26
soc.core.la_ien_storage\[63\],135.26
net11394,135.235
_03821_,135.2
_05036_,135.18
net933,135.16
net9643,135.16
net12597,135.14
soc.core.mgmtsoc_vexriscv_debug_bus_dat_r\[22\],135.12
clknet_leaf_165_mgmt_buffers.caravel_clk,135.12
soc.core.VexRiscv.IBusCachedPlugin_cache._zz_fetchStage_read_waysValues_0_tag_valid_2\[3\],135
net10609,135
net10175,134.98
_13809_,134.965
_11785_,134.96
clknet_leaf_64_mgmt_buffers.caravel_clk,134.96
_10430_,134.88
_14678_,134.87
mgmt_buffers.la_data_in_mprj\[52\],134.86
soc.core.VexRiscv._zz_RegFilePlugin_regFile_port0\[11\],134.86
soc.core.spi_master_clk_divider1\[11\],134.86
net2854,134.78
net3949,134.76
_00345_,134.74
clknet_leaf_516_mgmt_buffers.caravel_clk,134.68
_11885_,134.675
_13228_,134.62
_12668_,134.61
mgmt_buffers.la_data_in_mprj_bar\[56\],134.6
mgmt_buffers.la_oenb_core\[43\],134.6
soc.core.VexRiscv.IBusCachedPlugin_cache.decodeStage_mmuRsp_physicalAddress\[17\],134.6
_14171_,134.56
soc.core.gpioin3_gpioin3_irq,134.56
soc.core.multiregimpl94_regs1,134.56
net9675,134.55
user_io_out\[5\],134.53
net3309,134.48
_03865_,134.47
clknet_leaf_389_mgmt_buffers.caravel_clk,134.42
soc.core.multiregimpl79_regs1,134.32
_10450_,134.3
soc.core.gpioin1_gpioin1_pending,134.3
_04296_,134.24
clknet_leaf_290_mgmt_buffers.caravel_clk,134.2
soc.core.VexRiscv.IBusCachedPlugin_cache._zz_fetchStage_read_waysValues_0_tag_valid_2\[0\],134.16
user_io_out\[16\],134.15
gpio_control_bidir_2\[2\].gpio_defaults\[12\],134.14
net12608,134.14
soc.core.la_oe_storage\[95\],134.12
soc.core.VexRiscv.RegFilePlugin_regFile\[15\]\[1\],134.08
_04440_,134.06
net12563,133.99
_13407_,133.98
soc.core.dbg_uart_length\[1\],133.98
net11170,133.98
clknet_leaf_70_mgmt_buffers.caravel_clk,133.94
net335,133.92
net2726,133.88
net12264,133.86
net10674,133.85
_11892_,133.84
net3752,133.82
soc.core.multiregimpl27_regs1,133.8
mgmt_buffers.la_data_in_enable\[52\],133.78
net11825,133.78
net2008,133.775
net6435,133.72
mgmt_buffers.la_data_in_mprj_bar\[55\],133.54
net10202,133.54
net10115,133.535
_00329_,133.52
net178,133.515
soc.core.VexRiscv.CsrPlugin_mtval\[17\],133.5
soc.core.VexRiscv._zz_RegFilePlugin_regFile_port0\[17\],133.46
_14308_,133.44
_14008_,133.42
soc.core.mgmtsoc_reload_storage\[21\],133.4
net4046,133.4
gpio_control_in_2\[8\].user_gpio_in,133.37
soc.core.dbg_uart_length\[0\],133.36
mprj_io_oeb[26],133.35
_07179_,133.3
net3135,133.3
_14160_,133.28
_04639_,133.26
net11429,133.24
clknet_leaf_479_mgmt_buffers.caravel_clk,133.22
gpio_control_bidir_1\[0\].gpio_defaults\[12\],133.21
soc.core.la_ien_storage\[106\],133.2
soc.core.multiregimpl8_regs1,133.2
_03518_,133.18
_04752_,133.175
mgmt_buffers.mprj_logic1\[225\],133.17
_11595_,133.14
net4566,133.14
net2753,133.12
net1398,133.09
soc.core.VexRiscv.CsrPlugin_mtval\[4\],133.08
_02665_,133.04
net10046,133.02
_04950_,132.99
soc.core.VexRiscv._zz_RegFilePlugin_regFile_port0\[16\],132.98
soc.core.spimaster_storage\[14\],132.96
net4359,132.96
soc.core.spi_master_mosi_storage\[7\],132.94
net10331,132.9
_11206_,132.86
_11430_,132.76
_11278_,132.74
net3883,132.74
soc.core.spi_master_clk_divider1\[7\],132.64
net206,132.64
soc.core.VexRiscv.dBusWishbone_DAT_MISO\[2\],132.635
soc.core.mgmtsoc_vexriscv_debug_bus_dat_r\[2\],132.62
clknet_leaf_922_mgmt_buffers.caravel_clk,132.58
soc.core.VexRiscv.CsrPlugin_mip_MSIP,132.56
soc.core.la_ien_storage\[125\],132.56
clknet_leaf_552_mgmt_buffers.caravel_clk,132.56
net3073,132.54
net3941,132.52
soc.core.VexRiscv.CsrPlugin_mepc\[14\],132.49
soc.core.VexRiscv.CsrPlugin_mepc\[24\],132.405
net4227,132.295
net8204,132.26
clknet_leaf_444_mgmt_buffers.caravel_clk,132.24
clknet_leaf_589_mgmt_buffers.caravel_clk,132.24
_11900_,132.18
net3900,132.18
net12607,132.18
net1335,132.17
gpio_control_in_2\[8\].gpio_logic1,132.14
soc.core.VexRiscv.dBusWishbone_ADR\[14\],132.12
_03994_,132.1
_03801_,132.08
soc.core.VexRiscv.IBusCachedPlugin_cache._zz_fetchStage_read_waysValues_0_tag_valid_2\[2\],132.04
_13219_,132
soc.core.VexRiscv.RegFilePlugin_regFile\[13\]\[2\],132
_04633_,131.82
_02349_,131.8
net3112,131.795
net11989,131.78
_14805_,131.77
clknet_leaf_607_mgmt_buffers.caravel_clk,131.76
net3980,131.76
soc.core.interface10_bank_bus_dat_r\[8\],131.74
soc.core.VexRiscv.CsrPlugin_mepc\[11\],131.705
net10058,131.7
_11493_,131.66
net9848,131.66
_02460_,131.64
clknet_leaf_604_mgmt_buffers.caravel_clk,131.64
net1350,131.635
net1317,131.6
clknet_leaf_975_mgmt_buffers.caravel_clk,131.6
net2764,131.6
_03456_,131.58
_04191_,131.58
soc.core.VexRiscv._zz_RegFilePlugin_regFile_port0\[27\],131.58
clknet_leaf_670_mgmt_buffers.caravel_clk,131.575
soc.core.mgmtsoc_vexriscv_i_cmd_payload_data\[11\],131.535
_00365_,131.5
net11629,131.48
net1897,131.445
net1034,131.43
soc.core.VexRiscv.CsrPlugin_mtval\[22\],131.42
clknet_leaf_384_mgmt_buffers.caravel_clk,131.42
soc.core.VexRiscv.IBusCachedPlugin_cache.lineLoader_valid,131.38
net9269,131.38
_11907_,131.34
net10009,131.32
net705,131.3
net3154,131.265
net182,131.18
soc.core.VexRiscv.IBusCachedPlugin_cache.lineLoader_address\[25\],131.16
clknet_5_28_0_mgmt_buffers.caravel_clk,131.14
mgmt_buffers.la_data_in_mprj_bar\[57\],131.12
net10327,131.1
_04624_,131.04
_12595_,131.02
clknet_leaf_702_mgmt_buffers.caravel_clk,131.02
net11996,131.02
_11168_,130.98
user_io_out\[8\],130.88
net1880,130.88
mgmt_buffers.la_data_out_core\[53\],130.86
net5930,130.855
_11290_,130.84
_10541_,130.82
_03041_,130.78
net2750,130.76
gpio_inenb_core,130.72
_02461_,130.7
net11344,130.66
net2055,130.515
net2925,130.5
net4077,130.5
_14860_,130.48
net4320,130.44
_03811_,130.38
_03713_,130.36
_14503_,130.36
_04844_,130.35
soc.core.la_out_storage\[31\],130.3
clknet_leaf_27_mgmt_buffers.caravel_clk,130.3
_10528_,130.28
net3224,130.25
_00913_,130.24
mask_rev\[8\],130.23
user_io_out\[10\],130.16
net5059,130.125
net3844,130.12
gpio_control_in_1a\[1\].mgmt_ena,130.115
soc.core.VexRiscv.dBusWishbone_DAT_MISO\[7\],130.115
mprj_io_in_3v3[18],130.1
_00344_,130.08
net408,130.015
soc.core.VexRiscv._zz_dBus_cmd_payload_data\[30\],130
clknet_leaf_983_mgmt_buffers.caravel_clk,129.96
net2703,129.96
net4507,129.94
mgmt_buffers.la_data_in_mprj_bar\[45\],129.92
net3167,129.905
net4697,129.9
soc.core.VexRiscv.IBusCachedPlugin_cache._zz_fetchStage_read_waysValues_0_tag_valid_2\[24\],129.86
soc.core.VexRiscv.CsrPlugin_mtval\[14\],129.84
mgmt_buffers.la_data_in_core\[36\],129.82
_04842_,129.81
_14304_,129.8
clknet_leaf_603_mgmt_buffers.caravel_clk,129.75
mgmt_buffers.la_data_out_core\[39\],129.74
net42,129.74
net4870,129.74
gpio_control_in_1\[0\].serial_clock,129.7
net3537,129.68
net4106,129.65
soc.core.la_out_storage\[85\],129.64
_12462_,129.62
net8602,129.62
clknet_leaf_602_mgmt_buffers.caravel_clk,129.615
mprj_io_in_3v3[21],129.59
_09258_,129.585
_03565_,129.58
_02357_,129.56
_00107_,129.5
_13196_,129.5
mgmt_buffers.la_oenb_core\[26\],129.5
clknet_leaf_733_mgmt_buffers.caravel_clk,129.41
clknet_leaf_18_mgmt_buffers.caravel_clk,129.395
_14323_,129.39
mgmt_buffers.la_oenb_core\[33\],129.36
soc.core.interface10_bank_bus_dat_r\[13\],129.36
net9161,129.36
net9571,129.34
net9094,129.33
_10825_,129.32
_00368_,129.26
mgmt_buffers.la_data_in_enable\[55\],129.26
soc.core.VexRiscv.RegFilePlugin_regFile\[29\]\[23\],129.24
soc.core.VexRiscv.dBusWishbone_DAT_MOSI\[15\],129.24
net5208,129.22
net1693,129.2
mgmt_buffers.la_data_in_mprj_bar\[54\],129.16
net12632,129.16
_02666_,129.12
net3477,129.12
soc.core.VexRiscv.CsrPlugin_csrMapping_writeDataSignal\[19\],129.015
mprj_io_in_3v3[20],129.01
clknet_leaf_532_mgmt_buffers.caravel_clk,128.96
soc.core.VexRiscv.RegFilePlugin_regFile\[17\]\[1\],128.94
net10087,128.94
_03471_,128.88
net5508,128.88
_03891_,128.85
soc.core.VexRiscv._zz_execute_ALU_CTRL\[0\],128.84
gpio_control_in_2\[5\].shift_register\[12\],128.82
_13229_,128.815
mprj_io_in_3v3[16],128.8
_09231_,128.785
mgmt_buffers.la_data_in_mprj_bar\[58\],128.77
soc.core.interface10_bank_bus_dat_r\[31\],128.74
soc.core.interface11_bank_bus_dat_r\[5\],128.7
_04797_,128.68
_04870_,128.64
clknet_leaf_1127_mgmt_buffers.caravel_clk,128.64
net9630,128.64
clknet_leaf_955_mgmt_buffers.caravel_clk,128.58
net4317,128.56
net9261,128.535
_02596_,128.48
gpio_control_in_1a\[0\].shift_register\[0\],128.48
_12888_,128.46
_10681_,128.44
net2700,128.44
net3087,128.44
mgmt_buffers.la_data_in_mprj_bar\[47\],128.4
net3414,128.39
_08902_,128.32
_13808_,128.32
mprj_io_in_3v3[23],128.31
net11869,128.3
_00481_,128.28
mgmt_buffers.la_data_in_mprj_bar\[50\],128.26
clknet_leaf_967_mgmt_buffers.caravel_clk,128.23
_14186_,128.22
net2967,128.2
net4266,128.2
_02659_,128.16
_00065_,128.12
_11292_,128.12
mgmt_buffers.mprj_logic1\[237\],128.1
net10817,128.1
_14208_,128.06
soc.core.mgmtsoc_value\[0\],128.04
_11300_,128.02
_13791_,128.02
gpio_control_bidir_2\[1\].serial_clock,127.965
_02610_,127.955
net1954,127.94
_00088_,127.935
_04614_,127.9
_14890_,127.9
net1044,127.84
net4408,127.82
net8547,127.82
mgmt_buffers.mprj_logic1\[100\],127.81
_03903_,127.795
_03654_,127.79
_00388_,127.74
net3250,127.74
soc.core.VexRiscv.CsrPlugin_mtval\[7\],127.72
soc.core.RAM256.Do0_pre\[1\]\[19\],127.7
_12956_,127.68
clknet_leaf_447_mgmt_buffers.caravel_clk,127.66
_14292_,127.62
_14143_,127.58
clknet_leaf_84_mgmt_buffers.caravel_clk,127.56
_12762_,127.52
_05516_,127.49
clknet_leaf_862_mgmt_buffers.caravel_clk,127.37
net12479,127.34
user_io_out\[18\],127.33
clknet_5_22_0_mgmt_buffers.caravel_clk,127.28
clknet_leaf_825_mgmt_buffers.caravel_clk,127.24
soc.core.dbg_uart_address\[11\],127.235
mgmt_buffers.mprj_logic1\[462\],127.2
_12955_,127.1
user_io_out\[15\],127.08
soc.core.VexRiscv.RegFilePlugin_regFile\[26\]\[14\],127.05
_03560_,127.04
soc.core.VexRiscv.dBusWishbone_ADR\[6\],127.025
_04948_,127.02
mgmt_buffers.mprj_logic1\[358\],126.98
soc.core.VexRiscv._zz_dBus_cmd_payload_data\[31\],126.96
net201,126.955
soc.core.mgmtsoc_vexriscv_transfer_in_progress,126.92
net3104,126.92
_10680_,126.9
mprj_io_in_3v3[22],126.9
soc.core.VexRiscv._zz_RegFilePlugin_regFile_port0\[26\],126.9
net430,126.9
net11439,126.9
net4649,126.88
clknet_leaf_999_mgmt_buffers.caravel_clk,126.86
_11230_,126.84
_11448_,126.8
clknet_leaf_445_mgmt_buffers.caravel_clk,126.74
soc.core.VexRiscv._zz_execute_ALU_CTRL\[1\],126.72
net10088,126.68
net10278,126.605
mgmt_buffers.la_data_in_mprj_bar\[39\],126.59
net3565,126.56
net4209,126.54
mgmt_buffers.mprj_logic1\[214\],126.5
_14768_,126.485
soc.core.uart_rx_fifo_level0\[0\],126.455
mgmt_buffers.la_data_in_mprj_bar\[82\],126.44
net2738,126.44
net8109,126.42
_13279_,126.38
mgmt_buffers.mprj_logic1\[20\],126.36
net3982,126.32
soc.core.mgmtsoc_value\[14\],126.3
net198,126.26
soc.core.VexRiscv.dBusWishbone_ADR\[15\],126.245
_04604_,126.22
net10113,126.22
_04953_,126.21
_11911_,126.18
soc.core.VexRiscv.RegFilePlugin_regFile\[9\]\[4\],126.16
soc.core.mgmtsoc_value\[18\],126.135
net2856,126.1
clknet_leaf_888_mgmt_buffers.caravel_clk,126.08
mprj_io_in_3v3[15],126.07
_00137_,126.06
net3545,126.06
net3591,126.06
_00342_,126.04
soc.core.VexRiscv.DBusSimplePlugin_memoryExceptionPort_payload_badAddr\[10\],126.04
net3727,126.04
net10359,126.03
_04293_,126.025
clknet_leaf_817_mgmt_buffers.caravel_clk,126.02
_12752_,126
net12310,126
net7715,125.94
net2836,125.935
net9591,125.88
_04787_,125.84
_10393_,125.82
net2883,125.78
soc.core.VexRiscv._zz_dBus_cmd_payload_data\[9\],125.76
_03916_,125.72
clknet_leaf_333_mgmt_buffers.caravel_clk,125.72
gpio_control_bidir_2\[2\].gpio_defaults\[11\],125.7
_14116_,125.64
net9889,125.64
user_io_out\[17\],125.6
_00379_,125.58
net4534,125.575
net10119,125.56
mgmt_buffers.mprj_logic1\[228\],125.54
soc.core.uartwishbonebridge_rs232phytx_next_state,125.54
net12425,125.54
mgmt_buffers.mprj_logic1\[355\],125.52
mgmt_buffers.la_data_in_mprj\[39\],125.5
net9249,125.48
net3816,125.425
net3027,125.42
_00064_,125.38
net12615,125.38
_04923_,125.32
soc.core.VexRiscv.CsrPlugin_mepc\[16\],125.29
_13423_,125.28
soc.core.VexRiscv.DBusSimplePlugin_memoryExceptionPort_payload_badAddr\[1\],125.28
_11890_,125.27
net2779,125.26
soc.core.VexRiscv.IBusCachedPlugin_cache._zz_fetchStage_read_waysValues_0_tag_valid_2\[10\],125.22
_04907_,125.21
_14176_,125.18
mgmt_buffers.la_data_in_mprj\[47\],125.18
mgmt_buffers.mprj_logic1\[23\],125.18
_14274_,125.16
soc.core.multiregimpl134_regs0,125.14
_11880_,125.1
soc.core.spi_master_miso\[6\],125.1
_11627_,125.04
mprj_io_in_3v3[19],125.04
_12482_,125.02
clknet_leaf_1050_mgmt_buffers.caravel_clk,124.94
_14092_,124.92
mgmt_buffers.mprj_logic1\[93\],124.92
clknet_leaf_422_mgmt_buffers.caravel_clk,124.92
net6552,124.9
net3409,124.88
soc.core.spi_master_control_storage\[14\],124.815
mgmt_buffers.la_data_in_mprj_bar\[63\],124.8
soc.core.interface6_bank_bus_dat_r\[8\],124.78
net4297,124.78
soc.core.VexRiscv.CsrPlugin_csrMapping_writeDataSignal\[22\],124.775
mgmt_buffers.la_data_in_mprj\[56\],124.76
net10214,124.76
_05001_,124.74
soc.core.VexRiscv.CsrPlugin_mepc\[6\],124.72
mask_rev\[31\],124.71
mprj_io_in_3v3[17],124.71
net597,124.7
clknet_7_124__leaf_mgmt_buffers.caravel_clk,124.7
_11270_,124.62
clknet_leaf_253_mgmt_buffers.caravel_clk,124.62
mgmt_buffers.la_data_in_mprj_bar\[64\],124.6
mgmt_buffers.mprj_logic1\[18\],124.58
soc.core.VexRiscv.CsrPlugin_csrMapping_writeDataSignal\[15\],124.575
net3593,124.56
mgmt_buffers.la_data_in_core\[31\],124.54
mgmt_buffers.mprj_logic1\[341\],124.48
net9005,124.44
net3551,124.36
_03908_,124.34
soc.core.VexRiscv.CsrPlugin_csrMapping_writeDataSignal\[0\],124.33
mprj_io_in_3v3[14],124.32
soc.core.la_out_storage\[81\],124.28
net824,124.28
_00001_,124.22
net3794,124.22
net9752,124.135
_03087_,124.12
net11200,124.06
net3116,124.055
gpio_control_in_2\[2\].serial_clock,124.02
net6044,124
_11451_,123.96
_11189_,123.94
net10106,123.94
net703,123.88
net11665,123.86
net3156,123.84
clknet_leaf_377_mgmt_buffers.caravel_clk,123.82
_14683_,123.74
net12383,123.72
soc.core.mgmtsoc_scratch_storage\[19\],123.7
net8868,123.7
soc.core.flash_io0_oeb,123.69
_08895_,123.68
_10819_,123.58
_14107_,123.48
net6959,123.425
net10481,123.385
soc.core.VexRiscv.RegFilePlugin_regFile\[13\]\[4\],123.36
_14127_,123.34
_10668_,123.33
net10375,123.33
mgmt_buffers.la_data_in_mprj\[50\],123.295
mgmt_buffers.la_data_out_core\[51\],123.26
clknet_7_51__leaf_mgmt_buffers.caravel_clk,123.26
clknet_leaf_452_mgmt_buffers.caravel_clk,123.24
net10028,123.24
_07170_,123.22
gpio_control_in_1\[2\].gpio_logic1,123.2
gpio_control_in_2\[7\].serial_clock,123.18
_11156_,123.16
clknet_leaf_111_mgmt_buffers.caravel_clk,123.16
soc.core.spi_master_clk_divider1\[9\],123.14
mask_rev\[4\],123.11
_04831_,123.1
soc.core.VexRiscv.RegFilePlugin_regFile\[12\]\[2\],123.08
net11641,123.06
soc.core.VexRiscv.RegFilePlugin_regFile\[20\]\[2\],123
gpio_control_in_2\[4\].serial_clock,122.98
clknet_leaf_629_mgmt_buffers.caravel_clk,122.98
soc.core.VexRiscv.IBusCachedPlugin_cache._zz_fetchStage_read_waysValues_0_tag_valid_2\[20\],122.94
net11370,122.88
_04748_,122.84
net3148,122.81
_04998_,122.775
_04751_,122.71
_04245_,122.7
_10652_,122.7
mgmt_buffers.la_data_in_enable\[26\],122.7
clknet_leaf_878_mgmt_buffers.caravel_clk,122.68
net3033,122.62
_00077_,122.61
_02680_,122.6
_12959_,122.58
clknet_leaf_136_mgmt_buffers.caravel_clk,122.56
net10199,122.56
soc.core.spi_master_clk_divider1\[12\],122.52
_04904_,122.41
net2012,122.39
_14854_,122.38
soc.core.VexRiscv.RegFilePlugin_regFile\[25\]\[16\],122.38
net18,122.38
_11606_,122.36
_10691_,122.32
soc.core.VexRiscv.decode_to_execute_RS1\[13\],122.29
net9728,122.29
_00087_,122.285
_14545_,122.28
net2732,122.28
net718,122.26
_09094_,122.2
_13311_,122.2
mgmt_buffers.la_data_out_core\[29\],122.2
soc.core.mgmtsoc_value_status\[7\],122.16
soc.core.VexRiscv._zz_execute_SRC2\[20\],122.1
net179,122.08
net10848,122
clknet_leaf_263_mgmt_buffers.caravel_clk,121.98
net3751,121.96
_14303_,121.92
soc.core.mgmtsoc_litespimmap_storage\[1\],121.91
_14981_,121.855
_10682_,121.72
_04306_,121.71
net3796,121.7
_14793_,121.68
net9432,121.66
soc.core.VexRiscv.IBusCachedPlugin_cache.reset,121.6
_14271_,121.54
clknet_leaf_1046_mgmt_buffers.caravel_clk,121.54
_03479_,121.53
net13023,121.52
_11312_,121.48
net3546,121.48
soc.core.uart_rx_fifo_level0\[1\],121.45
net3563,121.42
net9844,121.405
soc.core.la_ien_storage\[35\],121.4
mgmt_buffers.mprj_logic1\[99\],121.37
net4121,121.36
_12122_,121.32
mgmt_buffers.la_data_in_mprj_bar\[10\],121.26
clknet_leaf_851_mgmt_buffers.caravel_clk,121.26
_09163_,121.16
net4264,121.14
_04848_,121.12
clknet_leaf_1177_mgmt_buffers.caravel_clk,121.1
net12753,121.06
_10557_,121.04
_14138_,121.04
soc.core.interface10_bank_bus_dat_r\[29\],121
mgmt_buffers.la_data_in_enable\[27\],120.98
soc.core.VexRiscv._zz_dBus_cmd_payload_data\[18\],120.98
_13070_,120.97
net9979,120.96
net820,120.945
_04634_,120.92
soc.core.VexRiscv.IBusCachedPlugin_fetchPc_inc,120.92
net2931,120.9
soc.core.VexRiscv.IBusCachedPlugin_cache.lineLoader_address\[26\],120.88
_12732_,120.86
_14193_,120.86
_11855_,120.84
soc.core.VexRiscv.RegFilePlugin_regFile\[23\]\[1\],120.84
_14799_,120.825
_11842_,120.8
_01212_,120.76
gpio_control_in_2\[3\].serial_clock,120.76
net4392,120.76
net10108,120.76
_02620_,120.72
soc.core.VexRiscv.IBusCachedPlugin_cache._zz_fetchStage_read_waysValues_0_tag_valid_2\[17\],120.72
_13119_,120.7
mgmt_buffers.la_data_in_mprj_bar\[24\],120.66
mgmt_buffers.la_data_in_mprj_bar\[62\],120.66
net168,120.66
net3181,120.65
soc.core.VexRiscv.IBusCachedPlugin_cache.io_cpu_decode_data\[7\],120.64
soc.core.VexRiscv._zz_RegFilePlugin_regFile_port0\[13\],120.62
net4472,120.61
soc.core.VexRiscv.decode_to_execute_RS2\[23\],120.6
_10836_,120.58
soc.core.interface11_bank_bus_dat_r\[3\],120.58
net11896,120.5
soc.core.VexRiscv.IBusCachedPlugin_cache.io_cpu_fetch_mmuRsp_physicalAddress\[20\],120.44
soc.core.VexRiscv.IBusCachedPlugin_cache._zz_fetchStage_read_waysValues_0_tag_valid_2\[21\],120.4
soc.core.VexRiscv.memory_arbitration_haltItself,120.24
soc.core.VexRiscv.CsrPlugin_mtval\[29\],120.2
mgmt_buffers.la_oenb_core\[35\],120.18
net4107,120.18
_00336_,120.14
soc.core.la_ien_storage\[33\],120.12
mgmt_buffers.la_data_in_mprj\[54\],120.105
_04706_,120.08
soc.core.VexRiscv.CsrPlugin_mtval\[20\],120.06
net704,120.05
_14131_,120.02
net2363,120.02
_03486_,119.98
_14259_,119.96
clknet_leaf_534_mgmt_buffers.caravel_clk,119.92
clknet_leaf_1195_mgmt_buffers.caravel_clk,119.92
mgmt_buffers.la_data_out_core\[60\],119.9
_14705_,119.86
net4302,119.86
net3200,119.85
_08896_,119.84
net10904,119.84
_12614_,119.8
_13798_,119.78
_09183_,119.745
net10233,119.74
soc.core.multiregimpl18_regs1,119.72
clknet_leaf_340_mgmt_buffers.caravel_clk,119.72
net1268,119.68
soc.core.VexRiscv.RegFilePlugin_regFile\[15\]\[2\],119.66
_03876_,119.62
net3548,119.6
_14682_,119.58
_14767_,119.57
clknet_leaf_205_mgmt_buffers.caravel_clk,119.52
net3812,119.52
_14835_,119.5
soc.core.uart_rx_fifo_level0\[4\],119.5
net2973,119.44
net3967,119.44
net3282,119.42
_12651_,119.415
soc.core.mgmtsoc_reload_storage\[18\],119.38
_03033_,119.34
soc.core.RAM256.Do0_pre\[1\]\[11\],119.32
soc.core.VexRiscv.CsrPlugin_mepc\[13\],119.315
_12434_,119.3
soc.core.VexRiscv.DBusSimplePlugin_memoryExceptionPort_payload_badAddr\[29\],119.3
net9210,119.3
net11947,119.3
net3035,119.26
net1397,119.23
gpio_control_bidir_2\[1\].gpio_defaults\[1\],119.22
net2610,119.19
clknet_leaf_1151_mgmt_buffers.caravel_clk,119.18
_12603_,119.17
_13639_,119.16
gpio_control_in_1a\[0\].gpio_defaults\[0\],119.13
_09179_,119.125
net10307,119.115
soc.core.VexRiscv.IBusCachedPlugin_cache.lineLoader_address\[21\],119.1
net4285,119.1
net3700,119.08
_11293_,119.04
_11412_,119.04
net9866,119.04
soc.core.VexRiscv._zz_dBus_cmd_payload_data\[14\],118.94
soc.core.VexRiscv._zz_execute_to_memory_REGFILE_WRITE_DATA\[2\],118.94
net8398,118.94
net8689,118.94
soc.core.VexRiscv.DBusSimplePlugin_memoryExceptionPort_payload_badAddr\[2\],118.93
net1228,118.88
net10149,118.88
_12669_,118.86
_03463_,118.84
gpio_control_in_1a\[3\].serial_data_out,118.82
soc.core.multiregimpl39_regs1,118.8
clknet_leaf_1076_mgmt_buffers.caravel_clk,118.78
net4654,118.78
_11532_,118.655
net10638,118.62
net8397,118.58
clknet_leaf_606_mgmt_buffers.caravel_clk,118.56
_02350_,118.54
soc.core.mgmtsoc_litespisdrphycore_sr_out\[5\],118.5
net3000,118.5
net9853,118.5
net9511,118.49
soc.core.VexRiscv.DBusSimplePlugin_memoryExceptionPort_payload_badAddr\[24\],118.48
soc.core.flash_clk,118.47
net11453,118.46
soc.core.mgmtsoc_litespisdrphycore_sr_out\[18\],118.42
net11150,118.405
soc.core.VexRiscv.IBusCachedPlugin_cache.io_cpu_fetch_mmuRsp_physicalAddress\[5\],118.4
soc.core.interface11_bank_bus_dat_r\[7\],118.4
soc.core.interface6_bank_bus_dat_r\[11\],118.4
net10179,118.4
_12615_,118.315
soc.core.uart_enabled,118.27
_03475_,118.26
soc.core.VexRiscv.RegFilePlugin_regFile\[17\]\[23\],118.26
_10904_,118.23
_10928_,118.23
net3371,118.22
soc.core.VexRiscv.CsrPlugin_mepc\[27\],118.205
_10568_,118.14
_14717_,118.12
_05071_,118.1
net4105,118.1
net10322,118.07
net4526,118.02
mgmt_buffers.la_data_in_mprj\[82\],118.005
_00089_,118
net3139,118
net2962,117.98
_02589_,117.95
_10799_,117.94
_12947_,117.94
_02627_,117.93
_03513_,117.93
_14182_,117.93
_00096_,117.92
_14205_,117.92
mgmt_buffers.la_data_in_mprj\[23\],117.9
net11494,117.88
net3153,117.84
net11813,117.84
net11363,117.82
net4545,117.8
soc.core.VexRiscv.CsrPlugin_mtvec_base\[16\],117.76
net3969,117.74
soc.core.VexRiscv.CsrPlugin_csrMapping_writeDataSignal\[1\],117.7
soc.core.grant\[1\],117.7
net10002,117.685
mgmt_buffers.la_data_in_mprj_bar\[22\],117.64
soc.core.VexRiscv.RegFilePlugin_regFile\[14\]\[2\],117.64
_12478_,117.6
_02603_,117.56
gpio_control_in_1a\[3\].shift_register\[12\],117.52
net9769,117.52
net10535,117.515
net4,117.485
net3792,117.48
clknet_leaf_1180_mgmt_buffers.caravel_clk,117.46
soc.core.VexRiscv.RegFilePlugin_regFile\[12\]\[4\],117.38
net4305,117.38
_14733_,117.34
clknet_leaf_1077_mgmt_buffers.caravel_clk,117.34
gpio_control_bidir_2\[1\].serial_data_in,117.32
net11397,117.32
net961,117.255
_02613_,117.24
net4487,117.21
_03806_,117.2
_11491_,117.2
net3929,117.16
net1576,117.12
net2341,117.12
soc.core.VexRiscv.DBusSimplePlugin_memoryExceptionPort_payload_badAddr\[3\],117.1
soc.core.VexRiscv.CsrPlugin_csrMapping_writeDataSignal\[21\],117.06
net12082,117.06
soc.core.mgmtsoc_scratch_storage\[16\],117.04
net4547,117.025
soc.core.VexRiscv.IBusCachedPlugin_cache._zz_fetchStage_read_waysValues_0_tag_valid_2\[8\],117.02
_12179_,117
mgmt_buffers.la_data_in_mprj\[31\],116.985
clknet_leaf_531_mgmt_buffers.caravel_clk,116.98
net11343,116.98
_14081_,116.96
net2452,116.95
user_io_oeb\[4\],116.91
net175,116.895
net10903,116.88
_03593_,116.86
soc.core.VexRiscv._zz_RegFilePlugin_regFile_port0\[30\],116.86
net9953,116.86
net3142,116.84
net2927,116.795
clknet_leaf_476_mgmt_buffers.caravel_clk,116.78
_12141_,116.76
net4363,116.76
_14387_,116.74
mgmt_buffers.la_data_in_mprj\[22\],116.74
_14646_,116.7
net171,116.7
_03458_,116.68
soc.core.spi_master_clk_divider1\[8\],116.67
soc.core.VexRiscv.IBusCachedPlugin_cache.io_mem_rsp_payload_data\[12\],116.62
net2959,116.61
_02720_,116.6
_10456_,116.58
_12361_,116.58
clknet_leaf_257_mgmt_buffers.caravel_clk,116.58
_14812_,116.52
_13989_,116.48
_13274_,116.44
_03465_,116.42
_00378_,116.38
mgmt_buffers.la_data_in_enable\[28\],116.36
net10098,116.335
_03482_,116.32
_14606_,116.28
net11381,116.26
_00484_,116.22
soc.core.VexRiscv.DBusSimplePlugin_memoryExceptionPort_payload_badAddr\[26\],116.22
net1896,116.2
net3920,116.2
_11224_,116.165
_03638_,116.14
gpio_control_bidir_2\[2\].gpio_defaults\[2\],116.13
clknet_5_9_0_mgmt_buffers.caravel_clk,116.12
_04754_,116.11
net4021,116.1
soc.core.VexRiscv.dBusWishbone_DAT_MOSI\[16\],116.08
soc.core.flash_io1_di,116.035
_04249_,116.01
_14711_,116.01
flash_io1_di,116.01
net2444,116
_11647_,115.98
net2729,115.98
mgmt_buffers.mprj_logic1\[16\],115.94
mgmt_buffers.mprj_stb_o_core,115.94
_03053_,115.92
_14870_,115.9
net2827,115.9
_12110_,115.86
net10004,115.86
mgmt_buffers.la_data_in_mprj\[24\],115.765
net8463,115.74
net8869,115.74
net12593,115.74
_03474_,115.72
_11692_,115.72
mgmt_buffers.la_data_in_mprj\[45\],115.68
soc.core.VexRiscv.decode_to_execute_RS2\[31\],115.68
net3538,115.64
_04708_,115.62
soc.core.VexRiscv._zz_dBus_cmd_payload_data\[28\],115.6
net199,115.6
_11626_,115.58
soc.core.VexRiscv.dBusWishbone_ADR\[11\],115.565
clknet_leaf_28_mgmt_buffers.caravel_clk,115.54
net3339,115.54
net4312,115.54
soc.core.interface10_bank_bus_dat_r\[12\],115.52
_04954_,115.5
_05016_,115.495
net4014,115.495
soc.core.mgmtsoc_vexriscv_i_cmd_payload_data\[9\],115.46
_02187_,115.42
_03470_,115.38
gpio_control_bidir_1\[1\].shift_register\[0\],115.34
net3420,115.34
net5320,115.325
clknet_leaf_367_mgmt_buffers.caravel_clk,115.32
soc.core.VexRiscv._zz_RegFilePlugin_regFile_port1\[13\],115.26
clknet_leaf_1156_mgmt_buffers.caravel_clk,115.26
net7716,115.22
net4028,115.185
soc.core.mgmtsoc_litespisdrphycore_sr_cnt_litespiphy_next_value_ce,115.12
clknet_leaf_72_mgmt_buffers.caravel_clk,115.12
_04660_,115.11
soc.core.VexRiscv._zz_dBus_cmd_payload_data\[21\],115.1
soc.core.VexRiscv.IBusCachedPlugin_cache.lineLoader_address\[28\],115.06
net12030,115.06
soc.core.VexRiscv.RegFilePlugin_regFile\[23\]\[2\],115.04
net173,115.04
gpio_control_bidir_1\[0\].gpio_defaults\[2\],114.98
clknet_leaf_656_mgmt_buffers.caravel_clk,114.98
clknet_leaf_428_mgmt_buffers.caravel_clk,114.96
mgmt_buffers.mprj_logic1\[17\],114.955
_13108_,114.93
net11837,114.93
net12907,114.92
_11209_,114.88
net6383,114.88
soc.core.VexRiscv.memory_to_writeBack_REGFILE_WRITE_DATA\[2\],114.86
soc.core.multiregimpl86_regs1,114.84
mask_rev\[10\],114.81
_12712_,114.8
net11192,114.78
net12404,114.78
soc.core.VexRiscv.RegFilePlugin_regFile\[23\]\[29\],114.76
_13090_,114.74
net3301,114.74
_03685_,114.73
_03603_,114.62
soc.core.multiregimpl20_regs1,114.62
mgmt_buffers.la_oenb_core\[28\],114.6
_03467_,114.58
net9859,114.56
_11071_,114.5
clknet_leaf_59_mgmt_buffers.caravel_clk,114.5
net4158,114.5
net10066,114.44
mask_rev\[5\],114.43
mgmt_buffers.la_data_in_mprj\[58\],114.415
_03896_,114.38
soc.core.spi_master_clk_divider1\[5\],114.36
_12945_,114.34
_00703_,114.3
_09360_,114.3
net9999,114.28
soc.core.VexRiscv.RegFilePlugin_regFile\[25\]\[23\],114.26
_11216_,114.24
soc.core.VexRiscv.dBusWishbone_ADR\[16\],114.225
soc.core.VexRiscv.RegFilePlugin_regFile\[17\]\[11\],114.215
gpio_control_in_2\[9\].user_gpio_in,114.19
net9454,114.175
net1893,114.16
soc.core.mgmtsoc_litespisdrphycore_sr_out\[21\],114.115
soc.core.VexRiscv.dBusWishbone_ADR\[7\],114.105
net3,114.1
_12558_,114.08
gpio_control_bidir_2\[1\].shift_register\[0\],114.045
_13784_,114.04
net3159,114.04
mgmt_buffers.la_data_in_mprj_bar\[65\],114.02
clknet_leaf_601_mgmt_buffers.caravel_clk,114.02
net4049,114
soc.core.VexRiscv.RegFilePlugin_regFile\[13\]\[1\],113.98
clknet_leaf_947_mgmt_buffers.caravel_clk,113.98
net3692,113.98
_11434_,113.96
net11369,113.96
_04209_,113.92
_08236_,113.905
net12333,113.87
soc.core.VexRiscv.dBusWishbone_DAT_MISO\[4\],113.86
_04961_,113.85
soc.core.spi_master_clk_divider1\[10\],113.8
clknet_leaf_63_mgmt_buffers.caravel_clk,113.78
user_io_out\[6\],113.76
_00371_,113.72
mprj_io_dm[40],113.69
_11583_,113.68
soc.core.VexRiscv.when_DebugPlugin_l261,113.66
_13641_,113.64
_05034_,113.62
net3487,113.6
gpio_control_in_2\[4\].shift_register\[12\],113.58
soc.core.mgmtsoc_vexriscv_i_cmd_payload_data\[10\],113.58
net8265,113.54
_11584_,113.52
net3642,113.5
gpio_control_in_2\[3\].shift_register\[12\],113.485
soc.core.VexRiscv._zz_dBus_cmd_payload_data\[10\],113.48
clknet_leaf_932_mgmt_buffers.caravel_clk,113.48
net2325,113.44
soc.core.mgmtsoc_litespimmap_storage\[0\],113.415
_12951_,113.4
clknet_leaf_449_mgmt_buffers.caravel_clk,113.38
_11997_,113.36
soc.core.VexRiscv.IBusCachedPlugin_cache.io_mem_rsp_payload_data\[16\],113.36
gpio_control_bidir_1\[0\].gpio_defaults\[11\],113.345
mgmt_buffers.la_data_in_mprj\[55\],113.325
_04897_,113.32
_14063_,113.32
net4751,113.32
_00111_,113.3
clknet_leaf_25_mgmt_buffers.caravel_clk,113.3
_04202_,113.28
net11782,113.28
net11362,113.2
_00341_,113.19
gpio_control_bidir_2\[2\].shift_register\[12\],113.18
soc.core.mgmtsoc_reset_storage\[0\],113.18
net7993,113.14
pll.ringosc.dstage\[6\].id.ts,113.1
soc.core.interface10_bank_bus_dat_r\[16\],113.02
clknet_leaf_1141_mgmt_buffers.caravel_clk,113.02
net4423,113.015
soc.core.dbg_uart_data\[31\],112.99
_10797_,112.96
soc.core.mgmtsoc_bus_errors\[31\],112.95
_11106_,112.94
soc.core.VexRiscv.dBusWishbone_ADR\[10\],112.94
net9962,112.9
clknet_leaf_66_mgmt_buffers.caravel_clk,112.88
soc.core.dbg_uart_data\[25\],112.83
_10846_,112.81
gpio_control_in_2\[5\].mgmt_ena,112.8
_11660_,112.79
mgmt_buffers.la_data_in_enable\[50\],112.78
net12027,112.78
net11352,112.76
clknet_leaf_223_mgmt_buffers.caravel_clk,112.7
net4169,112.7
soc.core.spi_master_mosi_sel\[2\],112.69
_14496_,112.66
soc.core.interface5_bank_bus_dat_r\[0\],112.66
soc.core.dbg_uart_address\[12\],112.62
_00021_,112.58
_12734_,112.55
net9293,112.545
_03942_,112.54
clknet_leaf_234_mgmt_buffers.caravel_clk,112.52
_03938_,112.48
soc.core.mgmtsoc_reload_storage\[14\],112.46
net11252,112.425
_00082_,112.35
soc.core.VexRiscv._zz_lastStageRegFileWrite_payload_address\[29\],112.34
net10404,112.31
_03816_,112.3
_12948_,112.28
_13134_,112.28
_04997_,112.24
clknet_leaf_1072_mgmt_buffers.caravel_clk,112.24
net2855,112.24
net3150,112.24
clknet_leaf_10_mgmt_buffers.caravel_clk,112.2
soc.core.VexRiscv.BranchPlugin_branchExceptionPort_payload_badAddr\[24\],112.18
net1961,112.18
net11863,112.18
_12890_,112.12
net10982,112.12
mgmt_buffers.la_data_in_mprj\[64\],112.105
net3863,112.1
net11399,112.08
soc.core.VexRiscv.RegFilePlugin_regFile\[9\]\[1\],112.06
soc.core.multiregimpl22_regs1,112.06
clknet_leaf_858_mgmt_buffers.caravel_clk,112.06
net11925,112.06
net4463,112.035
net1551,112.03
net3519,112.02
_04248_,112
net3814,112
soc.core.mgmtsoc_litespimmap_storage\[4\],111.97
_14719_,111.96
clknet_leaf_29_mgmt_buffers.caravel_clk,111.96
net5835,111.92
soc.core.VexRiscv.DebugPlugin_haltedByBreak,111.9
soc.core.interface4_bank_bus_dat_r\[5\],111.9
net735,111.9
soc.core.spi_master_clk_divider1\[6\],111.88
net4342,111.88
net9194,111.84
_09166_,111.82
soc.core.VexRiscv.CsrPlugin_csrMapping_writeDataSignal\[5\],111.795
_04244_,111.72
net1878,111.71
_14249_,111.64
net10926,111.625
_14061_,111.62
net3506,111.59
net2722,111.58
_00074_,111.565
_03583_,111.56
_12470_,111.56
clknet_leaf_782_mgmt_buffers.caravel_clk,111.52
gpio_control_bidir_2\[0\].gpio_defaults\[1\],111.48
soc.core.mgmtsoc_value\[23\],111.44
net3079,111.44
clknet_leaf_487_mgmt_buffers.caravel_clk,111.42
_11975_,111.38
net9972,111.38
_10679_,111.36
_04951_,111.28
_11351_,111.26
soc.core.VexRiscv.decode_to_execute_RS2\[10\],111.26
net9558,111.26
_04703_,111.24
_14528_,111.22
mgmt_buffers.la_data_in_mprj_bar\[71\],111.22
clknet_leaf_1192_mgmt_buffers.caravel_clk,111.2
mgmt_buffers.la_oenb_core\[40\],111.16
_14680_,111.12
clknet_leaf_371_mgmt_buffers.caravel_clk,111.075
soc.core.mgmtsoc_litespisdrphycore_sr_out\[11\],111.04
_11142_,111
_14643_,110.94
clknet_leaf_1186_mgmt_buffers.caravel_clk,110.9
net9725,110.885
soc.core.VexRiscv.CsrPlugin_mtval\[8\],110.88
net4272,110.8
net9957,110.74
net11498,110.7
_04290_,110.68
clknet_leaf_596_mgmt_buffers.caravel_clk,110.68
net11805,110.67
mgmt_buffers.la_data_in_mprj\[79\],110.625
net12594,110.62
gpio_control_in_1\[5\].gpio_defaults\[1\],110.59
_12717_,110.58
_09170_,110.565
soc.core.VexRiscv._zz_dBus_cmd_payload_data\[25\],110.56
net2776,110.56
net9868,110.56
soc.core.VexRiscv.dBusWishbone_ADR\[4\],110.545
_08142_,110.48
net3333,110.48
_14319_,110.46
_08224_,110.445
_04890_,110.38
net4078,110.375
_14096_,110.34
mprj_io_dm[44],110.31
soc.core.la_ien_storage\[53\],110.3
net11486,110.3
net169,110.26
net11993,110.26
_13703_,110.24
soc.core.VexRiscv._zz_dBus_cmd_payload_data\[11\],110.2
_04649_,110.18
_04947_,110.17
clknet_leaf_446_mgmt_buffers.caravel_clk,110.16
net5494,110.16
soc.core.VexRiscv.DebugPlugin_disableEbreak,110.14
clknet_leaf_666_mgmt_buffers.caravel_clk,110.095
_10683_,110.08
mgmt_buffers.la_data_in_mprj_bar\[23\],110.07
_11576_,110.04
net4235,110.04
soc.core.VexRiscv.decode_to_execute_RS2\[19\],110.02
clknet_leaf_197_mgmt_buffers.caravel_clk,110.02
soc.core.mgmtsoc_value\[25\],110
net10188,109.96
net3959,109.92
_13006_,109.9
clknet_leaf_32_mgmt_buffers.caravel_clk,109.9
_11396_,109.88
net9349,109.88
net9739,109.88
_03819_,109.83
_14840_,109.82
net4277,109.8
_03703_,109.79
_00106_,109.76
_04551_,109.74
net2949,109.7
_12952_,109.68
mgmt_buffers.la_data_in_mprj\[65\],109.665
clknet_leaf_1137_mgmt_buffers.caravel_clk,109.66
net4379,109.66
gpio_control_in_2\[2\].serial_load,109.64
soc.core.VexRiscv.dBusWishbone_DAT_MISO\[18\],109.64
net10850,109.62
_12393_,109.615
_14734_,109.6
net3677,109.595
net11169,109.58
_03809_,109.575
_13788_,109.56
net12114,109.56
clknet_leaf_1193_mgmt_buffers.caravel_clk,109.54
net10773,109.54
_11453_,109.52
_10780_,109.5
net2934,109.48
net3539,109.48
net11396,109.42
_14278_,109.34
soc.core.VexRiscv.dBusWishbone_DAT_MISO\[16\],109.31
soc.core.VexRiscv.dBusWishbone_ADR\[13\],109.305
net4143,109.3
net12052,109.28
_11615_,109.26
net4663,109.26
net3400,109.24
clknet_leaf_765_mgmt_buffers.caravel_clk,109.22
clknet_leaf_796_mgmt_buffers.caravel_clk,109.22
soc.core.mgmtsoc_reload_storage\[4\],109.18
soc.core.VexRiscv._zz_dBus_cmd_payload_data\[29\],109.08
soc.core.interface9_bank_bus_dat_r\[9\],109.04
net165,109.04
net4030,108.98
clknet_leaf_178_mgmt_buffers.caravel_clk,108.96
mask_rev\[0\],108.95
net592,108.94
net1284,108.925
_14135_,108.92
clknet_leaf_630_mgmt_buffers.caravel_clk,108.9
clknet_7_83__leaf_mgmt_buffers.caravel_clk,108.88
_13135_,108.82
soc.core.VexRiscv._zz_RegFilePlugin_regFile_port1\[18\],108.8
_04878_,108.74
net3077,108.74
soc.core.interface4_bank_bus_dat_r\[3\],108.72
soc.core.mgmtsoc_litespisdrphycore_dq_i\[1\],108.72
net4604,108.72
_11411_,108.71
net3350,108.7
net7256,108.7
net10479,108.675
net9452,108.64
net4026,108.62
_09108_,108.605
soc.core.interface10_bank_bus_dat_r\[30\],108.58
net11570,108.56
_13313_,108.525
net317,108.52
_10472_,108.51
net10984,108.495
mgmt_buffers.la_data_in_enable\[47\],108.46
net11830,108.44
_11275_,108.4
mgmt_buffers.la_data_out_core\[44\],108.4
net2997,108.38
net3731,108.36
_09989_,108.32
_04793_,108.31
_12958_,108.3
net10055,108.27
mprj_io_in[2],108.23
_04246_,108.2
net4244,108.2
gpio_control_in_2\[6\].serial_clock,108.18
soc.core.multiregimpl24_regs1,108.18
clknet_leaf_986_mgmt_buffers.caravel_clk,108.18
net12107,108.18
gpio_control_in_2\[0\].gpio_defaults\[0\],108.16
net4119,108.16
_00508_,108.15
soc.core.VexRiscv.dBusWishbone_ADR\[5\],108.145
clknet_leaf_586_mgmt_buffers.caravel_clk,108.14
net11862,108.14
mask_rev\[14\],108.13
net4103,108.12
_08238_,108.105
_10802_,108.06
net3770,108.06
_00643_,108.04
soc.core.VexRiscv._zz_RegFilePlugin_regFile_port1\[16\],108.04
net8462,108.04
_11422_,108.02
_14010_,108.02
soc.core.interface19_bank_bus_dat_r\[0\],108.02
net176,108.02
net3259,108.015
net1176,108.01
_13076_,108
net11199,108
net11361,108
_15208_,107.96
mgmt_buffers.la_data_in_core\[40\],107.96
net4132,107.96
_14886_,107.94
soc.core.mgmtsoc_vexriscv_i_cmd_payload_address\[2\],107.94
clknet_leaf_1197_mgmt_buffers.caravel_clk,107.94
soc.core.VexRiscv.IBusCachedPlugin_cache.io_cpu_decode_data\[13\],107.92
soc.core.VexRiscv.decode_to_execute_RS2\[15\],107.92
soc.core.multiregimpl108_regs1,107.92
net4210,107.88
_01303_,107.84
_09245_,107.84
_11676_,107.82
_02560_,107.815
net188,107.815
net10129,107.78
net1156,107.76
net2715,107.76
net12287,107.74
_02616_,107.7
clknet_leaf_654_mgmt_buffers.caravel_clk,107.7
_03901_,107.68
soc.core.interface0_bank_bus_dat_r\[11\],107.68
net3452,107.68
_13277_,107.67
_04772_,107.66
clknet_leaf_24_mgmt_buffers.caravel_clk,107.66
gpio_control_in_1a\[0\].gpio_outenb,107.64
soc.core.VexRiscv._zz_RegFilePlugin_regFile_port1\[31\],107.64
mgmt_buffers.la_data_in_enable\[49\],107.6
soc.core.VexRiscv.IBusCachedPlugin_cache.decodeStage_mmuRsp_physicalAddress\[26\],107.6
soc.core.VexRiscv.IBusCachedPlugin_cache.io_cpu_decode_data\[1\],107.6
net3684,107.6
net8691,107.6
soc.core.VexRiscv.IBusCachedPlugin_cache.io_cpu_fetch_mmuRsp_isIoAccess,107.58
_13999_,107.56
net823,107.54
soc.core.VexRiscv._zz_dBus_cmd_payload_data\[13\],107.52
net4058,107.52
soc.core.VexRiscv.IBusCachedPlugin_cache._zz_fetchStage_read_waysValues_0_tag_valid_2\[14\],107.5
_12715_,107.48
_14712_,107.48
net3047,107.48
gpio_control_bidir_1\[0\].gpio_defaults\[9\],107.44
net9825,107.44
_11433_,107.42
net4120,107.42
soc.core.mgmtsoc_scratch_storage\[8\],107.4
net3109,107.38
soc.core.la_ien_storage\[11\],107.35
net9842,107.35
net4207,107.34
clknet_leaf_112_mgmt_buffers.caravel_clk,107.32
_12758_,107.28
net4718,107.28
net7973,107.27
soc.core.dbg_uart_words_count\[4\],107.26
_05503_,107.22
net3197,107.22
net3302,107.205
gpio_control_in_1a\[0\].serial_data_out,107.185
net10755,107.16
net11322,107.16
_10765_,107.12
net202,107.115
_05015_,107.1
_06176_,107.04
_00071_,107.025
gpio_control_in_1a\[2\].serial_data_out,107.02
soc.core.la_ien_storage\[19\],107.02
_10554_,107
gpio_control_in_2\[8\].serial_clock,107
soc.core.VexRiscv.CsrPlugin_csrMapping_writeDataSignal\[26\],106.92
soc.core.VexRiscv.decode_to_execute_RS2\[25\],106.92
_06184_,106.915
soc.core.mgmtsoc_master_tx_fifo_source_payload_data\[24\],106.9
soc.core.dbg_uart_data\[10\],106.845
clknet_leaf_511_mgmt_buffers.caravel_clk,106.815
_08901_,106.8
soc.core.VexRiscv._zz_RegFilePlugin_regFile_port0\[6\],106.8
net3933,106.79
_11417_,106.78
soc.core.VexRiscv._zz_RegFilePlugin_regFile_port1\[26\],106.78
_09211_,106.765
soc.core.interface10_bank_bus_dat_r\[28\],106.74
net604,106.7
soc.core.VexRiscv.dBusWishbone_ADR\[29\],106.685
net3518,106.68
net12053,106.68
_04943_,106.67
soc.core.uart_tx_fifo_level0\[0\],106.62
_13635_,106.595
soc.core.VexRiscv.memory_to_writeBack_REGFILE_WRITE_DATA\[31\],106.58
soc.core.VexRiscv.CsrPlugin_mtval\[12\],106.56
clknet_leaf_568_mgmt_buffers.caravel_clk,106.56
net3236,106.56
soc.core.mgmtsoc_value\[28\],106.54
net8559,106.54
net11426,106.54
gpio_control_in_1a\[2\].gpio_logic1,106.52
net11246,106.52
_04205_,106.5
net2400,106.495
_12880_,106.49
soc.core.interface9_bank_bus_dat_r\[14\],106.48
net12051,106.46
_13064_,106.45
net4300,106.42
net11315,106.42
_06784_,106.4
soc.core.VexRiscv.execute_to_memory_INSTRUCTION\[11\],106.38
net3075,106.38
_04889_,106.37
_00108_,106.36
_08660_,106.34
soc.core.multiregimpl90_regs1,106.33
net9935,106.32
_13542_,106.3
_04597_,106.28
soc.core.mgmtsoc_litespimmap_storage\[2\],106.28
net3942,106.28
net3928,106.265
_03802_,106.24
clknet_leaf_884_mgmt_buffers.caravel_clk,106.24
net9503,106.24
_03954_,106.22
_03478_,106.2
mgmt_buffers.la_data_in_mprj_bar\[7\],106.18
soc.core.VexRiscv._zz_dBus_cmd_payload_data\[26\],106.18
_02788_,106.17
_11882_,106.16
net10977,106.135
_11577_,106.12
soc.core.VexRiscv.RegFilePlugin_regFile\[29\]\[11\],106.1
net3085,106.095
net10072,106.08
net6188,106.06
_01153_,106.04
_00073_,106.015
soc.core.VexRiscv.CsrPlugin_csrMapping_writeDataSignal\[13\],105.965
mgmt_buffers.la_data_in_mprj_bar\[74\],105.96
_04795_,105.88
_11720_,105.88
soc.core.VexRiscv.IBusCachedPlugin_cache.lineLoader_address\[14\],105.88
net159,105.88
net3122,105.88
gpio_control_in_1\[1\].shift_register\[12\],105.86
_00012_,105.82
_00100_,105.805
soc.core.la_ien_storage\[103\],105.8
net1329,105.8
_11921_,105.78
net9792,105.77
net11880,105.76
net9706,105.745
gpio_control_bidir_1\[0\].gpio_defaults\[10\],105.73
_12135_,105.68
soc.core.multiregimpl9_regs1,105.68
_12950_,105.66
mgmt_buffers.la_data_in_mprj\[63\],105.66
_02785_,105.64
mgmt_buffers.mprj_logic1\[348\],105.62
soc.core.interface6_bank_bus_dat_r\[14\],105.58
soc.core.VexRiscv.execute_to_memory_INSTRUCTION\[9\],105.56
gpio_in_core,105.54
soc.core.mgmtsoc_bus_errors\[18\],105.52
_00103_,105.485
_02624_,105.47
_02798_,105.46
net11242,105.44
soc.core.mgmtsoc_litespisdrphycore_sr_out\[22\],105.42
soc.core.dbg_uart_address\[14\],105.39
soc.core.VexRiscv.CsrPlugin_mtval\[28\],105.36
soc.core.VexRiscv._zz_memory_ENV_CTRL\[0\],105.36
soc.core.mgmtsoc_master_tx_fifo_source_payload_data\[28\],105.335
_12378_,105.32
gpio_control_in_1\[2\].shift_register\[12\],105.32
_03881_,105.31
_10762_,105.3
clknet_leaf_843_mgmt_buffers.caravel_clk,105.3
soc.core.VexRiscv.CsrPlugin_mepc\[26\],105.285
soc.core.VexRiscv.dBusWishbone_ADR\[19\],105.265
_04828_,105.26
_12946_,105.26
soc.core.la_ien_storage\[123\],105.26
_01379_,105.24
soc.core.VexRiscv.IBusCachedPlugin_cache._zz_fetchStage_read_waysValues_0_tag_valid_2\[5\],105.24
net3255,105.24
_14168_,105.2
net3263,105.18
_12957_,105.1
net9262,105.1
net1330,105.06
_03555_,105.04
net149,105.04
clknet_leaf_1172_mgmt_buffers.caravel_clk,105.02
_12373_,105
soc.core.VexRiscv.RegFilePlugin_regFile\[2\]\[9\],105
net2803,105
net10619,105
soc.core.interface4_bank_bus_dat_r\[6\],104.975
_12235_,104.96
soc.core.VexRiscv.IBusCachedPlugin_cache._zz_fetchStage_read_waysValues_0_tag_valid_2\[9\],104.94
_00384_,104.92
net3590,104.92
net10664,104.92
_13038_,104.9
_09167_,104.88
soc.core.VexRiscv._zz_RegFilePlugin_regFile_port0\[18\],104.88
net11244,104.88
_00105_,104.875
net3869,104.87
_02278_,104.86
_02802_,104.86
net3835,104.845
_14366_,104.84
soc.core.la_ien_storage\[115\],104.84
soc.core.RAM256.Do0_pre\[1\]\[21\],104.82
_04750_,104.8
net688,104.8
net11583,104.8
soc.core.la_out_storage\[72\],104.78
soc.core.spi_master_clk_divider1\[2\],104.77
_00383_,104.76
_02617_,104.73
net1089,104.72
net4561,104.72
net4800,104.72
clknet_leaf_540_mgmt_buffers.caravel_clk,104.7
_11404_,104.68
soc.core.VexRiscv.dBusWishbone_DAT_MOSI\[8\],104.68
net11865,104.68
clknet_leaf_370_mgmt_buffers.caravel_clk,104.62
net9975,104.62
net11664,104.62
_12244_,104.61
_14212_,104.6
soc.core.interface2_bank_bus_dat_r\[0\],104.6
soc.core.la_out_storage\[95\],104.54
_12246_,104.52
_04945_,104.5
soc.core.VexRiscv.CsrPlugin_mepc\[4\],104.48
net11331,104.46
net11160,104.455
soc.core.VexRiscv.IBusCachedPlugin_cache.io_mem_rsp_payload_data\[14\],104.44
net9121,104.44
clknet_leaf_1139_mgmt_buffers.caravel_clk,104.42
soc.core.la_out_storage\[88\],104.4
soc.core.mgmtsoc_bus_errors\[26\],104.375
_00095_,104.365
mgmt_buffers.la_data_in_mprj\[62\],104.365
gpio_control_in_2\[3\].serial_load,104.36
_13127_,104.34
mgmt_buffers.la_data_in_enable\[31\],104.32
net2755,104.32
_12116_,104.3
_12617_,104.3
soc.core.uart_phy_tx_data_rs232phy_rs232phytx_next_value_ce2,104.28
net146,104.28
net4620,104.28
_08898_,104.26
net3013,104.26
_14204_,104.24
net3248,104.19
soc.core.VexRiscv.dBusWishbone_ADR\[12\],104.185
_13042_,104.18
soc.core.VexRiscv.CsrPlugin_exceptionPendings_3,104.18
clknet_leaf_442_mgmt_buffers.caravel_clk,104.18
mgmt_buffers.mprj_logic1\[40\],104.12
mgmt_buffers.la_oenb_core\[34\],104.1
soc.core.VexRiscv.RegFilePlugin_regFile\[16\]\[23\],104.08
_08242_,104.045
clknet_leaf_1150_mgmt_buffers.caravel_clk,104.01
clknet_leaf_597_mgmt_buffers.caravel_clk,104
mgmt_buffers.la_data_in_mprj\[88\],103.985
_12662_,103.96
net3854,103.96
net7980,103.945
net3552,103.94
soc.core.VexRiscv.BranchPlugin_branchExceptionPort_payload_badAddr\[17\],103.92
soc.core.VexRiscv.RegFilePlugin_regFile\[4\]\[1\],103.92
net9664,103.9
_03736_,103.88
_10709_,103.88
_13007_,103.88
gpio_control_bidir_2\[0\].serial_clock,103.88
clknet_leaf_83_mgmt_buffers.caravel_clk,103.88
soc.core.VexRiscv.CsrPlugin_exceptionPendings_1,103.84
_12474_,103.82
soc.core.VexRiscv.DBusSimplePlugin_memoryExceptionPort_payload_badAddr\[25\],103.8
_09191_,103.76
clknet_leaf_578_mgmt_buffers.caravel_clk,103.76
clknet_leaf_1061_mgmt_buffers.caravel_clk,103.76
net4506,103.76
_00318_,103.7
soc.core.mgmtsoc_reload_storage\[24\],103.7
net12548,103.7
soc.core.multiregimpl7_regs1,103.68
_14655_,103.66
clknet_leaf_526_mgmt_buffers.caravel_clk,103.66
soc.core.VexRiscv._zz_RegFilePlugin_regFile_port1\[27\],103.64
net3536,103.58
soc.core.interface10_bank_bus_dat_r\[10\],103.54
clknet_leaf_324_mgmt_buffers.caravel_clk,103.52
_00374_,103.5
soc.core.VexRiscv.IBusCachedPlugin_cache._zz_fetchStage_read_waysValues_0_tag_valid_2\[15\],103.5
_12742_,103.48
soc.core.la_ien_storage\[38\],103.47
soc.core.multiregimpl21_regs1,103.46
clknet_leaf_75_mgmt_buffers.caravel_clk,103.46
_12330_,103.445
soc.core.VexRiscv.CsrPlugin_mtvec_base\[28\],103.44
clknet_leaf_22_mgmt_buffers.caravel_clk,103.44
_04984_,103.41
soc.core.VexRiscv.CsrPlugin_mtval\[0\],103.4
net1234,103.4
net9416,103.4
net9547,103.4
_14084_,103.395
_09190_,103.365
_04279_,103.36
net3169,103.355
net714,103.34
mask_rev\[29\],103.33
_11215_,103.32
_13971_,103.32
net3241,103.32
net4427,103.315
mask_rev\[1\],103.31
clknet_leaf_365_mgmt_buffers.caravel_clk,103.28
_10670_,103.26
net2970,103.24
net1968,103.22
net11190,103.18
soc.core.dbg_uart_tx_count\[1\],103.16
_01888_,103.14
_11955_,103.14
_00132_,103.1
_10878_,103.08
soc.core.interface10_bank_bus_dat_r\[11\],103.08
_11425_,103.04
_00029_,103.02
soc.core.VexRiscv.IBusCachedPlugin_cache.decodeStage_mmuRsp_physicalAddress\[24\],103.01
_13872_,103
net7386,103
_04515_,102.98
_13637_,102.98
mgmt_buffers.la_data_in_mprj_bar\[79\],102.915
net11673,102.9
_00015_,102.87
mgmt_buffers.la_data_out_core\[38\],102.86
_07163_,102.84
_09165_,102.82
mgmt_buffers.mprj_logic1\[97\],102.82
_00361_,102.8
soc.core.VexRiscv._zz_RegFilePlugin_regFile_port0\[22\],102.8
soc.core.dbg_uart_incr,102.8
_12220_,102.79
mask_rev\[2\],102.79
net8372,102.78
_00060_,102.76
_14260_,102.76
_01543_,102.74
net3668,102.74
net9668,102.72
net10134,102.72
_14183_,102.71
_09205_,102.685
_11566_,102.68
net290,102.62
_04203_,102.605
soc.core.VexRiscv._zz_RegFilePlugin_regFile_port0\[31\],102.6
net10053,102.545
soc.core.VexRiscv.RegFilePlugin_regFile\[16\]\[24\],102.52
net12022,102.52
net11882,102.49
_04969_,102.48
_10415_,102.48
net12249,102.48
gpio_control_bidir_1\[0\].gpio_defaults\[6\],102.47
soc.core.VexRiscv.RegFilePlugin_regFile\[1\]\[24\],102.46
_09229_,102.445
net7673,102.445
_10818_,102.44
_13123_,102.44
_13817_,102.44
clknet_leaf_612_mgmt_buffers.caravel_clk,102.44
net3291,102.44
net4913,102.44
net11827,102.39
_12743_,102.38
soc.core.VexRiscv._zz_dBus_cmd_payload_data\[24\],102.36
_02800_,102.35
_12338_,102.34
_14693_,102.34
gpio_control_bidir_1\[1\].gpio_defaults\[1\],102.33
_00093_,102.325
soc.core.VexRiscv.RegFilePlugin_regFile\[0\]\[9\],102.32
soc.core.interface6_bank_bus_dat_r\[10\],102.32
soc.core.mgmtsoc_bus_errors\[3\],102.3
clknet_leaf_1157_mgmt_buffers.caravel_clk,102.3
net3363,102.3
_04424_,102.28
soc.core.VexRiscv.execute_to_memory_REGFILE_WRITE_VALID,102.275
_01183_,102.22
soc.core.VexRiscv.decode_to_execute_RS2\[20\],102.15
_13619_,102.12
net4445,102.12
net10366,102.11
_03730_,102.1
_12288_,102.08
net7898,102.08
net10928,102.065
net11164,102.065
soc.core.VexRiscv.decode_to_execute_RS1\[1\],102.04
net3290,102.04
net11868,102.04
_11454_,102
_14395_,102
net11144,101.985
_10647_,101.98
_11298_,101.98
soc.core.VexRiscv.RegFilePlugin_regFile\[25\]\[24\],101.96
net8976,101.96
_11253_,101.94
soc.core.VexRiscv.DBusSimplePlugin_memoryExceptionPort_payload_badAddr\[18\],101.9
net8746,101.9
net3957,101.88
soc.core.VexRiscv.RegFilePlugin_regFile\[22\]\[2\],101.86
_04852_,101.8
_14769_,101.8
soc.core.interface4_bank_bus_dat_r\[7\],101.8
net12095,101.78
_04893_,101.775
_12538_,101.76
_04448_,101.74
_10448_,101.74
net136,101.74
_04778_,101.72
net1388,101.72
net2389,101.72
clknet_leaf_379_mgmt_buffers.caravel_clk,101.72
_04709_,101.7
clknet_leaf_599_mgmt_buffers.caravel_clk,101.7
_02715_,101.69
gpio_control_bidir_2\[0\].serial_load,101.66
soc.core.VexRiscv.decode_to_execute_RS2\[29\],101.66
_12591_,101.64
soc.core.VexRiscv.IBusCachedPlugin_cache._zz_fetchStage_read_waysValues_0_tag_valid_2\[25\],101.64
_03545_,101.6
_14102_,101.59
_01213_,101.57
_14149_,101.56
clknet_leaf_558_mgmt_buffers.caravel_clk,101.56
net10446,101.52
_11683_,101.48
_14409_,101.48
clknet_leaf_724_mgmt_buffers.caravel_clk,101.48
_03694_,101.46
net4315,101.46
net10878,101.455
_00068_,101.445
net11316,101.44
_12750_,101.42
net11937,101.42
clknet_leaf_529_mgmt_buffers.caravel_clk,101.4
soc.core.VexRiscv.RegFilePlugin_regFile\[22\]\[26\],101.395
_07187_,101.38
net3497,101.38
_13833_,101.325
pll.pll_control.count0\[1\],101.32
_04718_,101.3
gpio_control_in_1a\[1\].shift_register\[12\],101.3
net3234,101.3
_00658_,101.28
_11653_,101.28
net11097,101.26
net12767,101.26
net3071,101.255
soc.core.la_out_storage\[80\],101.24
_10938_,101.2
net11243,101.2
net1171,101.18
_12078_,101.16
clknet_leaf_803_mgmt_buffers.caravel_clk,101.16
net4018,101.16
_00086_,101.14
_09773_,101.14
net939,101.1
soc.core.VexRiscv.CsrPlugin_mtval\[6\],101.08
net11138,101.02
clknet_leaf_557_mgmt_buffers.caravel_clk,100.98
clknet_leaf_1029_mgmt_buffers.caravel_clk,100.94
net6777,100.94
gpio_control_in_2\[0\].serial_load,100.9
_09187_,100.88
_11196_,100.88
soc.core.VexRiscv.RegFilePlugin_regFile\[17\]\[16\],100.88
soc.core.VexRiscv._zz_RegFilePlugin_regFile_port1\[22\],100.86
clknet_leaf_125_mgmt_buffers.caravel_clk,100.84
gpio_control_in_2\[8\].serial_load,100.82
soc.core.VexRiscv.RegFilePlugin_regFile\[17\]\[2\],100.82
soc.core.mgmtsoc_litespisdrphycore_storage\[1\],100.82
clknet_leaf_870_mgmt_buffers.caravel_clk,100.82
_02841_,100.8
net11351,100.74
net3874,100.72
net11171,100.72
net166,100.715
_09164_,100.7
_14701_,100.7
gpio_control_in_1\[1\].serial_data_out,100.7
_11171_,100.68
_14847_,100.66
_04920_,100.64
soc.core.interface11_bank_bus_dat_r\[2\],100.64
net3544,100.64
_05045_,100.63
soc.core.VexRiscv.dBusWishbone_ADR\[17\],100.605
net11619,100.6
_13474_,100.55
soc.core.la_ien_storage\[122\],100.5
net10607,100.5
_09173_,100.48
net10103,100.48
_14161_,100.47
soc.core.VexRiscv._zz_RegFilePlugin_regFile_port1\[21\],100.46
net11251,100.46
gpio_control_in_2\[1\].gpio_defaults\[0\],100.455
_14236_,100.44
net12516,100.375
_04240_,100.36
net1040,100.34
clknet_leaf_328_mgmt_buffers.caravel_clk,100.34
mgmt_buffers.la_data_in_mprj_bar\[77\],100.32
soc.core.multiregimpl47_regs1,100.32
net9006,100.32
_14073_,100.305
_00078_,100.285
soc.core.interface4_bank_bus_dat_r\[1\],100.24
net3613,100.24
net2665,100.24
_04598_,100.22
soc.core.mgmtsoc_vexriscv_debug_bus_dat_r\[11\],100.205
_14202_,100.2
soc.core.VexRiscv._zz_dBus_cmd_payload_data\[17\],100.19
_12229_,100.18
net2383,100.18
net12423,100.18
soc.core.dbg_uart_data\[29\],100.17
gpio_control_bidir_1\[0\].shift_register\[12\],100.165
_11903_,100.16
net3289,100.145
clknet_leaf_1051_mgmt_buffers.caravel_clk,100.14
soc.core.VexRiscv.CsrPlugin_mepc\[5\],100.12
_14791_,100.1
_09240_,100.085
net10328,100.085
net4189,100.08
soc.core.VexRiscv.IBusCachedPlugin_cache.io_mem_rsp_payload_data\[6\],100.06
clknet_leaf_889_mgmt_buffers.caravel_clk,100.06
net10677,100.05
_00114_,100.045
_14290_,100.04
soc.core.la_ien_storage\[104\],100
net11438,100
net411,99.98
mask_rev\[25\],99.97
clknet_leaf_507_mgmt_buffers.caravel_clk,99.94
net2920,99.94
soc.core.la_ien_storage\[32\],99.92
net4211,99.88
net8548,99.88
net12511,99.86
_00091_,99.84
_12253_,99.84
net2848,99.84
_12590_,99.82
net4089,99.815
gpio_control_bidir_1\[1\].gpio_defaults\[4\],99.81
soc.core.mgmtsoc_scratch_storage\[21\],99.78
soc.core.VexRiscv._zz_dBus_cmd_payload_data\[19\],99.76
_12233_,99.755
_11906_,99.72
gpio_control_in_2\[4\].mgmt_ena,99.72
_12472_,99.7
soc.core.dbg_uart_data\[24\],99.68
clknet_leaf_636_mgmt_buffers.caravel_clk,99.66
net3442,99.645
net9543,99.64
_12616_,99.63
pll.pll_control.count0\[2\],99.62
net7979,99.58
net9068,99.57
net8965,99.56
_13110_,99.48
net2795,99.48
soc.core.VexRiscv._zz_RegFilePlugin_regFile_port1\[30\],99.46
soc.core.gpioin3_gpioin3_mode_storage,99.46
net11402,99.46
net3582,99.45
_12341_,99.42
net11295,99.4
net5444,99.36
soc.core.VexRiscv.dBusWishbone_ADR\[18\],99.325
_11898_,99.32
soc.core.la_ien_storage\[112\],99.31
_00120_,99.285
net11678,99.28
_05021_,99.22
net7307,99.22
_11573_,99.2
net2849,99.2
soc.core.interface11_bank_bus_dat_r\[4\],99.16
net9920,99.145
soc.core.sys_uart_tx,99.14
net3938,99.14
_13420_,99.11
gpio_control_bidir_2\[1\].gpio_defaults\[10\],99.11
clknet_leaf_114_mgmt_buffers.caravel_clk,99.08
_04973_,99.06
net12397,99.06
soc.core.VexRiscv._zz_CsrPlugin_csrMapping_readDataInit\[6\],99.04
soc.core.VexRiscv._zz_RegFilePlugin_regFile_port0\[21\],99
net10860,98.99
net4791,98.96
net936,98.94
_04976_,98.92
_14258_,98.9
_14302_,98.9
clknet_leaf_438_mgmt_buffers.caravel_clk,98.885
_02797_,98.87
gpio_control_in_2\[1\].serial_clock,98.82
soc.core.VexRiscv.RegFilePlugin_regFile\[24\]\[2\],98.82
gpio_control_in_1\[0\].serial_data_out,98.78
soc.core.VexRiscv.IBusCachedPlugin_cache.lineLoader_address\[17\],98.78
_02645_,98.77
net11116,98.745
soc.core.VexRiscv._zz_RegFilePlugin_regFile_port0\[9\],98.74
net2777,98.74
_10832_,98.7
_12118_,98.695
net717,98.68
gpio_control_in_2\[1\].shift_register\[12\],98.66
mgmt_buffers.la_data_out_core\[46\],98.66
clknet_leaf_280_mgmt_buffers.caravel_clk,98.66
net12755,98.6
_11165_,98.58
soc.core.VexRiscv.CsrPlugin_mtval\[19\],98.56
_02655_,98.55
gpio_control_in_2\[4\].serial_load,98.54
_02673_,98.51
_14060_,98.5
_11295_,98.48
mgmt_buffers.mprj_logic1\[337\],98.48
pll.pll_control.count0\[4\],98.46
soc.core.VexRiscv._zz_memory_ENV_CTRL\[1\],98.46
net2903,98.46
_00323_,98.45
_09228_,98.445
_00136_,98.44
net9619,98.44
soc.core.VexRiscv._zz_dBus_cmd_payload_data\[2\],98.4
soc.core.VexRiscv.IBusCachedPlugin_cache.decodeStage_mmuRsp_physicalAddress\[18\],98.38
net11485,98.38
_14576_,98.32
gpio_control_in_2\[5\].gpio_defaults\[10\],98.25
_04858_,98.24
_14238_,98.24
_03786_,98.23
_13097_,98.22
_14652_,98.21
net11907,98.17
soc.core.multiregimpl19_regs1,98.14
_14270_,98.1
soc.core.VexRiscv.IBusCachedPlugin_cache.lineLoader_address\[6\],98.1
net133,98.1
mgmt_buffers.la_data_out_core\[32\],98.08
soc.core.multiregimpl28_regs0,98.04
clknet_leaf_505_mgmt_buffers.caravel_clk,98.04
net1396,98
gpio_control_in_1a\[0\].gpio_defaults\[1\],97.99
_03550_,97.96
_09374_,97.96
net10992,97.96
_09172_,97.94
_12949_,97.92
soc.core.la_out_storage\[67\],97.92
clknet_leaf_1092_mgmt_buffers.caravel_clk,97.92
clknet_leaf_484_mgmt_buffers.caravel_clk,97.9
_10392_,97.86
gpio_control_bidir_1\[0\].pad_gpio_out,97.84
net7309,97.84
net156,97.835
net8441,97.825
soc.core.VexRiscv.IBusCachedPlugin_cache.lineLoader_flushPending,97.78
soc.core.dbg_uart_rx_data\[7\],97.78
gpio_control_in_1a\[2\].mgmt_ena,97.76
soc.core.dbg_uart_tx_data\[3\],97.74
net8454,97.74
soc.core.VexRiscv.RegFilePlugin_regFile\[5\]\[9\],97.7
soc.core.VexRiscv.CsrPlugin_mtval\[5\],97.68
clknet_leaf_157_mgmt_buffers.caravel_clk,97.68
net3446,97.68
soc.core.VexRiscv.RegFilePlugin_regFile\[15\]\[4\],97.64
_04839_,97.63
gpio_control_in_2\[5\].gpio_defaults\[0\],97.62
net6802,97.6
gpio_control_bidir_1\[1\].gpio_defaults\[12\],97.57
soc.core.VexRiscv.IBusCachedPlugin_cache.lineLoader_address\[31\],97.56
gpio_control_in_1a\[1\].resetn_out,97.55
clknet_leaf_852_mgmt_buffers.caravel_clk,97.54
soc.core.VexRiscv.RegFilePlugin_regFile\[1\]\[1\],97.52
net9375,97.5
net11360,97.48
net1175,97.46
net3056,97.44
_07385_,97.42
net10877,97.405
net11320,97.4
net12609,97.4
net3547,97.38
_00075_,97.365
net5209,97.36
net9627,97.34
soc.core.memdat_1\[5\],97.3
net4351,97.3
mprj_io_out[13],97.27
soc.core.VexRiscv.dBusWishbone_ADR\[21\],97.225
net4692,97.215
_12745_,97.2
net8891,97.195
_12724_,97.18
_12731_,97.18
soc.core.VexRiscv.dBusWishbone_DAT_MISO\[8\],97.16
net9501,97.16
_14696_,97.11
mgmt_buffers.mprj_logic1\[31\],97.1
_03705_,97.06
_04704_,97.06
net11258,97.02
_02638_,97
_04235_,97
clknet_leaf_671_mgmt_buffers.caravel_clk,97
soc.core.VexRiscv.CsrPlugin_csrMapping_writeDataSignal\[27\],96.985
gpio_control_bidir_2\[1\].gpio_defaults\[0\],96.98
gpio_control_in_2\[0\].gpio_defaults\[1\],96.96
_10854_,96.94
gpio_control_in_2\[1\].serial_data_in,96.94
net2368,96.91
soc.core.spi_master_clk_divider1\[15\],96.905
mgmt_buffers.la_data_out_core\[48\],96.88
_04884_,96.86
soc.core.spi_master_clk_divider1\[3\],96.85
_09175_,96.84
soc.core.VexRiscv.RegFilePlugin_regFile\[29\]\[24\],96.8
soc.core.multiregimpl34_regs0,96.8
_12942_,96.78
soc.core.multiregimpl100_regs1,96.78
mask_rev\[15\],96.75
user_io_out\[7\],96.75
net11126,96.74
soc.core.mgmtsoc_litespimmap_count\[2\],96.7
net3887,96.68
net4482,96.66
net903,96.62
_04320_,96.6
net4114,96.6
gpio_control_in_2\[1\].gpio_defaults\[10\],96.565
soc.core.VexRiscv.dBusWishbone_ADR\[28\],96.565
_03457_,96.5
_03797_,96.5
_10817_,96.5
soc.core.VexRiscv.DBusSimplePlugin_memoryExceptionPort_payload_badAddr\[21\],96.5
_03522_,96.48
_08653_,96.48
gpio_control_in_1\[4\].shift_register\[12\],96.48
net9670,96.48
_14884_,96.43
_13073_,96.42
soc.core.VexRiscv.memory_to_writeBack_REGFILE_WRITE_DATA\[14\],96.4
gpio_control_bidir_1\[1\].gpio_defaults\[2\],96.39
_11197_,96.38
net5228,96.36
clknet_leaf_1158_mgmt_buffers.caravel_clk,96.34
net3382,96.34
net11616,96.34
_04711_,96.3
_14510_,96.3
net9772,96.3
gpio_control_in_1a\[1\].gpio_logic1,96.26
soc.core.VexRiscv._zz_dBus_cmd_payload_data\[16\],96.25
_00020_,96.24
net5856,96.24
mgmt_buffers.la_data_in_mprj\[113\],96.235
_01363_,96.22
_02038_,96.2
soc.core.VexRiscv.decode_to_execute_RS1\[4\],96.2
net5707,96.2
gpio_control_in_1\[0\].serial_load,96.16
soc.core.mgmtsoc_master_tx_fifo_source_payload_data\[29\],96.14
soc.core.VexRiscv._zz_dBus_cmd_payload_data\[8\],96.1
net9947,96.1
_03605_,96.06
_04242_,96.06
gpio_control_in_1\[4\].mgmt_ena,96.06
_14190_,96.04
soc.core.la_ien_storage\[98\],96.04
soc.core.VexRiscv.DBusSimplePlugin_memoryExceptionPort_payload_badAddr\[27\],96.02
_00320_,96.01
soc.core.multiregimpl34_regs1,96
net10961,95.945
_10922_,95.94
soc.core.mgmtsoc_litespisdrphycore_sr_out\[13\],95.94
_02757_,95.93
_14695_,95.92
soc.core.VexRiscv.IBusCachedPlugin_cache.io_mem_rsp_payload_data\[1\],95.92
net9569,95.92
net10391,95.92
net12151,95.92
_03828_,95.9
_13193_,95.9
net409,95.9
net3185,95.9
_14514_,95.88
net11091,95.86
net12136,95.8
_01489_,95.78
_04228_,95.78
gpio_control_in_2\[5\].serial_load,95.78
net7981,95.78
net2604,95.78
soc.core.mgmtsoc_vexriscv_debug_bus_dat_r\[13\],95.72
_00133_,95.69
_04243_,95.68
net11843,95.68
net9832,95.655
mgmt_buffers.la_data_in_mprj\[77\],95.645
_04221_,95.64
_06848_,95.64
gpio_control_in_2\[7\].shift_register\[12\],95.64
gpio_control_bidir_1\[0\].pad_gpio_outenb,95.62
soc.core.VexRiscv.RegFilePlugin_regFile\[26\]\[24\],95.62
clknet_leaf_1123_mgmt_buffers.caravel_clk,95.62
_14688_,95.6
soc.core.count\[0\],95.59
clknet_leaf_826_mgmt_buffers.caravel_clk,95.58
soc.core.dbg_uart_address\[21\],95.57
_14281_,95.56
_04225_,95.54
_14660_,95.54
soc.core.VexRiscv.RegFilePlugin_regFile\[21\]\[29\],95.54
soc.core.dbg_uart_data\[30\],95.54
soc.core.mgmtsoc_reload_storage\[27\],95.52
_07594_,95.505
_11641_,95.5
clknet_leaf_1040_mgmt_buffers.caravel_clk,95.48
_04253_,95.46
net3016,95.44
soc.core.VexRiscv.dBusWishbone_DAT_MISO\[10\],95.42
net9021,95.42
net11329,95.42
_00370_,95.34
soc.core.multiregimpl23_regs0,95.34
clknet_leaf_957_mgmt_buffers.caravel_clk,95.32
net4471,95.305
soc.core.uart_phy_tx_phase\[19\],95.28
net9683,95.28
_11515_,95.24
_14325_,95.24
soc.core.VexRiscv.RegFilePlugin_regFile\[18\]\[16\],95.24
_14755_,95.23
soc.core.multiregimpl27_regs0,95.2
net11289,95.2
_02690_,95.18
net5297,95.18
soc.core.mgmtsoc_vexriscv_i_cmd_valid,95.16
net9401,95.16
net11891,95.16
net4731,95.14
soc.core.VexRiscv.RegFilePlugin_regFile\[19\]\[23\],95.12
_09169_,95.1
_14080_,95.1
net10955,95.085
_12564_,95.08
clknet_leaf_262_mgmt_buffers.caravel_clk,95.08
net3785,95.06
_04233_,95.03
_14818_,95.03
soc.core.VexRiscv.IBusCachedPlugin_cache.io_cpu_decode_isValid,95.02
net10010,95.02
_00360_,95
net8560,95
_05018_,94.98
_14248_,94.94
net948,94.93
_14974_,94.92
net4665,94.92
mprj_io_dm[41],94.89
gpio_control_bidir_2\[1\].gpio_defaults\[12\],94.82
clknet_leaf_1074_mgmt_buffers.caravel_clk,94.82
net4683,94.78
net10865,94.765
gpio_control_in_1a\[3\].mgmt_ena,94.76
clknet_leaf_553_mgmt_buffers.caravel_clk,94.76
net10519,94.76
pll.pll_control.count0\[3\],94.755
clknet_leaf_625_mgmt_buffers.caravel_clk,94.74
clknet_leaf_924_mgmt_buffers.caravel_clk,94.74
net4072,94.74
_01288_,94.72
_10615_,94.72
_12969_,94.72
_10808_,94.68
net11230,94.68
_13995_,94.66
soc.core.mgmtsoc_vexriscv_debug_bus_dat_r\[15\],94.58
_11575_,94.57
_13086_,94.56
_14285_,94.56
_11288_,94.54
soc.core.multiregimpl28_regs1,94.52
soc.core.VexRiscv.dBusWishbone_DAT_MISO\[11\],94.5
soc.core.gpioin4_gpioin4_mode_storage,94.5
gpio_control_bidir_1\[0\].serial_clock,94.49
_09700_,94.46
_14726_,94.46
_04723_,94.44
_12710_,94.44
_12953_,94.44
_13287_,94.44
_14117_,94.44
net4029,94.44
net4598,94.42
net11871,94.41
_07077_,94.38
gpio_control_in_1\[3\].shift_register\[12\],94.38
net10251,94.38
net7306,94.375
_03076_,94.36
_08177_,94.32
net2828,94.3
_11304_,94.28
net5883,94.28
_10907_,94.27
soc.core.spi_master_control_storage\[11\],94.26
_12442_,94.24
net9458,94.24
clknet_leaf_1131_mgmt_buffers.caravel_clk,94.22
_01258_,94.18
clknet_leaf_962_mgmt_buffers.caravel_clk,94.18
_11635_,94.16
net1281,94.16
clknet_leaf_872_mgmt_buffers.caravel_clk,94.16
net4537,94.16
clknet_leaf_869_mgmt_buffers.caravel_clk,94.15
soc.core.VexRiscv.CsrPlugin_mtval\[10\],94.14
_11429_,94.12
net7298,94.1
net11908,94.1
net4278,94.08
_14296_,94.06
gpio_control_in_1\[1\].mgmt_ena,94.06
net10780,94.06
net9723,94.04
_11684_,94.02
_10658_,93.98
soc.core.dbg_uart_address\[15\],93.98
clknet_leaf_1167_mgmt_buffers.caravel_clk,93.98
soc.core.VexRiscv.IBusCachedPlugin_cache.io_cpu_prefetch_pc\[17\],93.94
_14139_,93.92
_02592_,93.9
_03956_,93.9
clknet_leaf_934_mgmt_buffers.caravel_clk,93.9
net11753,93.88
_02337_,93.86
_09707_,93.86
_01062_,93.85
_12121_,93.84
_10927_,93.82
net158,93.76
soc.core.dbg_uart_tx_phase\[9\],93.74
net12088,93.7
soc.core.VexRiscv.memory_to_writeBack_REGFILE_WRITE_DATA\[10\],93.68
_10553_,93.67
_08999_,93.66
soc.core.VexRiscv.dBusWishbone_DAT_MOSI\[25\],93.64
pll.div\[4\],93.62
_12784_,93.6
_14723_,93.59
_07069_,93.58
net9092,93.58
_11146_,93.56
_05515_,93.55
_12438_,93.54
soc.core.VexRiscv.IBusCachedPlugin_cache.io_mem_rsp_payload_data\[31\],93.52
net2713,93.5
net3695,93.5
net12385,93.5
_13553_,93.44
net2630,93.42
soc.core.VexRiscv.dBusWishbone_DAT_MISO\[22\],93.4
clknet_leaf_330_mgmt_buffers.caravel_clk,93.385
_11784_,93.38
_04504_,93.36
_12943_,93.36
net5884,93.36
_11179_,93.34
mprj_io_out[0],93.33
_05035_,93.28
net4431,93.26
_12751_,93.24
_03660_,93.23
_01272_,93.22
_10532_,93.22
net11832,93.22
_04238_,93.21
soc.core.VexRiscv.RegFilePlugin_regFile\[29\]\[1\],93.2
soc.core.VexRiscv._zz_writeBack_ENV_CTRL\[0\],93.2
net4360,93.2
gpio_control_in_2\[3\].serial_data_in,93.18
net3062,93.18
clknet_leaf_779_mgmt_buffers.caravel_clk,93.16
net3045,93.16
net3392,93.16
net11774,93.16
net9902,93.12
clknet_leaf_968_mgmt_buffers.caravel_clk,93.1
_11492_,93.06
_04863_,93.03
mprj_io_oeb[25],93.03
net10934,93.025
_00404_,93.02
_07065_,93.02
_02641_,93.01
_09236_,93.005
_03637_,93
soc.core.VexRiscv.RegFilePlugin_regFile\[19\]\[16\],93
_02158_,92.98
_05054_,92.98
clknet_leaf_685_mgmt_buffers.caravel_clk,92.98
net12412,92.95
_03817_,92.94
_11636_,92.94
net11471,92.94
_12369_,92.93
_10815_,92.91
_13554_,92.91
_12114_,92.9
gpio_control_bidir_2\[1\].shift_register\[1\],92.9
gpio_control_in_1\[0\].shift_register\[12\],92.88
soc.core.flash_io0_do,92.87
_13270_,92.84
net4688,92.8
net13167,92.8
net12754,92.78
_13454_,92.77
_04328_,92.76
_12746_,92.76
_04926_,92.74
net2800,92.74
gpio_control_in_2\[0\].gpio_defaults\[10\],92.73
net10871,92.73
soc.core.multiregimpl89_regs1,92.72
soc.core.dbg_uart_data\[21\],92.7
net10641,92.7
soc.core.mgmtsoc_litespimmap_count\[1\],92.68
net2982,92.66
net9507,92.625
_12240_,92.62
soc.core.VexRiscv.DBusSimplePlugin_memoryExceptionPort_payload_badAddr\[13\],92.6
soc.core.multiregimpl135_regs0,92.6
net4767,92.58
net11694,92.58
_14689_,92.57
net10870,92.57
clknet_leaf_33_mgmt_buffers.caravel_clk,92.56
net5229,92.56
soc.core.VexRiscv.memory_to_writeBack_REGFILE_WRITE_DATA\[3\],92.54
soc.core.VexRiscv.RegFilePlugin_regFile\[10\]\[4\],92.52
clknet_leaf_100_mgmt_buffers.caravel_clk,92.52
_04599_,92.5
_10649_,92.5
_14326_,92.5
soc.core.interface6_bank_bus_dat_r\[9\],92.48
net3417,92.48
_12777_,92.46
_14293_,92.46
_14381_,92.44
net3619,92.44
net189,92.4
net4677,92.37
net12919,92.36
clknet_leaf_425_mgmt_buffers.caravel_clk,92.34
soc.core.mgmtsoc_master_rx_fifo_source_valid,92.315
_10862_,92.3
soc.core.VexRiscv._zz_RegFilePlugin_regFile_port1\[17\],92.3
net9701,92.29
gpio_control_in_1\[3\].mgmt_ena,92.26
net3386,92.26
net5941,92.26
soc.core.VexRiscv.IBusCachedPlugin_cache.io_mem_rsp_payload_data\[26\],92.24
net11571,92.22
clknet_leaf_305_mgmt_buffers.caravel_clk,92.2
net3423,92.2
net10560,92.18
net11929,92.14
_04223_,92.11
net3847,92.09
_00110_,92.08
_04803_,92.08
_09219_,92.065
soc.core.VexRiscv.RegFilePlugin_regFile\[3\]\[9\],92.06
soc.core.spi_master_clk_divider1\[0\],92.06
net12760,92.06
net2897,92.04
_14721_,92.02
net9871,92.02
pll.itrim\[5\],92
clknet_leaf_1149_mgmt_buffers.caravel_clk,92
net148,91.98
net9122,91.98
net11168,91.965
_12219_,91.94
soc.core.VexRiscv._zz_RegFilePlugin_regFile_port0\[7\],91.94
_03666_,91.93
_10783_,91.92
soc.core.multiregimpl81_regs1,91.9
_07174_,91.88
gpio_control_in_1\[0\].serial_data_in,91.88
net4071,91.88
_04864_,91.84
clknet_leaf_647_mgmt_buffers.caravel_clk,91.84
_12621_,91.82
gpio_control_in_2\[3\].mgmt_ena,91.82
_09710_,91.805
soc.core.la_ien_storage\[96\],91.8
_13505_,91.76
clknet_leaf_162_mgmt_buffers.caravel_clk,91.76
clknet_leaf_127_mgmt_buffers.caravel_clk,91.74
_00322_,91.72
_12234_,91.72
soc.core.la_ien_storage\[79\],91.7
soc.core.mgmtsoc_litespisdrphycore_sr_out\[4\],91.7
_14569_,91.665
soc.core.VexRiscv.CsrPlugin_mtvec_base\[23\],91.66
soc.core.VexRiscv.IBusCachedPlugin_cache.io_mem_rsp_payload_data\[13\],91.66
soc.core.VexRiscv.RegFilePlugin_regFile\[3\]\[30\],91.655
net8123,91.64
_04799_,91.62
soc.core.VexRiscv.CsrPlugin_mepc\[7\],91.62
soc.core.VexRiscv._zz_RegFilePlugin_regFile_port1\[15\],91.62
soc.core.dbg_uart_data\[27\],91.6
net11876,91.59
gpio_control_bidir_1\[1\].shift_register\[12\],91.58
soc.core.multiregimpl30_regs1,91.58
soc.core.VexRiscv.RegFilePlugin_regFile\[19\]\[24\],91.56
net10262,91.54
_04655_,91.53
_10673_,91.52
clknet_leaf_836_mgmt_buffers.caravel_clk,91.52
soc.core.multiregimpl6_regs1,91.5
net4187,91.44
net12765,91.4
_13116_,91.38
clknet_leaf_787_mgmt_buffers.caravel_clk,91.38
_02165_,91.35
_12227_,91.35
_11155_,91.3
soc.core.mgmtsoc_master_tx_fifo_source_payload_data\[21\],91.3
net11800,91.29
_14344_,91.28
net11931,91.28
mgmt_buffers.mprj_logic1\[340\],91.26
soc.core.dbg_uart_words_count\[2\],91.26
net4412,91.26
_12912_,91.24
mgmt_buffers.mprj_adr_o_core\[3\],91.24
soc.core.VexRiscv.execute_to_memory_INSTRUCTION\[10\],91.24
net11294,91.24
soc.core.mgmtsoc_litespisdrphycore_sr_out\[17\],91.22
clknet_leaf_1094_mgmt_buffers.caravel_clk,91.2
_04536_,91.175
soc.core.multiregimpl26_regs0,91.16
clknet_leaf_555_mgmt_buffers.caravel_clk,91.14
soc.core.mgmtsoc_vexriscv_debug_bus_dat_r\[19\],91.135
_01048_,91.12
net11888,91.12
mprj_io_dm[57],91.11
_02373_,91.1
soc.core.multiregimpl25_regs0,91.1
_12561_,91.06
clknet_leaf_259_mgmt_buffers.caravel_clk,91.06
_10806_,91.05
soc.core.VexRiscv.IBusCachedPlugin_cache.io_mem_rsp_payload_data\[0\],91.04
clknet_leaf_1096_mgmt_buffers.caravel_clk,91.04
_01190_,91.03
net11982,91.02
soc.core.VexRiscv._zz_dBus_cmd_payload_data\[15\],91
clknet_leaf_1121_mgmt_buffers.caravel_clk,90.98
mgmt_buffers.la_data_in_mprj\[74\],90.965
gpio_control_in_2\[4\].serial_data_in,90.96
soc.core.multiregimpl78_regs1,90.96
net143,90.94
net9279,90.94
net12619,90.94
_07231_,90.92
soc.core.interface4_bank_bus_dat_r\[4\],90.92
soc.core.mgmtsoc_value\[16\],90.92
net2995,90.9
net7352,90.9
net12880,90.9
net3993,90.86
net9788,90.86
net9078,90.8
_10901_,90.78
net11033,90.765
gpio_control_bidir_1\[0\].gpio_defaults\[4\],90.75
_00912_,90.74
_14172_,90.74
clknet_leaf_1136_mgmt_buffers.caravel_clk,90.74
soc.core.VexRiscv.RegFilePlugin_regFile\[4\]\[10\],90.68
net9781,90.68
net10826,90.68
gpio_control_in_1a\[5\].shift_register\[12\],90.66
net12771,90.64
soc.core.VexRiscv.DBusSimplePlugin_memoryExceptionPort_payload_badAddr\[8\],90.6
soc.core.VexRiscv.RegFilePlugin_regFile\[24\]\[1\],90.6
soc.core.multiregimpl29_regs0,90.6
net4331,90.6
net11981,90.6
_14254_,90.58
soc.core.gpioin2_gpioin2_pending,90.485
_13959_,90.48
_13986_,90.46
soc.core.VexRiscv.BranchPlugin_branchExceptionPort_payload_badAddr\[21\],90.435
_00373_,90.42
_04247_,90.42
net3130,90.42
_11609_,90.4
_12236_,90.4
gpio_control_in_2\[1\].gpio_defaults\[1\],90.38
_10474_,90.36
gpio_control_in_2\[0\].mgmt_ena,90.355
soc.core.dbg_uart_words_count\[5\],90.33
soc.core.mgmtsoc_reload_storage\[19\],90.32
soc.core.VexRiscv.RegFilePlugin_regFile\[23\]\[23\],90.315
net3903,90.305
mgmt_buffers.la_data_in_enable\[37\],90.3
mgmt_buffers.mprj_logic1\[366\],90.28
net4128,90.28
_13543_,90.25
_01633_,90.22
net685,90.22
net4168,90.22
_12516_,90.2
net1013,90.16
clknet_leaf_1054_mgmt_buffers.caravel_clk,90.16
clknet_leaf_226_mgmt_buffers.caravel_clk,90.14
net10005,90.14
net5172,90.12
net4704,90.085
soc.core.VexRiscv.RegFilePlugin_regFile\[24\]\[24\],90.08
net2712,90.08
_10684_,90.06
clknet_leaf_37_mgmt_buffers.caravel_clk,90.04
net3961,90.04
_04204_,90.02
_09375_,90.02
clknet_leaf_655_mgmt_buffers.caravel_clk,90.02
net10655,90.02
soc.core.multiregimpl17_regs1,90
net12133,90
_04237_,89.98
net3666,89.965
soc.core.VexRiscv.RegFilePlugin_regFile\[19\]\[10\],89.96
_12178_,89.94
_12463_,89.94
soc.core.VexRiscv.RegFilePlugin_regFile\[28\]\[2\],89.94
net9487,89.92
net10100,89.92
_14377_,89.9
net9071,89.88
net1352,89.875
net12775,89.86
_12954_,89.82
net4550,89.82
net9492,89.82
soc.core.VexRiscv.RegFilePlugin_regFile\[18\]\[24\],89.8
user_io_out\[21\],89.8
soc.core.multiregimpl16_regs0,89.74
net10125,89.74
_14828_,89.73
_14770_,89.72
_12535_,89.7
_05056_,89.66
soc.core.multiregimpl25_regs1,89.66
_03807_,89.64
gpio_control_in_2\[9\].gpio_logic1,89.64
soc.core.VexRiscv.RegFilePlugin_regFile\[22\]\[0\],89.64
_14358_,89.635
_14654_,89.62
net9609,89.62
_11894_,89.61
_07173_,89.6
soc.core.mgmtsoc_litespisdrphycore_sr_cnt\[2\],89.59
net10858,89.575
_00376_,89.54
soc.core.VexRiscv.IBusCachedPlugin_cache.io_mem_rsp_payload_data\[3\],89.52
_09061_,89.505
soc.core.mgmtsoc_litespisdrphycore_sr_out\[20\],89.5
net11529,89.5
_00115_,89.48
_03623_,89.48
_13719_,89.48
clknet_leaf_966_mgmt_buffers.caravel_clk,89.46
net8991,89.45
_01557_,89.44
net8942,89.425
_14743_,89.42
net11660,89.42
_10824_,89.38
net4213,89.38
_03826_,89.36
_14267_,89.36
net2757,89.36
_00104_,89.345
net698,89.33
_03567_,89.32
mgmt_buffers.la_data_in_enable\[33\],89.32
soc.core.VexRiscv.RegFilePlugin_regFile\[6\]\[9\],89.32
net3806,89.32
net10017,89.32
net11332,89.32
_12131_,89.3
net4350,89.3
_13555_,89.28
soc.core.interface0_bank_bus_dat_r\[6\],89.28
clknet_leaf_11_mgmt_buffers.caravel_clk,89.28
net3807,89.275
_03633_,89.245
_00366_,89.24
net4438,89.24
net4712,89.22
_02128_,89.2
_02792_,89.2
soc.core.VexRiscv.RegFilePlugin_regFile\[4\]\[9\],89.18
gpio_control_in_2\[6\].gpio_defaults\[1\],89.16
clknet_leaf_786_mgmt_buffers.caravel_clk,89.16
_13191_,89.14
gpio_control_in_1a\[4\].shift_register\[11\],89.12
mgmt_buffers.la_data_in_mprj_bar\[113\],89.12
clknet_leaf_828_mgmt_buffers.caravel_clk,89.12
net10735,89.115
soc.core.multiregimpl13_regs0,89.1
net11023,89.1
gpio_control_bidir_1\[0\].serial_data_out,89.08
soc.core.la_ien_storage\[107\],89.08
clknet_leaf_659_mgmt_buffers.caravel_clk,89.08
clknet_7_49__leaf_mgmt_buffers.caravel_clk,89.06
soc.core.mgmtsoc_litespisdrphycore_sr_in\[25\],89.04
_00377_,89.02
net3741,89.02
soc.core.multiregimpl26_regs1,88.98
net11024,88.98
soc.core.multiregimpl136_regs1,88.96
_00066_,88.95
_00131_,88.94
soc.core.dbg_uart_words_count\[6\],88.94
clknet_leaf_653_mgmt_buffers.caravel_clk,88.94
clknet_leaf_904_mgmt_buffers.caravel_clk,88.94
_12343_,88.91
mask_rev\[21\],88.87
net12542,88.86
_04058_,88.84
mgmt_buffers.la_data_out_core\[41\],88.84
soc.core.multiregimpl49_regs1,88.84
net11887,88.82
_00023_,88.8
net1011,88.8
_02911_,88.78
_14184_,88.78
soc.core.VexRiscv.RegFilePlugin_regFile\[7\]\[9\],88.76
net3422,88.74
clknet_leaf_623_mgmt_buffers.caravel_clk,88.72
clknet_leaf_1153_mgmt_buffers.caravel_clk,88.72
_03588_,88.7
_04443_,88.69
net10321,88.69
soc.core.mgmtsoc_reload_storage\[31\],88.68
_14129_,88.64
net9977,88.625
soc.core.VexRiscv._zz_RegFilePlugin_regFile_port1\[8\],88.62
net2077,88.62
net10973,88.605
_05042_,88.6
_03699_,88.56
mprj_io_out[25],88.55
_14543_,88.54
soc.core.VexRiscv.RegFilePlugin_regFile\[15\]\[11\],88.54
net9536,88.54
_02764_,88.5
_11942_,88.49
_14938_,88.48
net10515,88.48
net11654,88.48
gpio_control_bidir_1\[0\].gpio_defaults\[3\],88.47
_09220_,88.465
_02991_,88.44
net4442,88.44
net4564,88.44
soc.core.VexRiscv.dBusWishbone_ADR\[23\],88.425
_11565_,88.42
soc.core.multiregimpl84_regs1,88.38
gpio_control_in_1a\[1\].serial_data_out,88.36
soc.core.mgmtsoc_vexriscv_debug_bus_dat_r\[12\],88.36
net1199,88.35
mgmt_buffers.la_data_out_core\[36\],88.3
soc.core.VexRiscv.decode_to_execute_RS2\[28\],88.3
soc.core.multiregimpl40_regs1,88.3
soc.core.VexRiscv.decode_to_execute_RS1\[10\],88.26
net11079,88.26
soc.core.multiregimpl14_regs1,88.24
_03164_,88.22
gpio_control_in_2\[2\].shift_register\[12\],88.2
net2684,88.2
clknet_leaf_588_mgmt_buffers.caravel_clk,88.18
_04887_,88.14
soc.core.VexRiscv.RegFilePlugin_regFile\[3\]\[2\],88.14
soc.core.mgmtsoc_reload_storage\[6\],88.14
clknet_leaf_69_mgmt_buffers.caravel_clk,88.14
net11933,88.14
_14951_,88.12
_10772_,88.1
_13201_,88.1
soc.core.VexRiscv.DBusSimplePlugin_memoryExceptionPort_payload_badAddr\[30\],88.1
soc.core.VexRiscv.RegFilePlugin_regFile\[25\]\[31\],88.1
_13085_,88.09
_14391_,88.08
soc.core.VexRiscv.IBusCachedPlugin_cache.lineLoader_address\[10\],88.08
net11234,88.08
pll.ringosc.dstage\[11\].id.out,88.07
soc.core.dbg_uart_tx_count\[0\],88.055
net130,88.04
_10676_,88.02
net4056,88.02
net7220,88.005
_00568_,87.98
soc.core.la_ien_storage\[64\],87.98
net5210,87.94
mgmt_buffers.la_data_out_core\[35\],87.92
_12741_,87.91
_12448_,87.9
_03570_,87.88
_07076_,87.88
_14014_,87.88
soc.core.VexRiscv._zz_execute_ENV_CTRL\[0\],87.88
clknet_leaf_819_mgmt_buffers.caravel_clk,87.88
net2841,87.86
soc.core.mgmtsoc_litespisdrphycore_sr_out\[14\],87.8
net4807,87.78
_01055_,87.76
_10875_,87.74
_02694_,87.72
_13551_,87.72
net11655,87.72
_10867_,87.7
gpio_control_in_1a\[5\].gpio_logic1,87.7
_04867_,87.68
gpio_control_in_2\[6\].shift_register\[5\],87.68
net10957,87.64
clknet_leaf_429_mgmt_buffers.caravel_clk,87.62
clknet_leaf_1048_mgmt_buffers.caravel_clk,87.62
net4229,87.6
soc.core.multiregimpl73_regs1,87.58
_00375_,87.56
soc.core.interface0_bank_bus_dat_r\[8\],87.56
net9552,87.51
net5299,87.505
_04002_,87.5
net2985,87.5
soc.core.mgmtsoc_litespisdrphycore_sr_out\[8\],87.495
clknet_leaf_16_mgmt_buffers.caravel_clk,87.48
clknet_leaf_102_mgmt_buffers.caravel_clk,87.44
clknet_leaf_1191_mgmt_buffers.caravel_clk,87.44
_04779_,87.42
_11570_,87.42
_14159_,87.42
_14859_,87.42
net11067,87.42
soc.core.interface0_bank_bus_dat_r\[14\],87.4
net11391,87.4
_10253_,87.38
_04756_,87.365
mgmt_buffers.la_data_in_mprj\[90\],87.345
soc.core.RAM256.Do0_pre\[1\]\[14\],87.34
soc.core.VexRiscv.BranchPlugin_branchExceptionPort_payload_badAddr\[20\],87.34
net12141,87.34
mgmt_buffers.la_data_in_mprj_bar\[90\],87.32
clknet_leaf_704_mgmt_buffers.caravel_clk,87.32
_14389_,87.3
_14807_,87.3
pll.pll_control.count0\[0\],87.29
_08388_,87.285
_12692_,87.28
gpio_control_bidir_1\[1\].serial_data_out,87.28
clknet_leaf_859_mgmt_buffers.caravel_clk,87.27
gpio_control_bidir_1\[0\].gpio_outenb,87.26
net10874,87.26
net12066,87.26
_10653_,87.24
mgmt_buffers.la_data_out_core\[43\],87.24
_10828_,87.22
net4444,87.185
_04100_,87.16
soc.core.mgmtsoc_litespisdrphycore_sr_out\[24\],87.16
net4217,87.15
clknet_leaf_846_mgmt_buffers.caravel_clk,87.14
clknet_leaf_855_mgmt_buffers.caravel_clk,87.14
_11201_,87.08
soc.core.VexRiscv.RegFilePlugin_regFile\[13\]\[23\],87.08
net11867,87.08
soc.core.spimaster_storage\[5\],87.06
_11604_,87.04
_04207_,87.02
_10661_,87
net2917,87
net3177,87
_11185_,86.98
_07074_,86.96
_10667_,86.96
soc.core.mgmtsoc_litespisdrphycore_storage\[0\],86.94
net11185,86.94
net6208,86.88
soc.core.VexRiscv._zz_RegFilePlugin_regFile_port1\[0\],86.86
net5464,86.86
_06666_,86.82
_13782_,86.82
gpio_control_bidir_2\[0\].serial_data_in,86.82
net11542,86.78
clknet_leaf_1109_mgmt_buffers.caravel_clk,86.76
net12764,86.76
_14966_,86.74
_02248_,86.72
net5879,86.72
_00002_,86.7
_14537_,86.7
_08231_,86.685
_00327_,86.66
clknet_leaf_929_mgmt_buffers.caravel_clk,86.66
net3610,86.64
net11808,86.64
_04016_,86.62
soc.core.VexRiscv.memory_to_writeBack_REGFILE_WRITE_DATA\[22\],86.62
_11233_,86.58
_14732_,86.58
soc.core.VexRiscv.memory_to_writeBack_REGFILE_WRITE_DATA\[4\],86.58
_05498_,86.57
_00067_,86.56
_12719_,86.56
gpio_control_in_2\[6\].gpio_defaults\[10\],86.55
net11330,86.54
net11915,86.54
soc.core.VexRiscv.CsrPlugin_mtvec_base\[22\],86.52
net3542,86.48
net11241,86.48
net12297,86.48
_04231_,86.46
_14397_,86.46
_03690_,86.45
soc.core.VexRiscv._zz_writeBack_ENV_CTRL\[1\],86.44
soc.core.mgmtsoc_value\[22\],86.42
net11948,86.4
_00807_,86.38
clknet_leaf_386_mgmt_buffers.caravel_clk,86.38
clknet_leaf_976_mgmt_buffers.caravel_clk,86.38
clknet_leaf_998_mgmt_buffers.caravel_clk,86.38
net153,86.375
soc.core.mgmtsoc_litespisdrphycore_sr_out\[19\],86.345
soc.core.VexRiscv._zz_RegFilePlugin_regFile_port1\[14\],86.34
soc.core.VexRiscv.RegFilePlugin_regFile\[23\]\[17\],86.32
net191,86.315
mprj_io_dm[59],86.31
net1311,86.31
_08659_,86.3
_14226_,86.3
gpio_control_in_1a\[4\].mgmt_ena,86.28
mgmt_buffers.la_data_in_enable\[35\],86.26
net12757,86.26
soc.core.RAM256.Do0_pre\[1\]\[12\],86.24
clknet_leaf_364_mgmt_buffers.caravel_clk,86.23
net301,86.22
net8641,86.215
net10947,86.205
net9302,86.2
net11909,86.18
net11912,86.18
_04901_,86.16
soc.core.multiregimpl54_regs1,86.16
net12223,86.16
net3232,86.14
net6494,86.14
_13550_,86.1
_14707_,86.1
soc.core.VexRiscv.RegFilePlugin_regFile\[2\]\[30\],86.1
clknet_leaf_243_mgmt_buffers.caravel_clk,86.1
net11844,86.1
soc.core.VexRiscv._zz_execute_to_memory_REGFILE_WRITE_DATA\[13\],86.065
_04908_,86.06
net9715,86.06
net12189,86.06
net8208,86.04
_13092_,86.02
soc.core.VexRiscv.RegFilePlugin_regFile\[16\]\[2\],86.02
net2710,86.02
soc.core.VexRiscv.IBusCachedPlugin_cache.lineLoader_address\[18\],86
_08245_,85.985
_14460_,85.96
_03783_,85.94
soc.core.mgmtsoc_scratch_storage\[11\],85.94
net3435,85.94
net11555,85.94
_04957_,85.92
_12225_,85.9
gpio_control_in_2\[2\].serial_data_in,85.9
clknet_leaf_634_mgmt_buffers.caravel_clk,85.88
net11222,85.88
_11625_,85.86
soc.core.VexRiscv.IBusCachedPlugin_cache._zz_fetchStage_read_waysValues_0_tag_valid_2\[13\],85.86
soc.core.VexRiscv.IBusCachedPlugin_cache.io_cpu_prefetch_pc\[10\],85.86
soc.core.VexRiscv.RegFilePlugin_regFile\[1\]\[3\],85.86
soc.core.VexRiscv.dBusWishbone_ADR\[20\],85.845
net135,85.84
_12763_,85.82
soc.core.VexRiscv.IBusCachedPlugin_cache.decodeStage_mmuRsp_physicalAddress\[8\],85.82
net11210,85.805
_11686_,85.8
mgmt_buffers.mprj_logic1\[41\],85.8
net3310,85.8
clknet_leaf_491_mgmt_buffers.caravel_clk,85.78
mask_rev\[20\],85.77
soc.core.VexRiscv.RegFilePlugin_regFile\[29\]\[7\],85.74
soc.core.gpioin4_gpioin4_pending,85.74
_00090_,85.725
soc.core.VexRiscv._zz_execute_SRC2\[22\],85.72
clknet_leaf_591_mgmt_buffers.caravel_clk,85.72
soc.core.mgmtsoc_litespisdrphycore_sr_cnt\[4\],85.7
_07190_,85.68
mask_rev\[23\],85.67
net4631,85.66
net12768,85.66
net492,85.655
soc.core.la_ien_storage\[100\],85.625
net1316,85.62
soc.core.VexRiscv.RegFilePlugin_regFile\[20\]\[28\],85.6
net3022,85.58
gpio_control_in_1a\[0\].shift_register\[12\],85.56
soc.core.VexRiscv.debug_bus_rsp_data\[3\],85.56
_10044_,85.545
soc.core.interface4_bank_bus_dat_r\[0\],85.54
net11899,85.52
net9808,85.5
_13220_,85.48
net4273,85.47
net11861,85.47
_10048_,85.465
net7323,85.465
mgmt_buffers.la_data_out_core\[37\],85.46
_03186_,85.44
_04227_,85.44
soc.core.slave_sel_r\[3\],85.44
_04917_,85.4
soc.core.VexRiscv.IBusCachedPlugin_cache.io_cpu_fetch_isValid,85.4
_02662_,85.38
_11845_,85.36
soc.core.mgmtsoc_value\[26\],85.34
soc.core.multiregimpl5_regs1,85.34
soc.core.multiregimpl75_regs1,85.34
_14032_,85.32
_09210_,85.3
_04086_,85.26
gpio_control_bidir_2\[2\].shift_register\[4\],85.26
_04974_,85.24
soc.core.multiregimpl136_regs0,85.24
net7080,85.24
net12270,85.24
soc.core.la_ien_storage\[126\],85.22
soc.core.VexRiscv.CsrPlugin_mtvec_base\[17\],85.2
net9662,85.195
mgmt_buffers.la_data_in_enable\[29\],85.14
clknet_leaf_225_mgmt_buffers.caravel_clk,85.14
pll.pll_control.tval\[0\],85.12
gpio_control_bidir_2\[0\].gpio_defaults\[0\],85.06
net10661,85.055
_09706_,85.025
soc.core.mgmtsoc_master_tx_fifo_source_payload_data\[6\],85.02
soc.core.uartwishbonebridge_state\[2\],85.02
clknet_leaf_31_mgmt_buffers.caravel_clk,85.02
_08905_,84.99
_12797_,84.98
mprj_io_out[17],84.95
gpio_control_in_1\[0\].mgmt_ena,84.94
soc.core.VexRiscv.RegFilePlugin_regFile\[15\]\[23\],84.94
soc.core.gpioin0_gpioin0_pending,84.94
soc.core.VexRiscv.dBus_cmd_halfPipe_payload_size\[0\],84.92
clknet_leaf_956_mgmt_buffers.caravel_clk,84.92
clknet_leaf_1000_mgmt_buffers.caravel_clk,84.92
net6659,84.92
net11955,84.92
_04755_,84.91
gpio_control_in_1a\[4\].shift_register\[10\],84.88
net12614,84.88
_07592_,84.865
_01273_,84.86
_13962_,84.86
soc.core.VexRiscv.RegFilePlugin_regFile\[17\]\[7\],84.84
net3845,84.84
_05790_,84.81
gpio_control_in_1a\[5\].gpio_defaults\[0\],84.81
_12136_,84.8
_02580_,84.78
net2643,84.78
_00958_,84.72
_02795_,84.72
net10340,84.7
net11898,84.69
net8701,84.685
gpio_control_in_1\[3\].serial_data_out,84.68
_00382_,84.66
_01152_,84.66
_12747_,84.66
soc.core.mgmtsoc_load_storage\[0\],84.64
_10651_,84.63
_00101_,84.625
soc.core.VexRiscv.CsrPlugin_mtval\[23\],84.62
clknet_leaf_520_mgmt_buffers.caravel_clk,84.62
gpio_control_in_2\[3\].gpio_defaults\[1\],84.6
soc.core.VexRiscv.dBusWishbone_DAT_MISO\[12\],84.6
gpio_control_in_1a\[5\].mgmt_ena,84.595
_08899_,84.58
_02669_,84.56
_12749_,84.54
soc.core.mgmtsoc_master_tx_fifo_source_payload_data\[7\],84.52
net2761,84.5
net3194,84.5
net3736,84.5
net5672,84.5
soc.core.dbg_uart_address\[26\],84.48
soc.core.interface3_bank_bus_dat_r\[29\],84.46
_12129_,84.45
_01078_,84.44
net4552,84.44
net10891,84.44
clknet_leaf_93_mgmt_buffers.caravel_clk,84.435
_01648_,84.42
_04360_,84.42
_12970_,84.4
net3411,84.4
_00348_,84.38
pll.ext_trim\[19\],84.38
net10996,84.365
net155,84.36
net10299,84.35
_00808_,84.33
gpio_control_in_1\[4\].gpio_defaults\[10\],84.33
_10041_,84.325
_10665_,84.32
_14667_,84.32
mgmt_buffers.la_data_out_core\[49\],84.32
net11060,84.32
net7270,84.315
net9611,84.28
_13963_,84.26
_03520_,84.24
gpio_control_in_2\[8\].serial_data_in,84.22
net12924,84.22
soc.core.VexRiscv.RegFilePlugin_regFile\[21\]\[23\],84.2
_03373_,84.16
soc.core.VexRiscv.RegFilePlugin_regFile\[16\]\[26\],84.16
soc.core.core_rst,84.16
_03461_,84.14
soc.core.mgmtsoc_load_storage\[9\],84.14
gpio_control_in_1\[2\].mgmt_ena,84.1
net7519,84.1
soc.core.multiregimpl31_regs1,84.06
clknet_leaf_1160_mgmt_buffers.caravel_clk,84.04
_04875_,84.02
net4706,84.02
soc.core.VexRiscv.RegFilePlugin_regFile\[8\]\[4\],84
clknet_leaf_790_mgmt_buffers.caravel_clk,84
net2966,84
net3318,83.995
_10915_,83.98
clknet_leaf_1207_mgmt_buffers.caravel_clk,83.98
net3015,83.98
net12769,83.98
net9687,83.91
_12609_,83.9
_03074_,83.88
soc.core.VexRiscv.RegFilePlugin_regFile\[9\]\[22\],83.88
clknet_leaf_1118_mgmt_buffers.caravel_clk,83.86
net12210,83.86
net3803,83.855
soc.core.VexRiscv._zz_RegFilePlugin_regFile_port0\[4\],83.84
net2805,83.84
soc.core.VexRiscv.dBusWishbone_DAT_MISO\[25\],83.82
_04400_,83.81
gpio_control_in_2\[5\].shift_register\[10\],83.78
net9554,83.775
_13021_,83.76
gpio_control_in_2\[5\].shift_register\[0\],83.72
net11612,83.72
net10880,83.715
_01778_,83.7
soc.core.VexRiscv.CsrPlugin_csrMapping_writeDataSignal\[16\],83.675
_03706_,83.66
net1386,83.66
net5988,83.66
net13168,83.66
_11145_,83.64
net9628,83.64
_14094_,83.62
net3632,83.62
net12891,83.62
_04820_,83.6
mgmt_buffers.la_data_in_enable\[34\],83.6
gpio_control_in_2\[3\].gpio_defaults\[0\],83.56
net11204,83.56
gpio_control_bidir_2\[1\].pad_gpio_out,83.54
net4567,83.54
_02263_,83.52
_12334_,83.52
net6189,83.52
soc.core.mgmtsoc_litespisdrphycore_sr_out\[1\],83.5
net9647,83.475
_09116_,83.465
_08649_,83.4
_10413_,83.38
soc.core.VexRiscv.RegFilePlugin_regFile\[21\]\[7\],83.38
soc.core.VexRiscv.RegFilePlugin_regFile\[5\]\[19\],83.38
_01302_,83.36
net2391,83.34
net3187,83.34
net3428,83.34
net12023,83.34
_14338_,83.32
mask_rev\[11\],83.32
soc.core.interface0_bank_bus_dat_r\[21\],83.32
clknet_leaf_993_mgmt_buffers.caravel_clk,83.32
gpio_control_in_1\[2\].serial_data_out,83.3
_10911_,83.29
clknet_leaf_68_mgmt_buffers.caravel_clk,83.28
net11245,83.28
_07167_,83.24
soc.core.VexRiscv.RegFilePlugin_regFile\[0\]\[1\],83.24
soc.core.VexRiscv.dBusWishbone_ADR\[22\],83.225
_03960_,83.2
_04850_,83.19
_03163_,83.18
soc.core.VexRiscv.RegFilePlugin_regFile\[9\]\[23\],83.18
net4517,83.18
_08897_,83.16
_04761_,83.15
_04911_,83.14
_11065_,83.14
net12586,83.14
_03692_,83.13
soc.core.multiregimpl10_regs0,83.12
net3084,83.12
net4367,83.105
_01955_,83.1
_11202_,83.1
net7158,83.1
net1401,83.09
_03651_,83.08
_13059_,83.06
soc.core.VexRiscv.RegFilePlugin_regFile\[27\]\[10\],83.06
gpio_control_in_2\[1\].shift_register\[9\],83.02
clknet_leaf_1062_mgmt_buffers.caravel_clk,83.02
net11904,83.02
net9764,83
clknet_leaf_366_mgmt_buffers.caravel_clk,82.98
clknet_leaf_374_mgmt_buffers.caravel_clk,82.98
soc.core.VexRiscv.CsrPlugin_csrMapping_writeDataSignal\[8\],82.925
soc.core.slave_sel_r\[0\],82.92
_11843_,82.91
mprj_io_out[19],82.91
_03724_,82.9
net3326,82.88
_04932_,82.86
clknet_leaf_54_mgmt_buffers.caravel_clk,82.86
clknet_leaf_886_mgmt_buffers.caravel_clk,82.86
soc.core.VexRiscv._zz_execute_BRANCH_DO_1,82.84
soc.core.VexRiscv.RegFilePlugin_regFile\[5\]\[24\],82.82
clknet_leaf_247_mgmt_buffers.caravel_clk,82.82
clknet_leaf_1010_mgmt_buffers.caravel_clk,82.82
soc.core.VexRiscv.CsrPlugin_mtval\[25\],82.8
_14069_,82.78
soc.core.VexRiscv.DebugPlugin_godmode,82.78
soc.core.mgmtsoc_value\[30\],82.78
soc.core.la_ien_storage\[89\],82.76
_12364_,82.74
_04786_,82.72
_09601_,82.705
gpio_control_in_2\[6\].serial_data_in,82.7
soc.core.VexRiscv.IBusCachedPlugin_cache.lineLoader_address\[24\],82.7
gpio_control_bidir_2\[1\].pad_gpio_outenb,82.68
_04496_,82.66
clknet_leaf_849_mgmt_buffers.caravel_clk,82.66
_04883_,82.65
_04905_,82.64
gpio_control_in_2\[1\].mgmt_ena,82.6
net12431,82.6
_11952_,82.58
_14864_,82.58
net12774,82.58
_09221_,82.565
_02743_,82.56
_11069_,82.56
soc.core.VexRiscv.RegFilePlugin_regFile\[18\]\[23\],82.56
net11205,82.56
_12768_,82.54
soc.core.interface9_bank_bus_dat_r\[8\],82.52
clknet_leaf_576_mgmt_buffers.caravel_clk,82.52
net3652,82.51
soc.core.multiregimpl41_regs1,82.5
net12776,82.5
soc.core.VexRiscv.RegFilePlugin_regFile\[28\]\[24\],82.48
_04297_,82.46
_09224_,82.445
_04250_,82.44
net180,82.44
net4700,82.44
_02837_,82.42
_14908_,82.42
net4410,82.42
net4708,82.42
net11522,82.42
net11892,82.42
clknet_5_12_0_mgmt_buffers.caravel_clk,82.4
_02308_,82.38
_03473_,82.38
gpio_control_in_1a\[4\].gpio_defaults\[12\],82.37
net11903,82.37
gpio_control_in_2\[4\].gpio_defaults\[0\],82.36
net5117,82.36
_04979_,82.34
soc.core.VexRiscv.IBusCachedPlugin_cache.io_mem_rsp_payload_data\[11\],82.34
net177,82.34
_01618_,82.32
net3801,82.305
_08655_,82.3
net1091,82.3
net3313,82.3
soc.core.VexRiscv.decode_to_execute_CSR_WRITE_OPCODE,82.28
_12357_,82.26
user_io_oeb\[11\],82.26
_11977_,82.24
soc.core.multiregimpl57_regs1,82.24
net5959,82.24
clknet_leaf_99_mgmt_buffers.caravel_clk,82.22
_11279_,82.21
clknet_leaf_521_mgmt_buffers.caravel_clk,82.2
_00829_,82.18
_04044_,82.18
user_io_oeb\[12\],82.17
_12345_,82.16
soc.core.VexRiscv.CsrPlugin_mtvec_base\[20\],82.16
soc.core.VexRiscv.IBusCachedPlugin_cache.decodeStage_mmuRsp_physicalAddress\[13\],82.16
gpio_control_bidir_2\[1\].gpio_defaults\[11\],82.14
soc.core.VexRiscv.dBusWishbone_DAT_MISO\[17\],82.14
net5024,82.14
_03847_,82.12
_13102_,82.12
net11191,82.12
net11954,82.12
_04861_,82.1
soc.core.VexRiscv.RegFilePlugin_regFile\[11\]\[4\],82.1
net184,82.1
clknet_leaf_1055_mgmt_buffers.caravel_clk,82.08
clknet_leaf_458_mgmt_buffers.caravel_clk,82.06
_03598_,82.04
clknet_leaf_199_mgmt_buffers.caravel_clk,82.04
clknet_leaf_349_mgmt_buffers.caravel_clk,82.03
_10686_,82
clknet_leaf_454_mgmt_buffers.caravel_clk,82
_14277_,81.995
soc.core.VexRiscv.RegFilePlugin_regFile\[23\]\[7\],81.99
clknet_leaf_327_mgmt_buffers.caravel_clk,81.98
net3008,81.98
soc.core.mgmtsoc_vexriscv_debug_reset,81.96
soc.core.multiregimpl72_regs1,81.94
net12347,81.94
mgmt_buffers.la_data_in_enable\[46\],81.92
_12776_,81.9
_00059_,81.885
net11095,81.88
_10813_,81.84
_11973_,81.84
_12780_,81.84
net12115,81.82
_12602_,81.81
_03585_,81.8
net12203,81.8
mgmt_buffers.mprj_logic1\[343\],81.78
gpio_control_bidir_2\[1\].gpio_defaults\[8\],81.77
_01308_,81.74
soc.core.mgmtsoc_value\[2\],81.72
_13190_,81.7
soc.core.multiregimpl46_regs1,81.7
net11121,81.7
net11232,81.7
net11682,81.7
soc.core.mgmtsoc_vexriscv_debug_bus_dat_r\[16\],81.68
gpio_control_in_1\[4\].gpio_defaults\[1\],81.67
soc.core.VexRiscv.IBusCachedPlugin_cache.io_mem_rsp_payload_data\[7\],81.62
net10991,81.62
net12747,81.62
net10949,81.615
soc.core.uart_tx_fifo_produce\[2\],81.58
net4602,81.54
_05067_,81.52
_11624_,81.52
net145,81.52
net328,81.52
_07188_,81.5
_11535_,81.5
soc.core.mgmtsoc_litespisdrphycore_sr_out\[16\],81.5
net12065,81.48
net12197,81.46
net11248,81.445
_02381_,81.44
_03711_,81.44
_04219_,81.4
_11274_,81.4
soc.core.VexRiscv.when_DebugPlugin_l264,81.4
clknet_leaf_798_mgmt_buffers.caravel_clk,81.4
clknet_leaf_901_mgmt_buffers.caravel_clk,81.4
net11340,81.39
gpio_control_in_2\[5\].resetn,81.38
soc.core.VexRiscv.CsrPlugin_mtval\[30\],81.38
net11257,81.38
soc.core.la_ien_storage\[90\],81.37
soc.core.VexRiscv.CsrPlugin_mepc\[12\],81.36
_13408_,81.34
net5241,81.34
_08945_,81.32
_14795_,81.32
_03374_,81.3
_12223_,81.3
soc.core.VexRiscv.CsrPlugin_csrMapping_writeDataSignal\[24\],81.3
net3583,81.29
_12238_,81.28
soc.core.VexRiscv.RegFilePlugin_regFile\[11\]\[31\],81.28
clknet_leaf_609_mgmt_buffers.caravel_clk,81.28
soc.core.VexRiscv._zz_RegFilePlugin_regFile_port1\[1\],81.26
_01141_,81.21
_14439_,81.2
clknet_leaf_857_mgmt_buffers.caravel_clk,81.2
soc.core.spi_master_count\[1\],81.16
net3454,81.15
_04507_,81.12
_14692_,81.12
net4693,81.12
soc.core.VexRiscv.RegFilePlugin_regFile\[9\]\[5\],81.1
soc.core.multiregimpl37_regs1,81.1
net9429,81.1
_01918_,81.08
_04528_,81.08
soc.core.VexRiscv.DBusSimplePlugin_memoryExceptionPort_payload_badAddr\[7\],81.06
net3408,81.06
_07253_,81.045
soc.core.VexRiscv.IBusCachedPlugin_cache.io_mem_rsp_payload_data\[21\],81.04
soc.core.VexRiscv.RegFilePlugin_regFile\[1\]\[0\],81.04
soc.core.VexRiscv.RegFilePlugin_regFile\[21\]\[17\],81.04
gpio_control_in_2\[2\].mgmt_ena,81.02
_12518_,81
net12127,81
_14194_,80.98
net9229,80.96
_14841_,80.95
gpio_control_in_1a\[3\].shift_register\[10\],80.945
_14511_,80.94
_14867_,80.94
clknet_leaf_799_mgmt_buffers.caravel_clk,80.94
net4497,80.92
soc.core.gpioin4_enable_storage,80.9
soc.core.mgmtsoc_master_tx_fifo_source_payload_data\[31\],80.9
clknet_leaf_551_mgmt_buffers.caravel_clk,80.9
_05003_,80.88
_11775_,80.88
_14027_,80.88
net3601,80.88
_05017_,80.86
_13886_,80.86
_14666_,80.84
clknet_leaf_564_mgmt_buffers.caravel_clk,80.84
_13654_,80.8
clknet_leaf_926_mgmt_buffers.caravel_clk,80.8
mgmt_buffers.la_data_in_mprj\[84\],80.785
_13008_,80.76
net12137,80.76
_03729_,80.75
net4280,80.74
_03822_,80.72
_11992_,80.7
soc.core.VexRiscv.IBusCachedPlugin_cache._zz_banks_0_port1\[27\],80.7
soc.core.interface0_bank_bus_dat_r\[20\],80.7
_12324_,80.68
_00069_,80.67
_12196_,80.65
gpio_control_in_2\[2\].gpio_defaults\[10\],80.65
_12722_,80.64
gpio_control_in_2\[7\].serial_data_in,80.62
soc.core.VexRiscv.IBusCachedPlugin_cache.lineLoader_address\[22\],80.62
soc.core.VexRiscv.RegFilePlugin_regFile\[25\]\[7\],80.62
gpio_control_bidir_2\[0\].gpio_defaults\[12\],80.6
_14103_,80.58
soc.core.VexRiscv.execute_to_memory_INSTRUCTION\[8\],80.58
soc.core.interface0_bank_bus_dat_r\[15\],80.58
gpio_control_in_1a\[0\].gpio_defaults\[2\],80.57
_00364_,80.56
_13390_,80.56
mgmt_buffers.la_data_in_mprj\[33\],80.56
clknet_leaf_1114_mgmt_buffers.caravel_clk,80.56
clknet_leaf_1201_mgmt_buffers.caravel_clk,80.56
net12918,80.56
net10965,80.545
_03048_,80.52
_12940_,80.52
gpio_control_in_2\[5\].shift_register\[9\],80.52
net4539,80.52
net11790,80.51
_00007_,80.5
_02490_,80.5
_12148_,80.48
soc.core.VexRiscv.IBusCachedPlugin_cache.lineLoader_address\[27\],80.46
soc.core.VexRiscv.RegFilePlugin_regFile\[28\]\[31\],80.46
soc.core.VexRiscv.decode_to_execute_RS1\[21\],80.44
net5079,80.42
_13545_,80.4
_14825_,80.38
irq_spi\[0\],80.375
_10924_,80.36
soc.core.VexRiscv.RegFilePlugin_regFile\[10\]\[7\],80.36
soc.core.dbg_uart_data\[28\],80.36
net10932,80.345
gpio_control_in_2\[8\].shift_register\[12\],80.34
soc.core.multiregimpl21_regs0,80.32
net8811,80.32
_02835_,80.31
_04312_,80.3
_14068_,80.3
clknet_leaf_355_mgmt_buffers.caravel_clk,80.28
clknet_leaf_1106_mgmt_buffers.caravel_clk,80.28
soc.core.grant\[0\],80.26
soc.core.mgmtsoc_master_tx_fifo_source_payload_data\[17\],80.26
net1090,80.26
net10060,80.26
net11590,80.24
clknet_leaf_237_mgmt_buffers.caravel_clk,80.22
net4610,80.2
net11569,80.16
_14429_,80.14
clknet_leaf_403_mgmt_buffers.caravel_clk,80.14
gpio_control_in_1\[5\].gpio_defaults\[12\],80.11
_02476_,80.1
soc.core.mgmtsoc_master_rx_fifo_source_payload_data\[20\],80.1
clknet_leaf_1078_mgmt_buffers.caravel_clk,80.1
net3625,80.07
clknet_leaf_358_mgmt_buffers.caravel_clk,80.06
net11689,80.06
net4958,80.04
gpio_control_in_1a\[0\].gpio_defaults\[4\],80.03
_13411_,80.02
clknet_leaf_95_mgmt_buffers.caravel_clk,80
net3639,80
net5362,80
_02581_,79.98
_13139_,79.98
net1180,79.96
_11525_,79.95
net11304,79.945
_04914_,79.94
net7782,79.94
net9387,79.94
soc.core.VexRiscv.RegFilePlugin_regFile\[12\]\[28\],79.92
soc.core.multiregimpl18_regs0,79.92
clknet_leaf_475_mgmt_buffers.caravel_clk,79.92
net9596,79.9
soc.core.VexRiscv.RegFilePlugin_regFile\[31\]\[24\],79.88
net334,79.88
net5135,79.88
net11286,79.88
_04982_,79.86
_10845_,79.85
_11914_,79.84
net1046,79.84
net4129,79.84
_03058_,79.82
gpio_control_bidir_1\[1\].pad_gpio_outenb,79.82
_11268_,79.8
net2905,79.8
net9166,79.8
_14405_,79.78
clknet_leaf_53_mgmt_buffers.caravel_clk,79.78
gpio_control_bidir_2\[2\].gpio_defaults\[3\],79.77
net12068,79.74
_13983_,79.72
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[7\]\[5\],79.72
_12112_,79.7
net10047,79.695
clknet_leaf_489_mgmt_buffers.caravel_clk,79.66
net6779,79.66
net7322,79.66
net11917,79.66
_12401_,79.65
_11413_,79.62
gpio_control_bidir_2\[0\].serial_data_out,79.62
net4206,79.62
_03717_,79.6
_02848_,79.58
net307,79.58
net10933,79.58
soc.core.VexRiscv.dBusWishbone_ADR\[24\],79.565
net9239,79.56
soc.core.mgmtsoc_master_rx_fifo_source_payload_data\[18\],79.55
soc.core.dbg_uart_count\[18\],79.54
_04968_,79.52
_14874_,79.52
clknet_leaf_478_mgmt_buffers.caravel_clk,79.52
_14237_,79.48
soc.core.VexRiscv.RegFilePlugin_regFile\[3\]\[7\],79.48
soc.core.VexRiscv._zz_dBus_cmd_payload_data\[22\],79.48
user_io_oeb\[9\],79.48
net12770,79.48
soc.core.VexRiscv.RegFilePlugin_regFile\[14\]\[28\],79.46
clknet_leaf_391_mgmt_buffers.caravel_clk,79.46
soc.core.mgmtsoc_litespimmap_storage\[5\],79.45
mgmt_buffers.mprj_logic1\[24\],79.44
_09633_,79.425
_01198_,79.42
_03869_,79.42
net9900,79.39
clknet_leaf_343_mgmt_buffers.caravel_clk,79.38
net12897,79.38
gpio_control_bidir_2\[0\].gpio_defaults\[10\],79.37
_10628_,79.36
_09235_,79.345
_05100_,79.34
_10756_,79.34
clknet_leaf_9_mgmt_buffers.caravel_clk,79.34
net10716,79.34
_14965_,79.32
_12938_,79.28
soc.core.VexRiscv.RegFilePlugin_regFile\[22\]\[11\],79.28
net2865,79.28
net3002,79.28
pll.ext_trim\[5\],79.27
_10662_,79.26
soc.core.la_ien_storage\[116\],79.26
_02606_,79.24
_04721_,79.24
_14524_,79.24
soc.core.VexRiscv.memory_to_writeBack_MEMORY_ENABLE,79.24
clknet_leaf_628_mgmt_buffers.caravel_clk,79.24
net3746,79.22
net5438,79.22
net10820,79.22
_03709_,79.21
net10862,79.18
_12707_,79.16
mgmt_buffers.mprj_logic1\[364\],79.16
_04762_,79.12
_14074_,79.1
net12110,79.1
_03530_,79.09
_09599_,79.085
_04929_,79.08
_11555_,79.08
soc.core.VexRiscv.RegFilePlugin_regFile\[14\]\[26\],79.08
_11308_,79.06
clknet_leaf_1143_mgmt_buffers.caravel_clk,79.04
net4146,79.02
net12758,79.02
_09369_,79
net9080,79
clknet_leaf_121_mgmt_buffers.caravel_clk,78.98
mgmt_buffers.la_data_out_core\[40\],78.96
_04370_,78.92
_13184_,78.92
soc.core.VexRiscv.DBusSimplePlugin_memoryExceptionPort_payload_badAddr\[20\],78.92
net11578,78.9
_12376_,78.895
net10583,78.885
net6493,78.88
net2370,78.86
net4571,78.86
soc.core.dbg_uart_words_count\[3\],78.84
net4250,78.82
_09990_,78.81
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[6\]\[31\],78.8
net2947,78.8
net4226,78.8
gpio_control_in_2\[8\].gpio_defaults\[0\],78.79
_00174_,78.78
_03468_,78.78
_12581_,78.76
pll.ringosc.dstage\[5\].id.ts,78.76
net10436,78.715
_10798_,78.7
clknet_leaf_177_mgmt_buffers.caravel_clk,78.68
net12044,78.68
_09120_,78.665
clknet_leaf_509_mgmt_buffers.caravel_clk,78.66
gpio_control_in_2\[2\].gpio_defaults\[0\],78.64
clknet_leaf_182_mgmt_buffers.caravel_clk,78.64
_00340_,78.62
_11333_,78.62
clknet_leaf_1049_mgmt_buffers.caravel_clk,78.62
clknet_leaf_1203_mgmt_buffers.caravel_clk,78.61
net4092,78.605
_12696_,78.6
net3128,78.6
net8681,78.59
_03279_,78.53
_09064_,78.525
_09227_,78.525
_08623_,78.52
_14911_,78.52
net5398,78.52
_12851_,78.5
clknet_leaf_974_mgmt_buffers.caravel_clk,78.5
_07589_,78.425
soc.core.la_ien_storage\[86\],78.42
gpio_control_in_1a\[2\].shift_register\[12\],78.405
_10663_,78.4
_13965_,78.4
clknet_leaf_1130_mgmt_buffers.caravel_clk,78.4
net12011,78.4
mgmt_buffers.la_data_in_mprj_bar\[88\],78.36
user_io_oeb\[20\],78.36
net10940,78.345
_14025_,78.34
net12761,78.34
net3149,78.325
net4699,78.325
_13112_,78.32
net4188,78.32
net8611,78.32
net9679,78.32
net11092,78.32
_10623_,78.3
clknet_leaf_970_mgmt_buffers.caravel_clk,78.3
net10234,78.295
clknet_leaf_380_mgmt_buffers.caravel_clk,78.26
clknet_leaf_598_mgmt_buffers.caravel_clk,78.26
net12461,78.26
net9367,78.24
net11101,78.235
user_io_oeb\[10\],78.21
_00177_,78.2
_01887_,78.2
_11176_,78.2
net5901,78.2
_12140_,78.18
soc.core.VexRiscv.CsrPlugin_mtvec_base\[12\],78.18
soc.core.VexRiscv.RegFilePlugin_regFile\[7\]\[31\],78.18
_12798_,78.16
net1092,78.16
net10155,78.15
_00868_,78.14
_10879_,78.14
soc.core.spi_master_mosi_storage\[1\],78.14
clknet_leaf_953_mgmt_buffers.caravel_clk,78.14
_03727_,78.13
_03540_,78.12
clknet_leaf_464_mgmt_buffers.caravel_clk,78.12
_10674_,78.1
_11277_,78.1
_11428_,78.1
pll.div\[3\],78.1
net5146,78.1
_09223_,78.085
soc.core.mgmtsoc_value_status\[0\],78.06
net11262,78.045
soc.core.VexRiscv.RegFilePlugin_regFile\[14\]\[8\],78.02
net9677,78.02
net2671,78.02
_14603_,78.01
_09608_,78.005
_12909_,78.005
_11608_,78
soc.core.VexRiscv.RegFilePlugin_regFile\[15\]\[16\],78
soc.core.VexRiscv.CsrPlugin_csrMapping_writeDataSignal\[9\],77.995
soc.core.multiregimpl68_regs1,77.98
net2890,77.98
net9549,77.98
soc.core.VexRiscv.RegFilePlugin_regFile\[2\]\[1\],77.96
_04648_,77.94
soc.core.spi_master_control_storage\[8\],77.94
net9473,77.94
net11290,77.94
net170,77.935
net4241,77.92
net11459,77.92
soc.core.mgmtsoc_litespisdrphycore_sr_out\[6\],77.9
net3012,77.9
net9153,77.9
_08240_,77.885
_11922_,77.88
soc.core.VexRiscv.RegFilePlugin_regFile\[28\]\[9\],77.88
clknet_leaf_778_mgmt_buffers.caravel_clk,77.88
net12734,77.88
net12737,77.88
_00316_,77.86
soc.core.VexRiscv._zz_RegFilePlugin_regFile_port1\[5\],77.86
clknet_leaf_488_mgmt_buffers.caravel_clk,77.86
net12001,77.86
net3407,77.84
net3426,77.84
net9691,77.84
_03085_,77.82
soc.core.VexRiscv.RegFilePlugin_regFile\[14\]\[4\],77.82
net10323,77.805
_13998_,77.8
_14738_,77.8
_00129_,77.78
clknet_leaf_1045_mgmt_buffers.caravel_clk,77.78
_00650_,77.74
mgmt_buffers.mprj_logic1\[21\],77.74
_04347_,77.72
net3732,77.72
soc.core.VexRiscv.RegFilePlugin_regFile\[19\]\[0\],77.7
soc.core.multiregimpl133_regs1,77.7
_09105_,77.685
_01804_,77.68
_11526_,77.68
net3960,77.68
net4043,77.68
net6518,77.68
clknet_leaf_209_mgmt_buffers.caravel_clk,77.66
net10951,77.655
gpio_control_in_1a\[3\].shift_register\[0\],77.64
soc.core.VexRiscv.HazardSimplePlugin_writeBackBuffer_payload_address\[1\],77.64
clknet_leaf_184_mgmt_buffers.caravel_clk,77.64
soc.core.dbg_uart_count\[7\],77.62
clknet_leaf_657_mgmt_buffers.caravel_clk,77.62
net4686,77.62
net5230,77.62
net10894,77.62
net12231,77.62
_11259_,77.6
_14525_,77.6
_00265_,77.58
_02585_,77.58
pll.ext_trim\[18\],77.58
soc.core.multiregimpl11_regs1,77.58
clknet_leaf_590_mgmt_buffers.caravel_clk,77.565
_02293_,77.56
_06816_,77.54
_08215_,77.54
soc.core.dbg_uart_length\[2\],77.54
clknet_leaf_265_mgmt_buffers.caravel_clk,77.54
net4380,77.54
_13197_,77.5
net9254,77.5
_14070_,77.48
soc.core.mgmtsoc_master_tx_fifo_source_payload_data\[8\],77.46
net10576,77.46
pll.pll_control.tval\[1\],77.43
_09355_,77.42
_07183_,77.4
_09174_,77.4
net5914,77.4
net167,77.395
_13312_,77.38
soc.core.mgmtsoc_cpu_rst,77.38
user_io_out\[22\],77.37
_05057_,77.35
_13616_,77.34
net5773,77.33
mgmt_buffers.la_data_in_mprj\[87\],77.325
_02676_,77.32
net11914,77.31
mgmt_buffers.la_data_in_mprj\[105\],77.305
_12937_,77.3
net9567,77.3
net13164,77.3
_04792_,77.26
_10892_,77.26
net7130,77.26
net9311,77.26
_12537_,77.24
soc.core.VexRiscv.decode_to_execute_RS2\[13\],77.24
net4313,77.24
gpio_control_in_1\[0\].gpio_defaults\[10\],77.23
_14798_,77.22
clknet_leaf_450_mgmt_buffers.caravel_clk,77.22
mask_rev\[7\],77.21
soc.core.VexRiscv.dBusWishbone_ADR\[27\],77.205
gpio_control_in_1\[0\].gpio_defaults\[1\],77.19
net4592,77.19
soc.core.la_ien_storage\[111\],77.18
soc.core.VexRiscv.CsrPlugin_mtvec_base\[18\],77.16
_14059_,77.12
net2915,77.1
net3219,77.1
net9625,77.1
_14716_,77.095
_00030_,77.08
_03832_,77.08
_09315_,77.08
gpio_control_bidir_1\[1\].pad_gpio_out,77.08
mprj_io_out[20],77.07
_03577_,77.06
_13978_,77.06
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[1\]\[6\],77.06
_00369_,77.04
_01783_,77.02
net2974,77.02
net11176,77.005
_03600_,77
_11227_,77
net9721,77
net10722,77
net10975,76.995
_10417_,76.98
soc.core.VexRiscv.RegFilePlugin_regFile\[18\]\[10\],76.98
soc.core.VexRiscv._zz_RegFilePlugin_regFile_port1\[2\],76.98
net8028,76.98
_03735_,76.96
_02753_,76.94
_12967_,76.94
clknet_leaf_50_mgmt_buffers.caravel_clk,76.94
net3789,76.94
gpio_control_in_1\[1\].gpio_defaults\[10\],76.93
_00109_,76.925
_03108_,76.92
clknet_leaf_219_mgmt_buffers.caravel_clk,76.92
net4675,76.91
gpio_control_in_2\[2\].shift_register\[9\],76.88
soc.core.dbg_uart_data\[26\],76.88
clknet_leaf_1170_mgmt_buffers.caravel_clk,76.88
clknet_leaf_992_mgmt_buffers.caravel_clk,76.86
clknet_leaf_994_mgmt_buffers.caravel_clk,76.86
_12779_,76.84
mgmt_buffers.la_data_in_mprj_bar\[44\],76.82
net11052,76.805
_10675_,76.8
soc.core.VexRiscv.RegFilePlugin_regFile\[20\]\[4\],76.8
soc.core.mgmtsoc_update_value_storage,76.8
clknet_leaf_67_mgmt_buffers.caravel_clk,76.8
_14268_,76.78
_05000_,76.77
_01261_,76.76
_12588_,76.76
soc.core.mgmtsoc_master_tx_fifo_source_payload_data\[25\],76.76
soc.core.VexRiscv.RegFilePlugin_regFile\[5\]\[29\],76.74
soc.core.la_ien_storage\[95\],76.74
net9934,76.74
net10953,76.725
_11981_,76.72
mask_rev\[6\],76.71
soc.core.VexRiscv.RegFilePlugin_regFile\[5\]\[7\],76.7
clknet_leaf_453_mgmt_buffers.caravel_clk,76.7
clknet_leaf_675_mgmt_buffers.caravel_clk,76.7
net2964,76.7
_01333_,76.68
_08157_,76.68
net5834,76.66
net9538,76.66
gpio_control_in_2\[0\].shift_register\[9\],76.64
gpio_control_in_1\[1\].gpio_defaults\[0\],76.63
net3520,76.62
_08621_,76.6
_10406_,76.6
clknet_leaf_518_mgmt_buffers.caravel_clk,76.6
soc.core.VexRiscv.RegFilePlugin_regFile\[26\]\[10\],76.58
net5327,76.58
soc.core.dbg_uart_data\[20\],76.56
soc.core.mgmtsoc_litespisdrphycore_sr_in\[0\],76.56
clknet_leaf_1189_mgmt_buffers.caravel_clk,76.56
net8593,76.56
_00094_,76.54
_14051_,76.54
mgmt_buffers.la_data_in_enable\[48\],76.54
soc.core.VexRiscv._zz_RegFilePlugin_regFile_port1\[10\],76.54
soc.core.dbg_uart_data\[15\],76.54
_12757_,76.52
soc.core.VexRiscv.memory_to_writeBack_REGFILE_WRITE_DATA\[11\],76.52
net12778,76.5
_04488_,76.48
_15214_,76.48
mgmt_buffers.la_data_in_mprj\[95\],76.465
clknet_leaf_1084_mgmt_buffers.caravel_clk,76.46
_01138_,76.44
_01423_,76.42
_04766_,76.42
_11679_,76.42
net3930,76.42
net5680,76.42
mgmt_buffers.mprj_logic1\[346\],76.38
soc.core.mgmtsoc_vexriscv_debug_bus_dat_r\[30\],76.38
_12775_,76.36
soc.core.VexRiscv.RegFilePlugin_regFile\[16\]\[0\],76.36
clknet_leaf_1142_mgmt_buffers.caravel_clk,76.36
net12235,76.36
net9561,76.34
soc.core.mgmtsoc_litespisdrphycore_cnt\[6\],76.32
net12108,76.3
mgmt_buffers.la_data_in_mprj\[114\],76.295
_07225_,76.285
soc.core.VexRiscv.DBusSimplePlugin_memoryExceptionPort_payload_badAddr\[4\],76.28
soc.core.VexRiscv._zz_CsrPlugin_csrMapping_readDataInit\[24\],76.26
clknet_leaf_1056_mgmt_buffers.caravel_clk,76.26
_02729_,76.24
soc.core.VexRiscv.RegFilePlugin_regFile\[0\]\[28\],76.22
net164,76.22
clknet_leaf_1063_mgmt_buffers.caravel_clk,76.22
soc.core.mgmtsoc_vexriscv_debug_bus_dat_r\[27\],76.215
clknet_leaf_490_mgmt_buffers.caravel_clk,76.2
_12795_,76.18
_14697_,76.18
soc.core.interface9_bank_bus_dat_r\[12\],76.18
net11186,76.165
_13223_,76.14
net12111,76.14
_06952_,76.12
net4491,76.12
_11934_,76.1
gpio_control_in_1\[0\].shift_register\[0\],76.1
clknet_leaf_301_mgmt_buffers.caravel_clk,76.1
clknet_leaf_1116_mgmt_buffers.caravel_clk,76.1
net4638,76.1
_08225_,76.085
clknet_leaf_658_mgmt_buffers.caravel_clk,76.08
_03142_,76.04
clknet_leaf_81_mgmt_buffers.caravel_clk,76.04
_00063_,76.025
_03111_,76.02
_07613_,76.02
_04916_,76
_12781_,76
_14167_,76
net5880,75.98
net10393,75.975
net9751,75.96
_10655_,75.94
net6007,75.94
net12515,75.94
gpio_control_bidir_1\[1\].gpio_defaults\[11\],75.93
_03525_,75.92
soc.core.VexRiscv.RegFilePlugin_regFile\[24\]\[25\],75.92
net4720,75.92
soc.core.dbg_uart_count\[9\],75.9
clknet_leaf_1011_mgmt_buffers.caravel_clk,75.9
net12259,75.9
irq_spi\[1\],75.895
_11687_,75.88
net12793,75.88
gpio_control_in_1a\[1\].gpio_defaults\[0\],75.87
_04851_,75.86
_12524_,75.86
soc.core.VexRiscv.CsrPlugin_mie_MTIE,75.86
_10801_,75.84
_04450_,75.83
soc.core.la_ien_storage\[67\],75.81
net10959,75.805
_07177_,75.8
soc.core.interface9_bank_bus_dat_r\[0\],75.8
soc.core.VexRiscv.dBusWishbone_DAT_MISO\[14\],75.78
soc.core.multiregimpl12_regs1,75.78
_10898_,75.76
net4212,75.76
_11596_,75.74
soc.core.VexRiscv.RegFilePlugin_regFile\[9\]\[24\],75.74
soc.core.VexRiscv.IBusCachedPlugin_cache.io_cpu_prefetch_pc\[16\],75.73
_10913_,75.72
_12533_,75.72
_13187_,75.72
_11663_,75.7
soc.core.VexRiscv.CsrPlugin_mtval\[24\],75.68
gpio_control_bidir_1\[0\].gpio_defaults\[7\],75.67
_04170_,75.66
pll.ringosc.c\[0\],75.66
clknet_leaf_565_mgmt_buffers.caravel_clk,75.66
_10910_,75.64
_11708_,75.64
_14312_,75.64
_04866_,75.63
net8802,75.62
_09923_,75.58
soc.core.VexRiscv.IBusCachedPlugin_cache.io_mem_rsp_payload_data\[10\],75.58
clknet_leaf_292_mgmt_buffers.caravel_clk,75.58
net11379,75.58
_00582_,75.56
_10847_,75.56
_14973_,75.56
soc.core.la_ien_storage\[110\],75.56
clknet_leaf_642_mgmt_buffers.caravel_clk,75.56
net10643,75.545
net11260,75.545
_14987_,75.53
_11357_,75.52
_00122_,75.505
net3173,75.5
net5859,75.5
net11741,75.5
mgmt_buffers.la_data_in_mprj_bar\[33\],75.49
net9722,75.49
net9588,75.485
_11664_,75.48
net12063,75.48
_14224_,75.42
soc.core.RAM256.Do0_pre\[1\]\[17\],75.42
clknet_leaf_409_mgmt_buffers.caravel_clk,75.42
clknet_leaf_455_mgmt_buffers.caravel_clk,75.42
_00061_,75.4
_11681_,75.4
clknet_leaf_627_mgmt_buffers.caravel_clk,75.4
net3355,75.4
_09192_,75.38
clknet_leaf_326_mgmt_buffers.caravel_clk,75.38
soc.core.VexRiscv.IBusCachedPlugin_cache.io_cpu_prefetch_pc\[12\],75.36
_12139_,75.34
mgmt_buffers.la_data_in_enable\[36\],75.34
clknet_leaf_679_mgmt_buffers.caravel_clk,75.34
clknet_leaf_856_mgmt_buffers.caravel_clk,75.34
clknet_leaf_1057_mgmt_buffers.caravel_clk,75.34
net3360,75.34
clknet_leaf_661_mgmt_buffers.caravel_clk,75.32
net9336,75.32
net3570,75.28
net4079,75.28
_07072_,75.26
_12968_,75.26
gpio_control_in_2\[4\].shift_register\[9\],75.26
clknet_leaf_354_mgmt_buffers.caravel_clk,75.26
clknet_leaf_1008_mgmt_buffers.caravel_clk,75.26
_03815_,75.24
_12753_,75.24
net10034,75.24
_05007_,75.2
_10535_,75.18
_12908_,75.18
_13248_,75.18
soc.core.la_ien_storage\[82\],75.18
net3436,75.18
net4274,75.17
_00385_,75.16
_12174_,75.16
_02652_,75.14
_10685_,75.14
_12785_,75.14
_14964_,75.14
net309,75.14
_14801_,75.12
_04857_,75.1
_13054_,75.1
gpio_control_in_2\[8\].resetn,75.1
soc.core.VexRiscv.RegFilePlugin_regFile\[1\]\[27\],75.1
_14674_,75.08
gpio_control_bidir_2\[0\].shift_register\[1\],75.08
net11096,75.06
soc.core.mgmtsoc_master_tx_fifo_source_payload_data\[30\],75.04
net8189,75.04
net12744,75.04
net2600,75.02
_09702_,75.005
_00367_,75
_12329_,74.93
mgmt_buffers.mprj_logic1\[347\],74.93
soc.core.RAM256.Do0_pre\[1\]\[13\],74.92
_12190_,74.9
_13649_,74.9
net2942,74.9
_11668_,74.89
gpio_control_bidir_2\[0\].shift_register\[12\],74.885
_11782_,74.88
_13717_,74.88
_13990_,74.88
net4623,74.88
net3253,74.865
net12003,74.86
clknet_leaf_692_mgmt_buffers.caravel_clk,74.84
net4279,74.84
soc.core.interface3_bank_bus_dat_r\[8\],74.82
_09097_,74.8
soc.core.VexRiscv.RegFilePlugin_regFile\[26\]\[31\],74.8
soc.core.VexRiscv.memory_to_writeBack_REGFILE_WRITE_DATA\[6\],74.8
net3431,74.78
net5603,74.78
gpio_control_in_1a\[0\].gpio_defaults\[12\],74.77
_04722_,74.76
_13031_,74.74
net4682,74.74
net12794,74.74
gpio_control_in_1\[4\].gpio_defaults\[0\],74.73
mgmt_buffers.la_data_in_mprj\[10\],74.725
_05011_,74.72
_10677_,74.72
_12939_,74.7
clknet_leaf_360_mgmt_buffers.caravel_clk,74.7
clknet_leaf_964_mgmt_buffers.caravel_clk,74.7
_13961_,74.68
net3483,74.68
soc.core.VexRiscv.RegFilePlugin_regFile\[11\]\[8\],74.66
soc.core.VexRiscv.RegFilePlugin_regFile\[5\]\[31\],74.66
net321,74.66
_14796_,74.64
soc.core.mgmtsoc_litespisdrphycore_cnt\[2\],74.63
_14843_,74.58
clknet_leaf_130_mgmt_buffers.caravel_clk,74.56
soc.core.VexRiscv._zz_iBusWishbone_ADR\[0\],74.54
_10688_,74.52
_14912_,74.52
gpio_control_in_2\[5\].gpio_defaults\[1\],74.52
_04986_,74.51
_10477_,74.5
soc.core.VexRiscv.RegFilePlugin_regFile\[10\]\[31\],74.48
net203,74.475
_12222_,74.46
_13174_,74.46
gpio_control_in_2\[6\].gpio_defaults\[11\],74.46
_01932_,74.44
soc.core.VexRiscv.CsrPlugin_exceptionPendings_2,74.44
net187,74.44
soc.core.VexRiscv.IBusCachedPlugin_cache.io_cpu_prefetch_pc\[14\],74.42
soc.core.multiregimpl96_regs1,74.42
net10130,74.42
_11642_,74.41
soc.core.VexRiscv.dBusWishbone_ADR\[26\],74.405
_00324_,74.38
_00553_,74.38
_02315_,74.38
_14283_,74.38
clknet_leaf_8_mgmt_buffers.caravel_clk,74.38
clknet_leaf_352_mgmt_buffers.caravel_clk,74.38
net6804,74.38
_09111_,74.36
_13192_,74.36
soc.core.VexRiscv.RegFilePlugin_regFile\[0\]\[2\],74.36
_14314_,74.34
soc.core.VexRiscv.RegFilePlugin_regFile\[13\]\[12\],74.32
_14437_,74.28
_14739_,74.28
soc.core.mgmtsoc_reload_storage\[23\],74.28
_04956_,74.26
_14784_,74.26
clknet_leaf_260_mgmt_buffers.caravel_clk,74.24
net7955,74.225
_11954_,74.22
_14421_,74.22
soc.core.VexRiscv._zz_CsrPlugin_csrMapping_readDataInit\[5\],74.22
net5468,74.22
net5538,74.22
_10403_,74.2
_11272_,74.2
clknet_leaf_876_mgmt_buffers.caravel_clk,74.2
net5990,74.2
net10556,74.195
_03820_,74.18
net1201,74.18
_03153_,74.14
_14374_,74.14
clknet_leaf_839_mgmt_buffers.caravel_clk,74.14
net8174,74.14
net12075,74.14
_14298_,74.13
clknet_leaf_684_mgmt_buffers.caravel_clk,74.11
_03792_,74.1
_07605_,74.1
net3457,74.1
net2930,74.08
net4296,74.08
_02233_,74.06
clknet_leaf_743_mgmt_buffers.caravel_clk,74.02
net9782,74.02
net2691,74.02
_09992_,74
clknet_leaf_719_mgmt_buffers.caravel_clk,74
_04769_,73.99
_09847_,73.98
soc.core.VexRiscv.RegFilePlugin_regFile\[22\]\[29\],73.98
net11223,73.98
_03648_,73.96
clknet_leaf_85_mgmt_buffers.caravel_clk,73.96
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[0\]\[28\],73.955
_12370_,73.94
net4443,73.94
net9829,73.94
_03872_,73.92
soc.core.VexRiscv.RegFilePlugin_regFile\[3\]\[1\],73.92
soc.core.VexRiscv.RegFilePlugin_regFile\[6\]\[18\],73.92
_13774_,73.9
clknet_leaf_400_mgmt_buffers.caravel_clk,73.9
net11988,73.885
net3905,73.88
clknet_leaf_270_mgmt_buffers.caravel_clk,73.86
mgmt_buffers.la_data_in_mprj\[7\],73.845
_14806_,73.84
net1200,73.82
soc.core.interface6_bank_bus_dat_r\[15\],73.8
_03976_,73.78
_13720_,73.78
gpio_control_bidir_1\[0\].shift_register\[5\],73.78
gpio_control_bidir_1\[1\].gpio_defaults\[5\],73.77
_04548_,73.76
mgmt_buffers.la_data_in_mprj_bar\[84\],73.76
clknet_leaf_912_mgmt_buffers.caravel_clk,73.76
net12042,73.76
mask_rev\[12\],73.75
net12911,73.74
gpio_control_in_2\[3\].gpio_defaults\[10\],73.73
mgmt_buffers.mprj_logic1\[351\],73.72
soc.core.mgmtsoc_vexriscv_debug_bus_dat_r\[21\],73.72
_03718_,73.7
mgmt_buffers.la_data_in_mprj\[86\],73.685
_08900_,73.68
net4690,73.68
net10296,73.68
_10551_,73.66
_10654_,73.66
_14513_,73.66
gpio_control_in_2\[6\].resetn,73.66
soc.core.VexRiscv.debug_bus_rsp_data\[4\],73.66
net3778,73.66
net12211,73.66
soc.core.VexRiscv.RegFilePlugin_regFile\[22\]\[24\],73.65
gpio_control_in_2\[3\].resetn,73.64
net9645,73.63
_12842_,73.625
_14433_,73.62
pll.ext_trim\[25\],73.62
soc.core.VexRiscv.IBusCachedPlugin_cache.io_mem_rsp_payload_data\[4\],73.62
soc.core.VexRiscv.RegFilePlugin_regFile\[14\]\[17\],73.62
soc.core.VexRiscv.RegFilePlugin_regFile\[29\]\[20\],73.62
net5245,73.62
net12229,73.62
net11992,73.615
_03477_,73.6
_11423_,73.6
soc.core.VexRiscv.DBusSimplePlugin_memoryExceptionPort_payload_badAddr\[5\],73.6
soc.core.VexRiscv.dBusWishbone_DAT_MISO\[13\],73.6
net2936,73.6
mprj_io_dm[78],73.59
soc.core.VexRiscv.RegFilePlugin_regFile\[31\]\[2\],73.58
net11172,73.58
net12379,73.58
net3329,73.56
gpio_control_in_1\[3\].gpio_defaults\[10\],73.55
_04431_,73.54
_10905_,73.54
net10954,73.54
_09248_,73.52
_00523_,73.48
net9272,73.48
soc.core.VexRiscv.RegFilePlugin_regFile\[3\]\[4\],73.46
net10342,73.45
_02067_,73.44
_09246_,73.44
_12067_,73.44
soc.core.VexRiscv.memory_to_writeBack_REGFILE_WRITE_DATA\[9\],73.435
soc.core.dbg_uart_data\[12\],73.425
_10689_,73.4
clknet_leaf_1058_mgmt_buffers.caravel_clk,73.4
net3857,73.4
net2909,73.36
_15305_,73.34
net3325,73.34
_04922_,73.33
_02284_,73.3
soc.core.VexRiscv.CsrPlugin_mtvec_base\[21\],73.3
net6388,73.3
net192,73.295
_00017_,73.28
soc.core.VexRiscv.IBusCachedPlugin_cache.io_cpu_prefetch_pc\[8\],73.28
soc.core.VexRiscv.dBusWishbone_DAT_MISO\[6\],73.28
net9134,73.28
_09242_,73.265
_13975_,73.26
net8352,73.26
_13018_,73.24
net152,73.24
net4627,73.24
_13096_,73.2
_14291_,73.2
clknet_leaf_401_mgmt_buffers.caravel_clk,73.18
_01535_,73.16
_02143_,73.16
clknet_leaf_559_mgmt_buffers.caravel_clk,73.16
clknet_leaf_940_mgmt_buffers.caravel_clk,73.16
_01168_,73.12
net3115,73.12
net11599,73.12
_09697_,73.105
_00135_,73.1
_11450_,73.1
net3063,73.1
net2644,73.1
_04394_,73.08
soc.core.la_ien_storage\[99\],73.08
_09362_,73.07
gpio_control_in_1a\[5\].gpio_defaults\[1\],73.07
net3514,73.06
_13269_,73.04
net3067,73.04
clknet_leaf_1018_mgmt_buffers.caravel_clk,73.02
net3549,73.02
_11936_,73
mgmt_buffers.la_data_in_mprj_bar\[105\],73
soc.core.gpioin2_gpioin2_edge_storage,73
_14434_,72.96
mgmt_buffers.la_data_in_enable\[30\],72.96
soc.core.VexRiscv.RegFilePlugin_regFile\[25\]\[21\],72.96
_10601_,72.94
soc.core.dbg_uart_data\[2\],72.94
soc.core.VexRiscv._zz_execute_to_memory_REGFILE_WRITE_DATA\[1\],72.92
_03700_,72.9
soc.core.VexRiscv.RegFilePlugin_regFile\[14\]\[13\],72.9
net10154,72.89
_04341_,72.88
gpio_control_in_2\[2\].shift_register\[8\],72.88
net12366,72.88
_10932_,72.86
net4181,72.86
net2655,72.86
_08492_,72.845
gpio_control_bidir_2\[2\].shift_register\[5\],72.84
_11381_,72.835
soc.core.VexRiscv.RegFilePlugin_regFile\[16\]\[28\],72.82
soc.core.VexRiscv.RegFilePlugin_regFile\[17\]\[13\],72.82
clknet_leaf_273_mgmt_buffers.caravel_clk,72.82
_02609_,72.8
_09365_,72.78
_14813_,72.78
soc.core.VexRiscv.RegFilePlugin_regFile\[12\]\[18\],72.78
_03712_,72.76
_12340_,72.76
net294,72.76
net9496,72.76
soc.core.dbg_uart_data\[1\],72.74
soc.core.interface3_bank_bus_dat_r\[9\],72.74
soc.core.multiregimpl0_regs1,72.74
net11064,72.725
gpio_control_in_1a\[0\].shift_register\[11\],72.72
soc.core.VexRiscv.memory_to_writeBack_REGFILE_WRITE_DATA\[23\],72.72
net11380,72.705
_14720_,72.7
clknet_leaf_356_mgmt_buffers.caravel_clk,72.7
net6026,72.7
_02023_,72.66
_14245_,72.66
_14407_,72.66
gpio_control_in_2\[2\].gpio_defaults\[1\],72.66
net132,72.66
net10031,72.66
_07142_,72.64
_10664_,72.64
_11314_,72.64
soc.core.VexRiscv.IBusCachedPlugin_cache._zz_fetchStage_read_waysValues_0_tag_valid_2\[19\],72.62
soc.core.mgmtsoc_master_tx_fifo_source_payload_data\[11\],72.62
_09338_,72.605
_08390_,72.585
soc.core.dbg_uart_address\[25\],72.56
_01318_,72.54
_04379_,72.54
pll.itrim\[18\],72.54
net3550,72.52
net7842,72.52
soc.core.VexRiscv.CsrPlugin_mstatus_MPIE,72.51
gpio_control_bidir_1\[0\].shift_register\[8\],72.505
_13552_,72.5
net12579,72.5
mgmt_buffers.mprj_logic1\[334\],72.48
soc.core.VexRiscv.RegFilePlugin_regFile\[6\]\[23\],72.48
soc.core.spi_master_cs_storage\[14\],72.48
_12704_,72.46
net2891,72.46
soc.core.multiregimpl42_regs0,72.44
net9474,72.44
net12748,72.44
_11372_,72.43
gpio_control_in_1a\[1\].gpio_defaults\[4\],72.43
gpio_control_in_2\[3\].shift_register\[8\],72.42
soc.core.mgmtsoc_bus_errors\[7\],72.42
soc.core.multiregimpl83_regs1,72.42
net2697,72.42
_06181_,72.4
_14699_,72.4
soc.core.interface6_bank_bus_dat_r\[13\],72.4
_12124_,72.38
soc.core.VexRiscv.RegFilePlugin_regFile\[30\]\[24\],72.36
net2929,72.36
net10983,72.36
gpio_control_in_1\[5\].gpio_defaults\[11\],72.35
_03535_,72.34
_14225_,72.34
_01340_,72.32
_04330_,72.32
soc.core.uart_phy_tx_phase\[22\],72.32
clknet_leaf_577_mgmt_buffers.caravel_clk,72.3
_14246_,72.28
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[10\]\[10\],72.28
mgmt_buffers.la_data_in_mprj_bar\[126\],72.26
soc.core.dbg_uart_length\[3\],72.26
net10114,72.26
net11928,72.26
_09675_,72.235
soc.core.VexRiscv.CsrPlugin_mcause_exceptionCode\[2\],72.225
soc.core.VexRiscv.RegFilePlugin_regFile\[21\]\[27\],72.22
_04108_,72.2
_14082_,72.2
soc.core.spi_master_count\[2\],72.2
_10523_,72.18
_11378_,72.17
net3402,72.14
gpio_control_in_1a\[1\].gpio_defaults\[1\],72.13
_04938_,72.12
_04336_,72.11
_00456_,72.1
_03469_,72.1
soc.core.VexRiscv.RegFilePlugin_regFile\[8\]\[17\],72.1
clknet_leaf_788_mgmt_buffers.caravel_clk,72.1
net2653,72.1
_02277_,72.08
gpio_control_in_2\[4\].shift_register\[11\],72.08
net197,72.08
_12721_,72.06
soc.core.VexRiscv._zz_execute_ENV_CTRL\[1\],72.04
_14913_,72.02
_14988_,72.02
clknet_leaf_245_mgmt_buffers.caravel_clk,72.02
_04854_,72
net7535,72
net12041,72
gpio_control_in_1a\[3\].gpio_defaults\[0\],71.99
_03057_,71.985
clknet_leaf_494_mgmt_buffers.caravel_clk,71.98
net6182,71.96
soc.core.la_ien_storage\[70\],71.955
net12117,71.94
soc.core.VexRiscv._zz_execute_to_memory_REGFILE_WRITE_DATA\[3\],71.92
_14570_,71.9
clknet_leaf_709_mgmt_buffers.caravel_clk,71.9
net3490,71.9
net8220,71.9
net12914,71.88
_10931_,71.84
net9379,71.84
soc.core.VexRiscv.RegFilePlugin_regFile\[16\]\[17\],71.82
soc.core.VexRiscv.RegFilePlugin_regFile\[25\]\[8\],71.82
soc.core.mgmtsoc_scratch_storage\[10\],71.82
clknet_leaf_264_mgmt_buffers.caravel_clk,71.82
net2660,71.82
net12391,71.8
_09869_,71.78
soc.core.mgmtsoc_master_tx_fifo_source_payload_data\[26\],71.78
net2983,71.78
net10159,71.78
_04557_,71.74
gpio_control_in_2\[5\].shift_register\[5\],71.72
_02977_,71.7
gpio_control_in_1\[3\].gpio_defaults\[0\],71.69
net10986,71.685
_13532_,71.66
net10842,71.655
_08581_,71.64
_11902_,71.64
_04241_,71.62
net3020,71.62
net4672,71.62
net9328,71.62
soc.core.dbg_uart_length\[5\],71.6
_03060_,71.58
_07061_,71.58
soc.core.multiregimpl64_regs1,71.58
_02363_,71.56
_04415_,71.56
net12916,71.56
_02283_,71.54
_04602_,71.54
_08119_,71.54
gpio_control_in_2\[4\].gpio_defaults\[10\],71.53
clknet_leaf_348_mgmt_buffers.caravel_clk,71.52
clknet_leaf_1134_mgmt_buffers.caravel_clk,71.52
_03723_,71.5
_11765_,71.5
net12138,71.5
gpio_control_bidir_2\[2\].shift_register\[9\],71.48
net4378,71.48
net10480,71.48
_00272_,71.46
net3278,71.46
net10021,71.46
net11847,71.46
soc.core.VexRiscv.RegFilePlugin_regFile\[30\]\[19\],71.44
net3584,71.44
_10098_,71.42
_13721_,71.42
net10304,71.42
clknet_leaf_680_mgmt_buffers.caravel_clk,71.4
clknet_leaf_771_mgmt_buffers.caravel_clk,71.4
gpio_control_bidir_1\[0\].gpio_defaults\[8\],71.39
_09353_,71.385
_00338_,71.38
_00980_,71.38
soc.core.VexRiscv.IBusCachedPlugin_cache._zz_fetchStage_read_waysValues_0_tag_valid_2\[11\],71.38
net3708,71.38
net195,71.375
_03289_,71.36
soc.core.VexRiscv.RegFilePlugin_regFile\[11\]\[11\],71.36
net3096,71.345
soc.core.interface1_bank_bus_dat_r\[0\],71.34
soc.core.multiregimpl43_regs1,71.34
_12761_,71.32
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[6\]\[4\],71.32
net11527,71.32
gpio_control_bidir_2\[2\].gpio_defaults\[8\],71.31
soc.core.mgmtsoc_master_phyconfig_storage\[6\],71.3
soc.core.mgmtsoc_vexriscv_debug_bus_dat_r\[29\],71.3
clknet_leaf_1022_mgmt_buffers.caravel_clk,71.28
net3787,71.28
net4586,71.28
_03130_,71.26
_13195_,71.26
soc.core.VexRiscv.RegFilePlugin_regFile\[11\]\[20\],71.26
soc.core.multiregimpl36_regs0,71.24
clknet_leaf_1005_mgmt_buffers.caravel_clk,71.24
soc.core.dbg_uart_address\[24\],71.22
net12787,71.22
net3712,71.205
_03325_,71.2
net10172,71.2
net12284,71.2
_04030_,71.18
clknet_leaf_556_mgmt_buffers.caravel_clk,71.18
soc.core.mgmtsoc_litespisdrphycore_sr_out\[29\],71.175
soc.core.VexRiscv.IBusCachedPlugin_cache.io_mem_rsp_payload_data\[9\],71.16
clknet_leaf_286_mgmt_buffers.caravel_clk,71.16
clknet_leaf_412_mgmt_buffers.caravel_clk,71.16
soc.core.VexRiscv.IBusCachedPlugin_cache._zz_fetchStage_read_waysValues_0_tag_valid_2\[16\],71.14
soc.core.spi_master_clk_divider1\[14\],71.14
clknet_leaf_89_mgmt_buffers.caravel_clk,71.14
net3567,71.14
net8835,71.14
_14403_,71.1
gpio_control_in_2\[2\].shift_register\[10\],71.1
_11517_,71.09
gpio_control_in_1a\[4\].gpio_defaults\[6\],71.09
mprj_io_dm[80],71.09
clknet_leaf_614_mgmt_buffers.caravel_clk,71.085
_03532_,71.08
_11370_,71.08
_12573_,71.06
clknet_leaf_881_mgmt_buffers.caravel_clk,71.06
net10930,71.045
_00920_,71.04
_14803_,71.04
_03174_,71.02
gpio_control_bidir_2\[1\].shift_register\[2\],71.02
net11285,71
_13546_,70.99
net11357,70.985
_02361_,70.98
_11467_,70.98
clknet_leaf_948_mgmt_buffers.caravel_clk,70.98
_13431_,70.94
_11688_,70.92
_12760_,70.9
_13189_,70.9
_13549_,70.9
soc.core.VexRiscv.debug_bus_rsp_data\[2\],70.9
soc.core.interface3_bank_bus_dat_r\[30\],70.9
clknet_leaf_470_mgmt_buffers.caravel_clk,70.9
net10994,70.885
gpio_control_in_2\[0\].serial_data_in,70.88
_09226_,70.86
soc.core.VexRiscv._zz_CsrPlugin_csrMapping_readDataInit\[31\],70.86
net12899,70.86
soc.core.VexRiscv.RegFilePlugin_regFile\[1\]\[30\],70.84
net8916,70.84
clknet_leaf_103_mgmt_buffers.caravel_clk,70.82
net4318,70.82
net12746,70.82
gpio_control_in_1\[1\].gpio_defaults\[1\],70.81
net712,70.81
_14157_,70.8
_12764_,70.78
gpio_control_in_2\[0\].shift_register\[5\],70.78
soc.core.VexRiscv.RegFilePlugin_regFile\[23\]\[27\],70.74
clknet_leaf_1120_mgmt_buffers.caravel_clk,70.74
net4063,70.725
_03534_,70.72
soc.core.VexRiscv.RegFilePlugin_regFile\[25\]\[19\],70.72
clknet_leaf_791_mgmt_buffers.caravel_clk,70.72
net2785,70.72
net10893,70.72
_01309_,70.7
_04902_,70.7
soc.core.VexRiscv.RegFilePlugin_regFile\[12\]\[13\],70.7
mprj_io_out[15],70.67
_09356_,70.66
_12243_,70.66
_14214_,70.66
net9359,70.66
net9879,70.66
soc.core.VexRiscv.dBusWishbone_ADR\[25\],70.645
_13994_,70.64
mgmt_buffers.mprj_logic1\[32\],70.64
clknet_leaf_298_mgmt_buffers.caravel_clk,70.64
_11957_,70.62
net4167,70.605
_11896_,70.6
soc.core.mgmtsoc_master_rx_fifo_source_payload_data\[23\],70.6
soc.core.VexRiscv.RegFilePlugin_regFile\[14\]\[23\],70.58
soc.core.interface0_bank_bus_dat_r\[26\],70.58
_10814_,70.56
_12326_,70.56
soc.core.VexRiscv.dBusWishbone_DAT_MISO\[9\],70.56
clknet_leaf_972_mgmt_buffers.caravel_clk,70.56
net10203,70.555
_03761_,70.53
_01625_,70.52
_01925_,70.52
_12534_,70.51
_14516_,70.5
soc.core.multiregimpl62_regs1,70.5
gpio_control_bidir_1\[0\].shift_register\[11\],70.485
_03572_,70.48
_07171_,70.48
net3799,70.48
net4640,70.48
net7132,70.48
_02675_,70.46
clknet_leaf_1162_mgmt_buffers.caravel_clk,70.46
net3366,70.46
net10440,70.46
_02188_,70.44
_10678_,70.44
soc.core.VexRiscv.RegFilePlugin_regFile\[19\]\[2\],70.44
_02546_,70.42
_14440_,70.4
soc.core.VexRiscv.IBusCachedPlugin_cache.io_cpu_prefetch_pc\[13\],70.4
net3018,70.4
net3166,70.4
net8640,70.4
gpio_control_in_1a\[3\].gpio_defaults\[6\],70.39
mgmt_buffers.la_data_in_mprj_bar\[87\],70.38
_06386_,70.36
net4660,70.36
net9641,70.36
_12759_,70.34
soc.core.VexRiscv.RegFilePlugin_regFile\[12\]\[16\],70.34
net12072,70.34
_12249_,70.325
_11264_,70.32
_14675_,70.32
mask_rev\[27\],70.31
net934,70.31
_10687_,70.3
_10027_,70.285
net10242,70.275
_02008_,70.24
_03529_,70.24
clknet_leaf_768_mgmt_buffers.caravel_clk,70.24
gpio_control_bidir_1\[0\].gpio_defaults\[5\],70.23
_11361_,70.2
_12944_,70.2
_13981_,70.2
soc.core.VexRiscv.RegFilePlugin_regFile\[24\]\[16\],70.2
_03062_,70.18
soc.core.VexRiscv._zz_RegFilePlugin_regFile_port0\[19\],70.18
net2099,70.18
clknet_leaf_838_mgmt_buffers.caravel_clk,70.18
gpio_control_in_2\[9\].shift_register\[12\],70.16
soc.core.VexRiscv.CsrPlugin_mtvec_base\[13\],70.16
net12781,70.14
_01243_,70.12
_04384_,70.12
_09922_,70.12
soc.core.dbg_uart_data\[4\],70.12
soc.core.gpioin2_gpioin2_mode_storage,70.12
net11094,70.12
net3594,70.11
_00140_,70.105
soc.core.dbg_uart_rx_count\[1\],70.095
_09999_,70.08
gpio_control_in_2\[6\].shift_register\[3\],70.08
mgmt_buffers.la_data_in_mprj_bar\[13\],70.08
net9946,70.08
clknet_leaf_73_mgmt_buffers.caravel_clk,70.06
_14216_,70.05
_02990_,70.04
net3691,70.04
net4398,70.04
net9563,70.04
net4113,70.035
mprj_io_dm[12],70.03
_07255_,70.025
_08159_,70.02
soc.core.VexRiscv.RegFilePlugin_regFile\[17\]\[3\],70.02
soc.core.VexRiscv.RegFilePlugin_regFile\[24\]\[31\],70.02
gpio_control_bidir_1\[1\].gpio_defaults\[3\],70.01
_04342_,70
_04784_,70
_12226_,70
_04355_,69.98
soc.core.mgmtsoc_vexriscv_debug_bus_dat_r\[3\],69.98
net3328,69.98
net8845,69.98
_00830_,69.96
_04796_,69.96
soc.core.interface0_bank_bus_dat_r\[9\],69.96
clknet_leaf_375_mgmt_buffers.caravel_clk,69.96
net4855,69.96
soc.core.VexRiscv.IBusCachedPlugin_cache.io_cpu_prefetch_pc\[11\],69.95
net3384,69.94
net9917,69.93
clknet_leaf_155_mgmt_buffers.caravel_clk,69.92
net9284,69.915
_09145_,69.9
mgmt_buffers.la_data_out_core\[34\],69.9
net4166,69.885
_00097_,69.88
_04794_,69.88
net9335,69.88
mprj_io_out[24],69.87
net11268,69.87
_01033_,69.86
_12971_,69.86
_13138_,69.86
_14684_,69.86
net2875,69.86
net12721,69.86
gpio_control_in_2\[8\].gpio_defaults\[1\],69.84
soc.core.VexRiscv.RegFilePlugin_regFile\[19\]\[17\],69.84
clknet_leaf_334_mgmt_buffers.caravel_clk,69.84
soc.core.VexRiscv.IBusCachedPlugin_cache._zz_fetchStage_read_waysValues_0_tag_valid_2\[26\],69.82
clknet_leaf_622_mgmt_buffers.caravel_clk,69.82
net3368,69.82
net11692,69.8
gpio_control_in_1a\[5\].gpio_defaults\[4\],69.79
soc.core.VexRiscv.RegFilePlugin_regFile\[8\]\[28\],69.78
soc.core.sys_uart_tx_rs232phy_rs232phytx_next_value1,69.78
net3003,69.78
net12508,69.78
_03842_,69.76
clknet_leaf_909_mgmt_buffers.caravel_clk,69.76
net12564,69.76
net12912,69.76
_12479_,69.74
gpio_control_bidir_2\[1\].shift_register\[12\],69.74
gpio_control_bidir_2\[2\].shift_register\[8\],69.74
gpio_control_in_2\[0\].serial_clock,69.74
mask_rev\[16\],69.73
_02781_,69.72
soc.core.mgmtsoc_scratch_storage\[0\],69.72
clknet_leaf_504_mgmt_buffers.caravel_clk,69.72
gpio_control_in_1a\[0\].gpio_defaults\[3\],69.71
_13391_,69.7
soc.core.VexRiscv.RegFilePlugin_regFile\[26\]\[20\],69.7
soc.core.mgmtsoc_load_storage\[26\],69.7
net6788,69.7
net12790,69.7
_02939_,69.68
net3459,69.68
soc.core.VexRiscv.RegFilePlugin_regFile\[0\]\[26\],69.66
soc.core.VexRiscv.RegFilePlugin_regFile\[25\]\[9\],69.66
soc.core.VexRiscv.RegFilePlugin_regFile\[9\]\[12\],69.66
soc.core.interface7_bank_bus_dat_r\[0\],69.66
net11943,69.62
_03208_,69.6
_04770_,69.6
gpio_control_in_2\[1\].shift_register\[8\],69.6
user_io_oeb\[16\],69.6
clknet_leaf_580_mgmt_buffers.caravel_clk,69.6
net6502,69.6
_04989_,69.58
_11447_,69.58
soc.core.mgmtsoc_master_tx_fifo_source_payload_data\[16\],69.57
_09862_,69.56
_04339_,69.54
_11739_,69.53
gpio_control_bidir_2\[2\].gpio_defaults\[5\],69.53
soc.core.VexRiscv.RegFilePlugin_regFile\[29\]\[27\],69.5
clknet_leaf_436_mgmt_buffers.caravel_clk,69.5
gpio_control_in_1a\[1\].gpio_defaults\[2\],69.49
_12756_,69.48
_14597_,69.48
net174,69.48
net2971,69.48
net12398,69.46
_12546_,69.44
net11976,69.44
_13077_,69.42
mgmt_buffers.mprj_logic1\[39\],69.42
_13224_,69.405
_02353_,69.4
_02431_,69.4
_12913_,69.4
_13296_,69.4
net3336,69.4
net9370,69.4
_02806_,69.38
soc.core.VexRiscv.RegFilePlugin_regFile\[18\]\[2\],69.38
soc.core.mgmtsoc_vexriscv_debug_bus_dat_r\[6\],69.36
net9256,69.36
net9623,69.35
_12592_,69.34
net2926,69.34
net10209,69.33
_12224_,69.32
_13261_,69.32
soc.core.VexRiscv.RegFilePlugin_regFile\[20\]\[23\],69.32
net6429,69.32
mprj_io_dm[53],69.31
net10963,69.305
net11163,69.3
_08228_,69.295
net9709,69.29
soc.core.spi_master_count\[0\],69.28
net12091,69.28
soc.core.VexRiscv.RegFilePlugin_regFile\[0\]\[31\],69.26
soc.core.VexRiscv.RegFilePlugin_regFile\[20\]\[0\],69.26
net10394,69.255
_12847_,69.245
_11049_,69.24
_14577_,69.2
gpio_control_in_1\[4\].shift_register\[10\],69.2
gpio_control_in_2\[5\].shift_register\[11\],69.2
net9849,69.2
net6202,69.195
_10457_,69.18
_13186_,69.18
net10701,69.175
mgmt_buffers.la_data_in_mprj\[103\],69.165
_00860_,69.16
_04873_,69.16
_12242_,69.16
soc.core.multiregimpl77_regs0,69.16
_13443_,69.14
clknet_leaf_218_mgmt_buffers.caravel_clk,69.14
_13770_,69.13
_10262_,69.12
_14109_,69.12
_14844_,69.12
gpio_control_in_2\[0\].shift_register\[10\],69.12
net207,69.12
_12068_,69.115
_04422_,69.1
soc.core.interface19_bank_bus_dat_r\[2\],69.1
_12843_,69.08
net12286,69.08
_13752_,69.06
soc.core.VexRiscv.CsrPlugin_mtvec_base\[3\],69.06
soc.core.VexRiscv.RegFilePlugin_regFile\[24\]\[17\],69.06
_01250_,69.04
soc.core.VexRiscv.IBusCachedPlugin_cache.lineLoader_address\[11\],69.04
net11905,69.04
soc.core.VexRiscv.execute_LightShifterPlugin_amplitudeReg\[4\],69.035
_12754_,69.02
net5888,69.015
_14005_,69
gpio_control_bidir_1\[1\].shift_register\[11\],69
soc.core.gpioin1_gpioin1_edge_storage,69
net3489,69
net9407,69
_04252_,68.98
pll.ext_trim\[16\],68.98
net4674,68.98
_06346_,68.96
_09176_,68.96
gpio_control_bidir_1\[1\].gpio_defaults\[9\],68.95
net4381,68.94
net10170,68.94
net10736,68.94
_02203_,68.92
_13272_,68.92
soc.core.VexRiscv.RegFilePlugin_regFile\[9\]\[29\],68.9
net10857,68.885
soc.core.VexRiscv._zz_RegFilePlugin_regFile_port1\[19\],68.88
net7545,68.88
_03669_,68.86
_08658_,68.86
_11776_,68.86
clknet_leaf_3_mgmt_buffers.caravel_clk,68.86
net3855,68.86
net6236,68.86
net11068,68.86
_04442_,68.84
soc.core.interface0_bank_bus_dat_r\[27\],68.84
clknet_leaf_593_mgmt_buffers.caravel_clk,68.84
net2879,68.84
net3566,68.84
_04585_,68.82
_11199_,68.82
clknet_leaf_820_mgmt_buffers.caravel_clk,68.82
soc.core.la_ien_storage\[83\],68.805
net3865,68.805
net10228,68.805
net3404,68.8
_14177_,68.78
soc.core.VexRiscv.RegFilePlugin_regFile\[12\]\[29\],68.78
_02127_,68.76
_03687_,68.76
soc.core.VexRiscv._zz_RegFilePlugin_regFile_port1\[9\],68.76
soc.core.interface3_bank_bus_dat_r\[5\],68.76
net3341,68.745
soc.core.uart_tx_fifo_produce\[1\],68.74
net3940,68.725
soc.core.VexRiscv.RegFilePlugin_regFile\[27\]\[24\],68.72
net1974,68.72
net6726,68.72
net9045,68.72
net12777,68.72
soc.core.VexRiscv.RegFilePlugin_regFile\[28\]\[26\],68.7
gpio_control_in_1\[3\].gpio_defaults\[1\],68.69
_04322_,68.68
_14372_,68.68
_13150_,68.66
_13056_,68.64
_07064_,68.62
clknet_leaf_13_mgmt_buffers.caravel_clk,68.6
_11319_,68.58
net3742,68.56
net10044,68.56
_08156_,68.545
soc.core.VexRiscv.RegFilePlugin_regFile\[9\]\[27\],68.54
net4358,68.525
_09370_,68.52
gpio_control_bidir_2\[0\].shift_register\[0\],68.52
clknet_leaf_581_mgmt_buffers.caravel_clk,68.52
gpio_control_in_1\[0\].gpio_defaults\[0\],68.51
net1181,68.51
clknet_leaf_895_mgmt_buffers.caravel_clk,68.51
soc.core.VexRiscv.RegFilePlugin_regFile\[23\]\[30\],68.5
soc.core.mgmtsoc_reload_storage\[8\],68.5
net8018,68.5
user_io_oeb\[5\],68.46
_09329_,68.45
soc.core.mgmtsoc_master_tx_fifo_source_payload_data\[18\],68.45
_02389_,68.44
_08214_,68.425
_07287_,68.42
clknet_leaf_705_mgmt_buffers.caravel_clk,68.42
_02602_,68.41
_00838_,68.38
_03635_,68.38
_11640_,68.38
net3908,68.38
mgmt_buffers.la_data_in_mprj\[28\],68.365
soc.core.VexRiscv.RegFilePlugin_regFile\[24\]\[18\],68.36
_03904_,68.34
_07597_,68.34
soc.core.VexRiscv.RegFilePlugin_regFile\[18\]\[0\],68.34
net10153,68.34
gpio_control_in_2\[9\].gpio_defaults\[11\],68.32
mgmt_buffers.user_irq_bar\[0\],68.32
soc.core.mgmtsoc_reload_storage\[9\],68.32
clknet_leaf_424_mgmt_buffers.caravel_clk,68.32
_02869_,68.3
_08758_,68.3
_14400_,68.3
soc.core.multiregimpl1_regs1,68.3
net9170,68.3
net11167,68.3
_14742_,68.28
_14963_,68.28
gpio_control_in_2\[7\].gpio_defaults\[0\],68.28
_04186_,68.26
soc.core.count\[2\],68.26
soc.core.la_ien_storage\[87\],68.26
_14170_,68.24
net9060,68.24
net10872,68.24
_08291_,68.225
_00319_,68.22
soc.core.VexRiscv.DBusSimplePlugin_memoryExceptionPort_payload_badAddr\[11\],68.22
_04835_,68.2
clknet_leaf_141_mgmt_buffers.caravel_clk,68.2
net5472,68.2
net9516,68.2
soc.core.VexRiscv.IBusCachedPlugin_cache.io_cpu_fetch_mmuRsp_physicalAddress\[3\],68.18
_00072_,68.165
_11605_,68.16
mgmt_buffers.la_data_in_mprj\[60\],68.145
soc.core.VexRiscv.RegFilePlugin_regFile\[22\]\[4\],68.14
net4012,68.14
net8055,68.14
soc.core.VexRiscv.RegFilePlugin_regFile\[10\]\[0\],68.1
user_io_oeb\[8\],68.09
_10492_,68.08
soc.core.VexRiscv.CsrPlugin_mtvec_base\[24\],68.08
clknet_leaf_416_mgmt_buffers.caravel_clk,68.08
_00478_,68.06
_13757_,68.06
_14718_,68.06
gpio_control_in_1a\[0\].pad_gpio_outenb,68.06
_11741_,68.04
net11852,68.01
soc.core.mgmtsoc_master_tx_fifo_source_payload_data\[5\],68
net3353,68
gpio_control_in_1a\[1\].gpio_outenb,67.98
soc.core.interface10_bank_bus_dat_r\[6\],67.98
clknet_leaf_721_mgmt_buffers.caravel_clk,67.98
net6176,67.98
_00702_,67.96
_12796_,67.96
soc.core.VexRiscv.RegFilePlugin_regFile\[20\]\[14\],67.96
soc.core.multiregimpl122_regs0,67.96
clknet_leaf_74_mgmt_buffers.caravel_clk,67.96
mprj_io_out[22],67.95
net3466,67.945
soc.core.VexRiscv._zz_execute_to_memory_REGFILE_WRITE_DATA\[16\],67.94
net3726,67.94
net10083,67.94
_02218_,67.92
gpio_control_bidir_2\[2\].shift_register\[11\],67.92
clknet_leaf_387_mgmt_buffers.caravel_clk,67.92
net11794,67.92
net4004,67.905
_01054_,67.88
soc.core.VexRiscv.RegFilePlugin_regFile\[21\]\[11\],67.88
clknet_leaf_1023_mgmt_buffers.caravel_clk,67.88
net7201,67.86
net12884,67.84
_02371_,67.82
soc.core.VexRiscv.RegFilePlugin_regFile\[22\]\[28\],67.82
_12201_,67.805
soc.core.interface6_bank_bus_dat_r\[12\],67.8
clknet_leaf_241_mgmt_buffers.caravel_clk,67.8
net5843,67.8
_08613_,67.785
_03267_,67.78
net3220,67.78
net12561,67.78
net10109,67.775
_14335_,67.76
soc.core.VexRiscv.CsrPlugin_mtvec_base\[29\],67.74
_03084_,67.72
_03864_,67.66
_07607_,67.66
net3633,67.66
soc.core.VexRiscv.RegFilePlugin_regFile\[23\]\[24\],67.64
net10597,67.635
mgmt_buffers.la_data_in_mprj_bar\[6\],67.62
net12150,67.62
_01390_,67.6
clknet_leaf_1012_mgmt_buffers.caravel_clk,67.6
_13265_,67.58
mgmt_buffers.la_data_in_mprj_bar\[60\],67.58
_09701_,67.565
_10775_,67.56
gpio_control_in_2\[6\].shift_register\[2\],67.56
soc.core.VexRiscv.RegFilePlugin_regFile\[11\]\[7\],67.56
clknet_leaf_1014_mgmt_buffers.caravel_clk,67.56
mprj_io_dm[13],67.55
net10224,67.55
_14749_,67.54
soc.core.VexRiscv.RegFilePlugin_regFile\[13\]\[29\],67.54
_12113_,67.52
_13117_,67.52
gpio_control_in_2\[9\].gpio_defaults\[1\],67.49
_01738_,67.48
soc.core.VexRiscv.RegFilePlugin_regFile\[20\]\[29\],67.48
soc.core.dbg_uart_address\[16\],67.48
net10892,67.48
net2933,67.46
_12349_,67.44
soc.core.VexRiscv.RegFilePlugin_regFile\[11\]\[0\],67.44
clknet_leaf_783_mgmt_buffers.caravel_clk,67.44
_12941_,67.42
soc.core.mgmtsoc_litespisdrphycore_cnt\[4\],67.42
net414,67.42
net9939,67.42
_12120_,67.4
_12652_,67.4
_14269_,67.4
soc.core.VexRiscv._zz_RegFilePlugin_regFile_port1\[4\],67.4
clknet_leaf_780_mgmt_buffers.caravel_clk,67.4
net10059,67.385
_00255_,67.36
pll.pll_control.oscbuf\[2\],67.36
net11539,67.36
net9958,67.345
soc.core.mgmtsoc_master_tx_fifo_source_payload_data\[27\],67.34
soc.core.multiregimpl33_regs0,67.34
_06322_,67.32
net11078,67.32
net12527,67.32
mgmt_buffers.user_irq\[0\],67.315
_08216_,67.3
_09367_,67.3
net11036,67.3
net10899,67.28
gpio_control_in_2\[5\].shift_register\[8\],67.26
clknet_7_50__leaf_mgmt_buffers.caravel_clk,67.26
soc.core.dbg_uart_count\[10\],67.255
mprj_io_dm[29],67.25
_03697_,67.24
_06482_,67.24
soc.core.interface6_bank_bus_dat_r\[20\],67.24
_04390_,67.22
soc.core.count\[18\],67.22
net10588,67.22
net12555,67.22
soc.core.mgmtsoc_master_rx_fifo_source_payload_data\[27\],67.2
_03758_,67.19
_12844_,67.18
soc.core.dbg_uart_address\[23\],67.18
soc.core.multiregimpl74_regs1,67.18
net12780,67.18
_04281_,67.17
_11766_,67.16
clknet_leaf_235_mgmt_buffers.caravel_clk,67.16
net12257,67.145
_09991_,67.14
soc.core.VexRiscv.RegFilePlugin_regFile\[1\]\[13\],67.12
soc.core.mgmtsoc_reload_storage\[12\],67.12
net12227,67.12
net4051,67.11
_11470_,67.1
_11937_,67.1
clknet_leaf_227_mgmt_buffers.caravel_clk,67.1
net12788,67.08
gpio_control_in_2\[9\].gpio_defaults\[7\],67.07
_03096_,67.06
_06208_,67.06
gpio_control_in_1\[5\].shift_register\[6\],67.06
net12176,67.06
_12574_,67.04
_08656_,67.02
_12772_,67.02
net4490,67.02
mgmt_buffers.la_data_in_mprj\[117\],67.005
soc.core.spi_master_miso_data\[2\],67
clknet_leaf_814_mgmt_buffers.caravel_clk,67
net12735,67
net12745,67
net12354,66.98
gpio_control_in_1a\[2\].gpio_defaults\[1\],66.97
_02247_,66.96
_10517_,66.96
net319,66.96
net12892,66.96
_04941_,66.94
_14686_,66.94
clknet_leaf_1015_mgmt_buffers.caravel_clk,66.94
_08235_,66.925
_13030_,66.92
_14848_,66.92
_00673_,66.9
gpio_control_in_2\[9\].gpio_defaults\[12\],66.9
_01782_,66.88
_04978_,66.88
_10006_,66.88
_11348_,66.88
_14016_,66.88
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[12\]\[3\],66.86
_01092_,66.84
_11368_,66.84
clknet_leaf_77_mgmt_buffers.caravel_clk,66.84
net7792,66.84
net9933,66.84
_13644_,66.82
clknet_leaf_420_mgmt_buffers.caravel_clk,66.82
net3312,66.805
soc.core.dbg_uart_tx_data_uartwishbonebridge_rs232phytx_next_value2\[3\],66.8
soc.core.multiregimpl124_regs0,66.8
mgmt_buffers.la_data_in_mprj\[108\],66.785
net10988,66.785
_10463_,66.78
soc.core.VexRiscv.RegFilePlugin_regFile\[31\]\[18\],66.76
soc.core.interface0_bank_bus_dat_r\[7\],66.76
net4060,66.76
_04855_,66.75
clknet_leaf_186_mgmt_buffers.caravel_clk,66.75
_01948_,66.74
_11324_,66.74
gpio_control_in_2\[6\].shift_register\[10\],66.74
soc.core.VexRiscv.RegFilePlugin_regFile\[0\]\[27\],66.74
soc.core.VexRiscv.RegFilePlugin_regFile\[19\]\[26\],66.74
soc.core.la_ien_storage\[97\],66.74
net7244,66.74
net12093,66.74
_10903_,66.72
_11544_,66.72
clknet_leaf_456_mgmt_buffers.caravel_clk,66.72
net2998,66.7
net11618,66.7
_04351_,66.68
_04354_,66.68
net9190,66.68
_03795_,66.66
_14849_,66.66
gpio_control_in_1\[5\].gpio_logic1,66.66
net9940,66.65
net2956,66.645
_01228_,66.64
_12593_,66.64
_14519_,66.64
gpio_control_in_1\[1\].shift_register\[0\],66.64
_11742_,66.62
soc.core.la_ien_storage\[117\],66.62
net320,66.62
net10082,66.62
net12484,66.62
_07912_,66.6
soc.core.mgmtsoc_bus_errors\[30\],66.6
_10659_,66.58
net5738,66.56
gpio_control_in_1a\[5\].gpio_defaults\[12\],66.55
_00062_,66.54
_14704_,66.54
_09247_,66.52
net6650,66.5
net9980,66.5
net12454,66.5
net12785,66.5
net4414,66.48
soc.core.mgmtsoc_litespisdrphycore_sr_cnt\[1\],66.46
net11269,66.46
gpio_control_in_1a\[2\].gpio_defaults\[0\],66.45
net6578,66.44
net12246,66.44
soc.core.VexRiscv.RegFilePlugin_regFile\[6\]\[7\],66.42
soc.core.mgmtsoc_master_tx_fifo_source_payload_data\[22\],66.42
net10956,66.42
soc.core.la_ien_storage\[92\],66.385
soc.core.VexRiscv.CsrPlugin_mcause_exceptionCode\[0\],66.38
soc.core.VexRiscv.RegFilePlugin_regFile\[8\]\[29\],66.38
mprj_io_oeb[2],66.37
soc.core.VexRiscv.IBusCachedPlugin_cache.io_cpu_prefetch_pc\[15\],66.36
clknet_leaf_1210_mgmt_buffers.caravel_clk,66.36
_03575_,66.34
_13145_,66.34
soc.core.VexRiscv.DebugPlugin_isPipBusy,66.34
gpio_control_bidir_2\[2\].gpio_defaults\[4\],66.33
mprj_io_out[1],66.33
_04439_,66.32
_12304_,66.32
_01849_,66.3
_02383_,66.3
net9054,66.3
_12792_,66.29
_10236_,66.285
_03197_,66.28
_03825_,66.28
_00883_,66.27
_11662_,66.26
_13477_,66.26
soc.core.multiregimpl128_regs0,66.26
soc.core.VexRiscv.RegFilePlugin_regFile\[25\]\[13\],66.24
net9411,66.24
net3086,66.225
_00448_,66.22
_15006_,66.22
soc.core.VexRiscv.RegFilePlugin_regFile\[24\]\[20\],66.22
_09690_,66.2
net11718,66.2
gpio_control_in_1a\[0\].shift_register\[10\],66.18
net12008,66.18
soc.core.VexRiscv.RegFilePlugin_regFile\[7\]\[8\],66.16
_04892_,66.15
_07590_,66.145
_13885_,66.145
_02053_,66.14
net7547,66.14
net10960,66.14
mprj_io_oeb[13],66.13
mgmt_buffers.la_data_in_mprj\[126\],66.125
soc.core.VexRiscv.RegFilePlugin_regFile\[12\]\[10\],66.12
soc.core.VexRiscv.RegFilePlugin_regFile\[18\]\[1\],66.12
net6104,66.12
_00138_,66.1
_13344_,66.1
soc.core.multiregimpl2_regs1,66.1
_04823_,66.08
_10000_,66.08
_11698_,66.08
gpio_control_bidir_2\[0\].gpio_defaults\[11\],66.08
clknet_leaf_978_mgmt_buffers.caravel_clk,66.08
_13686_,66.06
net11235,66.045
gpio_control_in_1a\[2\].gpio_defaults\[6\],66.03
_03678_,66.02
_04760_,66.02
_11446_,66.02
soc.core.mgmtsoc_value\[19\],66.02
_07241_,66
net6129,66
net10938,66
gpio_control_in_2\[7\].gpio_defaults\[1\],65.98
soc.core.dbg_uart_length\[4\],65.98
net9603,65.98
net10854,65.98
mprj_io_dm[79],65.97
_01291_,65.96
soc.core.VexRiscv.RegFilePlugin_regFile\[31\]\[30\],65.96
net7354,65.96
_14162_,65.95
_14534_,65.94
soc.core.mgmtsoc_master_rx_fifo_source_payload_data\[26\],65.94
mprj_io_oeb[24],65.93
clknet_leaf_563_mgmt_buffers.caravel_clk,65.92
_13521_,65.9
soc.core.VexRiscv.IBusCachedPlugin_cache.decodeStage_mmuRsp_physicalAddress\[2\],65.9
_00092_,65.885
net12500,65.88
net9942,65.87
_03117_,65.86
net12529,65.86
_03236_,65.84
_13991_,65.84
_14507_,65.84
soc.core.VexRiscv.RegFilePlugin_regFile\[12\]\[12\],65.84
soc.core.mgmtsoc_value\[10\],65.84
net11658,65.84
_08241_,65.825
net9434,65.825
_14830_,65.82
soc.core.VexRiscv.RegFilePlugin_regFile\[7\]\[18\],65.82
soc.core.dbg_uart_count\[2\],65.82
user_io_oeb\[14\],65.82
net6916,65.82
net12528,65.82
net12796,65.82
_11994_,65.8
clknet_leaf_620_mgmt_buffers.caravel_clk,65.8
net11709,65.78
_04464_,65.76
_11214_,65.76
_14272_,65.76
gpio_control_in_2\[4\].gpio_defaults\[1\],65.76
net4374,65.76
net4879,65.76
_02577_,65.75
_01438_,65.74
_03608_,65.74
_12927_,65.74
soc.core.interface0_bank_bus_dat_r\[5\],65.74
soc.core.interface3_bank_bus_dat_r\[3\],65.74
_09206_,65.725
_05019_,65.72
clknet_leaf_329_mgmt_buffers.caravel_clk,65.72
_01182_,65.7
_14736_,65.7
soc.core.VexRiscv.RegFilePlugin_regFile\[19\]\[28\],65.7
soc.core.multiregimpl63_regs1,65.7
net10504,65.7
_00943_,65.68
_05502_,65.68
_13647_,65.68
gpio_control_in_2\[3\].shift_register\[11\],65.68
_00013_,65.66
_13807_,65.66
_11943_,65.64
soc.core.VexRiscv.BranchPlugin_branchExceptionPort_payload_badAddr\[15\],65.64
net12444,65.64
soc.core.VexRiscv.RegFilePlugin_regFile\[17\]\[4\],65.62
net11324,65.6
mprj_io_dm[61],65.59
net12763,65.56
_09918_,65.52
soc.core.VexRiscv._zz_CsrPlugin_csrMapping_readDataInit\[25\],65.52
soc.core.la_ien_storage\[102\],65.52
net3997,65.52
_10671_,65.5
pll.div\[2\],65.5
soc.core.VexRiscv.IBusCachedPlugin_cache.io_cpu_prefetch_pc\[9\],65.5
clknet_leaf_88_mgmt_buffers.caravel_clk,65.5
net12332,65.5
soc.core.mgmtsoc_litespisdrphycore_cnt\[3\],65.48
_00598_,65.46
_04374_,65.46
_11723_,65.46
_01538_,65.44
clknet_leaf_1164_mgmt_buffers.caravel_clk,65.44
_14518_,65.42
soc.core.VexRiscv.RegFilePlugin_regFile\[1\]\[11\],65.42
_14382_,65.4
soc.core.VexRiscv.RegFilePlugin_regFile\[10\]\[17\],65.4
soc.core.VexRiscv.RegFilePlugin_regFile\[22\]\[25\],65.4
gpio_control_bidir_2\[2\].gpio_defaults\[9\],65.39
_09194_,65.38
_13111_,65.38
soc.core.VexRiscv.RegFilePlugin_regFile\[15\]\[12\],65.38
_09752_,65.36
clknet_leaf_1028_mgmt_buffers.caravel_clk,65.36
net10161,65.36
_00346_,65.34
_04399_,65.34
_12452_,65.34
clknet_leaf_92_mgmt_buffers.caravel_clk,65.34
clknet_leaf_1081_mgmt_buffers.caravel_clk,65.34
_04822_,65.32
_05024_,65.32
clknet_leaf_500_mgmt_buffers.caravel_clk,65.32
_03980_,65.31
_04201_,65.3
_13701_,65.3
soc.core.interface9_bank_bus_dat_r\[11\],65.3
net6200,65.3
net11062,65.28
_11294_,65.26
_03097_,65.25
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[7\]\[30\],65.24
soc.core.mgmtsoc_vexriscv_debug_bus_dat_r\[5\],65.24
net11122,65.225
_04387_,65.22
clknet_leaf_793_mgmt_buffers.caravel_clk,65.22
_09171_,65.2
_11353_,65.2
_12351_,65.18
_13268_,65.18
_13987_,65.18
mprj_io_dm[0],65.17
gpio_control_in_2\[7\].shift_register\[10\],65.165
_00016_,65.16
soc.core.mgmtsoc_master_tx_fifo_source_payload_data\[12\],65.16
_03243_,65.14
soc.core.VexRiscv.RegFilePlugin_regFile\[29\]\[28\],65.14
soc.core.interface6_bank_bus_dat_r\[16\],65.14
net11346,65.125
_10899_,65.12
_11659_,65.1
_11725_,65.08
soc.core.multiregimpl80_regs0,65.08
_12352_,65.06
mgmt_buffers.la_data_in_mprj_bar\[114\],65.06
_10872_,65.04
_12127_,65.04
mgmt_buffers.la_data_in_mprj_bar\[2\],65.04
net11717,65.04
_03515_,65.03
net4514,65.02
_06177_,65
_06188_,65
_12911_,65
soc.core.VexRiscv.RegFilePlugin_regFile\[27\]\[16\],65
soc.core.storage_1\[5\]\[5\],65
net6238,65
gpio_control_in_1\[2\].gpio_defaults\[0\],64.99
net343,64.98
gpio_control_in_2\[5\].gpio_defaults\[11\],64.96
clknet_leaf_351_mgmt_buffers.caravel_clk,64.96
net9540,64.95
_05514_,64.94
_12239_,64.94
_04358_,64.92
_11541_,64.92
_14657_,64.92
soc.core.VexRiscv.HazardSimplePlugin_writeBackBuffer_payload_address\[0\],64.92
soc.core.multiregimpl67_regs0,64.92
clknet_leaf_1135_mgmt_buffers.caravel_clk,64.92
gpio_control_in_2\[3\].shift_register\[10\],64.9
soc.core.VexRiscv.RegFilePlugin_regFile\[13\]\[11\],64.9
soc.core.interface12_bank_bus_dat_r\[0\],64.9
net4394,64.9
_03132_,64.88
net11056,64.88
_00245_,64.84
_03119_,64.84
mgmt_buffers.la_data_in_mprj_bar\[66\],64.84
mprj_io_dm[2],64.83
net7698,64.825
_09345_,64.82
net5094,64.82
net12055,64.82
net4450,64.8
net9741,64.8
net10131,64.8
_14565_,64.78
soc.core.dbg_uart_count\[15\],64.78
net2924,64.78
_12421_,64.77
_11471_,64.76
soc.core.VexRiscv.RegFilePlugin_regFile\[24\]\[23\],64.76
soc.core.VexRiscv._zz_execute_to_memory_REGFILE_WRITE_DATA\[10\],64.76
soc.core.mgmtsoc_vexriscv_debug_bus_dat_r\[26\],64.76
soc.core.storage\[13\]\[0\],64.76
net3809,64.76
net4698,64.76
net11991,64.76
_10803_,64.74
gpio_control_in_1a\[0\].shift_register\[8\],64.74
soc.core.mgmtsoc_litespisdrphycore_sr_out\[9\],64.74
net12933,64.74
_04830_,64.72
_05009_,64.72
_14977_,64.72
soc.core.VexRiscv.CsrPlugin_mtvec_base\[0\],64.72
_05068_,64.7
soc.core.multiregimpl85_regs1,64.7
clknet_leaf_267_mgmt_buffers.caravel_clk,64.7
net12540,64.7
_03810_,64.68
_04594_,64.68
soc.core.dbg_uart_length\[7\],64.68
clknet_leaf_451_mgmt_buffers.caravel_clk,64.68
net6900,64.68
gpio_control_in_2\[1\].shift_register\[10\],64.66
clknet_leaf_1064_mgmt_buffers.caravel_clk,64.66
_12450_,64.65
_12786_,64.64
soc.core.VexRiscv.HazardSimplePlugin_writeBackBuffer_payload_address\[3\],64.64
net4185,64.64
net11574,64.64
net12736,64.62
net12741,64.62
net12749,64.62
_12589_,64.6
_04985_,64.58
_12117_,64.58
net2894,64.58
net8368,64.58
net11083,64.58
_03037_,64.56
pll.div\[1\],64.56
soc.core.dbg_uart_rx_tick,64.56
_10593_,64.54
_14071_,64.54
soc.core.VexRiscv.RegFilePlugin_regFile\[17\]\[27\],64.54
soc.core.dbg_uart_data\[7\],64.54
soc.core.dbg_uart_address\[2\],64.53
_10809_,64.52
soc.core.VexRiscv.RegFilePlugin_regFile\[13\]\[28\],64.52
net10976,64.52
_14279_,64.48
soc.core.VexRiscv.RegFilePlugin_regFile\[10\]\[8\],64.48
soc.core.litespi_rx_demux_endpoint1_source_ready,64.48
clknet_leaf_1021_mgmt_buffers.caravel_clk,64.48
net3575,64.48
mgmt_buffers.la_data_in_mprj_bar\[108\],64.46
soc.core.VexRiscv.RegFilePlugin_regFile\[29\]\[31\],64.46
net9883,64.445
net2961,64.44
net10972,64.44
gpio_control_bidir_2\[2\].gpio_defaults\[7\],64.43
_10470_,64.42
soc.core.VexRiscv.RegFilePlugin_regFile\[7\]\[26\],64.42
clknet_leaf_302_mgmt_buffers.caravel_clk,64.42
_06688_,64.38
_09772_,64.38
soc.core.VexRiscv.memory_to_writeBack_REGFILE_WRITE_DATA\[19\],64.38
clknet_leaf_43_mgmt_buffers.caravel_clk,64.38
net11187,64.38
_03675_,64.36
mprj_io_dm[42],64.35
_01175_,64.34
_03154_,64.34
_12846_,64.34
mprj_io_dm[49],64.33
_00173_,64.32
_00973_,64.32
_14101_,64.32
net10863,64.32
net9867,64.305
_03007_,64.3
soc.core.mgmtsoc_master_phyconfig_storage\[2\],64.3
_02595_,64.28
soc.core.VexRiscv.RegFilePlugin_regFile\[27\]\[20\],64.28
soc.core.interface3_bank_bus_dat_r\[16\],64.28
net10434,64.275
_14676_,64.26
_10767_,64.24
soc.core.VexRiscv.RegFilePlugin_regFile\[15\]\[17\],64.24
soc.core.VexRiscv.dBusWishbone_DAT_MISO\[21\],64.24
clknet_leaf_192_mgmt_buffers.caravel_clk,64.24
_11369_,64.22
soc.core.VexRiscv.RegFilePlugin_regFile\[17\]\[31\],64.22
net10929,64.22
net3856,64.205
_03681_,64.2
_04825_,64.18
gpio_control_in_2\[7\].mgmt_ena,64.16
soc.core.VexRiscv.RegFilePlugin_regFile\[16\]\[13\],64.16
net9806,64.16
_00201_,64.14
net1629,64.14
_11944_,64.12
soc.core.dbg_uart_tx_phase\[12\],64.12
net12817,64.12
soc.core.VexRiscv.CsrPlugin_csrMapping_writeDataSignal\[10\],64.115
_03485_,64.1
soc.core.VexRiscv.RegFilePlugin_regFile\[28\]\[7\],64.1
soc.core.multiregimpl126_regs0,64.1
clknet_leaf_398_mgmt_buffers.caravel_clk,64.1
soc.core.VexRiscv.RegFilePlugin_regFile\[28\]\[17\],64.08
gpio_control_bidir_2\[2\].gpio_defaults\[6\],64.07
_00514_,64.06
_13055_,64.06
_14555_,64.06
_01984_,64.04
soc.core.VexRiscv.RegFilePlugin_regFile\[9\]\[19\],64.04
_14347_,64.02
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[1\]\[10\],64.02
net3097,64.02
_03542_,64
_09249_,64
_14961_,64
net3038,63.985
net6918,63.98
net8453,63.98
_10945_,63.96
_11935_,63.96
_12203_,63.96
clknet_leaf_430_mgmt_buffers.caravel_clk,63.96
_04176_,63.95
_08176_,63.925
_07664_,63.92
_13183_,63.92
soc.core.multiregimpl3_regs0,63.92
net2900,63.92
net9525,63.915
_12755_,63.9
net12360,63.9
_10120_,63.885
_04162_,63.88
clknet_leaf_345_mgmt_buffers.caravel_clk,63.88
net12759,63.86
net10942,63.855
net1045,63.85
net3636,63.845
_13349_,63.84
clknet_leaf_663_mgmt_buffers.caravel_clk,63.84
soc.core.VexRiscv.dBusWishbone_DAT_MISO\[19\],63.82
soc.core.mgmtsoc_bus_errors\[11\],63.82
net302,63.82
gpio_control_in_2\[1\].shift_register\[5\],63.8
net9215,63.8
net4222,63.78
_04239_,63.76
_08650_,63.76
_12644_,63.76
_14745_,63.74
soc.core.VexRiscv.IBusCachedPlugin_cache._zz_banks_0_port1\[2\],63.74
clknet_leaf_840_mgmt_buffers.caravel_clk,63.74
net12507,63.74
net9494,63.73
_01895_,63.72
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[1\]\[18\],63.72
net142,63.72
net12424,63.72
net4532,63.71
net4193,63.705
_11673_,63.7
mgmt_buffers.la_data_in_mprj_bar\[0\],63.7
soc.core.VexRiscv.RegFilePlugin_regFile\[4\]\[8\],63.7
soc.core.mgmtsoc_vexriscv_debug_bus_dat_r\[28\],63.7
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[3\]\[6\],63.66
soc.core.VexRiscv.RegFilePlugin_regFile\[18\]\[25\],63.66
soc.core.VexRiscv.RegFilePlugin_regFile\[20\]\[18\],63.66
clknet_leaf_1140_mgmt_buffers.caravel_clk,63.66
net9672,63.66
mprj_io_dm[66],63.65
_10034_,63.645
_14148_,63.64
_03978_,63.63
_14564_,63.62
gpio_control_in_1\[2\].shift_register\[0\],63.62
soc.core.VexRiscv.RegFilePlugin_regFile\[13\]\[24\],63.62
soc.core.VexRiscv.RegFilePlugin_regFile\[15\]\[28\],63.62
soc.core.VexRiscv.RegFilePlugin_regFile\[21\]\[9\],63.62
net3492,63.62
net3842,63.62
gpio_control_in_1a\[3\].gpio_defaults\[10\],63.61
soc.core.VexRiscv.RegFilePlugin_regFile\[16\]\[18\],63.6
net8757,63.6
gpio_control_in_1a\[4\].gpio_defaults\[0\],63.59
_01647_,63.58
clknet_leaf_664_mgmt_buffers.caravel_clk,63.58
_13985_,63.56
net7110,63.54
_05098_,63.53
gpio_control_in_2\[9\].gpio_defaults\[0\],63.52
soc.core.mgmtsoc_litespimmap_count\[4\],63.52
net4249,63.52
net8960,63.52
net11716,63.52
net12182,63.52
mgmt_buffers.la_data_in_mprj\[66\],63.515
_01216_,63.5
_03966_,63.5
_14079_,63.5
_14104_,63.5
mprj_io_dm[72],63.49
net5769,63.48
net7484,63.48
_10660_,63.46
clknet_leaf_144_mgmt_buffers.caravel_clk,63.46
mgmt_buffers.la_data_in_mprj\[15\],63.445
net9008,63.44
net11983,63.44
_02587_,63.42
_11522_,63.42
soc.core.VexRiscv.IBusCachedPlugin_cache.io_cpu_prefetch_pc\[7\],63.42
net9695,63.41
_07246_,63.405
_09045_,63.405
net9851,63.405
_12794_,63.4
_14456_,63.4
soc.core.VexRiscv.RegFilePlugin_regFile\[28\]\[29\],63.4
pll.div\[0\],63.38
net3484,63.38
_01828_,63.36
clknet_leaf_170_mgmt_buffers.caravel_clk,63.36
net2796,63.36
_14681_,63.34
soc.core.VexRiscv.RegFilePlugin_regFile\[9\]\[26\],63.34
net3975,63.34
net9296,63.34
net4461,63.335
_12347_,63.32
gpio_control_in_1a\[4\].gpio_defaults\[11\],63.31
soc.core.VexRiscv.IBusCachedPlugin_cache.decodeStage_mmuRsp_physicalAddress\[7\],63.3
_09137_,63.28
soc.core.VexRiscv._zz_iBusWishbone_ADR\[2\],63.28
net3481,63.28
_11989_,63.26
net11727,63.26
_04790_,63.24
_13263_,63.24
soc.core.VexRiscv.RegFilePlugin_regFile\[30\]\[30\],63.24
net3654,63.24
_04798_,63.22
gpio_control_in_2\[0\].shift_register\[8\],63.22
mprj_io_dm[55],63.21
_07601_,63.205
mprj_io_dm[62],63.19
net144,63.18
net6516,63.18
clknet_leaf_120_mgmt_buffers.caravel_clk,63.17
soc.core.interface0_bank_bus_dat_r\[31\],63.16
net5746,63.16
net12917,63.16
mprj_io_in[7],63.15
_02387_,63.14
_14331_,63.14
net7750,63.14
soc.core.VexRiscv.IBusCachedPlugin_cache._zz_fetchStage_read_waysValues_0_tag_valid_2\[23\],63.13
_11735_,63.12
net3451,63.12
net2682,63.12
clknet_leaf_313_mgmt_buffers.caravel_clk,63.1
net12783,63.1
_10372_,63.085
_10260_,63.08
soc.core.multiregimpl32_regs1,63.08
_09154_,63.06
soc.core.multiregimpl29_regs1,63.06
net6489,63.06
net3030,63.045
net5669,63.045
_03645_,63.04
gpio_control_in_2\[3\].shift_register\[9\],63.04
soc.core.multiregimpl131_regs1,63.04
clknet_leaf_690_mgmt_buffers.caravel_clk,63.04
net8577,63.04
mgmt_buffers.mprj_logic1\[27\],63.02
soc.core.VexRiscv.IBusCachedPlugin_cache._zz_banks_0_port1\[28\],63.02
net3024,63.02
mprj_io_dm[17],63.01
_01130_,63
gpio_control_in_1a\[2\].shift_register\[0\],63
soc.core.VexRiscv.memory_to_writeBack_REGFILE_WRITE_DATA\[8\],63
clknet_leaf_952_mgmt_buffers.caravel_clk,63
_02113_,62.98
_02679_,62.96
net902,62.96
mask_rev\[9\],62.95
_07169_,62.94
_11509_,62.94
_13806_,62.94
_11693_,62.92
_13685_,62.92
net2918,62.92
net10967,62.92
soc.core.VexRiscv.CsrPlugin_mepc\[3\],62.9
soc.core.la_ien_storage\[80\],62.9
soc.core.storage\[4\]\[6\],62.9
_04359_,62.88
soc.core.VexRiscv.IBusCachedPlugin_cache.io_mem_rsp_payload_data\[23\],62.88
_04407_,62.86
_14877_,62.86
soc.core.VexRiscv.RegFilePlugin_regFile\[5\]\[1\],62.86
net3968,62.86
net4111,62.86
_04251_,62.84
net6463,62.84
mgmt_buffers.la_data_in_mprj\[119\],62.825
_00267_,62.82
_06464_,62.82
_07233_,62.82
soc.core.VexRiscv.RegFilePlugin_regFile\[31\]\[27\],62.82
net8532,62.82
_08160_,62.805
_14048_,62.8
_12736_,62.78
net9424,62.78
_07053_,62.77
_03844_,62.75
gpio_control_bidir_2\[0\].gpio_defaults\[2\],62.75
_00803_,62.74
_12109_,62.74
_14188_,62.74
mprj_io_dm[54],62.73
_01061_,62.72
net3378,62.72
net5973,62.72
net11740,62.72
_02419_,62.7
net12724,62.7
mprj_io_dm[35],62.69
gpio_control_in_1\[3\].shift_register\[9\],62.68
net10931,62.68
_01853_,62.66
_02664_,62.66
_10900_,62.66
soc.core.VexRiscv.RegFilePlugin_regFile\[15\]\[24\],62.66
soc.core.VexRiscv.RegFilePlugin_regFile\[4\]\[28\],62.66
soc.core.multiregimpl58_regs0,62.66
net6487,62.66
net9450,62.66
_00178_,62.64
_03140_,62.64
soc.core.VexRiscv.IBusCachedPlugin_cache.io_cpu_prefetch_pc\[6\],62.64
net3804,62.64
net5789,62.64
_00270_,62.62
_01310_,62.62
_11452_,62.62
net3043,62.62
net9423,62.62
net10620,62.62
net12588,62.62
_03128_,62.6
_14706_,62.6
clknet_leaf_410_mgmt_buffers.caravel_clk,62.6
net3913,62.6
net4536,62.595
_03484_,62.58
_06514_,62.58
pll.ext_trim\[12\],62.58
_03231_,62.54
_10351_,62.54
soc.core.VexRiscv.RegFilePlugin_regFile\[11\]\[9\],62.54
_12248_,62.52
net11219,62.52
net12353,62.52
_05654_,62.5
_11645_,62.5
soc.core.mgmtsoc_reload_storage\[30\],62.5
_00853_,62.49
_02225_,62.48
_02588_,62.48
_10939_,62.48
net3813,62.48
net8075,62.48
_09057_,62.465
_14836_,62.46
net3608,62.46
_04485_,62.44
soc.core.VexRiscv.RegFilePlugin_regFile\[10\]\[28\],62.44
soc.core.VexRiscv.RegFilePlugin_regFile\[1\]\[17\],62.44
soc.core.dbg_uart_dbg_uart_tx_uartwishbonebridge_rs232phytx_next_value1,62.44
clknet_leaf_1069_mgmt_buffers.caravel_clk,62.44
soc.core.la_ien_storage\[120\],62.43
_08161_,62.425
_10263_,62.42
_11445_,62.42
soc.core.VexRiscv.RegFilePlugin_regFile\[8\]\[0\],62.42
soc.core.VexRiscv._zz_CsrPlugin_csrMapping_readDataInit\[12\],62.42
net5364,62.42
_07696_,62.4
_09628_,62.4
_12355_,62.4
_02359_,62.395
_14301_,62.38
mgmt_buffers.mprj_logic1\[222\],62.38
_09140_,62.37
gpio_control_in_1\[5\].gpio_defaults\[2\],62.37
soc.core.VexRiscv.RegFilePlugin_regFile\[8\]\[12\],62.36
net12433,62.36
clknet_leaf_537_mgmt_buffers.caravel_clk,62.34
net4475,62.33
_07250_,62.32
soc.core.VexRiscv.RegFilePlugin_regFile\[23\]\[11\],62.32
user_io_oeb\[7\],62.32
_00285_,62.315
_13014_,62.3
_14003_,62.3
soc.core.VexRiscv.RegFilePlugin_regFile\[28\]\[30\],62.3
_03032_,62.295
_03481_,62.28
_06913_,62.28
_14957_,62.28
soc.core.VexRiscv.RegFilePlugin_regFile\[27\]\[2\],62.27
_11252_,62.26
clknet_leaf_560_mgmt_buffers.caravel_clk,62.26
gpio_control_in_2\[6\].shift_register\[4\],62.25
_03837_,62.24
clknet_leaf_1034_mgmt_buffers.caravel_clk,62.24
net12018,62.24
_04880_,62.23
_04389_,62.22
_10531_,62.22
_14227_,62.22
soc.core.mgmtsoc_load_storage\[15\],62.22
_09252_,62.205
_11077_,62.2
soc.core.VexRiscv.RegFilePlugin_regFile\[0\]\[13\],62.2
clknet_leaf_550_mgmt_buffers.caravel_clk,62.2
net10330,62.185
_00566_,62.18
soc.core.dbg_uart_tx_data\[2\],62.17
soc.core.VexRiscv.RegFilePlugin_regFile\[7\]\[23\],62.16
_06316_,62.14
gpio_control_in_1\[4\].serial_data_out,62.14
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[0\]\[6\],62.14
soc.core.multiregimpl23_regs1,62.14
net2893,62.14
net10979,62.14
gpio_control_in_1\[4\].shift_register\[0\],62.12
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[14\]\[2\],62.12
soc.core.VexRiscv.RegFilePlugin_regFile\[30\]\[18\],62.12
clknet_leaf_15_mgmt_buffers.caravel_clk,62.12
net9029,62.12
_12077_,62.1
soc.core.mgmtsoc_vexriscv_i_cmd_payload_data\[13\],62.09
_04618_,62.08
soc.core.mgmtsoc_value\[1\],62.07
_04213_,62.06
net3469,62.06
mask_rev\[30\],62.05
net8690,62.045
_04182_,62.04
_14341_,62.04
_14640_,62.04
_14656_,62.04
pll.ext_trim\[20\],62.04
soc.core.multiregimpl33_regs1,62.04
soc.core.la_ien_storage\[73\],62.02
mgmt_buffers.user_irq\[2\],62.005
gpio_control_in_1\[2\].shift_register\[9\],62
net12348,62
_00522_,61.98
soc.core.VexRiscv.RegFilePlugin_regFile\[21\]\[31\],61.95
clknet_leaf_344_mgmt_buffers.caravel_clk,61.94
net3117,61.94
net10305,61.94
_04344_,61.92
_11540_,61.92
clknet_leaf_865_mgmt_buffers.caravel_clk,61.92
_04501_,61.9
_06317_,61.9
net5814,61.9
_02668_,61.88
_14151_,61.88
clknet_leaf_1038_mgmt_buffers.caravel_clk,61.88
net5304,61.88
net8962,61.88
soc.core.VexRiscv.RegFilePlugin_regFile\[11\]\[25\],61.86
user_io_oeb\[19\],61.85
net11035,61.845
_04096_,61.84
_12695_,61.84
_04506_,61.82
net4052,61.82
net4059,61.82
net11071,61.82
_12446_,61.78
_14663_,61.78
soc.core.VexRiscv.RegFilePlugin_regFile\[10\]\[27\],61.78
soc.core.VexRiscv._zz_execute_to_memory_REGFILE_WRITE_DATA\[25\],61.78
_12218_,61.765
clknet_leaf_331_mgmt_buffers.caravel_clk,61.75
net339,61.74
net6003,61.74
gpio_control_in_2\[2\].shift_register\[5\],61.735
net3646,61.725
_04510_,61.72
_05478_,61.72
_09778_,61.72
gpio_control_in_1a\[5\].shift_register\[1\],61.72
net5239,61.72
_12587_,61.7
gpio_control_bidir_2\[0\].shift_register\[10\],61.7
soc.core.la_ien_storage\[109\],61.7
soc.core.mgmtsoc_litespisdrphycore_cnt\[0\],61.7
net9881,61.7
_14898_,61.69
_08134_,61.68
mprj_io_dm[38],61.67
_03639_,61.66
_12362_,61.635
soc.core.mgmtsoc_vexriscv_debug_bus_dat_r\[18\],61.62
net7711,61.62
net2605,61.62
_01047_,61.6
soc.core.VexRiscv.RegFilePlugin_regFile\[6\]\[8\],61.6
_03063_,61.58
_04106_,61.58
_06187_,61.58
clknet_leaf_611_mgmt_buffers.caravel_clk,61.58
_10666_,61.575
mask_rev\[13\],61.57
soc.core.VexRiscv.IBusCachedPlugin_cache.io_cpu_fetch_mmuRsp_physicalAddress\[4\],61.56
gpio_control_in_1a\[4\].gpio_defaults\[4\],61.55
_10039_,61.545
_06254_,61.54
_09178_,61.54
mgmt_buffers.la_data_in_mprj\[6\],61.54
soc.core.la_ien_storage\[84\],61.525
_03628_,61.52
soc.core.VexRiscv.RegFilePlugin_regFile\[28\]\[28\],61.52
net3191,61.52
_00372_,61.5
_03054_,61.48
soc.core.VexRiscv.CsrPlugin_mtvec_base\[5\],61.48
gpio_control_in_2\[3\].shift_register\[0\],61.46
net3072,61.445
soc.core.mgmtsoc_update_value_re,61.44
net4502,61.44
net3963,61.425
_05472_,61.4
soc.core.VexRiscv.RegFilePlugin_regFile\[4\]\[14\],61.4
clknet_leaf_527_mgmt_buffers.caravel_clk,61.4
net4499,61.4
_01332_,61.38
_03922_,61.38
soc.core.mgmtsoc_vexriscv_debug_bus_dat_r\[14\],61.38
net8065,61.38
_03824_,61.37
_05006_,61.37
mprj_io_dm[46],61.37
_01220_,61.36
_03521_,61.36
soc.core.VexRiscv.RegFilePlugin_regFile\[16\]\[9\],61.36
soc.core.VexRiscv.RegFilePlugin_regFile\[4\]\[26\],61.36
net11649,61.36
net11231,61.345
_03812_,61.34
_06792_,61.34
_12133_,61.34
clknet_leaf_202_mgmt_buffers.caravel_clk,61.34
net8984,61.33
_04371_,61.32
_09673_,61.32
_14232_,61.32
_14982_,61.32
clknet_leaf_14_mgmt_buffers.caravel_clk,61.32
clknet_leaf_633_mgmt_buffers.caravel_clk,61.32
_10690_,61.3
soc.core.mgmtsoc_vexriscv_debug_bus_dat_r\[23\],61.3
clknet_leaf_359_mgmt_buffers.caravel_clk,61.3
net8955,61.3
net2901,61.28
net227,61.26
gpio_control_in_1\[5\].pad_gpio_outenb,61.25
_03385_,61.24
net12532,61.24
soc.core.la_ien_storage\[69\],61.225
_11650_,61.22
_14822_,61.2
clknet_leaf_363_mgmt_buffers.caravel_clk,61.2
clknet_leaf_1027_mgmt_buffers.caravel_clk,61.2
net7160,61.2
net12403,61.2
_00126_,61.18
_07086_,61.18
_13081_,61.16
net5986,61.16
_03177_,61.14
soc.core.VexRiscv.RegFilePlugin_regFile\[22\]\[19\],61.14
net9469,61.14
_02981_,61.12
soc.core.VexRiscv.DBusSimplePlugin_memoryExceptionPort_payload_badAddr\[15\],61.12
net11041,61.105
_01857_,61.1
net183,61.1
_10757_,61.08
soc.core.mgmtsoc_bus_errors\[16\],61.08
net8866,61.08
_04493_,61.06
_08140_,61.06
_10093_,61.06
net3174,61.06
net12180,61.06
net12501,61.06
gpio_control_in_1a\[3\].shift_register\[9\],61.04
net11368,61.04
gpio_control_in_1a\[2\].gpio_defaults\[10\],61.03
soc.core.VexRiscv.RegFilePlugin_regFile\[24\]\[10\],61.03
_07095_,61.025
_03152_,61.02
_04314_,61.02
_14750_,61
gpio_control_in_1\[2\].shift_register\[10\],60.985
soc.core.VexRiscv.CsrPlugin_csrMapping_writeDataSignal\[17\],60.985
net4001,60.985
_14113_,60.98
soc.core.VexRiscv.IBusCachedPlugin_cache._zz_fetchStage_read_waysValues_0_tag_valid_2\[18\],60.98
clknet_leaf_1065_mgmt_buffers.caravel_clk,60.98
clknet_leaf_1068_mgmt_buffers.caravel_clk,60.98
net12756,60.98
_03834_,60.97
soc.core.VexRiscv.RegFilePlugin_regFile\[11\]\[29\],60.92
net3911,60.92
_14842_,60.9
soc.core.VexRiscv.RegFilePlugin_regFile\[23\]\[13\],60.9
soc.core.VexRiscv.RegFilePlugin_regFile\[3\]\[29\],60.9
clknet_leaf_732_mgmt_buffers.caravel_clk,60.9
clknet_leaf_959_mgmt_buffers.caravel_clk,60.9
net11473,60.9
_14180_,60.88
soc.core.spi_cs_n,60.87
_06078_,60.86
clknet_leaf_60_mgmt_buffers.caravel_clk,60.86
net11049,60.845
_00409_,60.84
_05086_,60.84
_06432_,60.84
soc.core.interface0_bank_bus_dat_r\[23\],60.84
soc.core.mgmtsoc_litespisdrphycore_storage\[4\],60.84
net2977,60.84
clknet_leaf_613_mgmt_buffers.caravel_clk,60.82
net5539,60.82
net9196,60.82
net11551,60.82
soc.core.VexRiscv.RegFilePlugin_regFile\[28\]\[1\],60.8
soc.core.VexRiscv._zz_RegFilePlugin_regFile_port1\[7\],60.8
net12343,60.8
_03613_,60.78
_08646_,60.78
_10916_,60.78
net2881,60.78
net8901,60.78
_06546_,60.76
_08904_,60.745
_00301_,60.74
_03854_,60.74
_09128_,60.74
_12793_,60.74
net200,60.74
clknet_leaf_1079_mgmt_buffers.caravel_clk,60.74
net7459,60.74
net2686,60.74
_08315_,60.705
_12858_,60.7
gpio_control_in_1\[3\].shift_register\[0\],60.7
soc.core.VexRiscv.decode_to_execute_REGFILE_WRITE_VALID,60.7
soc.core.VexRiscv.memory_to_writeBack_REGFILE_WRITE_DATA\[12\],60.7
soc.core.interface6_bank_bus_dat_r\[18\],60.7
mgmt_buffers.la_data_in_mprj\[118\],60.685
_01362_,60.68
soc.core.dbg_uart_data\[9\],60.68
net11039,60.68
_03040_,60.66
soc.core.multiregimpl82_regs1,60.66
net10936,60.635
_13691_,60.62
_13993_,60.62
clknet_leaf_735_mgmt_buffers.caravel_clk,60.62
_03788_,60.6
_09883_,60.6
_11648_,60.6
soc.core.VexRiscv.RegFilePlugin_regFile\[4\]\[4\],60.6
net2870,60.6
net12039,60.6
gpio_control_in_2\[8\].gpio_defaults\[6\],60.59
net3827,60.58
soc.core.multiregimpl112_regs0,60.56
net4575,60.56
gpio_control_in_2\[3\].gpio_defaults\[5\],60.55
net4116,60.545
_03146_,60.54
soc.core.VexRiscv.RegFilePlugin_regFile\[11\]\[17\],60.54
_10377_,60.53
soc.core.la_ien_storage\[91\],60.525
_04217_,60.52
gpio_control_in_1a\[5\].gpio_defaults\[6\],60.51
_10549_,60.5
clknet_leaf_757_mgmt_buffers.caravel_clk,60.5
net5634,60.5
net12356,60.5
net12380,60.5
net7537,60.485
net5984,60.48
net11029,60.465
_03219_,60.46
_11466_,60.46
_13888_,60.46
clknet_leaf_256_mgmt_buffers.caravel_clk,60.46
_11299_,60.44
_11819_,60.44
net5067,60.44
mprj_io_dm[58],60.43
_04383_,60.42
_02186_,60.4
soc.core.multiregimpl87_regs1,60.4
net12173,60.4
_14650_,60.36
gpio_control_in_2\[6\].gpio_defaults\[12\],60.36
mgmt_buffers.la_data_in_mprj_bar\[86\],60.34
soc.core.VexRiscv.RegFilePlugin_regFile\[18\]\[26\],60.34
net9689,60.34
clknet_leaf_55_mgmt_buffers.caravel_clk,60.32
net6671,60.32
net11051,60.32
_07656_,60.3
_09157_,60.3
_11656_,60.3
gpio_control_in_1a\[3\].gpio_defaults\[1\],60.29
_11958_,60.28
soc.core.mgmtsoc_reload_storage\[13\],60.28
net10918,60.28
soc.core.mgmtsoc_litespisdrphycore_sr_cnt\[3\],60.27
soc.core.multiregimpl56_regs1,60.26
_07787_,60.22
soc.core.VexRiscv.memory_to_writeBack_REGFILE_WRITE_DATA\[1\],60.22
net3144,60.22
net9973,60.22
net3775,60.205
_12198_,60.2
gpio_control_in_2\[4\].shift_register\[8\],60.2
gpio_control_in_2\[8\].shift_register\[10\],60.185
soc.core.memdat_1\[4\],60.18
net9874,60.18
_12800_,60.165
_00273_,60.16
soc.core.VexRiscv.RegFilePlugin_regFile\[17\]\[9\],60.14
net12573,60.14
_12874_,60.135
net11107,60.125
soc.core.VexRiscv.RegFilePlugin_regFile\[11\]\[28\],60.12
soc.core.VexRiscv.RegFilePlugin_regFile\[31\]\[10\],60.12
_03899_,60.1
net157,60.1
gpio_control_in_1\[2\].gpio_defaults\[10\],60.09
net3226,60.085
_08483_,60.08
_09993_,60.08
gpio_control_in_1a\[5\].gpio_defaults\[5\],60.07
net9671,60.065
_13080_,60.06
_14311_,60.06
soc.core.VexRiscv.RegFilePlugin_regFile\[3\]\[31\],60.06
net11894,60.06
_04423_,60.04
soc.core.VexRiscv.IBusCachedPlugin_cache.io_mem_rsp_payload_data\[27\],60.04
soc.core.mgmtsoc_bus_errors\[29\],60.04
net3676,60.04
net7458,60.04
_14398_,60.025
_04362_,60.02
_12192_,60.02
clknet_leaf_874_mgmt_buffers.caravel_clk,60
_03552_,59.98
_12739_,59.98
soc.core.VexRiscv.RegFilePlugin_regFile\[25\]\[20\],59.98
net3931,59.98
net10306,59.98
soc.core.la_ien_storage\[108\],59.96
soc.core.VexRiscv.RegFilePlugin_regFile\[25\]\[27\],59.955
net9954,59.945
_14442_,59.94
net6936,59.94
net10890,59.94
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[10\]\[6\],59.92
net9062,59.92
_01260_,59.9
_13231_,59.9
soc.core.VexRiscv.IBusCachedPlugin_cache.io_mem_rsp_payload_data\[15\],59.9
soc.core.VexRiscv.RegFilePlugin_regFile\[26\]\[2\],59.9
mprj_io_dm[43],59.89
_08496_,59.885
_01617_,59.88
_03176_,59.88
_03877_,59.88
_04012_,59.88
_10479_,59.88
_11455_,59.88
soc.core.VexRiscv.RegFilePlugin_regFile\[27\]\[8\],59.88
net9656,59.88
net12498,59.88
_00271_,59.86
_10923_,59.86
mgmt_buffers.la_data_in_mprj_bar\[103\],59.86
clknet_leaf_1179_mgmt_buffers.caravel_clk,59.86
net12752,59.86
_03198_,59.85
net9737,59.835
_09129_,59.82
_09998_,59.82
soc.core.VexRiscv.CsrPlugin_mtvec_base\[25\],59.82
net190,59.82
clknet_leaf_965_mgmt_buffers.caravel_clk,59.82
net4061,59.805
_01431_,59.8
_04757_,59.8
_11581_,59.8
soc.core.VexRiscv.RegFilePlugin_regFile\[14\]\[31\],59.8
net326,59.8
clknet_leaf_248_mgmt_buffers.caravel_clk,59.8
net4022,59.785
_06290_,59.78
_11441_,59.78
_13470_,59.78
gpio_control_in_1\[1\].shift_register\[11\],59.78
mgmt_buffers.mprj_logic1\[239\],59.78
net4622,59.78
_12433_,59.77
gpio_control_in_2\[9\].gpio_defaults\[8\],59.77
soc.core.VexRiscv.RegFilePlugin_regFile\[14\]\[20\],59.76
soc.core.VexRiscv.RegFilePlugin_regFile\[7\]\[2\],59.76
soc.core.mgmtsoc_litespisdrphycore_sr_out\[26\],59.76
clknet_leaf_239_mgmt_buffers.caravel_clk,59.76
clknet_leaf_397_mgmt_buffers.caravel_clk,59.76
net3344,59.745
_11569_,59.74
_14953_,59.74
soc.core.VexRiscv.IBusCachedPlugin_cache.decodeStage_mmuRsp_physicalAddress\[16\],59.74
net12739,59.74
gpio_control_in_2\[0\].shift_register\[6\],59.72
net11732,59.72
gpio_control_in_1\[0\].shift_register\[10\],59.7
pll.pll_control.count1\[2\],59.7
soc.core.multiregimpl85_regs0,59.7
soc.core.VexRiscv.RegFilePlugin_regFile\[10\]\[29\],59.68
net5386,59.68
_08494_,59.665
_01051_,59.66
_08143_,59.66
clknet_leaf_635_mgmt_buffers.caravel_clk,59.66
net3699,59.66
net10724,59.655
_00269_,59.64
soc.core.VexRiscv.RegFilePlugin_regFile\[2\]\[23\],59.64
gpio_control_in_2\[1\].shift_register\[3\],59.62
_03970_,59.6
_13105_,59.6
clknet_leaf_958_mgmt_buffers.caravel_clk,59.6
net12207,59.6
net12929,59.6
_08395_,59.585
_13964_,59.58
gpio_control_in_2\[4\].shift_register\[10\],59.58
clknet_leaf_163_mgmt_buffers.caravel_clk,59.56
net6343,59.56
_13739_,59.545
_02630_,59.54
soc.core.VexRiscv.RegFilePlugin_regFile\[9\]\[11\],59.54
soc.core.spi_master_cs_storage\[9\],59.54
clknet_leaf_39_mgmt_buffers.caravel_clk,59.54
net3175,59.54
mprj_io_out[5],59.53
_04800_,59.52
gpio_control_bidir_1\[0\].shift_register\[3\],59.52
soc.core.VexRiscv.RegFilePlugin_regFile\[27\]\[13\],59.52
net7408,59.52
_03109_,59.5
soc.core.mgmtsoc_value\[17\],59.5
clknet_leaf_669_mgmt_buffers.caravel_clk,59.495
_06440_,59.48
_11401_,59.48
soc.core.VexRiscv.IBusCachedPlugin_cache.decodeStage_mmuRsp_physicalAddress\[22\],59.48
net342,59.48
clknet_leaf_212_mgmt_buffers.caravel_clk,59.48
net11053,59.48
_01280_,59.46
soc.core.VexRiscv.DBusSimplePlugin_memoryExceptionPort_payload_badAddr\[23\],59.46
clknet_leaf_448_mgmt_buffers.caravel_clk,59.46
clknet_leaf_203_mgmt_buffers.caravel_clk,59.44
clknet_leaf_716_mgmt_buffers.caravel_clk,59.44
_09058_,59.425
_07038_,59.42
_08172_,59.42
_14368_,59.42
soc.core.VexRiscv.RegFilePlugin_regFile\[7\]\[7\],59.42
net12565,59.42
net10998,59.415
gpio_control_in_2\[1\].shift_register\[2\],59.41
_09804_,59.405
_01970_,59.4
_08246_,59.4
_12966_,59.4
soc.core.VexRiscv.IBusCachedPlugin_cache.decodeStage_mmuRsp_physicalAddress\[14\],59.4
net9372,59.4
_02737_,59.38
_03394_,59.38
net11118,59.365
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[0\]\[18\],59.36
net138,59.36
clknet_leaf_1088_mgmt_buffers.caravel_clk,59.36
net9043,59.36
clknet_leaf_813_mgmt_buffers.caravel_clk,59.3
_02060_,59.28
_04172_,59.28
soc.core.VexRiscv.RegFilePlugin_regFile\[4\]\[17\],59.28
net11120,59.265
_04895_,59.26
clknet_leaf_545_mgmt_buffers.caravel_clk,59.26
_06695_,59.24
mgmt_buffers.la_data_in_mprj_bar\[1\],59.22
soc.core.VexRiscv.RegFilePlugin_regFile\[30\]\[17\],59.22
net4479,59.205
_02739_,59.2
soc.core.dbg_uart_tx_data\[7\],59.2
net3831,59.2
_01298_,59.19
gpio_control_in_1a\[1\].gpio_defaults\[5\],59.19
_14866_,59.18
soc.core.VexRiscv.RegFilePlugin_regFile\[11\]\[27\],59.18
soc.core.VexRiscv.RegFilePlugin_regFile\[13\]\[31\],59.18
soc.core.VexRiscv.RegFilePlugin_regFile\[24\]\[8\],59.18
net12726,59.18
_13109_,59.15
gpio_control_in_2\[7\].gpio_defaults\[10\],59.15
clknet_leaf_266_mgmt_buffers.caravel_clk,59.14
_08903_,59.125
soc.core.VexRiscv.dBusWishbone_DAT_MISO\[5\],59.1
net11087,59.1
_01558_,59.08
_02648_,59.08
_10005_,59.08
soc.core.VexRiscv.RegFilePlugin_regFile\[28\]\[8\],59.08
soc.core.gpioin1_gpioin1_mode_storage,59.08
_03237_,59.06
_06944_,59.06
mgmt_buffers.mprj_logic1\[28\],59.06
net3331,59.06
net6317,59.06
net10473,59.06
net11543,59.06
mprj_io_dm[21],59.05
user_io_oeb\[6\],59.05
_13194_,59.04
gpio_control_bidir_2\[2\].gpio_holdover,59.04
net3962,59.04
net9182,59.04
net11048,59.04
_11249_,59.02
soc.core.VexRiscv.RegFilePlugin_regFile\[9\]\[28\],59.02
clknet_leaf_866_mgmt_buffers.caravel_clk,59.02
net8410,59.02
clknet_leaf_65_mgmt_buffers.caravel_clk,59.01
_03165_,59
_10452_,59
_12183_,59
_13050_,59
gpio_control_in_2\[7\].gpio_defaults\[8\],58.99
_02504_,58.98
_12115_,58.96
net5312,58.96
net12920,58.96
_11912_,58.94
_12744_,58.94
net5967,58.94
net3715,58.935
_00332_,58.92
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[13\]\[3\],58.92
clknet_leaf_244_mgmt_buffers.caravel_clk,58.92
soc.core.multiregimpl50_regs0,58.91
net4842,58.91
_01978_,58.9
_03571_,58.9
_11284_,58.9
net318,58.9
net4002,58.9
net11300,58.9
net11728,58.9
_00882_,58.88
_02379_,58.88
_05698_,58.87
clknet_leaf_850_mgmt_buffers.caravel_clk,58.87
soc.core.VexRiscv.RegFilePlugin_regFile\[15\]\[30\],58.84
net11148,58.84
_02195_,58.82
gpio_control_in_2\[1\].serial_load,58.82
_00415_,58.8
net5997,58.8
net10987,58.8
_01483_,58.78
_01642_,58.78
soc.core.mgmtsoc_reload_storage\[15\],58.78
_10376_,58.765
clknet_leaf_913_mgmt_buffers.caravel_clk,58.76
_09250_,58.74
_10857_,58.74
net5115,58.74
_14235_,58.73
_09671_,58.725
net10287,58.725
_07283_,58.72
_13924_,58.72
soc.core.VexRiscv.RegFilePlugin_regFile\[1\]\[16\],58.72
soc.core.VexRiscv.RegFilePlugin_regFile\[26\]\[13\],58.72
soc.core.dbg_uart_data\[19\],58.72
clknet_leaf_1019_mgmt_buffers.caravel_clk,58.72
net9177,58.72
net11308,58.72
soc.core.VexRiscv.CsrPlugin_mcause_exceptionCode\[1\],58.705
_09237_,58.7
net7238,58.68
_03547_,58.66
soc.core.multiregimpl121_regs0,58.66
_01678_,58.64
soc.core.multiregimpl59_regs0,58.64
net10530,58.64
_11690_,58.62
mprj_io_out[12],58.61
_10491_,58.6
soc.core.VexRiscv.RegFilePlugin_regFile\[0\]\[20\],58.6
net1873,58.585
_07232_,58.58
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[6\]\[16\],58.58
_11602_,58.57
net2884,58.565
_07140_,58.56
_13802_,58.56
_14206_,58.56
_14438_,58.56
clknet_leaf_432_mgmt_buffers.caravel_clk,58.56
net11595,58.56
_02649_,58.54
_07206_,58.54
gpio_control_bidir_2\[0\].pad_gpio_out,58.54
soc.core.VexRiscv.RegFilePlugin_regFile\[29\]\[18\],58.54
net7695,58.54
clknet_leaf_195_mgmt_buffers.caravel_clk,58.525
net12005,58.52
net12455,58.52
_09888_,58.515
clknet_leaf_668_mgmt_buffers.caravel_clk,58.5
net11038,58.5
mprj_io_dm[26],58.49
_03175_,58.48
_04315_,58.48
_10883_,58.48
soc.core.VexRiscv.RegFilePlugin_regFile\[30\]\[7\],58.48
soc.core.storage\[13\]\[7\],58.48
soc.core.VexRiscv.IBusCachedPlugin_cache.lineLoader_address\[7\],58.46
soc.core.VexRiscv.RegFilePlugin_regFile\[29\]\[25\],58.46
soc.core.VexRiscv.RegFilePlugin_regFile\[7\]\[4\],58.46
_04447_,58.44
soc.core.uart_phy_tx_phase\[27\],58.44
net4038,58.44
net9699,58.435
mprj_io_dm[45],58.43
_06766_,58.42
soc.core.VexRiscv.CsrPlugin_mtvec_base\[4\],58.41
gpio_control_in_2\[0\].gpio_defaults\[12\],58.4
soc.core.VexRiscv.memory_to_writeBack_REGFILE_WRITE_DATA\[18\],58.4
soc.core.dbg_uart_tx_data_uartwishbonebridge_rs232phytx_next_value2\[1\],58.4
soc.core.VexRiscv.RegFilePlugin_regFile\[12\]\[8\],58.38
soc.core.VexRiscv.RegFilePlugin_regFile\[24\]\[29\],58.38
net2981,58.365
_10933_,58.36
soc.core.VexRiscv.RegFilePlugin_regFile\[0\]\[25\],58.36
_11620_,58.34
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[13\]\[21\],58.34
soc.core.VexRiscv.RegFilePlugin_regFile\[17\]\[19\],58.34
clknet_leaf_542_mgmt_buffers.caravel_clk,58.34
net5706,58.34
net3145,58.33
_02553_,58.32
_10408_,58.32
gpio_control_in_2\[2\].gpio_defaults\[11\],58.32
net11921,58.32
_08292_,58.305
_11724_,58.3
soc.core.mgmtsoc_master_tx_fifo_source_payload_data\[23\],58.3
clknet_leaf_5_mgmt_buffers.caravel_clk,58.3
net4535,58.3
_09124_,58.285
_09225_,58.28
_11691_,58.28
gpio_control_in_1\[3\].shift_register\[10\],58.28
soc.core.VexRiscv.RegFilePlugin_regFile\[30\]\[14\],58.28
soc.core.VexRiscv.memory_to_writeBack_REGFILE_WRITE_DATA\[7\],58.28
_10052_,58.265
soc.core.VexRiscv.RegFilePlugin_regFile\[20\]\[10\],58.26
net11265,58.26
_03222_,58.24
soc.core.VexRiscv._zz_CsrPlugin_csrMapping_readDataInit\[13\],58.24
soc.core.la_ien_storage\[78\],58.225
_02768_,58.22
_11479_,58.22
_14694_,58.22
soc.core.VexRiscv.RegFilePlugin_regFile\[12\]\[11\],58.22
clknet_leaf_908_mgmt_buffers.caravel_clk,58.22
net4182,58.22
net12546,58.22
_07890_,58.2
_11962_,58.2
_13101_,58.2
net8937,58.2
pll.ext_trim\[17\],58.18
soc.core.VexRiscv.RegFilePlugin_regFile\[19\]\[25\],58.18
mprj_io_out[9],58.17
clknet_leaf_105_mgmt_buffers.caravel_clk,58.16
net4667,58.16
net12021,58.16
net8291,58.145
_10252_,58.14
_11567_,58.14
net330,58.14
clknet_leaf_405_mgmt_buffers.caravel_clk,58.14
clknet_leaf_1098_mgmt_buffers.caravel_clk,58.14
gpio_control_in_2\[7\].gpio_defaults\[5\],58.13
_09239_,58.12
soc.core.VexRiscv.RegFilePlugin_regFile\[13\]\[18\],58.12
net6412,58.12
soc.core.VexRiscv.RegFilePlugin_regFile\[29\]\[29\],58.1
_09997_,58.09
mgmt_buffers.la_data_in_mprj_bar\[95\],58.08
net12910,58.08
mprj_io_dm[14],58.07
_02896_,58.06
soc.core.dbg_uart_data\[17\],58.06
_12737_,58.04
net1321,58.04
net4000,58.04
_07278_,58.025
_11166_,58.02
gpio_control_in_2\[6\].shift_register\[0\],58.02
soc.core.VexRiscv.RegFilePlugin_regFile\[20\]\[24\],58.02
soc.core.VexRiscv.RegFilePlugin_regFile\[24\]\[0\],58.02
soc.core.interface10_bank_bus_dat_r\[2\],58.02
_00575_,58
_01257_,58
_14753_,58
clknet_leaf_278_mgmt_buffers.caravel_clk,58
net10164,58
_02116_,57.98
_04480_,57.98
_07037_,57.98
_08560_,57.98
mprj_io_out[2],57.97
_00976_,57.96
_04026_,57.96
soc.core.VexRiscv.RegFilePlugin_regFile\[23\]\[18\],57.96
soc.core.VexRiscv.RegFilePlugin_regFile\[4\]\[7\],57.96
soc.core.multiregimpl0_regs0,57.94
clknet_leaf_943_mgmt_buffers.caravel_clk,57.94
_01450_,57.92
net9743,57.92
soc.core.VexRiscv.RegFilePlugin_regFile\[6\]\[26\],57.91
soc.core.mgmtsoc_litespisdrphycore_sr_out\[15\],57.905
_01921_,57.9
_07092_,57.9
_12845_,57.9
_14419_,57.9
mgmt_buffers.la_data_in_mprj_bar\[9\],57.9
clknet_leaf_1042_mgmt_buffers.caravel_clk,57.89
_00130_,57.88
_01085_,57.88
_12194_,57.88
clknet_leaf_317_mgmt_buffers.caravel_clk,57.88
gpio_control_bidir_1\[1\].shift_register\[8\],57.86
net6711,57.86
net9096,57.86
gpio_control_bidir_2\[1\].shift_register\[4\],57.84
clknet_leaf_503_mgmt_buffers.caravel_clk,57.84
net5261,57.84
_03255_,57.83
_04414_,57.82
soc.core.dbg_uart_tx_count\[2\],57.82
net5673,57.82
net11188,57.82
_13522_,57.81
_13667_,57.8
clknet_leaf_204_mgmt_buffers.caravel_clk,57.8
_01958_,57.78
_03480_,57.78
soc.core.storage_1\[11\]\[6\],57.78
net3508,57.78
net12782,57.78
net12791,57.78
mprj_io_out[6],57.77
_03107_,57.76
_12787_,57.76
gpio_control_in_2\[4\].gpio_defaults\[5\],57.76
soc.core.VexRiscv.CsrPlugin_mtval\[26\],57.76
soc.core.VexRiscv.RegFilePlugin_regFile\[8\]\[21\],57.76
net3629,57.76
net10383,57.76
net4157,57.745
_07176_,57.74
soc.core.VexRiscv.RegFilePlugin_regFile\[6\]\[2\],57.74
soc.core.VexRiscv.dBusWishbone_DAT_MISO\[28\],57.74
net3337,57.725
_03156_,57.72
_14334_,57.72
clknet_leaf_250_mgmt_buffers.caravel_clk,57.72
net3885,57.705
net7919,57.705
net10135,57.705
_12598_,57.7
mgmt_buffers.user_irq\[1\],57.695
_03351_,57.69
_06956_,57.68
_13400_,57.68
net10592,57.68
net11568,57.68
net9673,57.655
net8348,57.645
_04168_,57.64
_10266_,57.64
_12309_,57.64
net11020,57.64
mgmt_buffers.la_data_in_mprj\[19\],57.62
soc.core.VexRiscv.RegFilePlugin_regFile\[18\]\[28\],57.62
net9872,57.62
gpio_control_in_1a\[5\].gpio_defaults\[11\],57.61
_14504_,57.6
gpio_control_in_2\[1\].shift_register\[11\],57.6
soc.core.mgmtsoc_value\[3\],57.6
net12122,57.59
_00032_,57.58
_09238_,57.58
pll.ext_trim\[21\],57.58
soc.core.VexRiscv.RegFilePlugin_regFile\[27\]\[1\],57.58
net6481,57.58
net9994,57.58
soc.core.dbg_uart_rx_phase\[9\],57.57
_14962_,57.56
pll.ext_trim\[14\],57.56
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[14\]\[5\],57.56
soc.core.VexRiscv.RegFilePlugin_regFile\[13\]\[20\],57.56
soc.core.mgmtsoc_master_tx_fifo_source_payload_data\[9\],57.56
net11581,57.56
_00008_,57.54
clknet_leaf_711_mgmt_buffers.caravel_clk,57.54
net6696,57.54
_02728_,57.52
_03106_,57.52
_14539_,57.52
_08652_,57.515
_09650_,57.515
clknet_leaf_472_mgmt_buffers.caravel_clk,57.515
gpio_control_bidir_2\[0\].gpio_defaults\[3\],57.51
net4420,57.505
soc.core.interface3_bank_bus_dat_r\[7\],57.5
_09233_,57.48
net7342,57.48
gpio_control_in_1\[3\].gpio_defaults\[4\],57.47
soc.core.VexRiscv.RegFilePlugin_regFile\[28\]\[19\],57.46
_05500_,57.44
clknet_leaf_418_mgmt_buffers.caravel_clk,57.44
clknet_leaf_473_mgmt_buffers.caravel_clk,57.44
net12772,57.44
_13650_,57.43
_09110_,57.425
_03133_,57.42
_07098_,57.42
_12328_,57.42
net2640,57.42
soc.core.VexRiscv.RegFilePlugin_regFile\[27\]\[23\],57.41
_12738_,57.4
net3750,57.4
net12373,57.4
_03988_,57.38
net6291,57.38
net7052,57.38
net9442,57.38
gpio_control_in_1a\[3\].gpio_defaults\[4\],57.37
_03879_,57.36
soc.core.litespi_next_state\[1\],57.36
net10259,57.36
net11274,57.345
net12422,57.34
_14887_,57.32
soc.core.VexRiscv.RegFilePlugin_regFile\[6\]\[28\],57.32
net8941,57.32
_03228_,57.3
_03268_,57.3
_10254_,57.3
soc.core.VexRiscv.RegFilePlugin_regFile\[20\]\[19\],57.3
clknet_leaf_167_mgmt_buffers.caravel_clk,57.3
net7538,57.3
net7985,57.3
gpio_control_in_2\[0\].gpio_defaults\[2\],57.29
_03595_,57.28
_09109_,57.28
_13889_,57.28
_13923_,57.28
gpio_control_bidir_2\[0\].shift_register\[6\],57.28
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[11\]\[6\],57.28
soc.core.VexRiscv.RegFilePlugin_regFile\[2\]\[29\],57.26
soc.core.multiregimpl60_regs0,57.26
net12723,57.26
net12743,57.26
_00490_,57.24
_01963_,57.24
_06186_,57.24
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[4\]\[24\],57.24
soc.core.multiregimpl129_regs0,57.24
net1874,57.24
net5034,57.24
_02307_,57.22
_03562_,57.22
_04195_,57.22
_13036_,57.22
net8642,57.22
net11684,57.22
soc.core.VexRiscv.RegFilePlugin_regFile\[5\]\[11\],57.21
clknet_leaf_816_mgmt_buffers.caravel_clk,57.21
_14595_,57.2
gpio_control_in_1\[1\].shift_register\[10\],57.2
net4459,57.2
soc.core.VexRiscv.IBusCachedPlugin_cache.io_mem_rsp_payload_data\[8\],57.18
soc.core.VexRiscv.RegFilePlugin_regFile\[17\]\[18\],57.18
mprj_io_dm[50],57.17
_08357_,57.16
soc.core.VexRiscv.IBusCachedPlugin_cache.decodeStage_mmuRsp_physicalAddress\[15\],57.16
_14802_,57.145
_03397_,57.14
_03962_,57.14
_07792_,57.12
net8051,57.11
net336,57.1
_03950_,57.08
_04333_,57.08
gpio_control_in_2\[4\].shift_register\[0\],57.08
net193,57.08
_07266_,57.065
_09029_,57.065
net11103,57.065
_14594_,57.06
soc.core.multiregimpl108_regs0,57.06
net4035,57.06
net9197,57.06
mask_rev\[22\],57.05
_00988_,57.04
_01070_,57.04
_08645_,57.04
mprj_io_dm[48],57.03
gpio_control_in_2\[0\].gpio_defaults\[11\],57.02
pll.ext_trim\[4\],57.02
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[2\]\[6\],57.02
clknet_leaf_508_mgmt_buffers.caravel_clk,57.02
_07877_,57
net11730,57
_08393_,56.985
_03310_,56.98
soc.core.VexRiscv.RegFilePlugin_regFile\[0\]\[29\],56.98
net3722,56.98
_04193_,56.96
_13310_,56.96
gpio_control_in_2\[6\].shift_register\[9\],56.96
soc.core.mgmtsoc_litespisdrphycore_sr_out\[31\],56.96
net5797,56.96
net11236,56.96
gpio_control_in_1\[4\].shift_register\[9\],56.94
soc.core.uart_rx_fifo_consume\[1\],56.92
mgmt_buffers.la_data_in_mprj\[14\],56.905
_00047_,56.9
_03212_,56.9
net3162,56.9
_00590_,56.88
_03948_,56.88
_07393_,56.88
_10466_,56.88
_11359_,56.88
net3345,56.88
_07252_,56.865
net4390,56.865
_02591_,56.86
_09112_,56.86
soc.core.dbg_uart_data\[5\],56.86
soc.core.VexRiscv.CsrPlugin_mstatus_MPP\[0\],56.85
net11054,56.845
_04512_,56.84
clknet_leaf_1093_mgmt_buffers.caravel_clk,56.84
clknet_leaf_1173_mgmt_buffers.caravel_clk,56.84
_08657_,56.82
_14950_,56.82
mgmt_buffers.la_data_in_mprj\[106\],56.805
_09177_,56.8
_10754_,56.8
pll.ext_trim\[6\],56.8
pll.pll_control.count1\[4\],56.8
soc.core.VexRiscv.RegFilePlugin_regFile\[19\]\[1\],56.8
net12277,56.8
_12735_,56.78
gpio_control_in_1\[3\].shift_register\[11\],56.78
_10468_,56.76
gpio_control_bidir_1\[1\].shift_register\[7\],56.76
gpio_control_bidir_2\[2\].shift_register\[10\],56.76
net1969,56.76
net11002,56.745
soc.core.VexRiscv.RegFilePlugin_regFile\[27\]\[26\],56.74
_05490_,56.73
_14300_,56.72
gpio_control_in_2\[2\].shift_register\[11\],56.72
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[0\]\[31\],56.72
soc.core.VexRiscv.RegFilePlugin_regFile\[3\]\[26\],56.72
soc.core.mgmtsoc_value\[7\],56.72
_03715_,56.71
gpio_control_in_1a\[2\].shift_register\[10\],56.705
_04937_,56.7
_10926_,56.7
soc.core.VexRiscv.RegFilePlugin_regFile\[27\]\[28\],56.7
_07281_,56.685
_03298_,56.68
clknet_leaf_51_mgmt_buffers.caravel_clk,56.68
_09051_,56.665
_09359_,56.665
_01912_,56.66
net4419,56.66
mgmt_buffers.la_data_in_mprj\[116\],56.645
_04791_,56.64
_13094_,56.64
_14679_,56.64
gpio_control_in_2\[1\].gpio_defaults\[11\],56.64
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[15\]\[10\],56.64
clknet_leaf_483_mgmt_buffers.caravel_clk,56.64
_11705_,56.635
_02285_,56.62
_13075_,56.62
soc.core.dbg_uart_words_count\[1\],56.62
_01201_,56.6
_01528_,56.6
_12672_,56.6
clknet_leaf_960_mgmt_buffers.caravel_clk,56.6
_13415_,56.59
_07612_,56.58
_11338_,56.58
_11979_,56.58
clknet_leaf_173_mgmt_buffers.caravel_clk,56.58
net11856,56.58
soc.core.VexRiscv.IBusCachedPlugin_cache.io_cpu_prefetch_pc\[18\],56.56
soc.core.VexRiscv.RegFilePlugin_regFile\[0\]\[10\],56.56
net4556,56.56
net5288,56.56
_12720_,56.54
net2951,56.54
_03387_,56.52
soc.core.VexRiscv.IBusCachedPlugin_cache.io_cpu_fetch_mmuRsp_physicalAddress\[13\],56.52
_01279_,56.5
_04291_,56.5
_06580_,56.5
_13652_,56.5
_14379_,56.5
soc.core.mgmtsoc_vexriscv_debug_bus_dat_r\[25\],56.5
net8638,56.5
_03241_,56.48
_03684_,56.48
soc.core.VexRiscv.RegFilePlugin_regFile\[16\]\[25\],56.48
_04307_,56.44
_04489_,56.42
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[13\]\[6\],56.42
net2877,56.42
net3212,56.42
_14333_,56.415
_04913_,56.41
_02190_,56.4
_04434_,56.4
_13744_,56.4
soc.core.VexRiscv.RegFilePlugin_regFile\[25\]\[29\],56.4
net8645,56.4
net196,56.395
net7772,56.385
_02924_,56.38
_03185_,56.38
_10852_,56.38
net11735,56.38
_10831_,56.37
_09799_,56.36
soc.core.dbg_uart_tx_data_uartwishbonebridge_rs232phytx_next_value2\[7\],56.36
_08948_,56.345
_00463_,56.34
_08493_,56.34
gpio_control_in_2\[4\].pad_gpio_out,56.32
soc.core.VexRiscv.DBusSimplePlugin_memoryExceptionPort_payload_badAddr\[0\],56.32
_13100_,56.285
_02907_,56.28
net9087,56.265
_01058_,56.26
_09113_,56.26
net3134,56.26
net5242,56.245
_07189_,56.24
_01465_,56.22
_11948_,56.22
_12748_,56.22
soc.core.VexRiscv.RegFilePlugin_regFile\[0\]\[24\],56.22
clknet_leaf_789_mgmt_buffers.caravel_clk,56.22
net6457,56.22
net8597,56.22
soc.core.VexRiscv.RegFilePlugin_regFile\[30\]\[21\],56.2
net333,56.2
gpio_control_in_2\[8\].gpio_defaults\[8\],56.19
gpio_control_in_2\[9\].shift_register\[3\],56.185
net4039,56.185
_06612_,56.18
gpio_control_in_2\[3\].shift_register\[5\],56.18
soc.core.VexRiscv.IBusCachedPlugin_cache.decodeStage_mmuRsp_physicalAddress\[19\],56.18
gpio_control_in_2\[8\].gpio_defaults\[10\],56.17
_03073_,56.16
_13242_,56.16
soc.core.mgmtsoc_scratch_storage\[9\],56.16
net10895,56.16
_09741_,56.145
clknet_leaf_35_mgmt_buffers.caravel_clk,56.14
clknet_leaf_723_mgmt_buffers.caravel_clk,56.14
net6157,56.14
_04699_,56.11
soc.core.VexRiscv._zz_RegFilePlugin_regFile_port0\[2\],56.1
_14786_,56.08
soc.core.VexRiscv.RegFilePlugin_regFile\[5\]\[17\],56.08
net2937,56.08
clknet_leaf_830_mgmt_buffers.caravel_clk,56.075
_03417_,56.06
mgmt_buffers.la_data_in_mprj_bar\[8\],56.06
soc.core.VexRiscv.DBusSimplePlugin_memoryExceptionPort_payload_badAddr\[14\],56.06
soc.core.dbg_uart_data\[3\],56.06
soc.core.interface3_bank_bus_dat_r\[4\],56.06
net9404,56.045
mgmt_buffers.mprj_logic1\[330\],56.04
soc.core.RAM256.Do0_pre\[1\]\[16\],56.04
net5077,56.04
_06185_,56.02
gpio_control_in_1\[0\].pad_gpio_out,56.02
_11004_,56
clknet_leaf_1035_mgmt_buffers.caravel_clk,56
net4140,56
net6341,56
net11420,56
_01445_,55.98
gpio_control_in_2\[5\].gpio_defaults\[12\],55.98
soc.core.VexRiscv.RegFilePlugin_regFile\[1\]\[25\],55.98
soc.core.VexRiscv.RegFilePlugin_regFile\[20\]\[25\],55.98
net3858,55.975
_10054_,55.96
_11420_,55.96
gpio_control_in_1\[5\].gpio_holdover,55.96
gpio_control_in_1a\[0\].pad_gpio_out,55.96
clknet_leaf_463_mgmt_buffers.caravel_clk,55.96
net5813,55.96
_10758_,55.94
_14820_,55.94
soc.core.VexRiscv.RegFilePlugin_regFile\[1\]\[19\],55.94
soc.core.VexRiscv.RegFilePlugin_regFile\[30\]\[26\],55.94
soc.core.VexRiscv.RegFilePlugin_regFile\[6\]\[1\],55.94
net3141,55.94
_08280_,55.925
_01947_,55.92
_06318_,55.92
_10909_,55.92
soc.core.VexRiscv.RegFilePlugin_regFile\[23\]\[9\],55.92
clknet_leaf_713_mgmt_buffers.caravel_clk,55.92
clknet_leaf_916_mgmt_buffers.caravel_clk,55.92
net4081,55.92
net7654,55.92
_08166_,55.905
gpio_control_in_1\[1\].shift_register\[9\],55.9
clknet_leaf_166_mgmt_buffers.caravel_clk,55.9
clknet_leaf_579_mgmt_buffers.caravel_clk,55.9
net9437,55.9
gpio_control_in_1a\[2\].gpio_defaults\[5\],55.89
_00123_,55.88
_06241_,55.88
_12902_,55.88
soc.core.VexRiscv.RegFilePlugin_regFile\[17\]\[26\],55.88
soc.core.mgmtsoc_litespisdrphycore_storage\[5\],55.88
net340,55.88
net12965,55.88
_14342_,55.86
clknet_leaf_631_mgmt_buffers.caravel_clk,55.86
user_io_oeb\[18\],55.84
_01264_,55.82
_12440_,55.82
soc.core.VexRiscv.RegFilePlugin_regFile\[22\]\[10\],55.81
_14865_,55.8
gpio_control_in_2\[6\].shift_register\[12\],55.8
soc.core.VexRiscv.RegFilePlugin_regFile\[8\]\[10\],55.8
net12492,55.8
_12703_,55.78
_09864_,55.765
clknet_leaf_811_mgmt_buffers.caravel_clk,55.76
_00642_,55.74
_01903_,55.74
_12770_,55.74
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[6\]\[0\],55.74
soc.core.mgmtsoc_bus_errors\[19\],55.74
gpio_control_bidir_1\[0\].shift_register\[7\],55.725
net9796,55.725
_01384_,55.72
_02037_,55.72
_11054_,55.72
_14255_,55.72
net324,55.72
_00968_,55.7
_02175_,55.7
soc.core.VexRiscv._zz_execute_to_memory_REGFILE_WRITE_DATA\[4\],55.7
soc.core.la_ien_storage\[101\],55.7
net9948,55.7
_03157_,55.69
net4705,55.68
_01091_,55.66
soc.core.VexRiscv.RegFilePlugin_regFile\[1\]\[21\],55.66
net4134,55.66
_10511_,55.64
mgmt_buffers.user_irq_bar\[2\],55.64
soc.core.VexRiscv.RegFilePlugin_regFile\[29\]\[30\],55.64
soc.core.multiregimpl87_regs0,55.64
_13256_,55.63
_02559_,55.62
_13494_,55.62
_14972_,55.62
clknet_leaf_595_mgmt_buffers.caravel_clk,55.62
_03746_,55.6
_11826_,55.6
gpio_control_in_1\[5\].shift_register\[4\],55.6
pll.itrim\[19\],55.6
net4643,55.585
_03166_,55.58
clknet_leaf_1175_mgmt_buffers.caravel_clk,55.58
net2677,55.58
gpio_control_in_1\[5\].gpio_defaults\[9\],55.57
mgmt_buffers.la_data_in_mprj\[1\],55.565
net11047,55.565
_03974_,55.56
_07799_,55.56
soc.core.VexRiscv.RegFilePlugin_regFile\[19\]\[30\],55.56
soc.core.VexRiscv.RegFilePlugin_regFile\[25\]\[17\],55.56
_11499_,55.54
net7402,55.54
net10924,55.54
soc.core.mgmtsoc_litespisdrphycore_sr_out\[3\],55.53
_02635_,55.52
_04160_,55.52
soc.core.multiregimpl70_regs0,55.52
clknet_leaf_159_mgmt_buffers.caravel_clk,55.52
net4959,55.52
mprj_io_dm[73],55.51
_01301_,55.5
_13645_,55.5
soc.core.VexRiscv.RegFilePlugin_regFile\[10\]\[25\],55.5
soc.core.VexRiscv.RegFilePlugin_regFile\[14\]\[0\],55.5
_04365_,55.49
gpio_control_in_1a\[3\].shift_register\[11\],55.48
_04054_,55.46
net11261,55.46
_11489_,55.44
_09387_,55.435
net1041,55.43
_02074_,55.42
net327,55.42
clknet_leaf_1154_mgmt_buffers.caravel_clk,55.42
net7016,55.42
_11222_,55.4
soc.core.mgmtsoc_bus_errors\[17\],55.4
gpio_control_in_2\[2\].gpio_defaults\[5\],55.39
net5262,55.385
clknet_leaf_1100_mgmt_buffers.caravel_clk,55.38
net11356,55.38
soc.core.VexRiscv.RegFilePlugin_regFile\[26\]\[23\],55.37
net9575,55.365
net11642,55.365
_11192_,55.36
net12389,55.36
net12779,55.36
gpio_control_in_1\[1\].gpio_defaults\[4\],55.35
_01917_,55.34
_02975_,55.34
_03510_,55.34
_11241_,55.34
soc.core.VexRiscv.RegFilePlugin_regFile\[2\]\[7\],55.34
soc.core.multiregimpl119_regs0,55.34
clknet_leaf_880_mgmt_buffers.caravel_clk,55.34
net6268,55.34
_00200_,55.32
_14243_,55.32
gpio_control_in_1\[1\].pad_gpio_out,55.32
mprj_io_dm[75],55.31
net11282,55.305
_09207_,55.3
_09733_,55.3
_14869_,55.3
soc.core.VexRiscv.IBusCachedPlugin_cache._zz_fetchStage_read_waysValues_0_tag_valid_2\[27\],55.3
net8469,55.3
net10917,55.3
net12932,55.3
soc.core.VexRiscv.RegFilePlugin_regFile\[6\]\[17\],55.28
clknet_leaf_710_mgmt_buffers.caravel_clk,55.28
_09682_,55.245
soc.core.dbg_uart_address\[10\],55.24
net3138,55.225
gpio_control_in_2\[8\].gpio_defaults\[12\],55.22
_07269_,55.205
soc.core.VexRiscv.RegFilePlugin_regFile\[2\]\[31\],55.2
soc.core.VexRiscv.RegFilePlugin_regFile\[5\]\[18\],55.2
soc.core.uart_phy_tx_count\[1\],55.2
clknet_leaf_216_mgmt_buffers.caravel_clk,55.2
net7308,55.2
_09202_,55.18
_11514_,55.18
_12801_,55.18
_14393_,55.18
soc.core.dbg_uart_tx_phase\[11\],55.18
clknet_leaf_123_mgmt_buffers.caravel_clk,55.18
net2606,55.18
soc.core.VexRiscv.RegFilePlugin_regFile\[10\]\[9\],55.16
net3763,55.16
net12789,55.16
net2667,55.16
_13035_,55.15
soc.core.VexRiscv.RegFilePlugin_regFile\[16\]\[31\],55.14
net11516,55.14
gpio_control_in_1\[0\].gpio_defaults\[4\],55.13
soc.core.uart_rx_fifo_level0\[2\],55.12
net9812,55.12
_07164_,55.1
_14276_,55.1
net10092,55.1
net12595,55.1
mgmt_buffers.la_data_in_mprj\[89\],55.095
_04526_,55.08
_06824_,55.08
_07078_,55.08
net6178,55.08
gpio_control_in_1\[1\].gpio_defaults\[6\],55.07
_12783_,55.06
net9805,55.06
soc.core.VexRiscv.RegFilePlugin_regFile\[27\]\[31\],55.04
net9258,55.04
_09330_,55.03
soc.core.VexRiscv.RegFilePlugin_regFile\[8\]\[24\],55.02
soc.core.storage\[15\]\[7\],55.02
_09653_,55.005
soc.core.VexRiscv.IBusCachedPlugin_cache.io_cpu_prefetch_pc\[19\],55
soc.core.VexRiscv.RegFilePlugin_regFile\[11\]\[26\],55
clknet_leaf_1036_mgmt_buffers.caravel_clk,55
_03752_,54.99
_12391_,54.99
gpio_control_in_2\[7\].gpio_defaults\[7\],54.99
net11650,54.985
net11076,54.98
net12922,54.98
_04345_,54.96
_12923_,54.96
_14169_,54.96
soc.core.mgmtsoc_litespisdrphycore_dq_o,54.96
soc.core.multiregimpl130_regs0,54.96
_00281_,54.94
_00748_,54.94
_03998_,54.94
_04124_,54.94
_11107_,54.94
_11594_,54.94
gpio_control_in_1\[3\].shift_register\[3\],54.94
soc.core.mgmtsoc_master_tx_fifo_source_payload_data\[13\],54.94
_09141_,54.92
_14056_,54.92
soc.core.VexRiscv.IBusCachedPlugin_cache.io_cpu_fetch_mmuRsp_physicalAddress\[14\],54.92
clknet_leaf_214_mgmt_buffers.caravel_clk,54.92
clknet_leaf_528_mgmt_buffers.caravel_clk,54.92
net4090,54.92
net5065,54.92
_01827_,54.9
_11601_,54.9
_11665_,54.9
soc.core.VexRiscv.RegFilePlugin_regFile\[30\]\[2\],54.9
net9028,54.9
_14307_,54.89
_02844_,54.88
mprj_io_dm[16],54.87
mprj_io_dm[67],54.87
mgmt_buffers.la_data_in_mprj\[68\],54.865
_08620_,54.86
_12200_,54.86
net11395,54.86
_04350_,54.84
_07045_,54.84
soc.core.memdat_1\[1\],54.84
soc.core.dbg_uart_rx_phase\[5\],54.83
_02771_,54.82
mprj_io_dm[15],54.81
mgmt_buffers.la_data_in_mprj\[97\],54.805
_03964_,54.8
_06354_,54.8
_06382_,54.8
gpio_control_in_1\[0\].shift_register\[8\],54.8
net3170,54.8
net4084,54.79
mgmt_buffers.la_data_in_mprj\[112\],54.785
_13696_,54.78
_09996_,54.76
pll.ringosc.dstage\[7\].id.ts,54.76
net4859,54.76
gpio_control_in_1a\[4\].gpio_defaults\[5\],54.75
mprj_io_oeb[1],54.75
net6601,54.745
_11644_,54.74
_12622_,54.74
_13281_,54.74
net10919,54.74
net12606,54.74
_13051_,54.735
gpio_control_in_1a\[1\].gpio_defaults\[6\],54.73
_03409_,54.72
_10337_,54.72
_11391_,54.72
soc.core.VexRiscv.RegFilePlugin_regFile\[26\]\[1\],54.72
gpio_control_in_2\[8\].gpio_defaults\[7\],54.71
user_io_oeb\[17\],54.71
_06189_,54.7
_06670_,54.7
gpio_control_in_1a\[4\].pad_gpio_out,54.7
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[9\]\[10\],54.7
soc.core.VexRiscv.RegFilePlugin_regFile\[18\]\[8\],54.7
net2922,54.7
net5489,54.7
net9773,54.7
gpio_control_bidir_1\[0\].shift_register\[10\],54.68
mprj_io_dm[24],54.67
_04765_,54.66
_05452_,54.66
soc.core.mgmtsoc_master_tx_fifo_source_payload_data\[1\],54.66
net5615,54.66
_01462_,54.64
_03590_,54.64
_11643_,54.64
mgmt_buffers.la_data_in_mprj\[107\],54.635
clknet_leaf_211_mgmt_buffers.caravel_clk,54.63
soc.core.VexRiscv.RegFilePlugin_regFile\[26\]\[0\],54.62
soc.core.VexRiscv.RegFilePlugin_regFile\[5\]\[25\],54.62
net323,54.62
clknet_leaf_722_mgmt_buffers.caravel_clk,54.62
_01160_,54.6
_12459_,54.6
_04326_,54.58
mprj_io_dm[76],54.57
_09180_,54.56
soc.core.VexRiscv.RegFilePlugin_regFile\[29\]\[9\],54.56
soc.core.VexRiscv.RegFilePlugin_regFile\[3\]\[27\],54.56
net6970,54.56
net10042,54.56
_02637_,54.54
_14328_,54.54
soc.core.VexRiscv.RegFilePlugin_regFile\[4\]\[30\],54.54
net4595,54.54
soc.core.VexRiscv.RegFilePlugin_regFile\[20\]\[11\],54.52
_00928_,54.5
net11105,54.5
_13468_,54.49
_07254_,54.485
_07667_,54.48
_08367_,54.48
_09337_,54.48
_12544_,54.48
_14047_,54.48
clknet_leaf_946_mgmt_buffers.caravel_clk,54.48
net5263,54.48
_09099_,54.46
_10230_,54.46
clknet_leaf_931_mgmt_buffers.caravel_clk,54.46
_06928_,54.455
gpio_control_in_2\[1\].shift_register\[4\],54.455
mprj_io_holdover[26],54.45
net11128,54.445
_00124_,54.44
_07141_,54.44
net147,54.44
net12255,54.42
_09203_,54.4
_13114_,54.4
soc.core.VexRiscv.RegFilePlugin_regFile\[14\]\[19\],54.4
net4017,54.385
_01813_,54.38
_13457_,54.38
clknet_leaf_842_mgmt_buffers.caravel_clk,54.38
soc.core.VexRiscv.RegFilePlugin_regFile\[24\]\[30\],54.36
net10944,54.36
_03065_,54.34
_13613_,54.34
_14052_,54.34
gpio_control_in_1\[5\].shift_register\[8\],54.34
soc.core.VexRiscv.RegFilePlugin_regFile\[31\]\[21\],54.34
net8361,54.34
_03100_,54.33
_02988_,54.32
_07757_,54.32
gpio_control_in_2\[8\].shift_register\[4\],54.32
clknet_leaf_338_mgmt_buffers.caravel_clk,54.32
net7835,54.32
clknet_leaf_699_mgmt_buffers.caravel_clk,54.3
clknet_leaf_795_mgmt_buffers.caravel_clk,54.3
net3158,54.3
_08220_,54.295
gpio_control_in_2\[2\].gpio_defaults\[7\],54.29
_07168_,54.28
soc.core.VexRiscv.RegFilePlugin_regFile\[20\]\[1\],54.28
soc.core.interface0_bank_bus_dat_r\[4\],54.28
clknet_leaf_673_mgmt_buffers.caravel_clk,54.28
_08488_,54.265
soc.core.VexRiscv.RegFilePlugin_regFile\[14\]\[14\],54.26
soc.core.VexRiscv.RegFilePlugin_regFile\[20\]\[13\],54.26
net3884,54.245
_07132_,54.24
net134,54.24
net11723,54.24
_08137_,54.22
net8282,54.22
net1182,54.21
soc.core.VexRiscv.RegFilePlugin_regFile\[31\]\[29\],54.2
net10927,54.2
_12583_,54.18
gpio_control_in_1a\[2\].shift_register\[9\],54.18
net11372,54.18
_03155_,54.16
_04309_,54.16
_14709_,54.16
soc.core.VexRiscv.RegFilePlugin_regFile\[21\]\[30\],54.16
net4192,54.16
_10075_,54.14
_13748_,54.14
gpio_control_in_1\[5\].shift_register\[3\],54.14
net2976,54.14
net11115,54.14
mprj_io_dm[32],54.13
net9485,54.12
_07727_,54.1
mgmt_buffers.la_data_in_mprj_bar\[5\],54.1
pll.pll_control.count1\[3\],54.1
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[14\]\[10\],54.1
clknet_leaf_421_mgmt_buffers.caravel_clk,54.1
net9299,54.1
net2666,54.1
_12132_,54.08
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[7\]\[16\],54.08
net375,54.08
net4905,54.08
_09222_,54.06
soc.core.VexRiscv._zz_execute_to_memory_REGFILE_WRITE_DATA\[14\],54.06
soc.core.dbg_uart_rx_phase\[6\],54.06
gpio_control_in_1\[2\].gpio_defaults\[1\],54.05
mprj_io_dm[51],54.05
mgmt_buffers.la_data_in_mprj_bar\[115\],54.04
soc.core.VexRiscv.RegFilePlugin_regFile\[29\]\[16\],54.04
_03657_,54.02
_12130_,54.02
_14730_,54.02
net4605,54.005
_04361_,54
gpio_control_in_2\[0\].pad_gpio_out,54
clknet_leaf_921_mgmt_buffers.caravel_clk,54
net9930,54
_08754_,53.985
_04331_,53.98
_04777_,53.97
_05126_,53.97
gpio_control_bidir_2\[0\].shift_register\[2\],53.96
soc.core.VexRiscv.RegFilePlugin_regFile\[0\]\[8\],53.96
net6966,53.96
net9241,53.96
_08651_,53.94
soc.core.VexRiscv.IBusCachedPlugin_cache._zz_banks_0_port1\[1\],53.94
clknet_leaf_142_mgmt_buffers.caravel_clk,53.94
clknet_leaf_1112_mgmt_buffers.caravel_clk,53.94
net11263,53.94
net12792,53.94
mprj_io_in[0],53.93
_03602_,53.92
_11927_,53.92
soc.core.storage_1\[13\]\[4\],53.92
net11046,53.92
gpio_control_in_1a\[4\].gpio_defaults\[7\],53.91
_07243_,53.905
_05037_,53.9
gpio_control_bidir_2\[1\].shift_register\[9\],53.9
net10605,53.895
soc.core.VexRiscv.decode_to_execute_RS1\[0\],53.88
net3634,53.88
net11307,53.88
_04397_,53.86
_06339_,53.86
net10428,53.86
net12130,53.86
mprj_io_dm[52],53.85
_06941_,53.84
_08138_,53.84
_11487_,53.84
_04353_,53.82
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[12\]\[11\],53.82
soc.core.VexRiscv.RegFilePlugin_regFile\[4\]\[23\],53.82
net5940,53.82
_08784_,53.8
gpio_control_in_2\[4\].shift_register\[5\],53.8
soc.core.VexRiscv.RegFilePlugin_regFile\[8\]\[20\],53.8
clknet_leaf_781_mgmt_buffers.caravel_clk,53.8
net3616,53.8
net4416,53.8
_08145_,53.785
gpio_control_in_1\[5\].gpio_vtrip_sel,53.78
soc.core.VexRiscv.RegFilePlugin_regFile\[14\]\[10\],53.78
net3754,53.78
net11511,53.78
gpio_control_in_2\[4\].gpio_defaults\[8\],53.77
_02472_,53.76
_06593_,53.76
net7452,53.76
_09988_,53.74
soc.core.VexRiscv.DBusSimplePlugin_memoryExceptionPort_payload_badAddr\[12\],53.74
soc.core.VexRiscv.RegFilePlugin_regFile\[5\]\[16\],53.74
net11259,53.74
net12738,53.74
net12742,53.74
gpio_control_in_1a\[2\].gpio_defaults\[4\],53.73
_00911_,53.72
_01951_,53.72
soc.core.VexRiscv.IBusCachedPlugin_cache.lineLoader_address\[9\],53.72
soc.core.uart_phy_rx_phase\[6\],53.72
_10213_,53.7
_11959_,53.7
soc.core.VexRiscv.IBusCachedPlugin_cache.decodeStage_mmuRsp_physicalAddress\[6\],53.7
net9758,53.7
soc.core.VexRiscv.RegFilePlugin_regFile\[25\]\[10\],53.695
gpio_control_in_2\[2\].gpio_defaults\[8\],53.69
_06665_,53.68
_11983_,53.68
_13282_,53.68
_13631_,53.68
soc.core.VexRiscv.RegFilePlugin_regFile\[9\]\[20\],53.68
gpio_control_in_2\[7\].gpio_defaults\[6\],53.67
_04498_,53.66
_07162_,53.66
_08218_,53.66
_08662_,53.66
mgmt_buffers.la_data_in_mprj\[0\],53.66
soc.core.VexRiscv.RegFilePlugin_regFile\[2\]\[26\],53.66
clknet_leaf_217_mgmt_buffers.caravel_clk,53.66
clknet_leaf_749_mgmt_buffers.caravel_clk,53.66
clknet_leaf_797_mgmt_buffers.caravel_clk,53.66
net8882,53.66
_02338_,53.64
net10400,53.64
_02657_,53.62
_04815_,53.62
_13927_,53.62
mgmt_buffers.la_data_in_mprj_bar\[4\],53.62
clknet_leaf_1119_mgmt_buffers.caravel_clk,53.62
_03051_,53.6
_14671_,53.6
net151,53.6
net5008,53.6
_03952_,53.58
_09376_,53.58
_12332_,53.58
net12923,53.58
_04806_,53.56
_10569_,53.56
_14722_,53.56
soc.core.interface10_bank_bus_dat_r\[5\],53.56
soc.core.storage_1\[1\]\[6\],53.56
_10416_,53.55
_03339_,53.54
_07161_,53.54
soc.core.la_ien_storage\[77\],53.54
clknet_leaf_544_mgmt_buffers.caravel_clk,53.54
gpio_control_in_1a\[0\].gpio_defaults\[11\],53.53
_01923_,53.52
_02352_,53.52
_13711_,53.52
net6938,53.52
net9610,53.52
net12537,53.52
gpio_control_in_1\[3\].gpio_defaults\[6\],53.51
mgmt_buffers.mprj_logic1\[342\],53.51
net11016,53.505
_11563_,53.5
gpio_control_in_1\[0\].resetn,53.5
net9023,53.5
_02183_,53.48
_06856_,53.48
_12111_,53.48
net2908,53.48
_09357_,53.46
soc.core.mgmtsoc_master_tx_fifo_source_payload_data\[10\],53.46
clknet_leaf_335_mgmt_buffers.caravel_clk,53.46
net12926,53.46
_14273_,53.45
net3749,53.44
_04199_,53.42
gpio_control_in_2\[4\].shift_register\[6\],53.42
soc.core.VexRiscv.RegFilePlugin_regFile\[30\]\[20\],53.42
soc.core.mgmtsoc_master_tx_fifo_source_payload_data\[3\],53.42
_00127_,53.4
soc.core.VexRiscv.RegFilePlugin_regFile\[19\]\[14\],53.4
net5323,53.4
soc.core.mgmtsoc_value\[4\],53.39
net11886,53.39
_13926_,53.38
soc.core.VexRiscv.RegFilePlugin_regFile\[23\]\[16\],53.38
net4100,53.38
net11932,53.38
soc.core.VexRiscv.RegFilePlugin_regFile\[10\]\[14\],53.36
soc.core.VexRiscv.RegFilePlugin_regFile\[23\]\[21\],53.36
_02886_,53.34
soc.core.VexRiscv.RegFilePlugin_regFile\[12\]\[14\],53.34
soc.core.spi_master_cs_storage\[10\],53.34
net11997,53.34
_03857_,53.335
soc.core.flash_cs_n,53.33
_01946_,53.32
_06668_,53.32
_14970_,53.32
net6355,53.29
_00179_,53.28
_02066_,53.28
_03304_,53.28
_08432_,53.265
_04412_,53.26
_04740_,53.26
_06506_,53.26
_11750_,53.26
_10102_,53.245
_06380_,53.24
_07670_,53.24
clknet_leaf_407_mgmt_buffers.caravel_clk,53.24
clknet_leaf_741_mgmt_buffers.caravel_clk,53.24
net4851,53.24
net13194,53.24
mprj_io_dm[77],53.23
_14829_,53.22
net213,53.22
mprj_io_dm[63],53.21
user_io_oeb\[15\],53.21
_08222_,53.205
_06516_,53.2
soc.core.uart_rx_fifo_produce\[1\],53.2
net12921,53.2
_04366_,53.18
_13198_,53.18
clknet_leaf_94_mgmt_buffers.caravel_clk,53.18
net10939,53.18
_10397_,53.16
soc.core.mgmtsoc_value\[29\],53.16
net11597,53.16
_08056_,53.14
_09241_,53.14
_13835_,53.14
_12699_,53.12
_13500_,53.12
pll.itrim\[17\],53.12
net5057,53.12
mgmt_buffers.la_data_in_mprj_bar\[106\],53.1
soc.core.dbg_uart_data\[18\],53.1
net10041,53.1
net9142,53.085
_00350_,53.08
soc.core.VexRiscv.RegFilePlugin_regFile\[13\]\[16\],53.08
soc.core.VexRiscv.RegFilePlugin_regFile\[18\]\[14\],53.08
soc.core.VexRiscv.RegFilePlugin_regFile\[7\]\[20\],53.08
clknet_leaf_320_mgmt_buffers.caravel_clk,53.08
net5805,53.08
gpio_control_in_2\[9\].gpio_defaults\[6\],53.07
net6231,53.065
_03393_,53.06
_04040_,53.06
_11933_,53.06
_12624_,53.06
net11227,53.045
_14816_,53.04
gpio_control_in_2\[2\].shift_register\[3\],53.04
net3970,53.04
net6904,53.04
net9843,53.04
mprj_io_dm[60],53.03
_06653_,53.02
soc.core.VexRiscv.RegFilePlugin_regFile\[26\]\[18\],53.02
soc.core.VexRiscv.decode_to_execute_RS1\[15\],53.02
net8192,53.02
_10941_,53.01
_09641_,53.005
_01835_,53
_10467_,53
_14575_,53
clknet_leaf_1052_mgmt_buffers.caravel_clk,53
clknet_leaf_1039_mgmt_buffers.caravel_clk,52.995
mgmt_buffers.la_data_in_mprj\[9\],52.98
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[15\]\[2\],52.98
soc.core.VexRiscv.RegFilePlugin_regFile\[4\]\[2\],52.98
soc.core.spi_master_mosi_storage\[0\],52.98
net10922,52.965
_08566_,52.96
soc.core.VexRiscv.RegFilePlugin_regFile\[18\]\[17\],52.96
clknet_leaf_492_mgmt_buffers.caravel_clk,52.96
net11256,52.945
_09662_,52.94
_14450_,52.94
_07229_,52.935
_14049_,52.92
_01063_,52.9
_01573_,52.9
_06371_,52.9
gpio_control_in_2\[8\].mgmt_ena,52.9
net4165,52.9
_12684_,52.88
_13935_,52.88
net12078,52.88
_04824_,52.86
_07137_,52.86
soc.core.VexRiscv.RegFilePlugin_regFile\[4\]\[20\],52.86
_02584_,52.84
_03386_,52.84
net12798,52.84
net12909,52.84
gpio_control_in_1a\[1\].gpio_defaults\[3\],52.83
_03196_,52.82
soc.core.dbg_uart_rx_phase\[29\],52.82
_13704_,52.8
soc.core.VexRiscv.RegFilePlugin_regFile\[7\]\[10\],52.8
soc.core.interface10_bank_bus_dat_r\[7\],52.8
_04166_,52.78
_14033_,52.78
soc.core.VexRiscv.RegFilePlugin_regFile\[26\]\[16\],52.78
soc.core.mgmtsoc_bus_errors\[27\],52.78
clknet_leaf_285_mgmt_buffers.caravel_clk,52.78
net11855,52.78
_01943_,52.76
soc.core.dbg_uart_rx_count\[2\],52.76
soc.core.dbg_uart_rx_phase\[20\],52.76
net5071,52.76
_03894_,52.74
_05084_,52.74
_10024_,52.74
_10929_,52.74
_12333_,52.74
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[13\]\[4\],52.74
soc.core.VexRiscv.RegFilePlugin_regFile\[5\]\[28\],52.74
net9636,52.74
_04847_,52.72
_07365_,52.72
_03291_,52.715
gpio_control_in_2\[9\].gpio_defaults\[10\],52.71
_09630_,52.7
_12791_,52.7
net12417,52.7
_12618_,52.68
soc.core.RAM256.Do0_pre\[1\]\[18\],52.68
clknet_leaf_1138_mgmt_buffers.caravel_clk,52.68
net3501,52.68
_04302_,52.66
_04319_,52.66
_09342_,52.66
_14064_,52.66
soc.core.VexRiscv.RegFilePlugin_regFile\[6\]\[25\],52.66
soc.core.VexRiscv.RegFilePlugin_regFile\[9\]\[18\],52.66
clknet_leaf_497_mgmt_buffers.caravel_clk,52.66
net9186,52.66
net12134,52.66
_07593_,52.645
_02518_,52.64
mgmt_buffers.la_data_in_mprj_bar\[14\],52.64
soc.core.VexRiscv.RegFilePlugin_regFile\[0\]\[30\],52.64
net341,52.64
_12175_,52.62
_13678_,52.62
gpio_control_in_1a\[3\].pad_gpio_out,52.62
gpio_control_in_2\[6\].gpio_ana_pol,52.62
net2888,52.62
mgmt_buffers.la_data_in_mprj\[8\],52.605
_07147_,52.6
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[13\]\[11\],52.6
net7563,52.6
soc.core.VexRiscv.RegFilePlugin_regFile\[9\]\[10\],52.59
_04142_,52.58
_04381_,52.58
_06674_,52.58
_10890_,52.58
gpio_control_in_2\[6\].shift_register\[8\],52.58
clknet_leaf_390_mgmt_buffers.caravel_clk,52.58
clknet_leaf_701_mgmt_buffers.caravel_clk,52.58
net3711,52.58
net10958,52.58
net12908,52.58
mprj_io_out[11],52.57
_02677_,52.56
soc.core.VexRiscv.RegFilePlugin_regFile\[10\]\[10\],52.56
soc.core.VexRiscv.RegFilePlugin_regFile\[27\]\[18\],52.56
gpio_control_in_1\[4\].gpio_defaults\[4\],52.55
_06216_,52.54
_12782_,52.54
_14145_,52.54
gpio_control_in_2\[7\].shift_register\[11\],52.54
soc.core.VexRiscv.RegFilePlugin_regFile\[16\]\[8\],52.54
soc.core.interface10_bank_bus_dat_r\[1\],52.54
net12296,52.54
_12576_,52.52
clknet_leaf_134_mgmt_buffers.caravel_clk,52.52
_00661_,52.5
_11154_,52.5
_11228_,52.5
net129,52.5
net11297,52.5
_08354_,52.485
_11481_,52.48
_12160_,52.48
soc.core.VexRiscv._zz_RegFilePlugin_regFile_port1\[11\],52.48
soc.core.storage_1\[12\]\[5\],52.48
net8009,52.48
_14230_,52.455
_03303_,52.44
_08260_,52.44
soc.core.interface0_bank_bus_dat_r\[3\],52.44
soc.core.la_ien_storage\[94\],52.44
clknet_leaf_600_mgmt_buffers.caravel_clk,52.44
net3006,52.44
_02761_,52.42
net11559,52.42
soc.core.VexRiscv.RegFilePlugin_regFile\[1\]\[14\],52.415
_00018_,52.4
_05046_,52.4
_06900_,52.4
soc.core.VexRiscv.dBusWishbone_DAT_MISO\[29\],52.4
soc.core.storage_1\[5\]\[7\],52.4
net12121,52.4
_00534_,52.38
_03131_,52.38
_07402_,52.38
_07725_,52.38
gpio_control_in_2\[3\].gpio_defaults\[11\],52.38
soc.core.VexRiscv.RegFilePlugin_regFile\[25\]\[4\],52.38
soc.core.spi_master_control_storage\[12\],52.38
_02599_,52.37
_04860_,52.37
_01588_,52.36
clknet_leaf_652_mgmt_buffers.caravel_clk,52.36
_02296_,52.34
_02437_,52.34
_04877_,52.34
soc.core.mgmtsoc_master_tx_fifo_source_payload_data\[20\],52.34
mprj_io_dm[27],52.33
_07282_,52.325
_00282_,52.32
_04188_,52.32
_14710_,52.32
mgmt_buffers.mprj_logic1\[26\],52.32
soc.core.interface10_bank_bus_dat_r\[3\],52.32
net2814,52.32
_08619_,52.305
_03173_,52.3
_11437_,52.3
_11956_,52.3
soc.core.VexRiscv.RegFilePlugin_regFile\[2\]\[25\],52.3
soc.core.interface6_bank_bus_dat_r\[19\],52.3
net12439,52.3
_07144_,52.28
_14417_,52.28
net11661,52.28
_00538_,52.26
_03178_,52.26
_11456_,52.26
_13947_,52.26
mgmt_buffers.la_data_in_mprj_bar\[122\],52.26
soc.core.VexRiscv.memory_to_writeBack_REGFILE_WRITE_DATA\[20\],52.26
_10750_,52.245
mgmt_buffers.la_data_in_mprj\[122\],52.245
_03968_,52.24
_14506_,52.24
gpio_control_in_1\[4\].pad_gpio_out,52.24
soc.core.VexRiscv.RegFilePlugin_regFile\[30\]\[10\],52.24
clknet_leaf_734_mgmt_buffers.caravel_clk,52.24
net5298,52.24
net9451,52.24
_00859_,52.22
_11652_,52.22
soc.core.VexRiscv.RegFilePlugin_regFile\[13\]\[3\],52.22
soc.core.VexRiscv.RegFilePlugin_regFile\[24\]\[28\],52.22
net4335,52.22
net13180,52.22
mprj_io_out[23],52.21
net10494,52.21
_11403_,52.2
gpio_control_in_2\[1\].shift_register\[7\],52.2
mgmt_buffers.la_data_in_mprj_bar\[116\],52.2
net322,52.2
_02157_,52.18
soc.core.mgmtsoc_vexriscv_debug_bus_dat_r\[7\],52.18
_04386_,52.16
_13884_,52.16
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[6\]\[5\],52.16
clknet_leaf_677_mgmt_buffers.caravel_clk,52.16
_00180_,52.14
_05022_,52.14
_14775_,52.14
gpio_control_bidir_2\[0\].pad_gpio_outenb,52.14
_04549_,52.12
_09348_,52.12
soc.core.multiregimpl53_regs0,52.12
_09181_,52.085
_03909_,52.08
_09722_,52.08
net11061,52.08
soc.core.VexRiscv.RegFilePlugin_regFile\[19\]\[19\],52.07
_10869_,52.06
_12545_,52.06
soc.core.VexRiscv._zz_execute_to_memory_REGFILE_WRITE_DATA\[11\],52.06
net11147,52.06
_08144_,52.045
net4088,52.045
_13805_,52.04
mprj_io_out[8],52.03
_00054_,52.02
mgmt_buffers.la_data_in_mprj_bar\[89\],52.02
soc.core.VexRiscv.debug_bus_rsp_data\[0\],52.02
net5240,52.005
gpio_control_bidir_2\[0\].resetn,52
gpio_control_in_2\[9\].shift_register\[5\],52
_09424_,51.995
soc.core.VexRiscv.RegFilePlugin_regFile\[0\]\[23\],51.98
soc.core.VexRiscv.RegFilePlugin_regFile\[18\]\[31\],51.98
clknet_leaf_541_mgmt_buffers.caravel_clk,51.98
net6588,51.98
_06633_,51.96
pll.itrim\[12\],51.96
net4242,51.96
_03630_,51.94
soc.core.interface0_bank_bus_dat_r\[17\],51.94
net11348,51.94
net7310,51.905
_03557_,51.9
_14758_,51.9
soc.core.VexRiscv._zz_execute_to_memory_REGFILE_WRITE_DATA\[8\],51.9
net154,51.9
net3391,51.9
clknet_leaf_785_mgmt_buffers.caravel_clk,51.88
net7040,51.88
net11085,51.88
_03859_,51.87
net3160,51.865
_03122_,51.86
_03189_,51.86
_04367_,51.86
_11334_,51.86
soc.core.VexRiscv.RegFilePlugin_regFile\[28\]\[4\],51.86
soc.core.multiregimpl111_regs0,51.86
clknet_leaf_1126_mgmt_buffers.caravel_clk,51.86
net12576,51.86
_10105_,51.84
_13957_,51.84
soc.core.VexRiscv.RegFilePlugin_regFile\[3\]\[10\],51.84
net3314,51.835
net5181,51.825
_14370_,51.82
soc.core.VexRiscv.CsrPlugin_mie_MSIE,51.82
clknet_leaf_1155_mgmt_buffers.caravel_clk,51.82
net12725,51.82
_05178_,51.81
_03199_,51.8
_06378_,51.8
_08118_,51.8
_10125_,51.795
_03285_,51.78
gpio_control_in_1\[3\].pad_gpio_out,51.78
soc.core.VexRiscv.RegFilePlugin_regFile\[28\]\[22\],51.78
soc.core.multiregimpl123_regs0,51.78
clknet_leaf_1013_mgmt_buffers.caravel_clk,51.78
_02718_,51.76
gpio_control_in_2\[9\].mgmt_ena,51.76
net5374,51.76
net11729,51.76
_02029_,51.74
_04416_,51.74
_04630_,51.74
_09321_,51.74
_14343_,51.74
gpio_control_bidir_1\[1\].shift_register\[5\],51.74
soc.core.VexRiscv.IBusCachedPlugin_fetchPc_booted,51.74
soc.core.VexRiscv.RegFilePlugin_regFile\[5\]\[30\],51.74
soc.core.dbg_uart_data\[0\],51.74
net6851,51.74
net8674,51.725
_00818_,51.72
_00852_,51.72
_14458_,51.72
soc.core.storage_1\[1\]\[7\],51.72
net9236,51.72
gpio_control_bidir_2\[1\].shift_register\[11\],51.7
net9003,51.7
net8377,51.695
_08486_,51.68
net9405,51.68
net11977,51.68
_05140_,51.67
mprj_io_dm[68],51.67
_04377_,51.66
_11545_,51.66
soc.core.VexRiscv.RegFilePlugin_regFile\[24\]\[26\],51.66
soc.core.mgmtsoc_reload_storage\[26\],51.66
_10004_,51.64
gpio_control_in_2\[7\].shift_register\[6\],51.64
net11458,51.64
mgmt_buffers.la_data_in_mprj\[20\],51.625
_04363_,51.62
_14959_,51.62
clknet_leaf_1122_mgmt_buffers.caravel_clk,51.62
net13187,51.62
_00983_,51.6
_07138_,51.6
_12293_,51.6
_12960_,51.6
soc.core.VexRiscv.RegFilePlugin_regFile\[11\]\[10\],51.6
clknet_leaf_694_mgmt_buffers.caravel_clk,51.6
_00972_,51.58
_01268_,51.58
pll.ext_trim\[15\],51.58
soc.core.VexRiscv.RegFilePlugin_regFile\[7\]\[24\],51.58
clknet_leaf_1204_mgmt_buffers.caravel_clk,51.58
net5487,51.58
_14327_,51.57
_03930_,51.56
_10602_,51.56
_11685_,51.56
_12134_,51.56
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[5\]\[24\],51.56
soc.core.mgmtsoc_master_tx_fifo_source_payload_data\[19\],51.56
net6510,51.56
net9790,51.56
_02656_,51.54
_04486_,51.54
_12197_,51.54
net4812,51.525
_12694_,51.52
_14250_,51.52
net3898,51.52
net12786,51.52
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[14\]\[17\],51.5
soc.core.VexRiscv.RegFilePlugin_regFile\[2\]\[27\],51.5
soc.core.interface3_bank_bus_dat_r\[25\],51.5
clknet_leaf_154_mgmt_buffers.caravel_clk,51.5
_12195_,51.48
_13414_,51.48
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[5\]\[5\],51.48
soc.core.VexRiscv.RegFilePlugin_regFile\[13\]\[30\],51.48
soc.core.VexRiscv.RegFilePlugin_regFile\[14\]\[7\],51.48
clknet_leaf_221_mgmt_buffers.caravel_clk,51.48
_02634_,51.47
_03230_,51.46
_09327_,51.46
_14610_,51.46
soc.core.spi_master_control_storage\[15\],51.46
net7022,51.46
_03118_,51.44
_10279_,51.44
soc.core.VexRiscv.RegFilePlugin_regFile\[17\]\[8\],51.44
net11614,51.44
_02254_,51.42
_03887_,51.42
soc.core.VexRiscv.IBusCachedPlugin_cache.io_cpu_decode_data\[4\],51.42
soc.core.VexRiscv.RegFilePlugin_regFile\[7\]\[1\],51.42
clknet_leaf_549_mgmt_buffers.caravel_clk,51.42
_07276_,51.405
_13767_,51.4
_14538_,51.4
_14647_,51.4
soc.core.mgmtsoc_litespimmap_storage\[6\],51.4
net12179,51.4
_02036_,51.38
_03098_,51.38
_04837_,51.38
_13562_,51.38
net8263,51.38
net9754,51.38
_03464_,51.36
_04300_,51.36
_11751_,51.36
_12119_,51.36
_14350_,51.36
net10835,51.36
_00470_,51.34
_01389_,51.34
_10503_,51.34
net4432,51.34
net12139,51.34
_09036_,51.33
_01211_,51.32
_11781_,51.32
_14297_,51.32
soc.core.VexRiscv.RegFilePlugin_regFile\[31\]\[23\],51.32
clknet_leaf_760_mgmt_buffers.caravel_clk,51.32
_08296_,51.305
pll.ext_trim\[24\],51.3
soc.core.storage\[6\]\[7\],51.3
_00708_,51.28
_02532_,51.28
_03917_,51.28
_04388_,51.28
_08589_,51.28
_12571_,51.28
soc.core.VexRiscv.RegFilePlugin_regFile\[13\]\[0\],51.28
soc.core.multiregimpl118_regs0,51.28
soc.core.uart_tx_fifo_produce\[3\],51.28
net338,51.28
_04373_,51.26
soc.core.VexRiscv.IBusCachedPlugin_cache.io_cpu_prefetch_pc\[21\],51.26
soc.core.VexRiscv.RegFilePlugin_regFile\[7\]\[17\],51.26
soc.core.VexRiscv.RegFilePlugin_regFile\[9\]\[9\],51.26
net10285,51.26
_03200_,51.24
net10568,51.24
net12370,51.24
gpio_control_in_1\[0\].gpio_defaults\[2\],51.23
_09870_,51.22
_10083_,51.22
_12566_,51.2
soc.core.VexRiscv.RegFilePlugin_regFile\[31\]\[1\],51.2
clknet_leaf_925_mgmt_buffers.caravel_clk,51.2
net9517,51.2
_12085_,51.185
_00878_,51.18
_04346_,51.18
_12585_,51.18
soc.core.multiregimpl76_regs1,51.18
clknet_leaf_368_mgmt_buffers.caravel_clk,51.18
net9719,51.175
_00276_,51.16
clknet_leaf_477_mgmt_buffers.caravel_clk,51.16
_13902_,51.145
net4336,51.145
_00296_,51.14
_07165_,51.14
soc.core.memdat_1\[3\],51.14
soc.core.mgmtsoc_litespisdrphycore_sr_cnt\[0\],51.12
soc.core.multiregimpl65_regs0,51.12
net5422,51.12
net5243,51.11
_04405_,51.1
_04990_,51.1
_06657_,51.1
_09385_,51.1
soc.core.VexRiscv.RegFilePlugin_regFile\[26\]\[28\],51.1
clknet_leaf_1025_mgmt_buffers.caravel_clk,51.1
_04197_,51.08
_09698_,51.08
gpio_control_bidir_1\[0\].shift_register\[2\],51.08
_06649_,51.06
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[5\]\[3\],51.06
soc.core.VexRiscv.RegFilePlugin_regFile\[5\]\[23\],51.06
clknet_leaf_289_mgmt_buffers.caravel_clk,51.06
net3394,51.06
net12120,51.06
soc.core.mgmtsoc_master_phyconfig_storage\[7\],51.04
soc.core.storage_1\[1\]\[2\],51.04
gpio_control_in_2\[7\].gpio_defaults\[12\],51.02
soc.core.VexRiscv.RegFilePlugin_regFile\[27\]\[29\],51.02
soc.core.mgmtsoc_scratch_storage\[12\],51.02
net10952,51.02
net10974,51.02
net5363,51.005
_01189_,51
_08654_,51
_12033_,51
clknet_leaf_536_mgmt_buffers.caravel_clk,51
_08397_,50.985
_00449_,50.98
_11496_,50.98
net11037,50.965
_00176_,50.96
_10606_,50.96
_10971_,50.96
_12879_,50.96
_10507_,50.955
_02663_,50.94
_06696_,50.94
soc.core.storage\[14\]\[7\],50.94
clknet_leaf_383_mgmt_buffers.caravel_clk,50.94
net5654,50.94
_08920_,50.925
net10264,50.92
_09704_,50.905
_11621_,50.9
_14223_,50.9
net3598,50.9
net11345,50.9
net12722,50.9
mprj_io_dm[56],50.89
net3517,50.885
_02014_,50.88
_02791_,50.88
_03086_,50.88
_06943_,50.88
soc.core.VexRiscv.RegFilePlugin_regFile\[19\]\[8\],50.88
soc.core.VexRiscv.memory_to_writeBack_REGFILE_WRITE_DATA\[21\],50.88
net6794,50.88
gpio_control_in_1a\[0\].gpio_defaults\[9\],50.87
_03559_,50.86
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[12\]\[6\],50.86
soc.core.VexRiscv._zz_execute_to_memory_REGFILE_WRITE_DATA\[17\],50.86
soc.core.VexRiscv._zz_execute_to_memory_REGFILE_WRITE_DATA\[9\],50.86
soc.core.multiregimpl61_regs0,50.86
net11558,50.86
soc.core.multiregimpl44_regs1,50.84
net7978,50.84
_07090_,50.83
net7505,50.825
_02483_,50.82
_03566_,50.82
_08212_,50.82
_12929_,50.82
_13922_,50.82
clknet_leaf_712_mgmt_buffers.caravel_clk,50.82
_00134_,50.8
_08370_,50.8
gpio_control_in_2\[8\].shift_register\[6\],50.8
soc.core.VexRiscv._zz_CsrPlugin_csrMapping_readDataInit\[18\],50.8
net3862,50.8
_00672_,50.78
gpio_control_in_1a\[2\].shift_register\[8\],50.78
clknet_leaf_845_mgmt_buffers.caravel_clk,50.78
net3981,50.78
gpio_control_in_1a\[5\].gpio_defaults\[3\],50.77
gpio_control_in_1a\[1\].shift_register\[7\],50.765
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[1\]\[16\],50.76
net3527,50.76
net9394,50.76
_10914_,50.74
_14110_,50.74
gpio_control_bidir_2\[0\].shift_register\[5\],50.74
clknet_leaf_1187_mgmt_buffers.caravel_clk,50.74
net6162,50.74
_07239_,50.725
_11394_,50.72
net4191,50.72
net8859,50.72
_02236_,50.7
_03002_,50.7
_10431_,50.7
gpio_control_in_1a\[5\].shift_register\[9\],50.7
soc.core.VexRiscv.RegFilePlugin_regFile\[17\]\[25\],50.7
soc.core.VexRiscv.RegFilePlugin_regFile\[30\]\[9\],50.7
soc.core.mgmtsoc_vexriscv_debug_bus_dat_r\[31\],50.7
clknet_leaf_1095_mgmt_buffers.caravel_clk,50.7
net9321,50.7
mprj_io_out[10],50.69
_00487_,50.68
_06472_,50.68
_12565_,50.68
gpio_control_in_2\[8\].shift_register\[7\],50.68
soc.core.VexRiscv.IBusCachedPlugin_cache.io_cpu_decode_data\[14\],50.68
net9294,50.68
_04382_,50.66
_13682_,50.66
soc.core.VexRiscv.RegFilePlugin_regFile\[20\]\[7\],50.66
net12009,50.66
_03121_,50.65
_04541_,50.65
gpio_control_in_1a\[5\].gpio_defaults\[9\],50.65
_09735_,50.64
soc.core.VexRiscv.RegFilePlugin_regFile\[30\]\[23\],50.64
net3054,50.64
_10409_,50.62
_11788_,50.62
gpio_control_bidir_2\[0\].shift_register\[7\],50.62
soc.core.VexRiscv.RegFilePlugin_regFile\[28\]\[16\],50.62
soc.core.VexRiscv.RegFilePlugin_regFile\[30\]\[31\],50.62
net11567,50.62
net12269,50.62
net10239,50.61
_10033_,50.605
_14940_,50.6
soc.core.VexRiscv.RegFilePlugin_regFile\[16\]\[29\],50.6
soc.core.VexRiscv.RegFilePlugin_regFile\[4\]\[31\],50.6
soc.core.mgmtsoc_bus_errors\[8\],50.6
net2923,50.6
gpio_control_in_1a\[0\].gpio_defaults\[5\],50.59
_10009_,50.58
net6019,50.575
_02984_,50.56
gpio_control_in_1\[2\].pad_gpio_out,50.56
soc.core.VexRiscv.RegFilePlugin_regFile\[17\]\[22\],50.56
soc.core.VexRiscv.RegFilePlugin_regFile\[26\]\[8\],50.56
_06282_,50.54
_07263_,50.525
_02895_,50.52
_03537_,50.52
_04453_,50.52
_06634_,50.52
soc.core.VexRiscv.RegFilePlugin_regFile\[18\]\[29\],50.52
soc.core.VexRiscv.RegFilePlugin_regFile\[5\]\[20\],50.52
soc.core.dbg_uart_address\[3\],50.52
net3836,50.52
_08295_,50.505
_01321_,50.5
gpio_control_in_1a\[1\].shift_register\[11\],50.5
net9732,50.485
_10331_,50.48
_11747_,50.48
soc.core.VexRiscv.RegFilePlugin_regFile\[4\]\[19\],50.48
_11574_,50.46
_13155_,50.46
_14687_,50.46
soc.core.VexRiscv.RegFilePlugin_regFile\[13\]\[19\],50.46
soc.core.VexRiscv.RegFilePlugin_regFile\[3\]\[23\],50.46
net131,50.46
net11710,50.46
net10920,50.445
_03990_,50.44
_14967_,50.44
gpio_control_in_1a\[4\].shift_register\[8\],50.44
net6712,50.44
_00098_,50.425
_04553_,50.42
_06281_,50.42
_13213_,50.42
soc.core.VexRiscv.RegFilePlugin_regFile\[22\]\[21\],50.42
_10981_,50.41
net3458,50.405
_14122_,50.4
net5722,50.4
net10026,50.4
net11001,50.4
mprj_io_holdover[13],50.39
net9984,50.38
_02030_,50.36
_14240_,50.36
soc.core.VexRiscv.RegFilePlugin_regFile\[1\]\[26\],50.36
soc.core.VexRiscv.RegFilePlugin_regFile\[1\]\[9\],50.36
clknet_leaf_641_mgmt_buffers.caravel_clk,50.36
clknet_leaf_990_mgmt_buffers.caravel_clk,50.36
_02173_,50.34
_02734_,50.34
_03839_,50.34
_09186_,50.34
net3092,50.34
net11964,50.34
gpio_control_in_1\[2\].resetn_out,50.33
net12375,50.325
_00667_,50.32
_12930_,50.32
_14203_,50.32
_14713_,50.32
clknet_leaf_2_mgmt_buffers.caravel_clk,50.32
soc.core.VexRiscv.RegFilePlugin_regFile\[16\]\[14\],50.32
net11198,50.315
_11108_,50.31
gpio_control_in_2\[8\].gpio_defaults\[5\],50.31
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[7\]\[31\],50.3
soc.core.VexRiscv.IBusCachedPlugin_cache.decodeStage_mmuRsp_physicalAddress\[20\],50.3
clknet_leaf_460_mgmt_buffers.caravel_clk,50.3
_07219_,50.285
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[9\]\[15\],50.28
clknet_leaf_906_mgmt_buffers.caravel_clk,50.28
net12392,50.28
soc.core.VexRiscv.RegFilePlugin_regFile\[12\]\[23\],50.27
_08742_,50.265
_09815_,50.26
net10950,50.26
_02255_,50.24
net4337,50.24
gpio_control_in_2\[3\].gpio_defaults\[8\],50.23
_02413_,50.22
_13023_,50.22
clknet_leaf_502_mgmt_buffers.caravel_clk,50.22
clknet_leaf_1026_mgmt_buffers.caravel_clk,50.22
net5873,50.22
net9252,50.22
net9162,50.205
gpio_control_bidir_2\[0\].shift_register\[9\],50.2
gpio_control_in_1\[0\].shift_register\[11\],50.2
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[3\]\[1\],50.2
net2960,50.2
_01843_,50.19
_10029_,50.185
_07130_,50.18
_09946_,50.18
soc.core.VexRiscv.RegFilePlugin_regFile\[8\]\[8\],50.18
net4275,50.18
net8936,50.18
net12090,50.18
_00593_,50.16
_01805_,50.16
_03453_,50.16
_03986_,50.16
_06983_,50.16
_14826_,50.16
soc.core.uart_rx_fifo_produce\[2\],50.15
net7403,50.145
_04509_,50.14
_09527_,50.14
net3817,50.14
net4982,50.14
net11239,50.14
gpio_control_in_1a\[1\].gpio_defaults\[12\],50.12
soc.core.VexRiscv.RegFilePlugin_regFile\[1\]\[29\],50.12
net3321,50.12
net10063,50.12
net11695,50.12
_00586_,50.1
_05628_,50.1
_09123_,50.1
soc.core.VexRiscv.RegFilePlugin_regFile\[21\]\[16\],50.1
soc.core.VexRiscv._zz_execute_to_memory_REGFILE_WRITE_DATA\[15\],50.1
_01834_,50.08
_04408_,50.08
_05150_,50.08
_10849_,50.08
soc.core.VexRiscv.RegFilePlugin_regFile\[27\]\[30\],50.08
net9789,50.065
_01099_,50.06
_02217_,50.06
_03110_,50.06
_04310_,50.06
_12398_,50.06
_14787_,50.06
_10937_,50.05
_02367_,50.04
_03306_,50.04
_12789_,50.04
soc.core.VexRiscv.RegFilePlugin_regFile\[2\]\[20\],50.04
net4652,50.04
_03256_,50.03
_11918_,50.02
soc.core.VexRiscv.RegFilePlugin_regFile\[16\]\[19\],50.02
soc.core.storage\[13\]\[1\],50.02
net9000,50.02
_08190_,50.005
_03043_,50
_09117_,50
_10572_,50
_10190_,49.985
_00942_,49.98
soc.core.storage_1\[13\]\[6\],49.98
net10284,49.98
gpio_control_in_2\[6\].gpio_defaults\[9\],49.97
_03220_,49.93
_06725_,49.92
_13485_,49.92
_12268_,49.9
gpio_control_in_2\[8\].shift_register\[2\],49.9
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[14\]\[30\],49.9
soc.core.VexRiscv.RegFilePlugin_regFile\[8\]\[11\],49.9
clknet_leaf_208_mgmt_buffers.caravel_clk,49.9
clknet_leaf_293_mgmt_buffers.caravel_clk,49.9
mprj_io_out[18],49.89
_08262_,49.885
_02894_,49.88
_10020_,49.88
gpio_control_in_1a\[5\].pad_gpio_out,49.88
net11117,49.88
_12928_,49.86
soc.core.VexRiscv.CsrPlugin_mtvec_base\[7\],49.86
net2839,49.86
net8905,49.86
gpio_control_in_2\[4\].gpio_defaults\[7\],49.85
_02647_,49.84
net7169,49.825
clknet_leaf_316_mgmt_buffers.caravel_clk,49.82
_08487_,49.805
_12926_,49.8
net292,49.8
_09654_,49.785
_10031_,49.785
_01786_,49.78
soc.core.VexRiscv.RegFilePlugin_regFile\[8\]\[31\],49.78
net10672,49.765
_00259_,49.76
_01036_,49.76
_10008_,49.76
_11329_,49.76
_11550_,49.76
net4661,49.76
net6204,49.76
_05088_,49.75
_02756_,49.74
_03005_,49.74
_07363_,49.74
_08931_,49.74
soc.core.VexRiscv.BranchPlugin_branchExceptionPort_payload_badAddr\[22\],49.74
net12026,49.74
net12720,49.74
_08234_,49.735
net11066,49.725
soc.core.VexRiscv.RegFilePlugin_regFile\[13\]\[21\],49.72
net10606,49.72
soc.core.VexRiscv.RegFilePlugin_regFile\[25\]\[25\],49.7
mprj_io_out[21],49.69
_00496_,49.68
_09899_,49.68
_10407_,49.68
soc.core.VexRiscv.RegFilePlugin_regFile\[0\]\[18\],49.68
soc.core.VexRiscv.RegFilePlugin_regFile\[22\]\[7\],49.68
soc.core.VexRiscv.RegFilePlugin_regFile\[30\]\[1\],49.68
soc.core.uart_phy_rx_data\[1\],49.68
net3040,49.68
net6790,49.68
mprj_io_dm[25],49.67
_09548_,49.66
_13447_,49.66
_02330_,49.64
_14875_,49.64
soc.core.VexRiscv.RegFilePlugin_regFile\[12\]\[21\],49.64
soc.core.VexRiscv.RegFilePlugin_regFile\[7\]\[28\],49.64
clknet_leaf_764_mgmt_buffers.caravel_clk,49.64
clknet_leaf_1082_mgmt_buffers.caravel_clk,49.64
mprj_io_analog_pol[0],49.63
_05099_,49.62
_10934_,49.62
soc.core.VexRiscv.RegFilePlugin_regFile\[2\]\[24\],49.62
soc.core.interface0_bank_bus_dat_r\[18\],49.62
net12896,49.62
_04050_,49.6
_04132_,49.6
_06892_,49.6
net291,49.6
net11411,49.6
_05114_,49.59
_03488_,49.58
_04020_,49.58
_10303_,49.58
_12096_,49.58
soc.core.VexRiscv.IBusCachedPlugin_cache._zz_fetchStage_read_waysValues_0_tag_valid_2\[4\],49.58
soc.core.VexRiscv.RegFilePlugin_regFile\[31\]\[31\],49.58
soc.core.multiregimpl78_regs0,49.58
_07595_,49.565
_02176_,49.56
_11180_,49.56
_14321_,49.56
pll.ext_trim\[22\],49.56
soc.core.VexRiscv.RegFilePlugin_regFile\[0\]\[15\],49.56
soc.core.la_ien_storage\[72\],49.56
net6373,49.56
soc.core.dbg_uart_length\[6\],49.55
net3320,49.545
_10486_,49.54
_12723_,49.54
_14497_,49.54
net5280,49.54
net12299,49.54
_12705_,49.52
soc.core.VexRiscv.RegFilePlugin_regFile\[16\]\[22\],49.52
soc.core.VexRiscv.RegFilePlugin_regFile\[16\]\[3\],49.52
soc.core.multiregimpl82_regs0,49.52
net2811,49.52
net4864,49.52
_09313_,49.5
_11746_,49.48
soc.core.VexRiscv.RegFilePlugin_regFile\[1\]\[18\],49.48
soc.core.storage\[12\]\[1\],49.48
clknet_leaf_279_mgmt_buffers.caravel_clk,49.48
mprj_io_ib_mode_sel[14],49.47
_08167_,49.465
_13834_,49.46
mgmt_buffers.la_data_in_mprj\[18\],49.445
_02640_,49.44
_10752_,49.44
soc.core.VexRiscv.RegFilePlugin_regFile\[18\]\[22\],49.44
soc.core.VexRiscv.RegFilePlugin_regFile\[20\]\[16\],49.44
soc.core.interface6_bank_bus_dat_r\[27\],49.44
clknet_leaf_434_mgmt_buffers.caravel_clk,49.44
net3926,49.44
net5047,49.44
mgmt_buffers.la_data_in_mprj\[29\],49.425
_06439_,49.42
_07758_,49.42
_08622_,49.42
_14557_,49.42
_04057_,49.4
_04126_,49.4
_07257_,49.4
_10304_,49.4
_11929_,49.4
soc.core.VexRiscv.RegFilePlugin_regFile\[21\]\[19\],49.4
soc.core.uart_phy_rx_phase\[25\],49.4
net3354,49.4
net3522,49.4
net12913,49.4
_09189_,49.39
mprj_io_analog_sel[13],49.39
clknet_leaf_346_mgmt_buffers.caravel_clk,49.39
net5490,49.385
_01300_,49.38
_06700_,49.38
_09372_,49.38
gpio_control_bidir_2\[1\].shift_register\[10\],49.38
net10339,49.38
net12494,49.38
_03245_,49.36
_04579_,49.36
_07166_,49.36
_14815_,49.36
soc.core.VexRiscv.CsrPlugin_selfException_payload_badAddr\[5\],49.36
user_io_out\[23\],49.36
_10214_,49.355
net10707,49.355
_12292_,49.34
_14336_,49.34
soc.core.VexRiscv.RegFilePlugin_regFile\[7\]\[16\],49.34
net10311,49.34
net11130,49.34
gpio_control_in_2\[7\].shift_register\[2\],49.325
_04190_,49.32
_11432_,49.32
gpio_control_in_1\[3\].resetn_out,49.32
gpio_control_in_1a\[5\].shift_register\[10\],49.32
gpio_control_in_2\[3\].pad_gpio_out,49.32
mgmt_buffers.la_data_in_mprj\[2\],49.32
soc.core.VexRiscv.RegFilePlugin_regFile\[5\]\[13\],49.32
soc.core.mgmtsoc_vexriscv_debug_bus_dat_r\[0\],49.32
gpio_control_in_1\[4\].gpio_defaults\[5\],49.31
_14435_,49.305
_00874_,49.3
_13074_,49.3
_14266_,49.3
net5028,49.3
net6836,49.3
_09910_,49.28
_05010_,49.27
_10003_,49.26
_10193_,49.26
_00252_,49.24
_00475_,49.24
_03353_,49.24
gpio_control_bidir_1\[1\].shift_register\[3\],49.24
soc.core.VexRiscv.RegFilePlugin_regFile\[28\]\[0\],49.24
net4606,49.24
net5018,49.24
net8444,49.24
soc.core.dbg_uart_tx_data\[1\],49.23
_04537_,49.22
_06945_,49.22
gpio_control_in_2\[3\].shift_register\[2\],49.22
net5412,49.22
net10964,49.22
_05524_,49.21
_11139_,49.2
_12327_,49.2
_12623_,49.2
_13653_,49.2
gpio_control_in_2\[8\].shift_register\[11\],49.2
soc.core.multiregimpl57_regs0,49.2
clknet_leaf_303_mgmt_buffers.caravel_clk,49.2
net11387,49.185
gpio_control_in_2\[2\].pad_gpio_out,49.18
soc.core.multiregimpl48_regs0,49.18
_14980_,49.16
net8452,49.16
_02266_,49.14
_06735_,49.14
_13747_,49.14
soc.core.multiregimpl55_regs0,49.14
clknet_leaf_468_mgmt_buffers.caravel_clk,49.14
net2752,49.14
net11271,49.14
net12930,49.14
_08549_,49.125
_04072_,49.12
_14586_,49.12
_03363_,49.1
_05070_,49.1
_10502_,49.1
soc.core.spi_master_miso_data\[1\],49.1
soc.core.storage_1\[4\]\[7\],49.1
net7536,49.1
net11177,49.1
mprj_io_dm[33],49.09
_00172_,49.08
_03218_,49.08
_05053_,49.08
_11105_,49.08
gpio_control_bidir_2\[2\].shift_register\[7\],49.08
soc.core.VexRiscv.RegFilePlugin_regFile\[28\]\[23\],49.08
net4510,49.08
_08293_,49.065
_09115_,49.06
clknet_leaf_1090_mgmt_buffers.caravel_clk,49.06
net8158,49.06
net10013,49.06
_13693_,49.04
net7217,49.04
_07270_,49.02
gpio_control_in_2\[7\].gpio_defaults\[11\],49.02
soc.core.VexRiscv.RegFilePlugin_regFile\[10\]\[26\],49.02
_08244_,49.005
_08554_,49
soc.core.VexRiscv.RegFilePlugin_regFile\[4\]\[22\],49
gpio_control_in_2\[1\].gpio_defaults\[7\],48.99
_11748_,48.98
soc.core.multiregimpl117_regs0,48.98
net5347,48.98
_09658_,48.965
_01565_,48.96
_12027_,48.96
net217,48.96
net11721,48.96
_09691_,48.94
clknet_leaf_1145_mgmt_buffers.caravel_clk,48.94
net3123,48.94
_12790_,48.92
_13877_,48.92
soc.core.VexRiscv.RegFilePlugin_regFile\[11\]\[14\],48.92
_05446_,48.9
_09615_,48.9
_11072_,48.9
soc.core.VexRiscv.IBusCachedPlugin_cache.lineLoader_address\[23\],48.9
soc.core.VexRiscv.RegFilePlugin_regFile\[24\]\[3\],48.9
soc.core.VexRiscv.RegFilePlugin_regFile\[28\]\[13\],48.9
net3439,48.9
net8139,48.885
_00257_,48.88
_04456_,48.88
_06706_,48.88
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[4\]\[3\],48.88
soc.core.VexRiscv.RegFilePlugin_regFile\[5\]\[22\],48.88
_03927_,48.87
_03972_,48.86
_14036_,48.86
gpio_control_in_1\[0\].shift_register\[9\],48.86
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[15\]\[17\],48.86
net10417,48.86
net12915,48.86
_01858_,48.84
_06245_,48.84
_08741_,48.84
_14685_,48.84
clknet_leaf_1001_mgmt_buffers.caravel_clk,48.84
net5841,48.84
net6771,48.84
net9324,48.84
net11229,48.825
_02722_,48.82
_10359_,48.82
_14247_,48.82
soc.core.spi_master_cs_storage\[13\],48.82
net9169,48.82
net9776,48.815
_01448_,48.8
_12385_,48.8
net4505,48.8
net3995,48.795
_11159_,48.78
_11415_,48.78
_14725_,48.78
soc.core.uart_phy_tx_phase\[20\],48.78
clknet_leaf_40_mgmt_buffers.caravel_clk,48.78
net8983,48.765
_01490_,48.76
_08975_,48.76
_13819_,48.76
_14057_,48.76
clknet_leaf_894_mgmt_buffers.caravel_clk,48.76
clknet_leaf_917_mgmt_buffers.caravel_clk,48.76
_00414_,48.74
_01200_,48.74
net3352,48.74
gpio_control_in_1\[4\].gpio_defaults\[11\],48.73
_03207_,48.72
_03564_,48.72
_06388_,48.72
net9413,48.72
net10948,48.72
_06958_,48.7
_07149_,48.7
_13979_,48.7
clknet_leaf_751_mgmt_buffers.caravel_clk,48.7
_10918_,48.69
mprj_io_dm[74],48.69
net11136,48.685
_02276_,48.68
_10837_,48.68
soc.core.VexRiscv.RegFilePlugin_regFile\[18\]\[7\],48.68
clknet_leaf_570_mgmt_buffers.caravel_clk,48.68
soc.core.la_ien_storage\[85\],48.665
net11970,48.665
_09801_,48.66
net10270,48.66
_07275_,48.65
net11911,48.65
_11554_,48.64
_14834_,48.64
soc.core.VexRiscv.RegFilePlugin_regFile\[19\]\[7\],48.64
soc.core.multiregimpl114_regs0,48.64
clknet_leaf_98_mgmt_buffers.caravel_clk,48.64
net8528,48.64
net8815,48.64
_14790_,48.62
net3735,48.62
net7078,48.62
_00948_,48.6
_06288_,48.6
_13675_,48.6
soc.core.gpioin1_gpioin1_in_pads_n_d,48.6
clknet_leaf_362_mgmt_buffers.caravel_clk,48.6
clknet_leaf_752_mgmt_buffers.caravel_clk,48.6
clknet_leaf_770_mgmt_buffers.caravel_clk,48.6
net8046,48.6
net11946,48.6
net4628,48.585
_03852_,48.58
_12126_,48.58
soc.core.gpioin4_gpioin4_edge_storage,48.58
_10051_,48.575
_03190_,48.56
_04334_,48.56
soc.core.VexRiscv.CsrPlugin_mepc\[2\],48.56
soc.core.VexRiscv.RegFilePlugin_regFile\[10\]\[13\],48.56
net3535,48.56
net10312,48.56
net11995,48.56
net12832,48.56
_14089_,48.54
gpio_control_in_1\[5\].gpio_ib_mode_sel,48.54
soc.core.VexRiscv.RegFilePlugin_regFile\[13\]\[7\],48.54
soc.core.storage_1\[7\]\[6\],48.54
net2902,48.54
net12581,48.54
soc.core.mgmtsoc_value\[9\],48.53
_06252_,48.52
_09184_,48.52
soc.core.multiregimpl132_regs1,48.52
clknet_leaf_200_mgmt_buffers.caravel_clk,48.52
net7818,48.52
net11059,48.52
_08912_,48.515
_00328_,48.5
_04401_,48.5
_12186_,48.5
_12189_,48.5
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[5\]\[2\],48.48
soc.core.multiregimpl115_regs0,48.48
net240,48.48
clknet_leaf_128_mgmt_buffers.caravel_clk,48.48
net5103,48.48
net6046,48.48
net8514,48.48
_11059_,48.47
mgmt_buffers.la_data_in_mprj\[21\],48.465
_02489_,48.46
soc.core.VexRiscv.RegFilePlugin_regFile\[0\]\[11\],48.46
soc.core.interface0_bank_bus_dat_r\[2\],48.46
net315,48.46
clknet_leaf_161_mgmt_buffers.caravel_clk,48.46
_00183_,48.44
_11340_,48.44
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[11\]\[10\],48.44
soc.core.VexRiscv.IBusCachedPlugin_cache.io_cpu_decode_data\[0\],48.44
soc.core.VexRiscv.RegFilePlugin_regFile\[10\]\[20\],48.44
soc.core.VexRiscv._zz_RegFilePlugin_regFile_port0\[12\],48.44
clknet_leaf_1089_mgmt_buffers.caravel_clk,48.44
soc.core.mgmtsoc_litespisdrphycore_sr_out\[2\],48.435
net5857,48.425
_00937_,48.42
_02421_,48.42
soc.core.interface6_bank_bus_dat_r\[22\],48.42
soc.core.la_ien_storage\[93\],48.42
_03345_,48.4
_10838_,48.4
_13688_,48.4
soc.core.VexRiscv.RegFilePlugin_regFile\[22\]\[13\],48.4
soc.core.storage\[13\]\[6\],48.4
soc.core.storage_1\[13\]\[7\],48.4
clknet_leaf_1060_mgmt_buffers.caravel_clk,48.4
_02605_,48.38
_04214_,48.38
pll.ext_trim\[13\],48.38
_06492_,48.36
soc.core.VexRiscv.RegFilePlugin_regFile\[14\]\[29\],48.36
net4934,48.36
net8662,48.36
net2648,48.36
soc.core.mgmtsoc_master_rx_fifo_source_payload_data\[0\],48.345
_04211_,48.34
_04435_,48.34
soc.core.VexRiscv.RegFilePlugin_regFile\[22\]\[17\],48.34
net3202,48.34
gpio_control_in_2\[1\].gpio_defaults\[4\],48.33
_00733_,48.3
_00935_,48.3
_03867_,48.3
_08284_,48.3
soc.core.VexRiscv.RegFilePlugin_regFile\[16\]\[1\],48.3
net12727,48.3
_11618_,48.28
_14023_,48.28
_14424_,48.28
net306,48.28
net10019,48.28
_03244_,48.26
_04470_,48.26
_11749_,48.26
_12594_,48.26
mprj_io_dm[69],48.25
net7966,48.24
net8990,48.24
_04499_,48.22
gpio_control_in_1a\[5\].shift_register\[2\],48.22
soc.core.VexRiscv.RegFilePlugin_regFile\[31\]\[22\],48.22
net10946,48.22
_03209_,48.2
gpio_control_bidir_2\[1\].shift_register\[5\],48.2
soc.core.VexRiscv.RegFilePlugin_regFile\[12\]\[26\],48.2
net9041,48.2
gpio_control_in_1\[2\].gpio_defaults\[6\],48.19
_06625_,48.18
_10877_,48.18
_14411_,48.18
soc.core.interface3_bank_bus_dat_r\[6\],48.18
clknet_leaf_423_mgmt_buffers.caravel_clk,48.18
net3218,48.18
net4749,48.18
net6222,48.18
net12906,48.18
_08243_,48.165
soc.core.VexRiscv.RegFilePlugin_regFile\[25\]\[28\],48.16
gpio_control_bidir_2\[0\].gpio_defaults\[4\],48.15
gpio_control_in_1a\[3\].gpio_defaults\[5\],48.15
_03318_,48.14
_12188_,48.14
soc.core.VexRiscv.RegFilePlugin_regFile\[19\]\[29\],48.14
soc.core.multiregimpl71_regs0,48.14
clknet_leaf_616_mgmt_buffers.caravel_clk,48.14
net9106,48.14
net9580,48.14
net5627,48.135
_06761_,48.12
mgmt_buffers.la_data_in_mprj_bar\[118\],48.12
soc.core.VexRiscv.RegFilePlugin_regFile\[10\]\[19\],48.12
net6716,48.12
net9386,48.12
gpio_control_in_2\[5\].shift_register\[4\],48.105
_05082_,48.1
_07081_,48.1
_10014_,48.1
_13919_,48.1
_14086_,48.1
soc.core.VexRiscv.RegFilePlugin_regFile\[15\]\[31\],48.1
soc.core.VexRiscv.RegFilePlugin_regFile\[20\]\[20\],48.1
soc.core.VexRiscv._zz_iBusWishbone_ADR\[1\],48.1
clknet_leaf_756_mgmt_buffers.caravel_clk,48.1
_14428_,48.095
gpio_control_in_1\[4\].gpio_defaults\[7\],48.09
_12773_,48.085
_00753_,48.08
gpio_control_in_2\[7\].shift_register\[4\],48.08
soc.core.VexRiscv.RegFilePlugin_regFile\[30\]\[29\],48.08
net12886,48.08
gpio_control_in_1a\[5\].gpio_defaults\[2\],48.07
_00302_,48.06
_01210_,48.06
_03211_,48.06
_04335_,48.06
_04759_,48.06
_13928_,48.06
soc.core.VexRiscv.memory_to_writeBack_REGFILE_WRITE_DATA\[29\],48.06
soc.core.interface3_bank_bus_dat_r\[26\],48.06
clknet_leaf_831_mgmt_buffers.caravel_clk,48.06
net8214,48.06
_04437_,48.04
_07186_,48.04
_13751_,48.04
gpio_control_in_1\[5\].gpio_inenb,48.04
net3198,48.04
_14351_,48.025
_01208_,48.02
_01910_,48.02
_02650_,48.02
_03889_,48.02
_04404_,48.02
_06418_,48.02
_11780_,48.02
_11945_,48.02
_14744_,48.02
net5180,48.02
net6736,48.02
net7753,48.02
net10069,48.02
_02767_,48
_06936_,48
_09571_,48
net293,48
_04317_,47.98
_07629_,47.98
_08709_,47.98
_13567_,47.98
gpio_control_in_2\[9\].shift_register\[0\],47.98
soc.core.VexRiscv.IBusCachedPlugin_cache.io_mem_rsp_payload_data\[5\],47.98
soc.core.VexRiscv.RegFilePlugin_regFile\[17\]\[28\],47.98
soc.core.VexRiscv.RegFilePlugin_regFile\[9\]\[31\],47.98
soc.core.mgmtsoc_master_phyconfig_storage\[1\],47.98
net5096,47.98
gpio_control_in_2\[5\].gpio_defaults\[5\],47.97
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[0\]\[30\],47.96
_03168_,47.94
_04104_,47.94
_12182_,47.94
gpio_control_in_2\[1\].shift_register\[0\],47.94
soc.core.storage\[9\]\[6\],47.94
mgmt_buffers.la_data_in_mprj\[120\],47.925
_07829_,47.92
clknet_leaf_873_mgmt_buffers.caravel_clk,47.92
_04478_,47.9
soc.core.VexRiscv.RegFilePlugin_regFile\[24\]\[19\],47.9
soc.core.VexRiscv.dBusWishbone_DAT_MISO\[15\],47.9
_03358_,47.89
_09949_,47.88
_14360_,47.88
_14871_,47.88
soc.core.VexRiscv.RegFilePlugin_regFile\[0\]\[4\],47.88
net9534,47.88
_10037_,47.875
_00536_,47.86
_12674_,47.86
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[15\]\[30\],47.86
_01039_,47.84
_03184_,47.84
_08363_,47.84
_11424_,47.84
soc.core.VexRiscv.RegFilePlugin_regFile\[20\]\[27\],47.84
net8228,47.84
net11247,47.84
_02782_,47.82
_12389_,47.82
_12601_,47.82
_14305_,47.82
soc.core.VexRiscv.RegFilePlugin_regFile\[21\]\[1\],47.82
gpio_control_in_2\[7\].shift_register\[8\],47.805
_06224_,47.8
_07073_,47.8
_12191_,47.78
mgmt_buffers.user_irq_bar\[1\],47.78
mask_rev\[26\],47.77
mask_rev\[28\],47.77
gpio_control_bidir_1\[1\].shift_register\[6\],47.76
net3126,47.76
_11042_,47.74
soc.core.VexRiscv.RegFilePlugin_regFile\[15\]\[25\],47.74
soc.core.VexRiscv.RegFilePlugin_regFile\[30\]\[28\],47.74
soc.core.uart_tx_fifo_level0\[2\],47.74
soc.core.dbg_uart_address\[20\],47.73
_02486_,47.72
_03112_,47.72
_03963_,47.72
soc.core.VexRiscv.CsrPlugin_mtvec_base\[27\],47.72
soc.core.VexRiscv.RegFilePlugin_regFile\[4\]\[29\],47.72
clknet_leaf_693_mgmt_buffers.caravel_clk,47.72
_04534_,47.7
_09326_,47.7
clknet_leaf_864_mgmt_buffers.caravel_clk,47.7
net11708,47.7
_04008_,47.68
_07136_,47.68
_13034_,47.68
soc.core.VexRiscv.RegFilePlugin_regFile\[29\]\[4\],47.68
soc.core.storage\[5\]\[3\],47.68
net12830,47.68
_11689_,47.66
net9891,47.65
_08263_,47.645
_07619_,47.64
net4546,47.64
net7293,47.64
_09232_,47.63
gpio_control_in_1\[2\].gpio_defaults\[4\],47.63
gpio_control_in_1a\[4\].gpio_defaults\[3\],47.63
mprj_io_dm[37],47.63
_13921_,47.62
net6663,47.62
_04966_,47.6
_12018_,47.6
mgmt_buffers.la_data_in_mprj_bar\[117\],47.6
soc.core.VexRiscv.RegFilePlugin_regFile\[4\]\[21\],47.6
clknet_leaf_268_mgmt_buffers.caravel_clk,47.6
net2725,47.6
net7034,47.6
_02711_,47.58
gpio_control_in_2\[6\].shift_register\[7\],47.58
soc.core.VexRiscv.RegFilePlugin_regFile\[12\]\[31\],47.58
soc.core.mgmtsoc_master_tx_fifo_source_payload_data\[15\],47.58
soc.core.mgmtsoc_master_tx_fifo_source_payload_data\[4\],47.58
_02539_,47.56
net10350,47.56
soc.core.VexRiscv.RegFilePlugin_regFile\[25\]\[26\],47.54
net9976,47.54
net2642,47.54
gpio_control_in_2\[9\].gpio_defaults\[5\],47.53
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[4\]\[31\],47.52
soc.core.VexRiscv.RegFilePlugin_regFile\[27\]\[4\],47.52
soc.core.mgmtsoc_master_tx_fifo_source_payload_data\[2\],47.52
net12074,47.52
_13401_,47.51
_03309_,47.5
_08013_,47.5
gpio_control_in_1\[4\].gpio_defaults\[6\],47.49
gpio_control_bidir_2\[0\].shift_register\[11\],47.485
_00905_,47.48
_04621_,47.48
soc.core.VexRiscv.RegFilePlugin_regFile\[17\]\[10\],47.48
_02758_,47.46
_06204_,47.46
_08394_,47.46
soc.core.VexRiscv.RegFilePlugin_regFile\[27\]\[7\],47.46
_03257_,47.44
_10002_,47.44
_10888_,47.44
_14037_,47.44
gpio_control_in_2\[7\].shift_register\[0\],47.44
soc.core.mgmtsoc_value\[21\],47.44
net7278,47.44
net11517,47.44
_11508_,47.42
soc.core.VexRiscv.RegFilePlugin_regFile\[22\]\[1\],47.42
soc.core.VexRiscv.RegFilePlugin_regFile\[31\]\[17\],47.42
soc.core.multiregimpl120_regs0,47.42
net11418,47.42
gpio_control_bidir_1\[1\].gpio_defaults\[10\],47.41
_00202_,47.4
_03141_,47.4
_06376_,47.4
_08553_,47.4
_09182_,47.4
_14415_,47.4
gpio_control_bidir_2\[0\].gpio_slow_sel,47.4
soc.core.VexRiscv.RegFilePlugin_regFile\[1\]\[8\],47.4
soc.core.la_ien_storage\[127\],47.4
soc.core.storage\[13\]\[5\],47.4
gpio_control_in_2\[6\].gpio_defaults\[4\],47.385
_01148_,47.38
_04619_,47.38
_07262_,47.38
clknet_leaf_982_mgmt_buffers.caravel_clk,47.38
net4658,47.38
net10834,47.38
_12156_,47.36
_12294_,47.36
_13579_,47.36
clknet_leaf_172_mgmt_buffers.caravel_clk,47.36
_09397_,47.345
_10944_,47.34
_11344_,47.34
_13738_,47.34
net3359,47.34
net6367,47.34
mprj_io_dm[28],47.33
mprj_io_dm[36],47.33
_13580_,47.325
_00175_,47.32
_00718_,47.32
_02766_,47.32
gpio_control_in_1\[4\].shift_register\[11\],47.32
soc.core.VexRiscv.RegFilePlugin_regFile\[11\]\[13\],47.32
soc.core.VexRiscv.RegFilePlugin_regFile\[14\]\[21\],47.32
soc.core.VexRiscv.RegFilePlugin_regFile\[24\]\[14\],47.32
_08528_,47.305
_00260_,47.3
_02809_,47.3
_09388_,47.3
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[4\]\[2\],47.3
net5550,47.285
_04821_,47.28
_06218_,47.28
_11141_,47.28
soc.core.interface3_bank_bus_dat_r\[15\],47.28
clknet_leaf_543_mgmt_buffers.caravel_clk,47.27
_01432_,47.26
_12931_,47.26
_14431_,47.26
net7672,47.26
net10484,47.26
soc.core.dbg_uart_words_count\[7\],47.24
net11890,47.24
_10047_,47.225
soc.core.VexRiscv.dBusWishbone_DAT_MISO\[27\],47.22
soc.core.mgmtsoc_load_storage\[28\],47.22
clknet_leaf_689_mgmt_buffers.caravel_clk,47.22
clknet_leaf_1108_mgmt_buffers.caravel_clk,47.22
_02573_,47.2
_11037_,47.2
clknet_leaf_678_mgmt_buffers.caravel_clk,47.2
net6047,47.185
_03224_,47.18
soc.core.VexRiscv.RegFilePlugin_regFile\[9\]\[25\],47.18
soc.core.mgmtsoc_vexriscv_i_cmd_payload_address\[3\],47.18
clknet_leaf_707_mgmt_buffers.caravel_clk,47.18
clknet_leaf_1174_mgmt_buffers.caravel_clk,47.18
_02503_,47.16
soc.core.VexRiscv.IBusCachedPlugin_cache._zz_banks_0_port1\[5\],47.16
soc.core.VexRiscv._zz_RegFilePlugin_regFile_port1\[6\],47.16
mgmt_buffers.la_data_in_mprj\[115\],47.145
net11081,47.145
_12698_,47.14
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[0\]\[1\],47.14
soc.core.VexRiscv.RegFilePlugin_regFile\[1\]\[31\],47.14
clknet_leaf_288_mgmt_buffers.caravel_clk,47.14
net11548,47.14
_06182_,47.135
_10007_,47.12
_11677_,47.12
gpio_control_in_2\[8\].gpio_defaults\[11\],47.12
soc.core.VexRiscv.RegFilePlugin_regFile\[0\]\[17\],47.12
soc.core.VexRiscv.RegFilePlugin_regFile\[14\]\[16\],47.12
soc.core.dbg_uart_address\[19\],47.12
net11477,47.12
_00262_,47.1
_03663_,47.1
_13217_,47.1
soc.core.VexRiscv.RegFilePlugin_regFile\[5\]\[8\],47.1
soc.core.dbg_uart_data\[23\],47.1
_08131_,47.08
mgmt_buffers.la_data_in_mprj_bar\[3\],47.08
clknet_leaf_426_mgmt_buffers.caravel_clk,47.08
net4836,47.08
net12905,47.08
_01775_,47.06
_02105_,47.06
_02344_,47.06
_11488_,47.06
_14670_,47.06
soc.core.VexRiscv.RegFilePlugin_regFile\[18\]\[13\],47.06
soc.core.VexRiscv.dBusWishbone_DAT_MISO\[23\],47.06
soc.core.dbg_uart_tx_data_uartwishbonebridge_rs232phytx_next_value2\[4\],47.06
soc.core.mgmtsoc_value\[27\],47.06
clknet_leaf_805_mgmt_buffers.caravel_clk,47.06
clknet_leaf_1196_mgmt_buffers.caravel_clk,47.06
net5791,47.06
_10483_,47.04
mgmt_buffers.la_data_in_mprj_bar\[119\],47.04
soc.core.VexRiscv.RegFilePlugin_regFile\[30\]\[27\],47.04
net3609,47.025
_02692_,47.02
_14150_,47.02
soc.core.VexRiscv.CsrPlugin_mcause_exceptionCode\[3\],47.02
net8773,47.02
net12766,47.02
net4245,47.005
_01347_,47
_01874_,47
_02813_,47
_01348_,46.98
_11346_,46.98
net3357,46.98
gpio_control_bidir_2\[1\].resetn,46.96
soc.core.la_ien_storage\[66\],46.96
soc.core.mgmtsoc_master_tx_fifo_source_payload_data\[14\],46.96
net3532,46.96
net6439,46.96
gpio_control_in_2\[5\].gpio_defaults\[8\],46.95
mprj_io_dm[9],46.95
_06373_,46.94
gpio_control_in_2\[0\].shift_register\[0\],46.94
soc.core.VexRiscv.DBusSimplePlugin_memoryExceptionPort_payload_badAddr\[9\],46.94
net9160,46.94
_04520_,46.92
_08141_,46.92
_10311_,46.92
_10947_,46.92
_14455_,46.92
soc.core.VexRiscv.RegFilePlugin_regFile\[2\]\[13\],46.92
net5176,46.92
gpio_control_in_1a\[4\].shift_register\[0\],46.905
net10618,46.905
_01204_,46.9
_02888_,46.9
_13403_,46.9
gpio_control_in_2\[7\].shift_register\[9\],46.9
soc.core.VexRiscv.RegFilePlugin_regFile\[31\]\[3\],46.9
net10248,46.9
net11142,46.9
net11945,46.9
_01242_,46.88
_02622_,46.88
soc.core.multiregimpl113_regs0,46.88
clknet_leaf_151_mgmt_buffers.caravel_clk,46.88
clknet_leaf_896_mgmt_buffers.caravel_clk,46.88
mgmt_buffers.la_data_in_mprj\[98\],46.875
_03229_,46.86
_04429_,46.86
soc.core.VexRiscv.IBusCachedPlugin_cache.decodeStage_mmuRsp_physicalAddress\[11\],46.86
soc.core.VexRiscv.RegFilePlugin_regFile\[26\]\[7\],46.84
net11759,46.84
net10290,46.835
_11016_,46.82
_13969_,46.82
soc.core.VexRiscv._zz_RegFilePlugin_regFile_port0\[20\],46.82
soc.core.count\[14\],46.81
_07057_,46.8
_10990_,46.8
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[13\]\[27\],46.8
soc.core.VexRiscv.RegFilePlugin_regFile\[20\]\[17\],46.8
clknet_leaf_431_mgmt_buffers.caravel_clk,46.8
gpio_control_in_1a\[4\].gpio_defaults\[1\],46.79
_08636_,46.785
_10327_,46.78
_13037_,46.78
soc.core.multiregimpl127_regs0,46.78
_00961_,46.76
_10081_,46.76
_14751_,46.76
clknet_leaf_584_mgmt_buffers.caravel_clk,46.76
net5822,46.745
_03238_,46.74
soc.core.VexRiscv.RegFilePlugin_regFile\[9\]\[2\],46.74
soc.core.uartwishbonebridge_rs232phytx_state,46.74
net4644,46.74
net7636,46.74
net10747,46.74
gpio_control_in_1\[1\].gpio_defaults\[12\],46.73
_03755_,46.72
_14604_,46.72
gpio_control_in_2\[8\].shift_register\[8\],46.72
soc.core.VexRiscv.RegFilePlugin_regFile\[29\]\[5\],46.72
soc.core.spi_master_mosi_data\[4\],46.72
gpio_control_bidir_2\[0\].gpio_ana_pol,46.7
soc.core.VexRiscv.RegFilePlugin_regFile\[11\]\[19\],46.7
gpio_control_in_2\[2\].shift_register\[0\],46.68
soc.core.VexRiscv.DBusSimplePlugin_memoryExceptionPort_payload_badAddr\[31\],46.68
soc.core.VexRiscv.RegFilePlugin_regFile\[10\]\[11\],46.68
clknet_leaf_193_mgmt_buffers.caravel_clk,46.68
net2898,46.68
net9711,46.67
_06656_,46.65
_06720_,46.65
_09721_,46.645
soc.core.VexRiscv.RegFilePlugin_regFile\[5\]\[21\],46.64
net11533,46.64
_00597_,46.62
_04338_,46.62
_04402_,46.62
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[6\]\[2\],46.62
net3271,46.62
net4745,46.62
_04006_,46.6
_05012_,46.6
soc.core.VexRiscv.RegFilePlugin_regFile\[10\]\[23\],46.6
soc.core.mgmtsoc_value\[6\],46.6
net11593,46.6
gpio_control_in_2\[5\].gpio_inenb,46.595
_06503_,46.58
_14346_,46.58
soc.core.VexRiscv.CsrPlugin_selfException_payload_badAddr\[13\],46.58
soc.core.VexRiscv.RegFilePlugin_regFile\[23\]\[25\],46.58
net6823,46.58
gpio_control_bidir_2\[1\].gpio_defaults\[7\],46.57
soc.core.VexRiscv.RegFilePlugin_regFile\[22\]\[23\],46.56
net331,46.56
clknet_leaf_109_mgmt_buffers.caravel_clk,46.56
clknet_leaf_1181_mgmt_buffers.caravel_clk,46.56
net9098,46.56
clknet_leaf_875_mgmt_buffers.caravel_clk,46.55
_09044_,46.54
_09594_,46.54
_13749_,46.54
net5211,46.54
net5710,46.54
net8940,46.54
net11134,46.54
_03805_,46.52
_06664_,46.52
_08582_,46.52
_12730_,46.52
mgmt_buffers.la_data_in_mprj_bar\[29\],46.52
soc.core.gpioin5_gpioin5_in_pads_n_d,46.52
soc.core.storage\[12\]\[5\],46.52
net3826,46.52
_12983_,46.515
_07249_,46.505
soc.core.VexRiscv.RegFilePlugin_regFile\[4\]\[18\],46.5
net9184,46.5
net10585,46.5
net11537,46.5
_00181_,46.48
_00268_,46.48
pll.ringosc.dstage\[4\].id.ts,46.48
irq_spi\[2\],46.475
_02998_,46.46
_07067_,46.46
clknet_leaf_58_mgmt_buffers.caravel_clk,46.46
clknet_leaf_522_mgmt_buffers.caravel_clk,46.46
net3373,46.46
net7590,46.445
_03232_,46.44
soc.core.la_ien_storage\[28\],46.44
clknet_leaf_57_mgmt_buffers.caravel_clk,46.44
_02607_,46.42
_10013_,46.42
_13689_,46.42
soc.core.VexRiscv.RegFilePlugin_regFile\[5\]\[26\],46.42
soc.core.mgmtsoc_vexriscv_transfer_wait_for_ack,46.42
_03352_,46.41
_09777_,46.405
_02150_,46.4
_06764_,46.4
_12464_,46.4
_13071_,46.4
user_io_oeb\[21\],46.39
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[7\]\[0\],46.38
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[8\]\[3\],46.38
soc.core.multiregimpl100_regs0,46.38
net9877,46.38
_02514_,46.36
_13572_,46.36
_08519_,46.345
_02574_,46.34
_03223_,46.34
_03460_,46.34
_11669_,46.34
_12066_,46.34
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[5\]\[6\],46.34
clknet_leaf_137_mgmt_buffers.caravel_clk,46.34
_07088_,46.32
soc.core.VexRiscv.HazardSimplePlugin_writeBackBuffer_payload_address\[2\],46.32
soc.core.multiregimpl69_regs1,46.32
_02671_,46.3
_04349_,46.3
_09595_,46.3
gpio_control_in_2\[5\].shift_register\[2\],46.3
soc.core.VexRiscv.RegFilePlugin_regFile\[29\]\[17\],46.3
gpio_control_bidir_2\[0\].gpio_defaults\[7\],46.29
_12978_,46.28
_14952_,46.28
net10302,46.28
_07178_,46.26
_10778_,46.26
soc.core.VexRiscv.RegFilePlugin_regFile\[0\]\[22\],46.26
clknet_leaf_762_mgmt_buffers.caravel_clk,46.26
net8509,46.26
_01328_,46.24
net3878,46.24
_00125_,46.22
_01541_,46.22
_06381_,46.22
_13829_,46.22
gpio_control_in_1\[1\].shift_register\[7\],46.22
clknet_leaf_229_mgmt_buffers.caravel_clk,46.22
net12355,46.22
_11438_,46.21
mprj_io_in[1],46.21
_06180_,46.205
_02273_,46.2
_04325_,46.2
_14968_,46.18
_15213_,46.18
gpio_control_in_1\[4\].resetn_out,46.18
soc.core.VexRiscv.RegFilePlugin_regFile\[23\]\[14\],46.18
soc.core.mgmtsoc_value\[12\],46.18
mgmt_buffers.la_data_in_mprj\[5\],46.165
_01388_,46.16
_07702_,46.16
_11745_,46.16
_13027_,46.16
soc.core.VexRiscv.IBusCachedPlugin_cache._zz_when_InstructionCache_l342,46.16
net6589,46.16
_08366_,46.14
_10784_,46.14
_12835_,46.14
_14649_,46.14
soc.core.interface6_bank_bus_dat_r\[23\],46.14
clknet_leaf_753_mgmt_buffers.caravel_clk,46.14
clknet_leaf_1016_mgmt_buffers.caravel_clk,46.14
gpio_control_in_1a\[5\].gpio_defaults\[7\],46.13
_04174_,46.12
_11501_,46.12
soc.core.VexRiscv.IBusCachedPlugin_cache.lineLoader_address\[30\],46.12
_08500_,46.1
mprj_io_dm[7],46.09
net3057,46.085
_02654_,46.08
_13405_,46.08
soc.core.dbg_uart_tx_phase\[1\],46.08
net5372,46.08
_05094_,46.07
_09196_,46.06
gpio_control_in_2\[7\].resetn,46.06
soc.core.storage\[14\]\[2\],46.06
net4010,46.06
net8786,46.06
_06465_,46.04
_11440_,46.04
net219,46.04
mprj_io_dm[11],46.03
clknet_leaf_1087_mgmt_buffers.caravel_clk,46.02
_12992_,46
soc.core.VexRiscv.RegFilePlugin_regFile\[3\]\[19\],46
soc.core.interface0_bank_bus_dat_r\[19\],46
soc.core.storage\[4\]\[0\],46
net269,46
clknet_leaf_78_mgmt_buffers.caravel_clk,46
net2873,46
net11967,46
net4328,45.985
_03382_,45.98
_04022_,45.98
_11475_,45.98
clknet_leaf_284_mgmt_buffers.caravel_clk,45.98
net7894,45.98
_04327_,45.96
_04357_,45.96
_06412_,45.96
_13107_,45.96
gpio_control_in_1\[4\].pad_gpio_outenb,45.96
clknet_leaf_731_mgmt_buffers.caravel_clk,45.96
net4619,45.96
net11149,45.96
_08857_,45.945
net9240,45.945
_10460_,45.94
soc.core.VexRiscv.RegFilePlugin_regFile\[21\]\[25\],45.94
net5174,45.94
net7410,45.94
mprj_io_oeb[3],45.93
_08237_,45.925
net8720,45.925
_03846_,45.92
_13662_,45.92
gpio_control_in_2\[0\].shift_register\[3\],45.92
clknet_leaf_252_mgmt_buffers.caravel_clk,45.92
net11720,45.92
net12346,45.92
_08916_,45.905
_09957_,45.9
net4237,45.9
gpio_control_in_1\[5\].gpio_defaults\[4\],45.89
_06669_,45.88
mgmt_buffers.la_data_in_mprj_bar\[28\],45.88
clknet_leaf_729_mgmt_buffers.caravel_clk,45.88
clknet_leaf_988_mgmt_buffers.caravel_clk,45.88
_03120_,45.86
_03914_,45.86
_11976_,45.86
gpio_control_in_2\[6\].gpio_ana_sel,45.86
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[1\]\[4\],45.86
soc.core.VexRiscv.RegFilePlugin_regFile\[26\]\[30\],45.86
net8973,45.86
net11143,45.86
net11042,45.85
net4251,45.845
net8584,45.845
_03399_,45.84
soc.core.VexRiscv.RegFilePlugin_regFile\[30\]\[22\],45.84
clknet_leaf_1053_mgmt_buffers.caravel_clk,45.84
net11266,45.84
net12267,45.84
_03297_,45.82
_07042_,45.82
_10490_,45.82
_07635_,45.8
mgmt_buffers.mprj_adr_o_core\[2\],45.8
soc.core.mgmtsoc_litespisdrphycore_sr_out\[28\],45.8
net11460,45.8
net5457,45.785
net5635,45.785
_12083_,45.78
_13033_,45.78
soc.core.VexRiscv.RegFilePlugin_regFile\[31\]\[26\],45.78
net5428,45.78
_01457_,45.76
_08648_,45.76
_13753_,45.76
gpio_control_bidir_1\[0\].shift_register\[4\],45.76
net2910,45.76
_05112_,45.75
_00457_,45.74
soc.core.multiregimpl6_regs0,45.74
net6212,45.73
_02639_,45.72
_03282_,45.72
_03333_,45.72
_03362_,45.72
_06601_,45.72
soc.core.spi_master_mosi_data\[6\],45.72
net4383,45.72
_03143_,45.7
_03293_,45.7
_08484_,45.7
net12280,45.7
_04469_,45.68
_15206_,45.68
soc.core.VexRiscv.RegFilePlugin_regFile\[17\]\[29\],45.68
soc.core.VexRiscv.RegFilePlugin_regFile\[22\]\[31\],45.68
net9845,45.68
gpio_control_in_2\[6\].shift_register\[6\],45.66
soc.core.VexRiscv.RegFilePlugin_regFile\[21\]\[20\],45.66
clknet_leaf_700_mgmt_buffers.caravel_clk,45.66
net3146,45.66
soc.core.VexRiscv.RegFilePlugin_regFile\[22\]\[14\],45.65
_13203_,45.64
soc.core.VexRiscv.IBusCachedPlugin_cache.io_cpu_prefetch_pc\[31\],45.64
soc.core.VexRiscv.RegFilePlugin_regFile\[21\]\[13\],45.64
soc.core.VexRiscv.RegFilePlugin_regFile\[23\]\[31\],45.64
net5162,45.64
net11489,45.64
net3260,45.625
_01498_,45.62
_03618_,45.62
soc.core.VexRiscv.RegFilePlugin_regFile\[13\]\[9\],45.62
soc.core.VexRiscv.RegFilePlugin_regFile\[6\]\[24\],45.62
soc.core.VexRiscv.RegFilePlugin_regFile\[6\]\[29\],45.62
net4757,45.62
net4769,45.62
_05152_,45.61
_08934_,45.605
_00198_,45.6
_01961_,45.6
_06661_,45.6
soc.core.VexRiscv.RegFilePlugin_regFile\[27\]\[0\],45.6
net3716,45.6
net5785,45.6
gpio_control_in_1\[3\].shift_register\[7\],45.595
mprj_io_dm[34],45.59
mprj_io_holdover[0],45.59
_08211_,45.585
_01453_,45.58
_01880_,45.58
clknet_leaf_650_mgmt_buffers.caravel_clk,45.58
net4231,45.58
_00292_,45.575
net3753,45.565
_02167_,45.56
_04595_,45.56
_10099_,45.56
_14960_,45.56
soc.core.VexRiscv.memory_to_writeBack_REGFILE_WRITE_DATA\[5\],45.56
_09920_,45.54
gpio_control_in_2\[7\].shift_register\[7\],45.54
soc.core.VexRiscv.RegFilePlugin_regFile\[8\]\[14\],45.54
soc.core.multiregimpl45_regs0,45.54
_04323_,45.52
_13103_,45.52
gpio_control_in_1a\[5\].shift_register\[7\],45.52
mgmt_buffers.la_data_in_mprj_bar\[97\],45.52
pll.itrim\[2\],45.52
net5583,45.52
mgmt_buffers.la_data_in_mprj\[123\],45.505
net5540,45.505
net8694,45.505
_00500_,45.5
_03328_,45.5
_07944_,45.5
_14339_,45.5
soc.core.VexRiscv.RegFilePlugin_regFile\[15\]\[20\],45.5
clknet_leaf_898_mgmt_buffers.caravel_clk,45.5
net3210,45.5
net11156,45.5
mask_rev\[18\],45.49
soc.core.VexRiscv.IBusCachedPlugin_cache.lineLoader_address\[15\],45.48
net6473,45.48
mprj_io_vtrip_sel[20],45.47
_01249_,45.46
_14821_,45.46
gpio_control_bidir_2\[2\].shift_register\[6\],45.46
gpio_control_in_2\[1\].shift_register\[6\],45.46
clknet_leaf_107_mgmt_buffers.caravel_clk,45.46
net3893,45.46
soc.core.VexRiscv.RegFilePlugin_regFile\[14\]\[9\],45.44
soc.core.VexRiscv.RegFilePlugin_regFile\[1\]\[20\],45.44
soc.core.VexRiscv.RegFilePlugin_regFile\[28\]\[10\],45.44
net11022,45.44
net9230,45.425
net10809,45.425
_07223_,45.42
soc.core.VexRiscv.IBusCachedPlugin_cache.ways_0_tags\[0\]\[4\],45.42
soc.core.VexRiscv._zz_execute_to_memory_REGFILE_WRITE_DATA\[26\],45.42
soc.core.spi_master_mosi_data\[7\],45.42
_08580_,45.4
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[12\]\[4\],45.4
soc.core.uart_pending_re,45.4
_01406_,45.38
_10082_,45.38
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[7\]\[2\],45.38
net7508,45.38
net7634,45.38
net5439,45.365
_10332_,45.36
clknet_leaf_726_mgmt_buffers.caravel_clk,45.36
_00492_,45.34
_13882_,45.34
net360,45.34
net12931,45.34
_07175_,45.32
soc.core.VexRiscv.RegFilePlugin_regFile\[2\]\[10\],45.32
net2853,45.32
net3705,45.32
_01509_,45.3
_12597_,45.3
mgmt_buffers.la_data_in_mprj_bar\[12\],45.3
soc.core.storage\[15\]\[2\],45.3
clknet_leaf_649_mgmt_buffers.caravel_clk,45.3
clknet_leaf_935_mgmt_buffers.caravel_clk,45.3
net8686,45.3
net9343,45.3
_05242_,45.29
_09604_,45.285
_09621_,45.285
_10049_,45.28
soc.core.VexRiscv.RegFilePlugin_regFile\[30\]\[16\],45.28
soc.core.VexRiscv.RegFilePlugin_regFile\[6\]\[10\],45.28
soc.core.slave_sel_r\[6\],45.28
net6108,45.28
_04418_,45.26
_12437_,45.26
_14740_,45.26
net4844,45.245
net2872,45.24
_04283_,45.22
_04445_,45.22
soc.core.storage\[12\]\[7\],45.22
_06478_,45.2
_08021_,45.2
gpio_control_in_2\[0\].shift_register\[2\],45.2
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[2\]\[15\],45.2
clknet_leaf_496_mgmt_buffers.caravel_clk,45.2
net3001,45.185
net10186,45.185
_01942_,45.18
_02243_,45.18
_04999_,45.18
_10016_,45.18
_12578_,45.18
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[12\]\[17\],45.18
soc.core.VexRiscv.RegFilePlugin_regFile\[21\]\[28\],45.18
soc.core.multiregimpl116_regs0,45.18
net3674,45.18
_09593_,45.16
_10320_,45.16
net9086,45.16
net9809,45.16
_01408_,45.14
_07704_,45.14
_08601_,45.14
_12354_,45.14
_14837_,45.14
gpio_control_in_1\[4\].shift_register\[7\],45.14
clknet_leaf_339_mgmt_buffers.caravel_clk,45.14
_01043_,45.12
_03334_,45.12
_03369_,45.12
_14265_,45.12
net3870,45.12
net12154,45.12
_07248_,45.105
_06602_,45.08
soc.core.mgmtsoc_load_storage\[29\],45.08
net9384,45.08
_14465_,45.07
_06280_,45.06
soc.core.VexRiscv.RegFilePlugin_regFile\[0\]\[0\],45.06
soc.core.VexRiscv.RegFilePlugin_regFile\[11\]\[24\],45.06
net12544,45.06
net5639,45.045
net11237,45.045
_02708_,45.04
_08364_,45.04
_09358_,45.04
_12169_,45.04
_13672_,45.04
soc.core.multiregimpl71_regs1,45.04
net9914,45.04
_07182_,45.02
_12889_,45.02
pll.itrim\[1\],45.02
net11214,45.02
mprj_io_dm[18],45.01
_11568_,45
net12803,45
_13699_,44.98
pll.ringosc.dstage\[1\].id.ts,44.98
soc.core.VexRiscv.RegFilePlugin_regFile\[31\]\[0\],44.98
_00946_,44.96
_10018_,44.96
soc.core.multiregimpl7_regs0,44.96
net6868,44.96
net11528,44.96
net12893,44.96
mprj_io_vtrip_sel[0],44.95
_04318_,44.94
_10143_,44.94
_14210_,44.94
soc.core.VexRiscv.RegFilePlugin_regFile\[24\]\[13\],44.93
net8576,44.925
_08473_,44.92
_10333_,44.92
net8363,44.92
net11987,44.92
mprj_io_vtrip_sel[13],44.91
gpio_control_in_1a\[3\].pad_gpio_outenb,44.9
soc.core.mgmtsoc_master_phyconfig_storage\[4\],44.9
_13690_,44.88
net5216,44.88
net8290,44.88
net8382,44.88
_03101_,44.86
_06565_,44.86
_13659_,44.86
soc.core.VexRiscv.RegFilePlugin_regFile\[15\]\[21\],44.86
net194,44.86
net9663,44.86
_05090_,44.85
net10711,44.85
_08489_,44.845
_00695_,44.84
_00965_,44.84
_09836_,44.84
_13416_,44.84
_13764_,44.84
soc.core.VexRiscv.RegFilePlugin_regFile\[3\]\[8\],44.84
_03253_,44.82
_03321_,44.82
_09874_,44.82
gpio_control_in_1\[3\].gpio_holdover,44.82
gpio_control_in_1\[5\].shift_register\[7\],44.8
net12804,44.8
net6561,44.79
soc.core.mgmtsoc_litespisdrphycore_cnt\[5\],44.78
soc.core.VexRiscv.RegFilePlugin_regFile\[29\]\[19\],44.76
net7613,44.76
net9119,44.76
net10388,44.76
_03315_,44.745
_13618_,44.74
soc.core.VexRiscv.RegFilePlugin_regFile\[28\]\[18\],44.74
soc.core.VexRiscv.RegFilePlugin_regFile\[9\]\[30\],44.74
clknet_leaf_748_mgmt_buffers.caravel_clk,44.74
_09019_,44.725
_12903_,44.72
gpio_control_in_1a\[1\].shift_register\[3\],44.72
gpio_control_in_1a\[4\].shift_register\[9\],44.72
soc.core.mgmtsoc_value\[20\],44.72
_03476_,44.7
pll.ringosc.dstage\[5\].id.d1,44.7
net141,44.7
_04785_,44.68
_07259_,44.68
_09810_,44.68
_09877_,44.68
_12105_,44.68
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[3\]\[0\],44.68
net6075,44.68
_08217_,44.66
_10261_,44.66
_12346_,44.66
_13525_,44.66
soc.core.VexRiscv.RegFilePlugin_regFile\[18\]\[20\],44.66
net86,44.66
clknet_leaf_480_mgmt_buffers.caravel_clk,44.66
net2984,44.66
_13848_,44.64
soc.core.VexRiscv.CsrPlugin_mtvec_base\[26\],44.64
net4074,44.64
net4095,44.625
_01936_,44.62
_03346_,44.62
_10160_,44.62
gpio_control_in_2\[1\].pad_gpio_out,44.62
soc.core.VexRiscv.CsrPlugin_mtvec_base\[1\],44.62
soc.core.VexRiscv.RegFilePlugin_regFile\[18\]\[19\],44.62
net4460,44.62
net10502,44.62
net11278,44.61
mgmt_buffers.la_data_in_mprj\[72\],44.605
_03151_,44.6
_07768_,44.6
_12076_,44.6
_14700_,44.6
gpio_control_in_2\[8\].shift_register\[0\],44.6
soc.core.VexRiscv.RegFilePlugin_regFile\[26\]\[26\],44.6
net4163,44.585
_01171_,44.58
_02120_,44.58
_02191_,44.58
_12344_,44.58
gpio_control_in_1a\[2\].pad_gpio_out,44.58
mgmt_buffers.la_data_in_mprj_bar\[37\],44.58
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[3\]\[31\],44.58
soc.core.VexRiscv.memory_to_writeBack_REGFILE_WRITE_DATA\[0\],44.58
net5365,44.58
net8277,44.58
_09185_,44.56
soc.core.VexRiscv.RegFilePlugin_regFile\[15\]\[18\],44.56
soc.core.interface3_bank_bus_dat_r\[2\],44.56
gpio_control_in_1\[2\].gpio_defaults\[7\],44.55
_01192_,44.54
_04502_,44.54
_06659_,44.54
_08986_,44.54
_10255_,44.54
net3364,44.54
net11065,44.54
_08849_,44.525
_10183_,44.525
net10730,44.525
_08396_,44.505
_00628_,44.5
_12693_,44.5
_14313_,44.5
_14944_,44.5
soc.core.VexRiscv.RegFilePlugin_regFile\[21\]\[24\],44.5
net313,44.5
net3031,44.5
net3647,44.5
_01587_,44.48
_01777_,44.48
_02059_,44.48
_07909_,44.48
_14658_,44.48
clknet_leaf_662_mgmt_buffers.caravel_clk,44.48
_08089_,44.46
_08941_,44.46
_09243_,44.46
gpio_control_in_2\[9\].shift_register\[6\],44.46
soc.core.VexRiscv.RegFilePlugin_regFile\[26\]\[4\],44.46
soc.core.VexRiscv._zz_execute_to_memory_REGFILE_WRITE_DATA\[24\],44.46
soc.core.storage_1\[4\]\[6\],44.46
net4932,44.46
net11579,44.46
_11364_,44.44
soc.core.VexRiscv.RegFilePlugin_regFile\[31\]\[16\],44.44
net9233,44.44
mprj_io_oeb[8],44.43
_01459_,44.42
_05060_,44.42
_06401_,44.42
soc.core.spi_master_cs_storage\[8\],44.42
_00408_,44.4
_01576_,44.4
_06574_,44.4
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[1\]\[3\],44.4
mprj_io_dm[65],44.39
_04308_,44.38
_10084_,44.38
_11622_,44.38
pll.itrim\[8\],44.38
soc.core.VexRiscv.IBusCachedPlugin_cache.io_mem_rsp_payload_data\[2\],44.38
soc.core.interface18_bank_bus_dat_r\[0\],44.38
net2939,44.38
gpio_control_in_2\[1\].gpio_defaults\[8\],44.37
_02750_,44.36
_07235_,44.36
_12184_,44.36
soc.core.gpioin0_gpioin0_mode_storage,44.36
net5337,44.36
_06977_,44.34
_14427_,44.34
_14642_,44.34
soc.core.storage\[15\]\[1\],44.34
net6020,44.34
_03554_,44.32
_12606_,44.31
_11461_,44.3
gpio_control_in_1\[2\].shift_register\[11\],44.3
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[5\]\[11\],44.3
net9744,44.3
_00482_,44.28
soc.core.VexRiscv.IBusCachedPlugin_cache.io_cpu_decode_data\[8\],44.28
_03221_,44.27
_11395_,44.26
gpio_control_in_1\[1\].shift_register\[1\],44.26
gpio_control_in_1\[3\].shift_register\[1\],44.26
clknet_leaf_156_mgmt_buffers.caravel_clk,44.26
clknet_leaf_512_mgmt_buffers.caravel_clk,44.26
net9235,44.26
gpio_control_in_2\[4\].gpio_defaults\[11\],44.255
mprj_io_out[14],44.25
_07418_,44.24
_14780_,44.24
gpio_control_in_2\[9\].shift_register\[2\],44.24
pll.pll_control.count1\[1\],44.24
net11659,44.24
_02457_,44.23
_15207_,44.22
gpio_control_in_2\[1\].resetn,44.22
_00253_,44.2
_02601_,44.2
_03099_,44.2
_04372_,44.2
soc.core.VexRiscv.RegFilePlugin_regFile\[3\]\[13\],44.2
soc.core.mgmtsoc_litespimmap_storage\[3\],44.2
net296,44.2
clknet_leaf_621_mgmt_buffers.caravel_clk,44.2
net6254,44.2
mprj_io_inp_dis[1],44.19
mgmt_buffers.la_data_in_mprj\[125\],44.185
_13467_,44.18
mgmt_buffers.la_data_in_mprj_bar\[104\],44.18
_09068_,44.165
_01643_,44.16
_07694_,44.16
_09366_,44.16
net10503,44.16
net12519,44.16
net12894,44.16
_09054_,44.145
_12353_,44.14
_14348_,44.14
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[1\]\[31\],44.14
net12883,44.14
gpio_control_in_2\[0\].gpio_defaults\[6\],44.13
soc.core.VexRiscv.RegFilePlugin_regFile\[4\]\[24\],44.13
_08226_,44.125
net9099,44.125
_06424_,44.12
_06988_,44.12
_09341_,44.105
_09138_,44.1
_12302_,44.1
_13709_,44.1
gpio_control_bidir_1\[1\].shift_register\[10\],44.1
soc.core.VexRiscv.RegFilePlugin_regFile\[17\]\[21\],44.1
_10126_,44.08
soc.core.dbg_uart_words_count\[0\],44.08
clknet_leaf_524_mgmt_buffers.caravel_clk,44.08
clknet_leaf_725_mgmt_buffers.caravel_clk,44.08
net5388,44.08
net6870,44.08
net12525,44.08
gpio_control_in_2\[5\].gpio_defaults\[7\],44.07
_04146_,44.06
_10017_,44.06
pll.ext_trim\[3\],44.06
soc.core.litespi_next_state\[2\],44.06
net2895,44.06
net5196,44.06
net10177,44.06
net10769,44.06
_06849_,44.04
_14956_,44.04
net5585,44.04
net5963,44.04
_00705_,44.02
_03258_,44.02
_04208_,44.02
_08261_,44.02
net7421,44.02
_03284_,44
_04977_,44
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[6\]\[1\],44
soc.core.VexRiscv.RegFilePlugin_regFile\[17\]\[24\],44
soc.core.VexRiscv.RegFilePlugin_regFile\[31\]\[28\],44
soc.core.storage\[10\]\[3\],44
gpio_control_in_2\[8\].gpio_defaults\[9\],43.99
net4033,43.98
_05110_,43.97
_01178_,43.96
_04392_,43.96
_07032_,43.96
_09894_,43.96
_12936_,43.96
net9402,43.96
_11770_,43.94
_12559_,43.94
gpio_control_in_1\[4\].gpio_holdover,43.94
net226,43.94
net10770,43.94
_09056_,43.925
net4481,43.925
_03392_,43.92
_04788_,43.92
_06721_,43.92
_08591_,43.92
_09544_,43.92
soc.core.dbg_uart_rx_count\[3\],43.92
clknet_leaf_1017_mgmt_buffers.caravel_clk,43.92
net8436,43.92
net12496,43.92
net7777,43.915
_08221_,43.9
gpio_control_in_2\[0\].gpio_ana_pol,43.9
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[2\]\[1\],43.9
soc.core.VexRiscv.RegFilePlugin_regFile\[8\]\[19\],43.9
clknet_leaf_306_mgmt_buffers.caravel_clk,43.9
net10294,43.9
net6458,43.885
_12766_,43.88
_13760_,43.88
_14430_,43.88
gpio_control_in_1\[0\].shift_register\[7\],43.88
gpio_control_in_1a\[3\].gpio_defaults\[3\],43.88
gpio_control_in_2\[0\].gpio_inenb,43.88
net281,43.88
net3503,43.88
net11031,43.865
_02542_,43.86
_04398_,43.86
_08567_,43.86
_12572_,43.86
_10943_,43.84
_11613_,43.84
soc.core.VexRiscv.RegFilePlugin_regFile\[22\]\[18\],43.84
soc.core.VexRiscv.RegFilePlugin_regFile\[9\]\[8\],43.84
clknet_leaf_276_mgmt_buffers.caravel_clk,43.84
gpio_control_in_1\[3\].gpio_defaults\[11\],43.83
_01886_,43.82
_11093_,43.82
_12084_,43.82
soc.core.VexRiscv.RegFilePlugin_regFile\[16\]\[5\],43.82
net316,43.82
net6149,43.82
_03531_,43.8
_10420_,43.8
soc.core.VexRiscv.RegFilePlugin_regFile\[12\]\[20\],43.8
soc.core.VexRiscv.RegFilePlugin_regFile\[6\]\[20\],43.8
clknet_leaf_1165_mgmt_buffers.caravel_clk,43.8
net9363,43.8
net11074,43.8
net6021,43.785
net7746,43.785
_00351_,43.78
_02660_,43.78
_06005_,43.78
_12209_,43.78
_14375_,43.78
net4576,43.78
net9339,43.78
soc.core.VexRiscv.RegFilePlugin_regFile\[25\]\[30\],43.76
net12092,43.76
net5998,43.745
_09848_,43.74
soc.core.VexRiscv.RegFilePlugin_regFile\[19\]\[5\],43.74
clknet_leaf_465_mgmt_buffers.caravel_clk,43.74
net9638,43.74
_07416_,43.73
_00889_,43.72
_13466_,43.72
_05108_,43.71
_10192_,43.7
_10759_,43.7
_12599_,43.7
net6584,43.7
net9090,43.7
net10970,43.7
_01677_,43.68
_02625_,43.68
_13221_,43.68
_14891_,43.68
gpio_control_in_2\[7\].shift_register\[3\],43.68
soc.core.multiregimpl52_regs1,43.68
net4477,43.68
net11962,43.68
_01568_,43.66
_02391_,43.66
_02397_,43.66
_03272_,43.66
_03527_,43.66
_04352_,43.66
_04818_,43.66
_14724_,43.66
pll.ringosc.dstage\[0\].id.ts,43.66
net4232,43.66
net5200,43.66
net6753,43.66
net7373,43.66
gpio_control_in_1\[2\].gpio_defaults\[5\],43.65
mprj_io_ib_mode_sel[13],43.65
net10768,43.645
_03329_,43.64
_10294_,43.64
_12740_,43.64
net7788,43.64
net7984,43.635
clknet_leaf_36_mgmt_buffers.caravel_clk,43.63
net9951,43.625
_01287_,43.62
_04184_,43.62
_11449_,43.62
_14832_,43.62
net312,43.62
net2798,43.62
net3178,43.62
net8721,43.62
net9022,43.62
net9310,43.62
net10300,43.62
net11644,43.62
_14444_,43.61
_11020_,43.6
_12713_,43.6
soc.core.VexRiscv.RegFilePlugin_regFile\[11\]\[23\],43.6
soc.core.VexRiscv.RegFilePlugin_regFile\[31\]\[20\],43.6
net2851,43.6
net8456,43.6
_04590_,43.58
_07603_,43.58
_09774_,43.58
_12769_,43.58
soc.core.VexRiscv.DebugPlugin_resetIt_regNext,43.58
net5131,43.58
gpio_control_in_2\[6\].gpio_defaults\[7\],43.57
_10090_,43.565
_10015_,43.56
_09609_,43.54
clknet_leaf_1043_mgmt_buffers.caravel_clk,43.54
net9109,43.54
_04313_,43.52
net5509,43.52
net7012,43.52
_12073_,43.505
_07631_,43.5
_09021_,43.5
clknet_leaf_96_mgmt_buffers.caravel_clk,43.5
clknet_leaf_834_mgmt_buffers.caravel_clk,43.5
net4710,43.5
net11482,43.5
net12902,43.5
_00893_,43.48
_04276_,43.48
_10358_,43.48
_14777_,43.48
net9147,43.48
net10314,43.475
net3091,43.465
_11518_,43.46
gpio_control_in_1a\[4\].serial_data_out,43.46
mgmt_buffers.la_data_in_mprj_bar\[107\],43.46
clknet_leaf_1144_mgmt_buffers.caravel_clk,43.46
net7060,43.46
net10398,43.45
_00815_,43.44
_12965_,43.44
gpio_control_in_2\[4\].shift_register\[4\],43.44
mgmt_buffers.la_data_in_mprj_bar\[68\],43.44
net12451,43.44
gpio_control_bidir_1\[1\].gpio_defaults\[7\],43.43
net7998,43.425
_06968_,43.42
_10305_,43.42
mgmt_buffers.la_data_in_mprj_bar\[123\],43.42
soc.core.VexRiscv.RegFilePlugin_regFile\[23\]\[20\],43.42
soc.core.VexRiscv.RegFilePlugin_regFile\[6\]\[16\],43.42
net272,43.42
net4773,43.42
net4899,43.42
net5976,43.42
gpio_control_in_1a\[3\].gpio_defaults\[7\],43.41
_07217_,43.405
_08362_,43.405
_01792_,43.4
_03327_,43.4
_11730_,43.4
clknet_leaf_695_mgmt_buffers.caravel_clk,43.4
soc.core.VexRiscv.RegFilePlugin_regFile\[29\]\[15\],43.395
_07238_,43.385
_03014_,43.38
_11607_,43.38
_13245_,43.38
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[5\]\[19\],43.38
net12432,43.38
_06273_,43.36
_06460_,43.36
_15192_,43.36
net11127,43.36
net4309,43.35
_08838_,43.345
_06279_,43.34
_12366_,43.34
_13842_,43.34
soc.core.VexRiscv.RegFilePlugin_regFile\[14\]\[24\],43.34
soc.core.VexRiscv.RegFilePlugin_regFile\[19\]\[4\],43.34
soc.core.spi_master_mosi_data\[3\],43.34
clknet_leaf_923_mgmt_buffers.caravel_clk,43.34
net3516,43.34
net3599,43.34
_06880_,43.32
_07765_,43.32
_09942_,43.32
_10840_,43.32
_13952_,43.32
_14862_,43.32
soc.core.VexRiscv.RegFilePlugin_regFile\[6\]\[0\],43.32
net3211,43.32
net4944,43.32
_10790_,43.31
net9206,43.31
_08453_,43.3
net12376,43.3
_08068_,43.28
soc.core.storage\[5\]\[6\],43.28
clknet_leaf_617_mgmt_buffers.caravel_clk,43.28
_01123_,43.26
_07180_,43.26
_07941_,43.26
soc.core.VexRiscv.RegFilePlugin_regFile\[13\]\[27\],43.26
net6527,43.26
mprj_io_dm[30],43.25
_06232_,43.24
_08596_,43.24
_11721_,43.24
gpio_control_bidir_2\[1\].shift_register\[7\],43.24
soc.core.VexRiscv.RegFilePlugin_regFile\[31\]\[19\],43.24
gpio_control_in_1\[5\].gpio_defaults\[3\],43.23
_01383_,43.22
_10343_,43.22
net10906,43.215
_04583_,43.2
_06307_,43.2
_07047_,43.2
_13960_,43.2
gpio_control_in_2\[1\].gpio_inenb,43.2
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[5\]\[0\],43.2
soc.core.spi_master_control_storage\[1\],43.2
net297,43.2
net4164,43.19
_01461_,43.18
_01513_,43.18
_13301_,43.18
gpio_control_in_2\[3\].shift_register\[6\],43.18
net12409,43.165
_10206_,43.16
_13832_,43.16
soc.core.VexRiscv.RegFilePlugin_regFile\[26\]\[19\],43.16
net11161,43.16
gpio_control_in_2\[5\].shift_register\[1\],43.145
_10972_,43.14
_11696_,43.14
_13113_,43.14
soc.core.VexRiscv.RegFilePlugin_regFile\[16\]\[10\],43.14
net7106,43.14
soc.core.VexRiscv.RegFilePlugin_regFile\[20\]\[30\],43.13
net5681,43.125
_04802_,43.12
_00560_,43.1
_01790_,43.1
_04833_,43.1
soc.core.VexRiscv.RegFilePlugin_regFile\[23\]\[28\],43.1
net8110,43.1
_03265_,43.08
_03924_,43.08
_03992_,43.08
_06954_,43.08
_11715_,43.08
soc.core.VexRiscv.RegFilePlugin_regFile\[27\]\[25\],43.08
net268,43.08
net6734,43.08
net11657,43.08
_02556_,43.06
_02626_,43.06
_03337_,43.06
clknet_leaf_747_mgmt_buffers.caravel_clk,43.06
net8224,43.06
mprj_io_dm[20],43.05
net11464,43.05
clknet_leaf_116_mgmt_buffers.caravel_clk,43.04
clknet_leaf_392_mgmt_buffers.caravel_clk,43.04
net6421,43.04
net11034,43.04
net10732,43.025
_02612_,43.02
_03072_,43.02
_07153_,43.02
soc.core.VexRiscv.IBusCachedPlugin_cache._zz_banks_0_port1\[14\],43.02
net11725,43.02
_01511_,43
_04764_,43
_12604_,43
gpio_control_in_1a\[1\].shift_register\[10\],43
net11000,42.985
_02333_,42.98
_03246_,42.98
soc.core.VexRiscv.RegFilePlugin_regFile\[26\]\[29\],42.98
gpio_control_in_2\[3\].gpio_defaults\[7\],42.97
mprj_io_dm[31],42.97
net11336,42.965
_07128_,42.96
net2978,42.96
net5082,42.96
net5158,42.96
net10378,42.96
mprj_io_oeb[12],42.95
_05047_,42.94
soc.core.dbg_uart_tx_phase\[13\],42.94
net314,42.94
clknet_leaf_706_mgmt_buffers.caravel_clk,42.94
net6536,42.94
net9831,42.94
_12264_,42.92
_14677_,42.92
mgmt_buffers.la_data_in_enable\[40\],42.92
soc.core.VexRiscv.RegFilePlugin_regFile\[20\]\[31\],42.92
net4954,42.92
net8347,42.92
gpio_control_in_1\[5\].gpio_ana_en,42.915
net6829,42.905
net9195,42.905
_01271_,42.9
soc.core.VexRiscv.RegFilePlugin_regFile\[20\]\[15\],42.9
soc.core.interface9_bank_bus_dat_r\[5\],42.9
_05078_,42.89
_01610_,42.88
_10891_,42.88
_12920_,42.88
_14091_,42.88
_14540_,42.88
gpio_control_in_1\[4\].shift_register\[1\],42.88
soc.core.dbg_uart_tx_data_uartwishbonebridge_rs232phytx_next_value2\[6\],42.86
soc.core.mgmtsoc_reload_storage\[25\],42.86
clknet_leaf_920_mgmt_buffers.caravel_clk,42.86
_04082_,42.84
_13671_,42.84
soc.core.mgmtsoc_vexriscv_debug_bus_dat_r\[10\],42.84
soc.core.storage\[15\]\[4\],42.84
net4624,42.825
_01387_,42.82
clknet_leaf_821_mgmt_buffers.caravel_clk,42.82
net5275,42.82
net11082,42.82
_00823_,42.8
_02033_,42.8
_02545_,42.8
_08937_,42.8
net5185,42.785
_00199_,42.78
_06435_,42.78
_09726_,42.78
_14173_,42.78
soc.core.interface9_bank_bus_dat_r\[2\],42.78
clknet_leaf_506_mgmt_buffers.caravel_clk,42.78
net3098,42.78
net3973,42.78
net8988,42.78
net12986,42.78
_00950_,42.76
_04545_,42.76
_06785_,42.76
_14425_,42.76
_15201_,42.76
soc.core.VexRiscv.IBusCachedPlugin_cache._zz_fetchStage_read_waysValues_0_tag_valid_2\[12\],42.76
net7559,42.76
net8198,42.76
net10563,42.76
mgmt_buffers.la_data_in_mprj\[44\],42.745
_00858_,42.74
_09897_,42.74
_14423_,42.74
pll.ringosc.dstage\[6\].id.out,42.74
mprj_io_dm[70],42.73
net5979,42.725
_11629_,42.72
gpio_control_in_2\[9\].shift_register\[4\],42.72
net3009,42.72
soc.core.multiregimpl131_regs0,42.7
net325,42.7
clknet_leaf_1085_mgmt_buffers.caravel_clk,42.7
net8059,42.7
_03144_,42.69
_10428_,42.68
_03201_,42.67
_08944_,42.66
_09995_,42.66
_10068_,42.66
mgmt_buffers.la_data_in_mprj_bar\[19\],42.66
net4843,42.66
net10279,42.66
_06243_,42.64
_01962_,42.62
_07640_,42.62
_07672_,42.62
_09885_,42.62
soc.core.VexRiscv.RegFilePlugin_regFile\[28\]\[27\],42.62
net2790,42.62
gpio_control_in_2\[6\].gpio_defaults\[3\],42.61
_00055_,42.6
_02531_,42.6
_06248_,42.6
_09887_,42.6
_10469_,42.6
_13679_,42.6
net8440,42.6
net11634,42.6
_13029_,42.58
soc.core.storage\[12\]\[6\],42.58
net6847,42.58
net8876,42.58
net9242,42.58
_10159_,42.56
gpio_control_in_2\[3\].shift_register\[4\],42.56
soc.core.multiregimpl125_regs0,42.56
_09699_,42.545
_01683_,42.54
_02916_,42.54
_09377_,42.54
_14979_,42.54
soc.core.mgmtsoc_litespisdrphycore_sr_out\[25\],42.54
clknet_leaf_890_mgmt_buffers.caravel_clk,42.54
clknet_leaf_997_mgmt_buffers.caravel_clk,42.54
net4784,42.54
_11421_,42.52
soc.core.mgmtsoc_vexriscv_i_cmd_payload_data\[5\],42.52
net4940,42.52
net6657,42.52
net7564,42.505
_00613_,42.5
_03286_,42.5
_03370_,42.5
_04517_,42.5
_07699_,42.5
gpio_control_in_1\[4\].shift_register\[4\],42.5
gpio_control_in_1a\[3\].resetn_out,42.5
soc.core.dbg_uart_count\[11\],42.5
soc.core.spi_master_mosi_data\[0\],42.49
_04043_,42.48
clknet_leaf_140_mgmt_buffers.caravel_clk,42.48
net6728,42.48
net5289,42.475
_13093_,42.465
net11075,42.465
_00503_,42.46
_03134_,42.46
_03416_,42.46
_03418_,42.46
gpio_control_in_2\[5\].shift_register\[6\],42.46
net5249,42.45
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[9\]\[1\],42.44
_08179_,42.425
net8335,42.425
_02343_,42.42
_09875_,42.42
_13188_,42.42
_14766_,42.42
gpio_control_in_1\[5\].shift_register\[0\],42.42
soc.core.VexRiscv.execute_CsrPlugin_csr_836,42.42
net4743,42.42
net12427,42.42
net3824,42.415
mprj_io_oeb[14],42.41
_03187_,42.4
_04582_,42.4
_09550_,42.4
_14233_,42.4
gpio_control_in_2\[2\].shift_register\[1\],42.4
soc.core.VexRiscv.RegFilePlugin_regFile\[10\]\[24\],42.4
_04563_,42.38
_13837_,42.38
soc.core.memdat_1\[6\],42.38
soc.core.mgmtsoc_vexriscv_i_cmd_payload_data\[22\],42.38
net13013,42.38
clknet_leaf_737_mgmt_buffers.caravel_clk,42.37
_01497_,42.36
_06183_,42.36
_07981_,42.36
_12266_,42.36
soc.core.dbg_uart_address\[4\],42.36
soc.core.interface9_bank_bus_dat_r\[13\],42.36
net5613,42.36
net9009,42.36
net11722,42.36
_11637_,42.355
gpio_control_in_2\[2\].gpio_defaults\[6\],42.35
_09681_,42.34
_12914_,42.34
_02497_,42.32
_09537_,42.32
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[8\]\[10\],42.32
soc.core.VexRiscv.RegFilePlugin_regFile\[25\]\[18\],42.32
net3340,42.32
net5053,42.32
_06589_,42.3
_13160_,42.3
soc.core.VexRiscv.RegFilePlugin_regFile\[7\]\[29\],42.3
soc.core.storage\[12\]\[0\],42.3
net11656,42.3
mgmt_buffers.la_data_in_mprj\[17\],42.285
_10104_,42.28
_13594_,42.28
clknet_leaf_868_mgmt_buffers.caravel_clk,42.28
net10699,42.28
_08285_,42.265
_03167_,42.26
_09526_,42.26
_02778_,42.25
_05092_,42.25
mprj_io_ib_mode_sel[17],42.25
_01635_,42.24
_12165_,42.24
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[1\]\[5\],42.24
net215,42.24
net2806,42.24
net5302,42.24
net5910,42.24
net12928,42.24
_03831_,42.23
mprj_io_dm[1],42.23
mprj_io_inp_dis[13],42.23
_06582_,42.22
_10484_,42.22
soc.core.VexRiscv.RegFilePlugin_regFile\[24\]\[21\],42.22
soc.core.spi_master_mosi_data\[5\],42.205
_02146_,42.2
gpio_control_in_2\[3\].gpio_defaults\[12\],42.2
soc.core.VexRiscv.RegFilePlugin_regFile\[0\]\[21\],42.2
soc.core.VexRiscv.RegFilePlugin_regFile\[3\]\[20\],42.2
clknet_leaf_686_mgmt_buffers.caravel_clk,42.2
net2838,42.2
_03340_,42.18
_06957_,42.18
_09806_,42.18
soc.core.VexRiscv.RegFilePlugin_regFile\[7\]\[22\],42.18
net10273,42.18
net12871,42.18
gpio_control_in_2\[6\].gpio_defaults\[8\],42.17
_02918_,42.16
_06691_,42.16
net139,42.16
net4258,42.16
net12903,42.16
_13708_,42.14
net12452,42.14
_13448_,42.135
net11063,42.13
_04438_,42.12
_04843_,42.12
_06497_,42.12
_08661_,42.12
_09062_,42.12
_14581_,42.12
gpio_control_in_2\[5\].pad_gpio_out,42.12
mgmt_buffers.la_data_in_mprj_bar\[109\],42.12
soc.core.VexRiscv.HazardSimplePlugin_writeBackBuffer_payload_address\[4\],42.12
clknet_leaf_254_mgmt_buffers.caravel_clk,42.12
clknet_leaf_691_mgmt_buffers.caravel_clk,42.12
net6853,42.12
net10080,42.12
net11478,42.12
_02185_,42.1
_02633_,42.1
_06733_,42.1
_11930_,42.1
_13506_,42.1
net11119,42.1
_08482_,42.085
_12613_,42.08
_12901_,42.08
gpio_control_in_1\[2\].shift_register\[1\],42.08
gpio_control_in_1a\[0\].shift_register\[3\],42.08
clknet_leaf_417_mgmt_buffers.caravel_clk,42.08
net10183,42.08
_03292_,42.06
soc.core.VexRiscv.CsrPlugin_hadException,42.06
net10727,42.055
mprj_io_oeb[9],42.05
_02889_,42.04
_06753_,42.04
_12964_,42.04
soc.core.storage\[8\]\[6\],42.04
soc.core.storage_1\[5\]\[6\],42.04
net9395,42.04
net12306,42.04
net11633,42.02
mprj_io_analog_pol[24],42.01
net10671,42.005
_00251_,42
_01728_,42
_13136_,42
_13166_,42
gpio_control_in_2\[9\].shift_register\[10\],42
net6976,42
_02898_,41.98
_06433_,41.98
_07068_,41.98
_13648_,41.98
_13677_,41.98
soc.core.VexRiscv.RegFilePlugin_regFile\[17\]\[30\],41.98
net12731,41.98
_06265_,41.96
_07135_,41.96
_10524_,41.96
_11590_,41.96
_13250_,41.96
gpio_control_in_1a\[1\].gpio_defaults\[7\],41.95
mprj_io_analog_en[13],41.95
mprj_io_dm[6],41.95
_00024_,41.94
_05680_,41.94
_06984_,41.94
_08268_,41.94
_13347_,41.94
_15205_,41.94
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[9\]\[27\],41.94
_05166_,41.93
gpio_control_in_1a\[1\].shift_register\[8\],41.92
soc.core.VexRiscv.RegFilePlugin_regFile\[4\]\[16\],41.92
soc.core.VexRiscv.RegFilePlugin_regFile\[6\]\[22\],41.92
clknet_leaf_261_mgmt_buffers.caravel_clk,41.92
_02365_,41.9
soc.core.mgmtsoc_value_status\[8\],41.9
clknet_leaf_608_mgmt_buffers.caravel_clk,41.9
net4385,41.9
net8751,41.9
mprj_io_oeb[15],41.89
net4236,41.885
_04578_,41.88
_04841_,41.88
_14984_,41.88
_14999_,41.88
net9381,41.88
_08165_,41.865
_05004_,41.86
_06253_,41.86
_06410_,41.86
_06447_,41.86
_10156_,41.86
_14330_,41.86
soc.core.VexRiscv.RegFilePlugin_regFile\[16\]\[27\],41.86
net205,41.86
net6669,41.86
net11319,41.86
mprj_io_dm[64],41.85
_06365_,41.84
mgmt_buffers.la_data_in_mprj_bar\[70\],41.84
net10630,41.84
_00261_,41.82
_05049_,41.82
_06396_,41.82
_09069_,41.82
_12867_,41.82
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[12\]\[5\],41.82
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[4\]\[19\],41.82
soc.core.rs232phy_rs232phyrx_next_state,41.82
net3427,41.82
net3777,41.82
_08361_,41.805
_02163_,41.8
_11729_,41.8
net9629,41.8
net11724,41.8
net10625,41.79
_02393_,41.78
_04518_,41.78
_06305_,41.78
_07658_,41.78
soc.core.VexRiscv.RegFilePlugin_regFile\[3\]\[14\],41.78
soc.core.storage_1\[0\]\[0\],41.78
_02697_,41.76
_12700_,41.76
gpio_control_bidir_2\[0\].shift_register\[4\],41.76
gpio_control_in_2\[0\].shift_register\[7\],41.76
soc.core.mgmtsoc_litespisdrphycore_sr_out\[10\],41.76
net4976,41.76
net8589,41.76
gpio_control_in_1a\[2\].gpio_defaults\[2\],41.75
gpio_control_in_2\[1\].gpio_defaults\[5\],41.75
_08919_,41.74
_09756_,41.74
_14299_,41.74
soc.core.VexRiscv.IBusCachedPlugin_cache.decodeStage_mmuRsp_physicalAddress\[9\],41.74
soc.core.VexRiscv.RegFilePlugin_regFile\[21\]\[21\],41.74
soc.core.VexRiscv.execute_to_memory_PC\[19\],41.74
soc.core.storage\[3\]\[5\],41.74
net8818,41.74
net10084,41.74
net10110,41.74
net11731,41.74
net10632,41.735
_01868_,41.72
net11040,41.72
_08351_,41.705
net9081,41.705
_11732_,41.7
gpio_control_bidir_1\[0\].shift_register\[6\],41.7
_07604_,41.68
_14958_,41.68
net3540,41.68
net7219,41.68
_06704_,41.665
_04593_,41.66
gpio_control_in_2\[0\].gpio_defaults\[3\],41.65
_07277_,41.645
net12190,41.64
_04064_,41.62
_05040_,41.62
_10411_,41.62
_11915_,41.62
gpio_control_in_2\[2\].resetn,41.62
soc.core.VexRiscv.RegFilePlugin_regFile\[2\]\[3\],41.62
net3936,41.62
net9412,41.62
_00293_,41.6
net4729,41.6
net12890,41.6
_08848_,41.595
_06352_,41.585
clknet_leaf_131_mgmt_buffers.caravel_clk,41.58
net3758,41.58
net2674,41.58
soc.core.dbg_uart_rx_phase\[17\],41.575
_08479_,41.565
net4130,41.565
_04542_,41.56
mprj_io_ib_mode_sel[20],41.55
_06826_,41.54
net8111,41.54
gpio_control_in_1a\[0\].gpio_defaults\[6\],41.53
mprj_io_out[7],41.53
net7399,41.525
_00971_,41.52
_02306_,41.52
_12185_,41.52
gpio_control_bidir_2\[2\].gpio_inenb,41.52
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[3\]\[4\],41.52
soc.core.VexRiscv.RegFilePlugin_regFile\[16\]\[20\],41.52
soc.core.dbg_uart_tx_data\[5\],41.52
_03874_,41.5
_06734_,41.5
mgmt_buffers.la_data_in_mprj\[16\],41.5
net300,41.5
clknet_leaf_945_mgmt_buffers.caravel_clk,41.5
net7662,41.5
net11010,41.5
net12345,41.5
_10112_,41.485
_00865_,41.48
_02763_,41.48
soc.core.VexRiscv.RegFilePlugin_regFile\[17\]\[17\],41.48
soc.core.dbg_uart_tx_phase\[3\],41.48
_01833_,41.46
_03188_,41.46
_13741_,41.46
gpio_control_in_2\[2\].pad_gpio_outenb,41.46
soc.core.storage\[8\]\[7\],41.46
net11637,41.445
_01343_,41.44
_06969_,41.44
_12300_,41.44
pll.ext_trim\[0\],41.44
soc.core.VexRiscv.RegFilePlugin_regFile\[8\]\[16\],41.44
net7248,41.44
net9912,41.44
_10026_,41.42
net10741,41.415
_01586_,41.4
_02733_,41.4
_03273_,41.4
_04565_,41.4
_06823_,41.4
_07782_,41.4
_13143_,41.4
_14846_,41.4
soc.core.VexRiscv.memory_to_writeBack_REGFILE_WRITE_DATA\[26\],41.4
net4449,41.4
net4642,41.4
net12344,41.4
net10491,41.39
_06584_,41.38
clknet_leaf_882_mgmt_buffers.caravel_clk,41.38
net4303,41.38
net10137,41.37
net3880,41.365
net10824,41.365
_04491_,41.36
_05513_,41.36
_08632_,41.36
soc.core.VexRiscv.RegFilePlugin_regFile\[26\]\[22\],41.36
soc.core.dbg_uart_address\[18\],41.36
soc.core.interface9_bank_bus_dat_r\[1\],41.36
clknet_leaf_854_mgmt_buffers.caravel_clk,41.36
net6920,41.36
net7862,41.36
_14166_,41.34
net3821,41.335
net6637,41.325
_06369_,41.32
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[6\]\[30\],41.32
soc.core.VexRiscv.RegFilePlugin_regFile\[2\]\[8\],41.32
soc.core.VexRiscv.RegFilePlugin_regFile\[3\]\[22\],41.32
_10505_,41.3
_13694_,41.3
gpio_control_in_1a\[2\].gpio_vtrip_sel,41.3
gpio_control_in_1a\[5\].pad_gpio_outenb,41.3
pll.itrim\[15\],41.3
clknet_leaf_443_mgmt_buffers.caravel_clk,41.3
_03849_,41.28
_04427_,41.28
_09829_,41.28
_10142_,41.28
_12256_,41.28
_12718_,41.28
_12922_,41.28
soc.core.VexRiscv.IBusCachedPlugin_cache._zz_1,41.28
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[7\]\[14\],41.28
net6078,41.28
net12408,41.28
net12859,41.28
_10753_,41.27
_03270_,41.26
_10582_,41.26
_12259_,41.26
pll.itrim\[14\],41.26
soc.core.count\[1\],41.26
clknet_leaf_640_mgmt_buffers.caravel_clk,41.26
net10518,41.25
_08562_,41.245
_01003_,41.24
_01331_,41.24
_04421_,41.24
_07352_,41.24
_07803_,41.24
_10720_,41.24
_13058_,41.24
soc.core.VexRiscv.RegFilePlugin_regFile\[27\]\[19\],41.24
clknet_leaf_1129_mgmt_buffers.caravel_clk,41.24
net4224,41.24
net5885,41.235
_07779_,41.22
_09037_,41.22
_13605_,41.22
gpio_control_in_1a\[1\].shift_register\[9\],41.22
soc.core.mgmtsoc_litespisdrphycore_clk,41.22
soc.core.storage\[15\]\[3\],41.22
net4968,41.22
net10941,41.22
gpio_control_in_2\[4\].gpio_defaults\[6\],41.21
net4562,41.205
_00474_,41.2
_06568_,41.2
_14735_,41.19
mprj_io_inp_dis[26],41.19
gpio_control_in_2\[8\].shift_register\[3\],41.18
_10930_,41.17
net8409,41.165
_03861_,41.16
_06620_,41.16
mgmt_buffers.la_data_in_enable\[43\],41.16
soc.core.VexRiscv.CsrPlugin_mtvec_base\[2\],41.16
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[9\]\[3\],41.16
soc.core.interface19_bank_bus_dat_r\[1\],41.16
soc.core.uart_rx_fifo_readable,41.16
clknet_leaf_357_mgmt_buffers.caravel_clk,41.16
net8798,41.16
net12719,41.16
net4291,41.145
net4582,41.145
_01702_,41.14
_09055_,41.14
_11207_,41.14
net6628,41.14
_04746_,41.12
_05471_,41.12
_13707_,41.12
soc.core.storage_1\[9\]\[1\],41.12
clknet_leaf_892_mgmt_buffers.caravel_clk,41.12
net4289,41.12
net8897,41.12
net10985,41.12
mgmt_buffers.la_data_in_mprj\[37\],41.115
gpio_control_in_2\[3\].gpio_defaults\[6\],41.11
_14332_,41.1
mgmt_buffers.la_data_in_mprj_bar\[127\],41.1
clknet_leaf_769_mgmt_buffers.caravel_clk,41.1
_00419_,41.08
_06037_,41.08
_07075_,41.08
clknet_leaf_4_mgmt_buffers.caravel_clk,41.08
net4765,41.08
_08404_,41.065
net11323,41.065
_06791_,41.06
soc.core.VexRiscv.RegFilePlugin_regFile\[18\]\[4\],41.06
net3604,41.06
net6313,41.06
mprj_io_out[4],41.05
_00445_,41.04
_02885_,41.04
_11800_,41.04
_11938_,41.04
_14140_,41.04
soc.core.interface3_bank_bus_dat_r\[11\],41.04
mprj_io_oeb[11],41.03
soc.core.VexRiscv.CsrPlugin_mtvec_base\[11\],41.02
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[5\]\[31\],41.02
soc.core.VexRiscv.RegFilePlugin_regFile\[26\]\[25\],41.02
soc.core.mgmtsoc_vexriscv_reset_debug_logic,41.02
net7918,41.02
net12900,41.02
_07274_,41.005
_01430_,41
_10108_,41
_13332_,41
_14345_,41
gpio_control_bidir_2\[2\].gpio_ana_en,41
soc.core.VexRiscv.RegFilePlugin_regFile\[29\]\[26\],41
soc.core.mgmtsoc_litespisdrphycore_sr_out\[30\],41
soc.core.multiregimpl70_regs1,41
net8847,40.985
_01636_,40.98
_01981_,40.98
_02629_,40.98
_14508_,40.98
soc.core.multiregimpl8_regs0,40.98
clknet_leaf_206_mgmt_buffers.caravel_clk,40.98
net4948,40.98
net8759,40.98
gpio_control_bidir_2\[0\].gpio_defaults\[5\],40.97
_07674_,40.96
_10264_,40.96
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[2\]\[4\],40.96
soc.core.VexRiscv.RegFilePlugin_regFile\[0\]\[16\],40.96
soc.core.VexRiscv.RegFilePlugin_regFile\[30\]\[25\],40.96
net8781,40.96
gpio_control_in_1\[0\].gpio_defaults\[11\],40.95
_00583_,40.94
_00825_,40.94
_00919_,40.94
_03260_,40.94
_06496_,40.94
_14222_,40.94
soc.core.VexRiscv.RegFilePlugin_regFile\[2\]\[18\],40.94
soc.core.spi_master_mosi_data\[2\],40.94
_00433_,40.92
_10286_,40.92
soc.core.VexRiscv.RegFilePlugin_regFile\[27\]\[17\],40.92
gpio_control_in_2\[6\].gpio_holdover,40.915
net5807,40.905
_00254_,40.9
_01040_,40.9
_01969_,40.9
_04011_,40.9
_04301_,40.9
_04454_,40.9
_06456_,40.9
soc.core.VexRiscv.RegFilePlugin_regFile\[12\]\[1\],40.9
net12801,40.9
_04809_,40.88
_07628_,40.88
_11646_,40.88
soc.core.VexRiscv.dBusWishbone_DAT_MOSI\[10\],40.88
soc.core.gpioin4_gpioin4_in_pads_n_d,40.88
net137,40.88
clknet_leaf_823_mgmt_buffers.caravel_clk,40.88
mgmt_buffers.la_data_in_mprj\[109\],40.875
net4322,40.865
net8124,40.865
_04018_,40.86
_06508_,40.86
mgmt_buffers.la_data_in_mprj_bar\[16\],40.86
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[7\]\[1\],40.86
soc.core.VexRiscv.RegFilePlugin_regFile\[23\]\[10\],40.86
soc.core.VexRiscv.RegFilePlugin_regFile\[2\]\[14\],40.86
soc.core.storage\[9\]\[7\],40.86
net3769,40.86
net9168,40.86
_12873_,40.84
_13797_,40.84
net3070,40.825
net3221,40.825
_09340_,40.82
_10584_,40.815
_07662_,40.81
_11610_,40.81
_00039_,40.8
_01188_,40.8
_09712_,40.8
gpio_control_in_1\[2\].shift_register\[3\],40.8
soc.core.VexRiscv.RegFilePlugin_regFile\[14\]\[22\],40.8
net9030,40.8
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[0\]\[8\],40.79
net11073,40.785
_02369_,40.78
_03179_,40.78
soc.core.VexRiscv.RegFilePlugin_regFile\[6\]\[19\],40.78
soc.core.interface3_bank_bus_dat_r\[31\],40.78
net7517,40.78
net11355,40.78
_08195_,40.765
net3815,40.765
_14324_,40.76
gpio_control_in_2\[4\].shift_register\[1\],40.76
_14426_,40.755
gpio_control_in_1a\[1\].gpio_defaults\[8\],40.75
_08300_,40.745
_06618_,40.74
_09912_,40.74
_10538_,40.74
net4519,40.74
net2615,40.74
_13845_,40.73
_02485_,40.72
_06887_,40.72
_07953_,40.72
_08939_,40.72
_09323_,40.72
net8816,40.72
mprj_io_out[16],40.71
net8843,40.705
_00192_,40.7
_02614_,40.7
_08257_,40.7
_09616_,40.7
net11957,40.7
net12784,40.7
_07093_,40.68
_10874_,40.68
soc.core.mgmtsoc_value\[11\],40.68
net7907,40.665
_06752_,40.66
_10312_,40.66
_11444_,40.66
clknet_leaf_413_mgmt_buffers.caravel_clk,40.66
net3227,40.66
net4615,40.66
net8180,40.66
_02377_,40.64
_06533_,40.64
_14571_,40.64
soc.core.mgmtsoc_load_storage\[2\],40.64
net5026,40.64
net12132,40.64
mgmt_buffers.la_data_in_mprj\[49\],40.625
_01193_,40.62
_09945_,40.62
_14317_,40.62
gpio_control_in_1\[0\].pad_gpio_outenb,40.62
gpio_control_in_2\[3\].gpio_inenb,40.615
gpio_control_in_2\[4\].gpio_inenb,40.615
_07811_,40.6
_10195_,40.6
soc.core.VexRiscv.RegFilePlugin_regFile\[12\]\[27\],40.6
clknet_leaf_899_mgmt_buffers.caravel_clk,40.6
net6745,40.6
net5048,40.585
_08007_,40.58
_11484_,40.58
_13841_,40.58
gpio_control_bidir_1\[1\].gpio_outenb,40.58
soc.core.VexRiscv.IBusCachedPlugin_cache.io_cpu_fetch_mmuRsp_physicalAddress\[12\],40.58
net9116,40.58
net11451,40.58
_00727_,40.56
_04462_,40.56
_07360_,40.56
_14788_,40.56
clknet_leaf_696_mgmt_buffers.caravel_clk,40.56
net2913,40.56
net5036,40.56
net6700,40.56
_13501_,40.55
gpio_control_in_1\[5\].gpio_defaults\[5\],40.55
_00280_,40.54
_02953_,40.54
_04610_,40.54
_12325_,40.54
mprj_io_dm[23],40.53
mgmt_buffers.la_data_in_mprj\[104\],40.525
net3199,40.525
_01084_,40.52
_04514_,40.52
_10010_,40.52
_11552_,40.52
_13514_,40.52
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[0\]\[4\],40.52
soc.core.mgmtsoc_litespimmap_count\[6\],40.52
net4877,40.52
net10169,40.52
net10421,40.505
_03405_,40.5
_10318_,40.5
soc.core.VexRiscv.RegFilePlugin_regFile\[19\]\[18\],40.5
net6984,40.5
_09090_,40.495
_10352_,40.48
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[15\]\[1\],40.48
soc.core.VexRiscv.RegFilePlugin_regFile\[17\]\[20\],40.48
clknet_leaf_928_mgmt_buffers.caravel_clk,40.48
_00330_,40.46
_07009_,40.46
_12337_,40.46
gpio_control_in_2\[3\].shift_register\[7\],40.46
net8748,40.45
_07367_,40.445
_03919_,40.44
_04640_,40.44
_08127_,40.44
_10396_,40.44
_12155_,40.44
_13796_,40.44
soc.core.VexRiscv.RegFilePlugin_regFile\[30\]\[0\],40.44
soc.core.VexRiscv._zz_execute_to_memory_REGFILE_WRITE_DATA\[5\],40.44
clknet_leaf_251_mgmt_buffers.caravel_clk,40.44
net6521,40.425
_01050_,40.42
_02716_,40.42
_03364_,40.42
_04807_,40.42
net11090,40.405
_00486_,40.4
_02026_,40.4
_04430_,40.4
_11553_,40.4
_13874_,40.4
gpio_control_bidir_2\[1\].shift_register\[3\],40.4
soc.core.VexRiscv.RegFilePlugin_regFile\[7\]\[25\],40.4
soc.core.storage\[11\]\[7\],40.4
clknet_leaf_860_mgmt_buffers.caravel_clk,40.4
net5253,40.4
net9453,40.4
_03912_,40.38
_08647_,40.38
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[6\]\[13\],40.38
soc.core.VexRiscv.IBusCachedPlugin_cache.io_cpu_decode_data\[10\],40.38
soc.core.storage\[14\]\[1\],40.38
net8636,40.38
_02558_,40.36
_04289_,40.36
_06431_,40.36
soc.core.VexRiscv._zz_execute_to_memory_REGFILE_WRITE_DATA\[7\],40.36
clknet_leaf_462_mgmt_buffers.caravel_clk,40.36
_00334_,40.34
_14128_,40.34
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[1\]\[8\],40.34
soc.core.storage\[9\]\[2\],40.34
net3193,40.34
net7958,40.34
soc.core.multiregimpl76_regs0,40.32
net8862,40.32
net12950,40.32
_02235_,40.3
_11702_,40.3
soc.core.storage_1\[6\]\[6\],40.3
net11738,40.3
net12101,40.3
_00256_,40.28
_03316_,40.28
_04085_,40.28
_15019_,40.28
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[0\]\[22\],40.28
soc.core.interface9_bank_bus_dat_r\[6\],40.28
net9560,40.28
net12281,40.28
gpio_control_in_1\[3\].gpio_defaults\[7\],40.27
mprj_io_dm[47],40.27
net5510,40.265
_02253_,40.26
_02876_,40.26
_03580_,40.26
_07921_,40.26
_09208_,40.26
soc.core.dbg_uart_address\[28\],40.26
net5272,40.26
net11012,40.26
net10802,40.245
_01563_,40.24
_02000_,40.24
_02135_,40.24
net7785,40.24
net8624,40.24
_03505_,40.22
_11091_,40.22
pll.itrim\[25\],40.22
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[5\]\[22\],40.22
soc.core.spi_master_clk_divider1\[1\],40.22
net4440,40.22
_03995_,40.21
net10121,40.205
_01290_,40.2
_03242_,40.2
_06888_,40.2
_08112_,40.2
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[13\]\[17\],40.2
clknet_leaf_587_mgmt_buffers.caravel_clk,40.2
net4223,40.185
_09532_,40.18
_11041_,40.18
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[9\]\[4\],40.18
net8693,40.18
gpio_control_in_1a\[3\].gpio_defaults\[2\],40.17
_10481_,40.16
_11667_,40.16
gpio_control_in_1a\[5\].shift_register\[11\],40.16
soc.core.VexRiscv.RegFilePlugin_regFile\[3\]\[28\],40.16
soc.core.multiregimpl92_regs0,40.16
net3918,40.16
net8515,40.145
_02877_,40.14
_07351_,40.14
_08797_,40.14
_10350_,40.14
_13273_,40.14
soc.core.storage_1\[10\]\[4\],40.14
net2809,40.14
net5336,40.14
net11697,40.13
net4214,40.125
_02018_,40.12
_06745_,40.12
_10779_,40.12
_13687_,40.12
net7585,40.12
_07690_,40.1
_10308_,40.1
_12962_,40.1
soc.core.mgmtsoc_value_status\[9\],40.1
net9219,40.1
net12106,40.1
net6977,40.095
_07617_,40.08
_07857_,40.08
_10596_,40.08
soc.core.VexRiscv.RegFilePlugin_regFile\[27\]\[22\],40.08
soc.core.uart_rx_fifo_level0\[3\],40.08
net241,40.08
net5525,40.08
net6471,40.08
net6511,40.08
net8673,40.08
gpio_control_in_2\[0\].gpio_holdover,40.075
net9427,40.065
net10291,40.065
_06336_,40.06
_10011_,40.06
_14896_,40.06
net8544,40.045
_10115_,40.04
_12291_,40.04
soc.core.VexRiscv.RegFilePlugin_regFile\[19\]\[13\],40.04
net2807,40.04
gpio_control_in_1a\[2\].gpio_outenb,40.035
_06527_,40.02
_06588_,40.02
_06976_,40.02
_08356_,40.02
_10908_,40.02
_14502_,40.02
_15195_,40.02
gpio_control_bidir_1\[1\].gpio_defaults\[6\],40.02
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[2\]\[0\],40.02
soc.core.VexRiscv.RegFilePlugin_regFile\[9\]\[21\],40.02
clknet_leaf_459_mgmt_buffers.caravel_clk,40.02
net2945,40.02
net8181,40.015
net9960,40.015
_09332_,40
soc.core.storage_1\[11\]\[1\],40
net10689,39.995
net10908,39.985
_05497_,39.98
_10404_,39.98
_11426_,39.98
soc.core.multiregimpl90_regs0,39.98
soc.core.uart_phy_tx_count\[2\],39.98
net6954,39.98
net8675,39.98
net12904,39.98
net4557,39.965
_00611_,39.96
_04343_,39.96
_04812_,39.96
_07261_,39.96
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[10\]\[16\],39.96
soc.core.la_ien_storage\[74\],39.96
net7920,39.95
_09692_,39.945
net9568,39.945
_00431_,39.94
_02275_,39.94
_02611_,39.94
_06881_,39.94
_09808_,39.94
soc.core.VexRiscv.RegFilePlugin_regFile\[20\]\[26\],39.94
net12889,39.94
net4778,39.925
_12771_,39.92
pll.ext_trim\[2\],39.92
soc.core.storage_1\[2\]\[0\],39.92
mprj_io_analog_sel[0],39.91
_01940_,39.9
_04457_,39.9
_08984_,39.9
_10426_,39.9
_13982_,39.9
_14498_,39.9
gpio_control_in_1\[1\].pad_gpio_outenb,39.9
soc.core.VexRiscv.RegFilePlugin_regFile\[29\]\[14\],39.9
soc.core.spi_master_miso\[4\],39.9
net4739,39.9
net10269,39.9
net6785,39.895
net8449,39.895
_08391_,39.885
_08491_,39.885
clknet_leaf_347_mgmt_buffers.caravel_clk,39.885
_04845_,39.88
_06889_,39.88
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[4\]\[5\],39.88
net8150,39.865
_00485_,39.86
_02097_,39.86
clknet_leaf_1075_mgmt_buffers.caravel_clk,39.86
net12453,39.86
gpio_control_in_1a\[4\].gpio_defaults\[9\],39.85
mgmt_buffers.la_data_in_mprj\[102\],39.845
_01297_,39.84
_06471_,39.84
_10324_,39.84
net4345,39.84
net8488,39.835
net5136,39.83
_05076_,39.82
_06632_,39.82
gpio_control_in_2\[8\].shift_register\[5\],39.82
gpio_control_in_2\[9\].shift_register\[11\],39.82
soc.core.multiregimpl133_regs0,39.82
clknet_leaf_411_mgmt_buffers.caravel_clk,39.82
net3438,39.82
net9141,39.82
net6750,39.805
_03317_,39.8
_03982_,39.8
net9061,39.8
net9158,39.8
_05124_,39.79
net11221,39.785
_06855_,39.78
_08517_,39.78
_13491_,39.78
gpio_control_bidir_1\[0\].shift_register\[9\],39.78
soc.core.VexRiscv.CsrPlugin_selfException_payload_badAddr\[31\],39.78
net8122,39.78
net11734,39.78
mprj_io_oeb[5],39.77
net8928,39.765
net11019,39.76
net10369,39.75
_07218_,39.74
_11946_,39.74
_14824_,39.74
soc.core.VexRiscv.RegFilePlugin_regFile\[24\]\[4\],39.74
_14993_,39.73
mprj_io_vtrip_sel[19],39.73
_02527_,39.72
_02948_,39.72
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[10\]\[2\],39.72
_14448_,39.71
_03217_,39.7
_14119_,39.7
pll.pll_control.count1\[0\],39.7
soc.core.mgmtsoc_load_storage\[16\],39.7
net3953,39.7
net12539,39.7
gpio_control_in_2\[3\].gpio_holdover,39.695
_04987_,39.68
_10365_,39.68
soc.core.dbg_uart_address\[8\],39.68
_11510_,39.67
_09843_,39.665
net3379,39.665
_00530_,39.66
_07726_,39.66
_09936_,39.66
_13706_,39.66
soc.core.storage\[12\]\[4\],39.66
gpio_control_in_1a\[5\].gpio_defaults\[10\],39.65
_06744_,39.64
_07399_,39.64
_10398_,39.64
soc.core.mgmtsoc_vexriscv_i_cmd_payload_address\[6\],39.64
net3463,39.64
net6323,39.64
net10193,39.64
gpio_control_in_1\[2\].gpio_defaults\[2\],39.63
net9578,39.63
soc.core.interface8_bank_bus_dat_r\[0\],39.62
soc.core.mgmtsoc_bus_errors\[0\],39.62
net6327,39.62
net10463,39.615
net6989,39.605
_06697_,39.6
_09215_,39.6
soc.core.VexRiscv.RegFilePlugin_regFile\[16\]\[4\],39.6
soc.core.multiregimpl77_regs1,39.6
clknet_leaf_38_mgmt_buffers.caravel_clk,39.6
clknet_leaf_147_mgmt_buffers.caravel_clk,39.6
gpio_control_in_2\[6\].gpio_defaults\[5\],39.59
net8774,39.585
_06812_,39.58
_07344_,39.58
_11841_,39.58
_14174_,39.58
_14727_,39.58
_15283_,39.58
net9063,39.565
_03610_,39.56
_06762_,39.56
_06907_,39.56
soc.core.VexRiscv.RegFilePlugin_regFile\[27\]\[21\],39.56
soc.core.interface0_bank_bus_dat_r\[16\],39.56
soc.core.mgmtsoc_reload_storage\[17\],39.56
clknet_leaf_501_mgmt_buffers.caravel_clk,39.56
net12797,39.56
mprj_io_dm[71],39.55
_09343_,39.545
_09649_,39.545
_11707_,39.54
_13032_,39.54
soc.core.dbg_uart_tx_data_uartwishbonebridge_rs232phytx_next_value2\[5\],39.54
soc.core.storage_1\[9\]\[5\],39.54
net3624,39.54
net3419,39.535
_07160_,39.52
net7780,39.52
net8101,39.52
net11350,39.52
_07011_,39.505
net2632,39.505
_09136_,39.5
_07598_,39.485
net3939,39.485
_02303_,39.48
_09837_,39.48
_14364_,39.48
soc.core.VexRiscv.RegFilePlugin_regFile\[3\]\[18\],39.48
soc.core.VexRiscv.RegFilePlugin_regFile\[5\]\[3\],39.48
_02322_,39.46
_03622_,39.46
_06794_,39.46
_07392_,39.46
_12163_,39.46
_13353_,39.46
gpio_control_in_2\[0\].shift_register\[1\],39.46
gpio_control_in_2\[4\].shift_register\[3\],39.46
net5184,39.46
_08924_,39.445
_02224_,39.44
_07046_,39.44
_10785_,39.44
gpio_control_in_1\[3\].pad_gpio_outenb,39.44
soc.core.VexRiscv.RegFilePlugin_regFile\[3\]\[3\],39.44
soc.core.mgmtsoc_litespimmap_storage\[7\],39.44
net4197,39.44
net5002,39.44
net7462,39.44
net8439,39.44
net8899,39.44
net10966,39.44
_04368_,39.42
_06985_,39.42
_10570_,39.42
soc.core.VexRiscv.RegFilePlugin_regFile\[15\]\[13\],39.42
soc.core.VexRiscv.RegFilePlugin_regFile\[30\]\[4\],39.42
net4262,39.42
net10277,39.42
net2608,39.42
net5844,39.405
_01550_,39.4
_03302_,39.4
_07616_,39.4
gpio_control_in_1a\[4\].shift_register\[5\],39.4
soc.core.storage\[1\]\[5\],39.4
net90,39.4
net1310,39.4
net8914,39.4
net9332,39.4
net11707,39.4
net10725,39.395
soc.core.multiregimpl61_regs1,39.385
net6150,39.385
_00657_,39.38
_02721_,39.38
_06709_,39.38
soc.core.VexRiscv.RegFilePlugin_regFile\[18\]\[21\],39.38
gpio_control_in_1\[2\].gpio_defaults\[3\],39.37
_07196_,39.365
_08360_,39.365
_08084_,39.36
gpio_control_in_2\[2\].shift_register\[2\],39.36
soc.core.VexRiscv.RegFilePlugin_regFile\[15\]\[19\],39.36
net11137,39.36
_09880_,39.34
soc.core.VexRiscv.RegFilePlugin_regFile\[19\]\[9\],39.34
soc.core.count\[11\],39.34
net11585,39.34
_09600_,39.335
_10950_,39.33
_07193_,39.325
net6953,39.325
_01839_,39.32
_02879_,39.32
_07079_,39.32
_08037_,39.32
gpio_control_in_1a\[1\].shift_register\[1\],39.32
soc.core.VexRiscv._zz_execute_to_memory_REGFILE_WRITE_DATA\[12\],39.32
net8567,39.32
net10995,39.32
net8278,39.315
_03984_,39.3
_06215_,39.3
_07602_,39.3
_09816_,39.3
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[9\]\[0\],39.3
net6908,39.3
net9140,39.285
net11376,39.285
_00986_,39.28
_06392_,39.28
clknet_leaf_1182_mgmt_buffers.caravel_clk,39.28
net11125,39.28
net12575,39.28
_09363_,39.26
_11104_,39.26
soc.core.VexRiscv.RegFilePlugin_regFile\[19\]\[22\],39.26
soc.core.VexRiscv.RegFilePlugin_regFile\[3\]\[24\],39.26
net5123,39.26
_00264_,39.24
_11350_,39.24
soc.core.interface9_bank_bus_dat_r\[10\],39.24
net3643,39.225
_04218_,39.22
gpio_control_in_2\[2\].gpio_inenb,39.22
mgmt_buffers.la_data_in_mprj_bar\[72\],39.22
soc.core.VexRiscv.execute_to_memory_MEMORY_ADDRESS_LOW\[0\],39.22
soc.core.mgmtsoc_vexriscv_i_cmd_payload_address\[4\],39.22
net3044,39.22
_01800_,39.2
_06264_,39.2
gpio_control_in_2\[8\].gpio_inenb,39.2
soc.core.VexRiscv.RegFilePlugin_regFile\[19\]\[20\],39.2
net4377,39.2
net9784,39.2
net7631,39.185
_04000_,39.18
_08539_,39.18
_08644_,39.18
_09901_,39.18
_14673_,39.18
soc.core.storage_1\[11\]\[4\],39.18
net8719,39.18
_03331_,39.16
_04521_,39.16
_04533_,39.16
_11527_,39.16
_13867_,39.16
_14715_,39.16
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[12\]\[27\],39.16
net10274,39.145
_01420_,39.14
_02403_,39.14
_04015_,39.14
_04206_,39.14
_06220_,39.14
_07066_,39.14
soc.core.VexRiscv.RegFilePlugin_regFile\[23\]\[8\],39.14
net3690,39.14
net12582,39.14
net8722,39.125
_02528_,39.12
_03294_,39.12
_07783_,39.12
_10630_,39.12
net12145,39.12
_06313_,39.1
_08173_,39.1
gpio_control_in_2\[4\].pad_gpio_outenb,39.1
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[2\]\[8\],39.1
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[6\]\[11\],39.1
clknet_leaf_515_mgmt_buffers.caravel_clk,39.1
clknet_leaf_703_mgmt_buffers.caravel_clk,39.1
net2833,39.1
net9924,39.1
net12887,39.1
_00855_,39.08
_03290_,39.08
_04525_,39.08
_06524_,39.08
gpio_control_in_1a\[4\].shift_register\[1\],39.08
soc.core.VexRiscv.RegFilePlugin_regFile\[9\]\[13\],39.08
net8485,39.08
gpio_control_in_2\[0\].gpio_slow_sel,39.075
net5459,39.065
gpio_control_in_1a\[4\].pad_gpio_outenb,39.06
soc.core.VexRiscv.RegFilePlugin_regFile\[6\]\[31\],39.06
soc.core.storage\[2\]\[0\],39.06
_07050_,39.04
_13705_,39.04
_14401_,39.04
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[0\]\[3\],39.04
net11556,39.04
net10651,39.03
_00612_,39.02
_01894_,39.02
_02541_,39.02
_04305_,39.02
_06949_,39.02
_08005_,39.02
_10459_,39.02
_10496_,39.02
_13795_,39.02
gpio_control_in_1\[2\].shift_register\[8\],39.02
soc.core.storage_1\[14\]\[5\],39.02
net4470,39.02
net4830,39.02
_00446_,39
_01972_,39
_12532_,39
_13404_,39
_14971_,39
pll.ext_trim\[23\],39
soc.core.VexRiscv.RegFilePlugin_regFile\[21\]\[4\],39
net5752,39
_01567_,38.98
_04575_,38.98
_07343_,38.98
_11704_,38.98
_12193_,38.98
gpio_control_in_1\[2\].pad_gpio_outenb,38.98
clknet_leaf_185_mgmt_buffers.caravel_clk,38.98
_01798_,38.96
_03472_,38.96
_09217_,38.96
gpio_control_in_1a\[0\].shift_register\[6\],38.96
soc.core.mgmtsoc_value_status\[31\],38.96
clknet_leaf_91_mgmt_buffers.caravel_clk,38.96
net8376,38.96
gpio_control_in_1a\[4\].gpio_defaults\[2\],38.95
soc.core.mgmtsoc_bus_errors\[12\],38.945
net8711,38.945
_02161_,38.94
_08574_,38.94
_09666_,38.94
_10998_,38.94
_13122_,38.94
soc.core.VexRiscv.RegFilePlugin_regFile\[9\]\[14\],38.94
soc.core.uartwishbonebridge_state\[0\],38.94
clknet_leaf_378_mgmt_buffers.caravel_clk,38.94
_09634_,38.92
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[5\]\[10\],38.92
net6061,38.92
_09339_,38.915
gpio_control_in_1\[2\].gpio_defaults\[12\],38.91
_01927_,38.9
_04280_,38.9
_13106_,38.9
gpio_control_bidir_1\[0\].shift_register\[1\],38.9
gpio_control_in_2\[0\].shift_register\[4\],38.9
soc.core.VexRiscv.RegFilePlugin_regFile\[22\]\[20\],38.9
soc.core.storage_1\[15\]\[6\],38.9
net6888,38.9
net11572,38.9
net9234,38.885
_08223_,38.88
soc.core.storage_1\[1\]\[4\],38.88
net9597,38.88
net12118,38.88
net7974,38.865
_00335_,38.86
_01224_,38.86
_02121_,38.86
_02125_,38.86
_03945_,38.86
_06079_,38.86
_08071_,38.86
_09683_,38.86
_11611_,38.86
gpio_control_in_2\[4\].shift_register\[2\],38.86
soc.core.VexRiscv.RegFilePlugin_regFile\[11\]\[16\],38.86
net7291,38.86
_03332_,38.84
_07608_,38.84
_12402_,38.84
_14221_,38.84
_14376_,38.84
mprj_io_dm[10],38.83
_03283_,38.82
_11486_,38.82
_12038_,38.82
pll.itrim\[16\],38.82
soc.core.VexRiscv.RegFilePlugin_regFile\[2\]\[22\],38.82
net12551,38.82
net4902,38.805
_01324_,38.8
_06624_,38.8
soc.core.VexRiscv.RegFilePlugin_regFile\[20\]\[5\],38.8
net7890,38.8
net9836,38.8
gpio_control_in_2\[0\].gpio_defaults\[4\],38.79
_00811_,38.78
_00833_,38.78
_05510_,38.78
_12016_,38.78
_13911_,38.78
soc.core.storage\[4\]\[4\],38.78
clknet_leaf_47_mgmt_buffers.caravel_clk,38.78
net4287,38.78
net7899,38.765
net8362,38.765
net9562,38.765
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[3\]\[2\],38.76
soc.core.VexRiscv.RegFilePlugin_regFile\[3\]\[25\],38.76
soc.core.VexRiscv._zz_execute_to_memory_REGFILE_WRITE_DATA\[22\],38.76
net332,38.76
clknet_leaf_308_mgmt_buffers.caravel_clk,38.76
net8516,38.76
_12350_,38.745
_04128_,38.74
_07918_,38.74
_11883_,38.74
_13200_,38.74
gpio_control_in_1\[5\].shift_register\[5\],38.74
soc.core.VexRiscv.RegFilePlugin_regFile\[12\]\[24\],38.74
net8614,38.74
mgmt_buffers.la_data_in_mprj\[70\],38.725
net8459,38.725
_04010_,38.72
_06732_,38.72
net2721,38.72
net9143,38.72
net12881,38.72
_00283_,38.7
_03248_,38.7
_04615_,38.7
_05120_,38.7
_14294_,38.7
_14737_,38.7
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[7\]\[19\],38.7
net7191,38.7
net9123,38.7
_14075_,38.69
net8285,38.685
_00578_,38.68
_01424_,38.68
_07139_,38.68
_09212_,38.68
_09913_,38.68
_14090_,38.68
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[2\]\[3\],38.68
soc.core.VexRiscv.lastStagePc\[7\],38.68
soc.core.dbg_uart_tx_phase\[0\],38.68
clknet_leaf_215_mgmt_buffers.caravel_clk,38.68
net2637,38.68
gpio_control_in_2\[7\].gpio_defaults\[9\],38.67
mprj_io_oeb[10],38.67
_06908_,38.66
_07185_,38.66
_13435_,38.66
net9132,38.66
_01207_,38.64
_04589_,38.64
_09139_,38.64
_12090_,38.64
_13024_,38.64
soc.core.VexRiscv.lastStagePc\[19\],38.64
net4282,38.64
net7018,38.64
soc.core.VexRiscv.CsrPlugin_mepc\[0\],38.635
gpio_control_in_1a\[3\].gpio_defaults\[12\],38.63
_00455_,38.62
soc.core.VexRiscv.RegFilePlugin_regFile\[1\]\[22\],38.62
net2916,38.62
_04032_,38.6
_04523_,38.6
_13958_,38.6
_14133_,38.6
_14556_,38.6
gpio_control_in_2\[4\].gpio_holdover,38.6
soc.core.mgmtsoc_master_phyconfig_storage\[17\],38.6
net8379,38.585
_03301_,38.58
_06689_,38.58
soc.core.VexRiscv.RegFilePlugin_regFile\[17\]\[14\],38.58
soc.core.la_ien_storage\[88\],38.58
soc.core.litespi_state\[3\],38.58
_07280_,38.565
_00128_,38.56
_03123_,38.56
gpio_control_in_2\[2\].gpio_holdover,38.56
soc.core.VexRiscv.RegFilePlugin_regFile\[5\]\[0\],38.56
net2938,38.56
net6857,38.56
net10018,38.56
net10316,38.56
net12406,38.56
net6008,38.545
_02281_,38.54
_02529_,38.54
_03365_,38.54
pll.itrim\[7\],38.54
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[4\]\[0\],38.54
soc.core.VexRiscv.RegFilePlugin_regFile\[11\]\[30\],38.54
net5420,38.54
_01186_,38.52
_01688_,38.52
_01933_,38.52
_06407_,38.52
_06783_,38.52
_07395_,38.52
_14058_,38.52
net3991,38.52
net6005,38.52
net8481,38.52
net12478,38.52
gpio_control_in_1a\[2\].gpio_defaults\[7\],38.51
_04538_,38.5
_06205_,38.5
_06621_,38.5
_06731_,38.5
_12683_,38.5
_14137_,38.5
_10028_,38.485
_10176_,38.485
net4199,38.485
_03884_,38.48
_05097_,38.48
_07108_,38.48
_15000_,38.48
_07008_,38.465
net9282,38.46
_04375_,38.44
_04690_,38.44
_06904_,38.44
_09617_,38.44
_09744_,38.44
_11076_,38.44
_11483_,38.44
_12296_,38.44
_12891_,38.44
_13932_,38.44
mgmt_buffers.la_data_in_enable\[44\],38.44
soc.core.storage_1\[15\]\[7\],38.44
net8783,38.44
gpio_control_in_1\[1\].gpio_defaults\[3\],38.43
net10832,38.425
_01278_,38.42
_10346_,38.42
net10864,38.42
_08405_,38.405
net10528,38.405
_00668_,38.4
_04099_,38.4
_07717_,38.4
_08495_,38.4
_11309_,38.4
_11366_,38.4
_11694_,38.4
_11963_,38.4
clknet_leaf_802_mgmt_buffers.caravel_clk,38.4
net10600,38.39
net6901,38.385
_03349_,38.38
_08358_,38.38
gpio_control_in_1a\[1\].gpio_vtrip_sel,38.38
mgmt_buffers.la_data_in_mprj_bar\[112\],38.38
mgmt_buffers.la_data_in_mprj_bar\[67\],38.38
soc.core.interface0_bank_bus_dat_r\[25\],38.38
net243,38.38
net5598,38.38
_08882_,38.365
net5116,38.365
_06449_,38.36
_11399_,38.36
_12273_,38.36
_14763_,38.36
net7086,38.36
soc.core.mgmtsoc_reload_storage\[29\],38.35
net5532,38.345
_00413_,38.34
_01428_,38.34
_09155_,38.34
net12882,38.34
_01122_,38.32
_03020_,38.32
_04094_,38.32
_05138_,38.32
_00691_,38.3
_01215_,38.3
_07733_,38.3
_10242_,38.3
_10627_,38.3
soc.core.VexRiscv.RegFilePlugin_regFile\[31\]\[4\],38.3
net4175,38.3
_13590_,38.29
_00864_,38.28
_08035_,38.28
_09732_,38.28
_13011_,38.28
gpio_control_in_2\[4\].gpio_defaults\[12\],38.28
soc.core.VexRiscv.RegFilePlugin_regFile\[2\]\[16\],38.28
net5399,38.265
_02318_,38.26
_03607_,38.26
_09213_,38.26
_09584_,38.26
_10046_,38.26
_13700_,38.26
_14909_,38.26
soc.core.VexRiscv.RegFilePlugin_regFile\[3\]\[0\],38.26
soc.core.VexRiscv.dBusWishbone_DAT_MOSI\[13\],38.26
soc.core.uart_phy_tx_count\[3\],38.26
net211,38.26
net9329,38.26
gpio_control_in_2\[2\].shift_register\[4\],38.24
gpio_control_bidir_2\[1\].gpio_defaults\[6\],38.23
_04446_,38.22
_06209_,38.22
gpio_control_in_2\[9\].gpio_inenb,38.22
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[1\]\[2\],38.22
soc.core.dbg_uart_tx_phase\[30\],38.22
clknet_leaf_179_mgmt_buffers.caravel_clk,38.22
net4011,38.22
net6252,38.22
net12813,38.22
_03749_,38.21
_02893_,38.2
gpio_control_in_2\[7\].gpio_holdover,38.2
net79,38.2
_07012_,38.185
net3498,38.185
_00646_,38.18
_09803_,38.18
_12725_,38.18
gpio_control_in_1\[0\].gpio_holdover,38.18
soc.core.VexRiscv.RegFilePlugin_regFile\[0\]\[14\],38.18
soc.core.VexRiscv.RegFilePlugin_regFile\[12\]\[22\],38.18
soc.core.interface11_bank_bus_dat_r\[1\],38.18
soc.core.uart_phy_rx_data\[6\],38.18
clknet_leaf_863_mgmt_buffers.caravel_clk,38.18
_02784_,38.17
_03195_,38.16
_08369_,38.16
net6325,38.16
net7843,38.145
_00649_,38.14
_02910_,38.14
_04041_,38.14
_06616_,38.14
_07654_,38.14
_08799_,38.14
_14097_,38.14
soc.core.VexRiscv.HazardSimplePlugin_writeBackWrites_payload_address\[0\],38.14
soc.core.VexRiscv.RegFilePlugin_regFile\[11\]\[22\],38.14
soc.core.VexRiscv.RegFilePlugin_regFile\[8\]\[27\],38.14
soc.core.VexRiscv._zz_CsrPlugin_csrMapping_readDataInit\[17\],38.14
net356,38.14
clknet_leaf_325_mgmt_buffers.caravel_clk,38.14
net3261,38.14
clknet_leaf_318_mgmt_buffers.caravel_clk,38.13
mgmt_buffers.la_data_in_mprj_bar\[59\],38.12
net5156,38.12
gpio_control_in_1\[4\].gpio_defaults\[12\],38.11
net7752,38.105
_06605_,38.1
_14978_,38.1
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[11\]\[1\],38.1
soc.core.VexRiscv.RegFilePlugin_regFile\[15\]\[7\],38.1
net3495,38.1
net8296,38.1
net8921,38.1
net12703,38.1
_06939_,38.08
_08264_,38.08
_13340_,38.08
soc.core.la_ien_storage\[121\],38.08
_02123_,38.06
_03381_,38.06
_06637_,38.06
_10040_,38.06
_13418_,38.06
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[2\]\[30\],38.06
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[6\]\[19\],38.06
net3760,38.06
net6009,38.06
net12426,38.06
net12533,38.06
_02240_,38.04
_04522_,38.04
_05508_,38.04
_10440_,38.04
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[2\]\[29\],38.04
net4047,38.025
_01405_,38.02
_03379_,38.02
_09562_,38.02
soc.core.VexRiscv.IBusCachedPlugin_cache.io_cpu_fetch_mmuRsp_physicalAddress\[8\],38.02
soc.core.mgmtsoc_litespimmap_count\[5\],38.02
net7048,38.02
_06760_,38
_07611_,38
_13827_,38
net12377,38
net12550,38
_08618_,37.985
net9846,37.985
_03620_,37.98
_04220_,37.98
_05913_,37.98
gpio_control_in_1a\[1\].shift_register\[5\],37.98
_03322_,37.96
gpio_control_in_1\[2\].gpio_holdover,37.96
net8019,37.945
net11338,37.945
_03343_,37.94
_07089_,37.94
_07172_,37.94
_08968_,37.94
gpio_control_in_1a\[3\].gpio_holdover,37.94
net3906,37.94
_00347_,37.92
_01306_,37.92
_03080_,37.92
_06357_,37.92
_11247_,37.92
_12173_,37.92
_12199_,37.92
soc.core.VexRiscv.IBusCachedPlugin_cache.lineLoader_address\[12\],37.92
net6154,37.905
_00635_,37.9
_03350_,37.9
_10453_,37.9
_13252_,37.9
_14752_,37.9
clknet_leaf_322_mgmt_buffers.caravel_clk,37.9
net8727,37.9
net8301,37.885
_03206_,37.88
_03261_,37.88
_07085_,37.88
_13294_,37.88
soc.core.VexRiscv.RegFilePlugin_regFile\[27\]\[27\],37.88
net2852,37.88
_00195_,37.86
_03672_,37.86
_03897_,37.86
_08380_,37.86
_14310_,37.86
gpio_control_in_1\[1\].gpio_holdover,37.86
net4439,37.86
net7205,37.86
_09827_,37.84
gpio_control_in_2\[2\].gpio_defaults\[12\],37.84
soc.core.VexRiscv.RegFilePlugin_regFile\[2\]\[19\],37.84
soc.core.mgmtsoc_litespisdrphycore_sr_cnt\[5\],37.84
clknet_leaf_626_mgmt_buffers.caravel_clk,37.84
net3369,37.84
net3370,37.84
net7345,37.84
_03075_,37.82
_08199_,37.82
_11375_,37.82
soc.core.VexRiscv.RegFilePlugin_regFile\[13\]\[13\],37.82
net8714,37.82
net8650,37.815
mprj_io_dm[19],37.81
_08719_,37.805
_01294_,37.8
_06222_,37.8
_06368_,37.8
_12963_,37.8
net10212,37.8
net4908,37.785
_02199_,37.78
_03996_,37.78
_04576_,37.78
net6892,37.78
_07201_,37.765
_02661_,37.76
_06284_,37.76
_06730_,37.76
_06817_,37.76
_07386_,37.76
_09805_,37.76
_11657_,37.76
gpio_control_in_1a\[5\].shift_register\[8\],37.76
net7573,37.76
net9072,37.76
_11738_,37.74
_13159_,37.74
_09199_,37.735
_01167_,37.72
_03357_,37.72
_04781_,37.72
_06251_,37.72
gpio_control_in_2\[5\].pad_gpio_outenb,37.72
gpio_control_in_2\[8\].gpio_holdover,37.72
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[13\]\[16\],37.72
soc.core.storage_1\[5\]\[0\],37.72
soc.core.uart_tx_fifo_level0\[3\],37.72
clknet_leaf_7_mgmt_buffers.caravel_clk,37.72
clknet_leaf_951_mgmt_buffers.caravel_clk,37.72
net5985,37.72
net7296,37.72
_03296_,37.7
_08464_,37.7
_13461_,37.7
pll.ext_trim\[1\],37.7
soc.core.storage_1\[9\]\[7\],37.7
net11298,37.695
mgmt_buffers.la_data_in_mprj\[67\],37.685
_00679_,37.68
_09770_,37.68
_14446_,37.68
soc.core.multiregimpl66_regs0,37.68
soc.core.storage\[0\]\[5\],37.68
_09103_,37.665
_02967_,37.66
_03355_,37.66
_09577_,37.66
soc.core.storage_1\[13\]\[2\],37.66
net4650,37.66
_09665_,37.64
_10301_,37.64
soc.core.storage\[13\]\[3\],37.64
soc.core.storage\[4\]\[2\],37.64
net273,37.64
net10538,37.635
mprj_io_oeb[7],37.63
_11144_,37.62
mgmt_buffers.la_data_in_mprj\[11\],37.62
soc.core.VexRiscv.RegFilePlugin_regFile\[1\]\[7\],37.62
net6067,37.62
net9726,37.62
_07973_,37.6
_09193_,37.6
net113,37.6
net5861,37.6
net12239,37.6
net2625,37.6
clknet_leaf_530_mgmt_buffers.caravel_clk,37.595
mprj_io_ib_mode_sel[16],37.59
_10209_,37.585
_02152_,37.58
gpio_control_in_2\[1\].gpio_ib_mode_sel,37.58
net6130,37.565
_03213_,37.56
_03361_,37.56
_05118_,37.56
_06268_,37.56
_11103_,37.56
_11551_,37.56
_11638_,37.56
_12395_,37.56
_12932_,37.56
net4838,37.56
net6001,37.56
net6816,37.56
_01407_,37.54
_01945_,37.54
_03145_,37.54
_09742_,37.54
gpio_control_in_2\[3\].shift_register\[1\],37.54
net299,37.54
_09523_,37.525
net4453,37.525
_04685_,37.52
_06148_,37.52
_07336_,37.52
gpio_control_in_1a\[0\].shift_register\[1\],37.52
soc.core.VexRiscv.RegFilePlugin_regFile\[29\]\[13\],37.52
soc.core.mgmtsoc_value\[31\],37.52
clknet_leaf_744_mgmt_buffers.caravel_clk,37.52
net8555,37.52
net10074,37.52
_12342_,37.515
_05791_,37.51
gpio_control_in_1a\[2\].gpio_defaults\[9\],37.51
_02843_,37.5
_14975_,37.5
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[9\]\[2\],37.5
_04715_,37.49
_02082_,37.48
soc.core.storage_1\[5\]\[2\],37.48
clknet_leaf_304_mgmt_buffers.caravel_clk,37.48
clknet_leaf_676_mgmt_buffers.caravel_clk,37.48
net7187,37.48
mprj_io_dm[22],37.47
_09973_,37.46
_12733_,37.46
soc.core.VexRiscv.RegFilePlugin_regFile\[3\]\[16\],37.46
net276,37.46
net10907,37.46
_00610_,37.44
_00653_,37.44
_04675_,37.44
_13013_,37.44
gpio_control_in_2\[1\].shift_register\[1\],37.44
soc.core.VexRiscv.RegFilePlugin_regFile\[10\]\[2\],37.44
soc.core.VexRiscv.RegFilePlugin_regFile\[22\]\[22\],37.44
net303,37.44
net8867,37.425
_03378_,37.42
_07889_,37.42
_13778_,37.42
soc.core.VexRiscv._zz_RegFilePlugin_regFile_port1\[20\],37.42
clknet_leaf_742_mgmt_buffers.caravel_clk,37.42
net3474,37.42
net4803,37.42
net5971,37.42
net6600,37.42
net12283,37.42
net12728,37.42
_01139_,37.4
_03404_,37.4
_04720_,37.4
_07428_,37.4
soc.core.mgmtsoc_value_status\[13\],37.4
soc.core.mgmtsoc_vexriscv_debug_bus_dat_r\[17\],37.4
clknet_leaf_861_mgmt_buffers.caravel_clk,37.4
_02760_,37.38
_06499_,37.38
_12290_,37.38
net224,37.38
net3272,37.38
net4611,37.38
net12885,37.38
soc.core.dbg_uart_data\[14\],37.365
_08586_,37.36
_08935_,37.36
_14672_,37.36
gpio_control_in_1a\[4\].shift_register\[3\],37.36
pll.ringosc.dstage\[4\].id.out,37.36
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[4\]\[12\],37.36
soc.core.VexRiscv.RegFilePlugin_regFile\[18\]\[5\],37.36
clknet_leaf_457_mgmt_buffers.caravel_clk,37.36
_10212_,37.355
_01437_,37.34
_02789_,37.34
_06238_,37.34
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[9\]\[14\],37.34
soc.core.VexRiscv.RegFilePlugin_regFile\[24\]\[22\],37.34
net387,37.34
clknet_leaf_1208_mgmt_buffers.caravel_clk,37.34
_01237_,37.32
_06728_,37.32
_08559_,37.32
_10614_,37.32
soc.core.dbg_uart_data\[6\],37.32
net3479,37.32
net7324,37.32
net9459,37.32
net10937,37.32
_00056_,37.3
_08040_,37.3
_09253_,37.3
_13227_,37.3
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[7\]\[11\],37.3
net5255,37.3
net10335,37.3
_06545_,37.285
net6772,37.285
net11225,37.285
_00491_,37.28
_00899_,37.28
_01185_,37.28
_01275_,37.28
_02557_,37.28
_14154_,37.28
soc.core.VexRiscv.RegFilePlugin_regFile\[12\]\[5\],37.28
_00995_,37.26
_01240_,37.26
_02269_,37.26
_07844_,37.26
soc.core.interface3_bank_bus_dat_r\[24\],37.26
net349,37.26
clknet_leaf_907_mgmt_buffers.caravel_clk,37.26
net6455,37.26
net6743,37.26
net7014,37.26
net8934,37.26
_03269_,37.24
_04451_,37.24
net10978,37.24
gpio_control_in_1\[5\].gpio_defaults\[6\],37.23
_09052_,37.225
_00203_,37.22
_01549_,37.22
_05087_,37.22
_05602_,37.22
_06540_,37.22
_08798_,37.22
_13120_,37.22
mgmt_buffers.la_data_in_mprj_bar\[17\],37.22
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[15\]\[5\],37.22
clknet_leaf_188_mgmt_buffers.caravel_clk,37.22
net4761,37.22
net6914,37.22
net12857,37.22
_05464_,37.21
_03305_,37.2
_05073_,37.2
_09290_,37.2
net12952,37.2
gpio_control_in_1a\[1\].gpio_defaults\[11\],37.19
_10243_,37.18
gpio_control_in_2\[0\].pad_gpio_outenb,37.18
soc.core.VexRiscv.RegFilePlugin_regFile\[2\]\[17\],37.18
soc.core.mgmtsoc_scratch_storage\[22\],37.18
net3626,37.18
net11549,37.18
_09188_,37.16
_10179_,37.16
soc.core.VexRiscv.RegFilePlugin_regFile\[25\]\[14\],37.16
soc.core.multiregimpl73_regs0,37.16
clknet_leaf_1009_mgmt_buffers.caravel_clk,37.16
net4857,37.16
net11601,37.16
mgmt_buffers.la_data_in_mprj\[73\],37.145
_03514_,37.14
gpio_control_bidir_1\[0\].resetn_out,37.14
soc.core.storage_1\[9\]\[6\],37.14
clknet_leaf_1113_mgmt_buffers.caravel_clk,37.14
net2763,37.14
net10792,37.14
_01177_,37.12
gpio_control_in_2\[9\].shift_register\[9\],37.12
net271,37.12
clknet_leaf_619_mgmt_buffers.caravel_clk,37.12
_08239_,37.105
_00397_,37.1
_01057_,37.1
_04827_,37.1
net8300,37.1
net8545,37.1
gpio_control_in_2\[2\].gpio_ib_mode_sel,37.095
net3947,37.085
net10247,37.085
_02316_,37.08
_03582_,37.08
_04406_,37.08
_14012_,37.08
gpio_control_in_1a\[1\].pad_gpio_outenb,37.08
net12888,37.08
_08854_,37.065
_03024_,37.06
_03338_,37.06
_04465_,37.06
_06916_,37.06
gpio_control_in_1a\[2\].resetn_out,37.06
soc.core.VexRiscv.memory_to_writeBack_REGFILE_WRITE_DATA\[15\],37.06
soc.core.mgmtsoc_vexriscv_i_cmd_payload_address\[7\],37.06
gpio_control_in_2\[1\].gpio_ana_en,37.055
_02179_,37.04
_06239_,37.04
_06271_,37.04
_13710_,37.04
_10238_,37.02
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[0\]\[16\],37.02
soc.core.interface0_bank_bus_dat_r\[30\],37.02
net9298,37.02
net11070,37.02
gpio_control_in_1a\[4\].gpio_defaults\[10\],37.01
net4621,37.005
_02231_,37
_02395_,37
_03308_,37
_10889_,37
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[2\]\[2\],37
net295,37
_08478_,36.985
_09651_,36.985
_02339_,36.98
_10583_,36.98
_12899_,36.98
_13264_,36.98
_13733_,36.98
clknet_leaf_6_mgmt_buffers.caravel_clk,36.98
net10201,36.98
net10900,36.97
_08270_,36.965
_02701_,36.96
_02719_,36.96
_04547_,36.96
_05476_,36.96
_06572_,36.96
_09620_,36.96
_10124_,36.96
_14191_,36.96
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[2\]\[21\],36.96
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[3\]\[21\],36.96
soc.core.mgmtsoc_scratch_storage\[14\],36.96
net218,36.96
net3987,36.96
_12164_,36.955
mgmt_buffers.la_data_in_mprj\[96\],36.945
_02590_,36.94
_07651_,36.94
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[1\]\[21\],36.94
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[8\]\[17\],36.94
soc.core.VexRiscv.RegFilePlugin_regFile\[29\]\[21\],36.94
clknet_leaf_708_mgmt_buffers.caravel_clk,36.94
net4252,36.94
_02769_,36.92
_02808_,36.92
_05450_,36.92
_06571_,36.92
_06902_,36.92
_07729_,36.92
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[14\]\[8\],36.92
clknet_leaf_399_mgmt_buffers.caravel_clk,36.92
_10961_,36.91
net3662,36.905
_01924_,36.9
_08075_,36.9
_08756_,36.885
_01519_,36.88
_03561_,36.88
_03882_,36.88
_11213_,36.88
_11427_,36.88
soc.core.VexRiscv.RegFilePlugin_regFile\[7\]\[19\],36.88
net267,36.88
clknet_leaf_297_mgmt_buffers.caravel_clk,36.88
net10529,36.88
net10935,36.88
net11666,36.88
_08850_,36.865
_04560_,36.86
soc.core.VexRiscv._zz_execute_to_memory_REGFILE_WRITE_DATA\[20\],36.86
net8275,36.86
net8927,36.86
_00231_,36.84
_05489_,36.84
_06444_,36.84
_09580_,36.84
_09932_,36.84
_10363_,36.84
_11109_,36.84
_12336_,36.84
_13861_,36.84
_15182_,36.84
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[7\]\[4\],36.84
soc.core.dbg_uart_tx_data_uartwishbonebridge_rs232phytx_next_value2\[2\],36.84
clknet_leaf_1067_mgmt_buffers.caravel_clk,36.84
net2904,36.84
net12012,36.84
net12217,36.84
net5029,36.825
_03406_,36.82
net208,36.82
clknet_leaf_984_mgmt_buffers.caravel_clk,36.82
net9876,36.82
_02178_,36.8
_02332_,36.8
_11913_,36.8
_12577_,36.8
gpio_control_in_1a\[2\].gpio_defaults\[3\],36.8
soc.core.VexRiscv.BranchPlugin_branchExceptionPort_payload_badAddr\[10\],36.8
soc.core.VexRiscv._zz_execute_to_memory_REGFILE_WRITE_DATA\[0\],36.8
soc.core.dbg_uart_tx_phase\[25\],36.8
clknet_leaf_414_mgmt_buffers.caravel_clk,36.8
net8760,36.785
_01705_,36.78
_09859_,36.78
_10025_,36.78
_11585_,36.78
net7390,36.78
_00869_,36.76
_03615_,36.76
_06303_,36.76
_09929_,36.76
_13949_,36.76
_14648_,36.76
soc.core.VexRiscv.CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr\[25\],36.76
soc.core.VexRiscv.RegFilePlugin_regFile\[2\]\[2\],36.76
clknet_leaf_249_mgmt_buffers.caravel_clk,36.76
clknet_leaf_582_mgmt_buffers.caravel_clk,36.76
net5515,36.76
net6845,36.76
net9834,36.76
_06559_,36.74
_07922_,36.74
net4178,36.74
net10453,36.735
_01624_,36.72
_11443_,36.72
gpio_control_in_1\[1\].shift_register\[3\],36.72
gpio_control_in_1a\[3\].shift_register\[2\],36.72
clknet_leaf_1171_mgmt_buffers.caravel_clk,36.72
soc.core.VexRiscv.RegFilePlugin_regFile\[22\]\[8\],36.715
net8590,36.705
_03233_,36.7
gpio_control_in_1\[0\].gpio_vtrip_sel,36.7
gpio_control_in_2\[4\].shift_register\[7\],36.7
net10590,36.695
_00403_,36.68
_02423_,36.68
_04483_,36.68
_04625_,36.68
_08987_,36.68
_09860_,36.68
_14851_,36.68
soc.core.storage_1\[9\]\[4\],36.68
clknet_leaf_539_mgmt_buffers.caravel_clk,36.68
net11635,36.68
net12462,36.68
_07609_,36.66
_10038_,36.66
_14349_,36.66
gpio_control_in_1a\[1\].shift_register\[6\],36.66
net9761,36.66
net12419,36.66
_03380_,36.64
_04224_,36.64
_06250_,36.64
_06349_,36.64
_06937_,36.64
soc.core.VexRiscv.RegFilePlugin_regFile\[28\]\[25\],36.64
soc.core.VexRiscv.RegFilePlugin_regFile\[5\]\[14\],36.64
net7970,36.64
net3851,36.625
_03800_,36.62
_06493_,36.62
soc.core.VexRiscv.RegFilePlugin_regFile\[31\]\[8\],36.62
net11504,36.62
_00307_,36.615
_00182_,36.6
_07091_,36.6
_13083_,36.6
clknet_leaf_361_mgmt_buffers.caravel_clk,36.6
net4357,36.6
_06404_,36.58
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[8\]\[2\],36.58
net8977,36.58
_02087_,36.56
_06614_,36.56
_10895_,36.56
_12123_,36.56
gpio_control_bidir_1\[1\].shift_register\[2\],36.56
net7330,36.56
net10637,36.56
net10676,36.56
_04652_,36.54
_07638_,36.54
_09545_,36.54
_11352_,36.54
_12202_,36.54
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[3\]\[8\],36.54
_02475_,36.52
_04804_,36.52
_05594_,36.52
_14910_,36.52
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[0\]\[21\],36.52
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[14\]\[1\],36.52
soc.core.VexRiscv.RegFilePlugin_regFile\[15\]\[27\],36.52
soc.core.VexRiscv.RegFilePlugin_regFile\[1\]\[12\],36.52
soc.core.multiregimpl107_regs0,36.52
clknet_leaf_441_mgmt_buffers.caravel_clk,36.52
gpio_control_in_2\[4\].gpio_vtrip_sel,36.515
_03250_,36.5
_07356_,36.5
_08595_,36.5
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[0\]\[2\],36.5
soc.core.VexRiscv.RegFilePlugin_regFile\[26\]\[21\],36.5
soc.core.storage\[0\]\[7\],36.5
soc.core.storage\[10\]\[2\],36.5
net5069,36.5
_07286_,36.485
_10036_,36.485
_02245_,36.48
_04738_,36.48
_11398_,36.48
gpio_control_in_1a\[1\].gpio_defaults\[10\],36.47
net4839,36.465
net6052,36.465
_01082_,36.46
_04564_,36.46
_06236_,36.46
net11467,36.46
_01793_,36.44
_07886_,36.44
_14181_,36.44
_08136_,36.42
_09560_,36.42
_09637_,36.42
pll.ringosc.dstage\[0\].id.out,36.42
soc.core.VexRiscv.RegFilePlugin_regFile\[2\]\[21\],36.42
clknet_leaf_567_mgmt_buffers.caravel_clk,36.42
net5368,36.42
net5434,36.42
net9974,36.42
net4399,36.405
_01621_,36.4
_05350_,36.4
_05672_,36.4
_08956_,36.4
_09552_,36.4
net3512,36.4
net9135,36.4
net10195,36.395
gpio_control_in_1\[1\].gpio_defaults\[5\],36.39
_07260_,36.385
_01358_,36.38
_01421_,36.38
_01991_,36.38
_05477_,36.38
_06463_,36.38
_06648_,36.38
_08213_,36.38
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[9\]\[31\],36.38
net51,36.38
clknet_leaf_164_mgmt_buffers.caravel_clk,36.38
net2912,36.38
net5382,36.38
_03191_,36.36
_04340_,36.36
_06429_,36.36
_06474_,36.36
_07665_,36.36
_10405_,36.36
_11736_,36.36
clknet_leaf_827_mgmt_buffers.caravel_clk,36.36
net5847,36.36
net8097,36.36
_09127_,36.345
_09889_,36.34
_11524_,36.34
mgmt_buffers.la_data_in_mprj_bar\[11\],36.34
soc.core.VexRiscv.RegFilePlugin_regFile\[22\]\[30\],36.34
net310,36.34
net2787,36.34
net6948,36.34
_12998_,36.32
soc.core.interface6_bank_bus_dat_r\[31\],36.32
soc.core.sync_array_muxed,36.32
clknet_leaf_44_mgmt_buffers.caravel_clk,36.32
net5549,36.32
net6612,36.32
net11114,36.305
_02385_,36.3
_05107_,36.3
_06106_,36.3
_07191_,36.3
_10244_,36.3
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[3\]\[3\],36.3
soc.core.mgmtsoc_litespisdrphycore_sr_out\[0\],36.3
net9716,36.3
net9799,36.3
net12807,36.3
net6177,36.285
net10581,36.285
soc.core.mgmtsoc_value\[15\],36.28
net6896,36.28
_07044_,36.26
_07145_,36.26
_11490_,36.26
_12510_,36.26
gpio_control_bidir_2\[1\].shift_register\[6\],36.26
gpio_control_in_1\[3\].shift_register\[2\],36.26
gpio_control_in_1a\[0\].shift_register\[5\],36.26
gpio_control_in_2\[5\].shift_register\[3\],36.26
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[13\]\[5\],36.26
soc.core.dbg_uart_address\[22\],36.26
soc.core.storage\[13\]\[2\],36.26
clknet_leaf_115_mgmt_buffers.caravel_clk,36.26
clknet_leaf_833_mgmt_buffers.caravel_clk,36.26
net3377,36.26
net7796,36.26
net8330,36.26
net7376,36.245
_00279_,36.24
_02246_,36.24
_02272_,36.24
_09652_,36.24
gpio_control_in_1\[5\].gpio_ana_sel,36.24
clknet_leaf_562_mgmt_buffers.caravel_clk,36.23
net6278,36.23
_03023_,36.22
_03410_,36.22
_06893_,36.22
_14665_,36.22
net2864,36.22
net11980,36.22
net10237,36.21
_02519_,36.2
soc.core.VexRiscv.RegFilePlugin_regFile\[13\]\[14\],36.2
net6461,36.2
net9097,36.2
_05234_,36.19
_01112_,36.18
_07070_,36.18
_12311_,36.18
_14976_,36.18
gpio_control_in_2\[0\].resetn,36.18
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[15\]\[0\],36.18
soc.core.interface0_bank_bus_dat_r\[0\],36.18
net9344,36.18
net10558,36.18
gpio_control_bidir_2\[2\].gpio_slow_sel,36.175
gpio_control_in_2\[5\].gpio_defaults\[6\],36.17
net5238,36.165
_00688_,36.16
_00802_,36.16
_04680_,36.16
soc.core.VexRiscv.RegFilePlugin_regFile\[18\]\[9\],36.16
soc.core.spi_master_control_storage\[10\],36.16
net9313,36.16
_09010_,36.145
net5153,36.145
net7039,36.145
_03047_,36.14
_13460_,36.14
_14876_,36.14
_15032_,36.14
soc.core.VexRiscv.RegFilePlugin_regFile\[9\]\[7\],36.14
net216,36.14
net10852,36.14
_01737_,36.12
_02189_,36.12
_08267_,36.12
mgmt_buffers.la_data_in_mprj\[12\],36.12
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[7\]\[17\],36.12
net11624,36.12
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[14\]\[3\],36.11
_08297_,36.105
_00957_,36.1
_01545_,36.1
_04461_,36.1
_14316_,36.1
soc.core.mgmtsoc_load_storage\[17\],36.1
net3064,36.1
net11165,36.1
gpio_control_in_2\[8\].gpio_defaults\[2\],36.09
_09067_,36.085
net7708,36.085
net10652,36.085
_01741_,36.08
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[10\]\[0\],36.08
soc.core.dbg_uart_address\[6\],36.08
net3296,36.08
net10363,36.08
mprj_io_inp_dis[12],36.07
_01415_,36.06
_06592_,36.06
_07934_,36.06
_11571_,36.06
_11731_,36.06
_12904_,36.06
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[8\]\[5\],36.06
soc.core.storage\[13\]\[4\],36.06
net10714,36.055
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[4\]\[27\],36.05
_00045_,36.04
_03125_,36.04
_04036_,36.04
_06663_,36.04
_10012_,36.04
_14093_,36.04
gpio_control_in_1a\[5\].gpio_holdover,36.04
mgmt_buffers.mprj_logic1\[36\],36.04
soc.core.VexRiscv.RegFilePlugin_regFile\[20\]\[3\],36.04
net4256,36.04
net5314,36.04
net9864,36.04
net10869,36.04
net12541,36.04
_11497_,36.02
soc.core.VexRiscv.RegFilePlugin_regFile\[7\]\[13\],36.02
net4824,36.02
net9353,36.02
net11502,36.02
_09884_,36.015
soc.core.VexRiscv.RegFilePlugin_regFile\[12\]\[25\],36.015
gpio_control_in_2\[0\].gpio_defaults\[8\],36.01
soc.core.VexRiscv.RegFilePlugin_regFile\[12\]\[7\],36.01
net4609,36.005
net5915,36.005
net7550,36.005
_04532_,36
_07596_,36
_08422_,36
_12664_,36
clknet_leaf_427_mgmt_buffers.caravel_clk,36
net7910,36
net10896,36
net11519,36
net11550,36
_02742_,35.98
_03344_,35.98
_13072_,35.98
mgmt_buffers.la_data_in_mprj_bar\[21\],35.98
mgmt_buffers.la_data_in_mprj_bar\[36\],35.98
net3579,35.98
net4044,35.98
_14337_,35.97
net4048,35.965
_01150_,35.96
_02670_,35.96
_07946_,35.96
_08587_,35.96
_09863_,35.96
_09886_,35.96
soc.core.mgmtsoc_vexriscv_i_cmd_payload_data\[29\],35.96
soc.core.storage\[9\]\[5\],35.96
net3168,35.96
net7822,35.96
net11445,35.96
net12339,35.96
net12733,35.96
net12831,35.96
_08490_,35.945
net2972,35.945
_08152_,35.94
_10968_,35.94
_12004_,35.94
_14756_,35.94
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[0\]\[27\],35.94
net2850,35.94
_08282_,35.925
net11302,35.925
_04410_,35.92
_06223_,35.92
_07361_,35.92
_13022_,35.92
_13716_,35.92
net214,35.92
net222,35.92
net5869,35.92
net11072,35.92
net11643,35.92
_09852_,35.905
_02347_,35.9
_05445_,35.9
_12260_,35.9
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[8\]\[16\],35.9
soc.core.VexRiscv.RegFilePlugin_regFile\[12\]\[17\],35.9
_07268_,35.885
_10111_,35.885
net8799,35.885
_01276_,35.88
_05576_,35.88
_06262_,35.88
_13091_,35.88
_14261_,35.88
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[5\]\[30\],35.88
clknet_leaf_275_mgmt_buffers.caravel_clk,35.88
net7231,35.88
net7358,35.88
_03367_,35.86
_04449_,35.86
_05023_,35.86
_09371_,35.86
gpio_control_in_1a\[0\].resetn_out,35.86
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[11\]\[2\],35.86
net4651,35.86
net4668,35.86
gpio_control_in_2\[1\].gpio_holdover,35.855
_08139_,35.84
net235,35.84
net3764,35.84
net4747,35.84
net4802,35.84
net5779,35.84
net11525,35.84
net10552,35.83
_00473_,35.82
_01632_,35.82
_09943_,35.82
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[10\]\[11\],35.82
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[7\]\[27\],35.82
net4348,35.82
_00169_,35.805
_08312_,35.805
net8639,35.805
_04577_,35.8
_13954_,35.8
_14306_,35.8
net3526,35.8
net3578,35.8
net8063,35.8
net9931,35.8
net12160,35.8
_03401_,35.78
gpio_control_in_1a\[0\].shift_register\[7\],35.78
pll.ext_trim\[11\],35.78
net8003,35.78
net9266,35.78
net11652,35.78
_08915_,35.765
net11217,35.765
_00712_,35.76
_02471_,35.76
_04749_,35.76
_11500_,35.76
_12934_,35.76
soc.core.mgmtsoc_master_tx_fifo_source_payload_width\[0\],35.76
clknet_leaf_915_mgmt_buffers.caravel_clk,35.76
net9243,35.76
gpio_control_bidir_2\[0\].shift_register\[8\],35.74
gpio_control_in_1\[4\].gpio_vtrip_sel,35.74
soc.core.VexRiscv.RegFilePlugin_regFile\[4\]\[27\],35.74
_04452_,35.72
_10095_,35.72
_14764_,35.72
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[2\]\[5\],35.72
soc.core.VexRiscv.RegFilePlugin_regFile\[10\]\[18\],35.72
soc.core.storage\[2\]\[5\],35.72
clknet_leaf_784_mgmt_buffers.caravel_clk,35.72
net5332,35.72
net5636,35.72
net11495,35.72
gpio_control_in_1\[0\].gpio_defaults\[5\],35.71
gpio_control_in_1\[3\].gpio_defaults\[5\],35.71
_01652_,35.7
_02865_,35.7
_08921_,35.7
_10270_,35.7
soc.core.interface3_bank_bus_dat_r\[12\],35.7
net10997,35.7
_10887_,35.68
_13578_,35.68
_13601_,35.68
soc.core.mgmtsoc_master_tx_fifo_source_payload_data\[0\],35.68
net11680,35.68
gpio_control_in_1\[1\].gpio_defaults\[11\],35.67
_00275_,35.66
_07622_,35.66
_09878_,35.66
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[11\]\[15\],35.66
_05610_,35.65
net11435,35.645
_01505_,35.64
_04783_,35.64
_07272_,35.64
_10812_,35.64
gpio_control_in_1\[2\].shift_register\[6\],35.64
soc.core.VexRiscv.RegFilePlugin_regFile\[19\]\[15\],35.64
soc.core.memdat_1\[2\],35.64
soc.core.storage\[10\]\[7\],35.64
soc.core.storage\[3\]\[3\],35.64
net3005,35.64
net3500,35.64
_01689_,35.62
_06484_,35.62
mgmt_buffers.la_data_in_mprj_bar\[49\],35.62
net10876,35.62
net11194,35.62
net12858,35.62
net4927,35.605
net8238,35.605
_03113_,35.6
_04725_,35.6
_05653_,35.6
_06267_,35.6
_13783_,35.6
gpio_control_in_1a\[2\].shift_register\[7\],35.6
soc.core.VexRiscv.RegFilePlugin_regFile\[1\]\[2\],35.6
net3362,35.6
net10523,35.595
_08365_,35.585
_05448_,35.58
_08585_,35.58
_11682_,35.58
soc.core.VexRiscv.IBusCachedPlugin_cache._zz_banks_0_port1\[31\],35.58
clknet_leaf_210_mgmt_buffers.caravel_clk,35.58
net11712,35.58
net12730,35.58
net8064,35.565
_04789_,35.56
_08825_,35.56
_11480_,35.56
_11548_,35.56
_13260_,35.56
gpio_control_in_2\[7\].shift_register\[1\],35.56
soc.core.dbg_uart_count\[6\],35.56
net9606,35.56
net10358,35.56
net4338,35.545
_04047_,35.54
_05474_,35.54
_07719_,35.54
_08254_,35.54
_09538_,35.54
_12526_,35.54
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[1\]\[1\],35.54
soc.core.VexRiscv.RegFilePlugin_regFile\[11\]\[3\],35.54
net3556,35.54
net3946,35.54
net8840,35.54
net9713,35.54
net11058,35.54
net10649,35.535
net5231,35.525
_01646_,35.52
_03314_,35.52
_04813_,35.52
_09696_,35.52
gpio_control_bidir_2\[2\].gpio_ib_mode_sel,35.52
soc.core.dbg_uart_data\[13\],35.52
clknet_leaf_86_mgmt_buffers.caravel_clk,35.52
net11216,35.52
_12319_,35.51
net10790,35.505
_07004_,35.5
_09119_,35.5
soc.core.VexRiscv.IBusCachedPlugin_cache.lineLoader_address\[29\],35.5
soc.core.VexRiscv._zz_execute_to_memory_REGFILE_WRITE_DATA\[21\],35.5
net12825,35.5
_07279_,35.485
_08894_,35.485
_00592_,35.48
_06286_,35.48
_11465_,35.48
_12013_,35.48
net4525,35.48
net12148,35.48
_10229_,35.475
_00511_,35.46
_01435_,35.46
_02548_,35.46
_06495_,35.46
_11740_,35.46
mgmt_buffers.la_data_in_mprj_bar\[34\],35.46
soc.core.VexRiscv.RegFilePlugin_regFile\[2\]\[4\],35.46
soc.core.VexRiscv.RegFilePlugin_regFile\[30\]\[3\],35.46
soc.core.gpioin3_gpioin3_in_pads_n_d,35.46
net4966,35.46
net8400,35.46
_01771_,35.44
_01840_,35.44
net11479,35.44
net9777,35.43
net4554,35.425
_00149_,35.42
_01330_,35.42
_01534_,35.42
_06642_,35.42
_07454_,35.42
_13524_,35.42
soc.core.VexRiscv.RegFilePlugin_regFile\[15\]\[29\],35.42
soc.core.storage\[1\]\[3\],35.42
user_io_oeb\[22\],35.42
net5821,35.42
net8501,35.42
net12291,35.42
net12514,35.42
_07237_,35.405
_06873_,35.4
_08171_,35.4
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[8\]\[19\],35.4
net3555,35.4
net7449,35.4
net9660,35.4
net9795,35.4
net7951,35.385
_00057_,35.38
_00521_,35.38
_06520_,35.38
_13715_,35.38
soc.core.mgmtsoc_master_tx_fifo_source_payload_width\[3\],35.38
soc.core.storage\[1\]\[7\],35.38
net396,35.38
net3523,35.38
net9674,35.38
_04758_,35.36
_09570_,35.36
_11549_,35.36
gpio_control_in_2\[3\].gpio_ana_sel,35.36
soc.core.VexRiscv._zz_CsrPlugin_csrMapping_readDataInit\[14\],35.36
soc.core.storage_1\[8\]\[5\],35.36
_09881_,35.355
gpio_control_in_2\[9\].gpio_defaults\[9\],35.35
mgmt_buffers.la_data_in_mprj\[3\],35.345
net8264,35.345
_00766_,35.34
_07273_,35.34
_07939_,35.34
_12648_,35.34
soc.core.dff2_bus_ack,35.34
soc.core.uart_phy_tx_phase\[7\],35.34
clknet_leaf_499_mgmt_buffers.caravel_clk,35.34
clknet_leaf_930_mgmt_buffers.caravel_clk,35.34
net11437,35.34
net10800,35.33
net10081,35.325
_00559_,35.32
_13661_,35.32
gpio_control_in_2\[0\].gpio_vtrip_sel,35.32
net7338,35.32
net2675,35.32
gpio_control_in_2\[0\].gpio_defaults\[5\],35.31
net7614,35.305
_03415_,35.3
_03997_,35.3
_10050_,35.3
_11513_,35.3
gpio_control_in_2\[2\].shift_register\[6\],35.3
soc.core.VexRiscv.RegFilePlugin_regFile\[8\]\[18\],35.3
soc.core.VexRiscv.execute_to_memory_PC\[17\],35.3
net9149,35.3
_02484_,35.28
_04092_,35.28
net3052,35.28
net12480,35.28
_05096_,35.26
_10245_,35.26
_13244_,35.26
soc.core.storage_1\[15\]\[2\],35.26
net6820,35.26
net8935,35.26
_08253_,35.255
_02288_,35.24
_04298_,35.24
_04524_,35.24
_11578_,35.24
net5545,35.24
net6224,35.24
_00263_,35.22
_00916_,35.22
_02667_,35.22
_08929_,35.22
_11520_,35.22
pll.itrim\[9\],35.22
soc.core.VexRiscv._zz_execute_to_memory_REGFILE_WRITE_DATA\[6\],35.22
net3176,35.22
net4162,35.22
_00051_,35.2
_06240_,35.2
_06961_,35.2
_08508_,35.2
_10354_,35.2
soc.core.VexRiscv.HazardSimplePlugin_writeBackWrites_payload_address\[1\],35.2
net5092,35.2
net5787,35.2
_02239_,35.18
_02270_,35.18
_04105_,35.18
_06293_,35.18
gpio_control_in_1\[0\].shift_register\[2\],35.18
soc.core.VexRiscv.RegFilePlugin_regFile\[3\]\[17\],35.18
soc.core.interface6_bank_bus_dat_r\[26\],35.18
net5942,35.18
_06178_,35.16
_07940_,35.16
_13577_,35.16
net7443,35.16
net8630,35.16
gpio_control_bidir_2\[1\].gpio_defaults\[9\],35.15
_00483_,35.14
_04444_,35.14
_11070_,35.14
_12072_,35.14
_13363_,35.14
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[4\]\[10\],35.14
soc.core.storage\[14\]\[3\],35.14
net2789,35.14
net4473,35.14
_09598_,35.125
_00680_,35.12
_07669_,35.12
_11237_,35.12
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[7\]\[26\],35.12
soc.core.VexRiscv.RegFilePlugin_regFile\[21\]\[22\],35.12
net4885,35.12
net8710,35.12
net10023,35.12
net10761,35.12
_05700_,35.1
_08039_,35.1
soc.core.VexRiscv._zz_execute_to_memory_REGFILE_WRITE_DATA\[27\],35.1
soc.core.multiregimpl80_regs1,35.1
net11726,35.1
_14252_,35.095
net10642,35.095
gpio_control_in_1\[0\].gpio_defaults\[6\],35.09
net4441,35.085
net5631,35.085
_00994_,35.08
_04294_,35.08
_06274_,35.08
_06820_,35.08
_07544_,35.08
_07686_,35.08
_10973_,35.08
_12976_,35.08
gpio_control_in_1a\[4\].shift_register\[7\],35.08
gpio_control_in_2\[6\].gpio_slow_sel,35.08
clknet_leaf_776_mgmt_buffers.caravel_clk,35.08
net5995,35.08
net8527,35.075
_07083_,35.06
_08125_,35.06
_09663_,35.06
_11383_,35.06
net4946,35.06
net13179,35.06
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[13\]\[2\],35.04
soc.core.storage\[12\]\[3\],35.04
net6749,35.04
net12415,35.04
_03031_,35.02
_04645_,35.02
_05008_,35.02
_11792_,35.02
gpio_control_in_1a\[5\].shift_register\[4\],35.02
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[8\]\[26\],35.02
soc.core.VexRiscv.RegFilePlugin_regFile\[19\]\[31\],35.02
soc.core.VexRiscv.RegFilePlugin_regFile\[2\]\[0\],35.02
net8203,35.005
_03549_,35
_04420_,35
soc.core.VexRiscv.RegFilePlugin_regFile\[31\]\[7\],35
soc.core.VexRiscv.RegFilePlugin_regFile\[6\]\[14\],35
clknet_leaf_624_mgmt_buffers.caravel_clk,35
net6109,34.985
net9223,34.985
_03313_,34.98
_08126_,34.98
_10287_,34.98
_12814_,34.98
soc.core.VexRiscv.HazardSimplePlugin_writeBackBuffer_valid,34.98
net13193,34.98
_03034_,34.97
_01443_,34.96
_02501_,34.96
_06552_,34.96
_10373_,34.96
_13044_,34.96
_14598_,34.96
soc.core.VexRiscv.IBusCachedPlugin_cache.io_cpu_prefetch_pc\[22\],34.96
clknet_leaf_255_mgmt_buffers.caravel_clk,34.96
clknet_leaf_1007_mgmt_buffers.caravel_clk,34.96
net6465,34.96
_00233_,34.94
_02827_,34.94
_10401_,34.94
gpio_control_in_2\[8\].gpio_defaults\[4\],34.93
_06640_,34.925
_06757_,34.92
_07828_,34.92
soc.core.gpioin0_gpioin0_in_pads_n_d,34.92
soc.core.la_ien_storage\[114\],34.92
soc.core.storage\[7\]\[5\],34.92
clknet_leaf_1183_mgmt_buffers.caravel_clk,34.92
net5198,34.92
net6491,34.92
net9535,34.92
net12809,34.92
net12814,34.92
_08309_,34.905
net2950,34.905
net6434,34.905
_05734_,34.9
_06363_,34.9
mgmt_buffers.la_data_in_mprj\[4\],34.9
net3992,34.89
_08733_,34.885
net7145,34.885
_01891_,34.88
_02056_,34.88
_02335_,34.88
_02689_,34.88
_04078_,34.88
_08884_,34.88
soc.core.la_ien_storage\[81\],34.88
net4924,34.88
net8460,34.88
net12641,34.88
_04038_,34.86
_11790_,34.845
net7576,34.845
_02746_,34.84
_03721_,34.84
_12158_,34.84
_13925_,34.84
_15682_,34.84
soc.core.VexRiscv.RegFilePlugin_regFile\[30\]\[13\],34.84
soc.core.multiregimpl74_regs0,34.84
net105,34.84
clknet_leaf_90_mgmt_buffers.caravel_clk,34.84
clknet_leaf_1168_mgmt_buffers.caravel_clk,34.84
net4147,34.84
net8032,34.84
net13191,34.84
net10550,34.83
_00888_,34.82
_04039_,34.82
_10336_,34.82
_10859_,34.82
_11529_,34.82
net8643,34.82
_04029_,34.8
_07976_,34.8
_10925_,34.8
_11743_,34.8
_13061_,34.8
gpio_control_in_1a\[3\].shift_register\[5\],34.8
mgmt_buffers.la_data_in_mprj_bar\[102\],34.8
clknet_leaf_474_mgmt_buffers.caravel_clk,34.8
net3041,34.8
net12436,34.8
net7413,34.785
_00987_,34.78
_01977_,34.78
_04087_,34.78
_06737_,34.78
soc.core.VexRiscv.RegFilePlugin_regFile\[26\]\[9\],34.78
net8969,34.78
net11159,34.78
_01571_,34.76
_03091_,34.76
_07840_,34.76
gpio_control_in_1\[4\].gpio_outenb,34.755
net4717,34.755
net10749,34.745
net7689,34.74
net9139,34.74
net10126,34.74
net11416,34.74
mprj_io_analog_sel[22],34.73
mprj_io_slow_sel[24],34.73
_05550_,34.72
_06865_,34.72
_08359_,34.72
mgmt_buffers.la_data_in_mprj_bar\[120\],34.72
soc.core.storage\[2\]\[3\],34.72
net210,34.72
net5378,34.72
net10292,34.72
net11463,34.72
_00049_,34.7
_04299_,34.7
_05706_,34.7
_08558_,34.7
_12299_,34.7
soc.core.mgmtsoc_value_status\[5\],34.7
soc.core.multiregimpl110_regs0,34.7
net6673,34.7
_01444_,34.68
_07804_,34.68
_08122_,34.68
gpio_control_in_1\[1\].resetn_out,34.68
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[0\]\[0\],34.68
soc.core.interface3_bank_bus_dat_r\[0\],34.68
clknet_leaf_80_mgmt_buffers.caravel_clk,34.68
net11183,34.68
net11462,34.68
net5423,34.665
_00520_,34.66
_00730_,34.66
_05274_,34.66
_06683_,34.66
net8143,34.66
gpio_control_bidir_2\[1\].gpio_defaults\[5\],34.65
_08851_,34.645
soc.core.spi_master_mosi_data\[1\],34.645
_11703_,34.64
_14997_,34.64
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[8\]\[11\],34.64
net5084,34.64
net4349,34.625
_03376_,34.62
_04695_,34.62
_07896_,34.62
_09391_,34.62
_09762_,34.62
_12210_,34.62
_12505_,34.62
_14026_,34.62
net9471,34.62
_10948_,34.61
net10573,34.605
_01803_,34.6
_06847_,34.6
_08664_,34.6
gpio_control_in_2\[6\].gpio_vtrip_sel,34.6
net4726,34.6
net12081,34.6
mprj_io_slow_sel[14],34.59
mgmt_buffers.la_data_in_mprj\[99\],34.585
net9612,34.585
_06340_,34.58
_06862_,34.58
_08066_,34.58
_09661_,34.58
soc.core.interface0_bank_bus_dat_r\[24\],34.58
net298,34.58
_11057_,34.57
_03907_,34.56
_06776_,34.56
_13950_,34.56
soc.core.mgmtsoc_vexriscv_i_cmd_payload_data\[31\],34.56
soc.core.slave_sel_r\[2\],34.56
soc.core.spi_master_miso_data\[0\],34.56
_06798_,34.54
_07864_,34.54
soc.core.multiregimpl106_regs0,34.54
soc.core.storage_1\[1\]\[1\],34.54
net6798,34.54
_08757_,34.525
_10955_,34.52
_14653_,34.52
soc.core.interface9_bank_bus_dat_r\[3\],34.52
soc.core.mgmtsoc_master_tx_fifo_source_payload_len\[1\],34.52
_07214_,34.515
net10771,34.515
gpio_control_in_1\[4\].shift_register\[6\],34.5
clknet_leaf_645_mgmt_buffers.caravel_clk,34.5
net3614,34.5
net5118,34.5
net8549,34.5
net10508,34.49
net3717,34.485
_04494_,34.48
_09979_,34.48
_14095_,34.48
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[8\]\[23\],34.48
soc.core.storage\[11\]\[3\],34.48
net277,34.48
_11817_,34.47
gpio_control_in_1a\[4\].gpio_defaults\[8\],34.47
pll.itrim\[13\],34.47
_01935_,34.46
_06872_,34.46
_08572_,34.46
_09728_,34.46
soc.core.dbg_uart_count\[4\],34.46
soc.core.storage\[14\]\[4\],34.46
clknet_leaf_315_mgmt_buffers.caravel_clk,34.46
net7936,34.46
net8742,34.46
net10037,34.46
_01680_,34.44
_05542_,34.44
_09563_,34.44
_14353_,34.44
net6652,34.44
net8664,34.44
net9477,34.44
soc.core.spi_sdoenb,34.43
_00453_,34.42
_09309_,34.42
_09927_,34.42
soc.core.VexRiscv.RegFilePlugin_regFile\[25\]\[22\],34.42
net12946,34.42
_05546_,34.41
mprj_io_slow_sel[13],34.41
_02727_,34.4
_03277_,34.4
_03509_,34.4
_00468_,34.38
_02488_,34.38
_02897_,34.38
_10085_,34.38
gpio_control_in_1\[3\].shift_register\[4\],34.38
soc.core.mgmtsoc_value_status\[4\],34.38
soc.core.storage\[6\]\[4\],34.38
clknet_leaf_48_mgmt_buffers.caravel_clk,34.38
clknet_leaf_1124_mgmt_buffers.caravel_clk,34.38
net3361,34.38
net3761,34.38
net6172,34.38
net7836,34.38
net12534,34.38
_10241_,34.365
_01088_,34.36
_01378_,34.36
_03280_,34.36
_06309_,34.36
_06528_,34.36
_12543_,34.36
_13676_,34.36
gpio_control_in_1a\[5\].gpio_outenb,34.36
gpio_control_in_2\[7\].gpio_inenb,34.36
net10691,34.36
net10905,34.36
net11698,34.36
_06912_,34.35
net3990,34.345
_02996_,34.34
_11801_,34.34
_13185_,34.34
_14155_,34.34
gpio_control_in_1a\[4\].shift_register\[2\],34.34
clknet_leaf_755_mgmt_buffers.caravel_clk,34.34
net11592,34.34
net13186,34.34
_05432_,34.33
net11739,34.33
_04670_,34.32
_09826_,34.32
_10326_,34.32
_12081_,34.32
_12961_,34.32
_12979_,34.32
gpio_control_in_1\[1\].gpio_vtrip_sel,34.32
soc.core.multiregimpl56_regs0,34.32
net278,34.32
net7676,34.32
net11195,34.32
net11523,34.32
net11088,34.305
_12007_,34.3
_14789_,34.3
net5638,34.3
net6396,34.3
_00460_,34.28
_00570_,34.28
_02776_,34.28
_08186_,34.28
_08441_,34.28
net6950,34.28
net8631,34.265
_00967_,34.26
_01400_,34.26
_02480_,34.26
_07251_,34.26
_10019_,34.26
gpio_control_in_2\[8\].pad_gpio_outenb,34.26
net230,34.26
net9840,34.26
net3561,34.245
net9371,34.245
_01458_,34.24
_06314_,34.24
_07693_,34.24
_11173_,34.24
soc.core.VexRiscv.RegFilePlugin_regFile\[13\]\[22\],34.24
soc.core.storage_1\[4\]\[2\],34.24
net4901,34.24
net5063,34.24
net5760,34.24
soc.core.mgmtsoc_zero_pending,34.225
net7387,34.225
_00754_,34.22
_08080_,34.22
_10851_,34.22
_12778_,34.22
_14141_,34.22
soc.core.VexRiscv.CsrPlugin_mtval\[27\],34.22
soc.core.VexRiscv.RegFilePlugin_regFile\[25\]\[3\],34.22
soc.core.storage_1\[10\]\[5\],34.22
net5343,34.22
net9815,34.22
net10647,34.215
_02823_,34.2
_10291_,34.2
_13063_,34.2
_13350_,34.2
soc.core.multiregimpl36_regs1,34.2
net5652,34.2
net11303,34.2
_05236_,34.19
_01283_,34.18
soc.core.VexRiscv.RegFilePlugin_regFile\[31\]\[14\],34.18
soc.core.VexRiscv._zz_CsrPlugin_csrMapping_readDataInit\[29\],34.18
net9750,34.18
mgmt_buffers.la_data_in_mprj\[111\],34.165
net6668,34.165
_02202_,34.16
_04396_,34.16
net2906,34.16
net9316,34.16
gpio_control_in_2\[5\].gpio_defaults\[3\],34.15
_00701_,34.14
_14989_,34.14
clknet_leaf_871_mgmt_buffers.caravel_clk,34.14
net10813,34.14
net3976,34.135
_03019_,34.12
_06377_,34.12
_06446_,34.12
_06777_,34.12
_06990_,34.12
_14067_,34.12
soc.core.VexRiscv.RegFilePlugin_regFile\[13\]\[5\],34.12
clknet_leaf_639_mgmt_buffers.caravel_clk,34.12
clknet_leaf_991_mgmt_buffers.caravel_clk,34.12
net7824,34.12
net8777,34.12
net7059,34.105
_00454_,34.1
_01336_,34.1
_02922_,34.1
_12150_,34.1
_14451_,34.1
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[1\]\[28\],34.1
net4327,34.1
mprj_io_vtrip_sel[22],34.09
_09352_,34.085
mgmt_buffers.la_data_in_mprj\[40\],34.085
_00495_,34.08
_03281_,34.08
_04069_,34.08
_07898_,34.08
_08603_,34.08
_09582_,34.08
_11013_,34.08
_11468_,34.08
soc.core.VexRiscv.IBusCachedPlugin_cache._zz_banks_0_port1\[10\],34.08
soc.core.multiregimpl93_regs0,34.08
soc.core.storage\[3\]\[0\],34.08
clknet_leaf_175_mgmt_buffers.caravel_clk,34.08
net5892,34.08
net11179,34.08
mprj_io_analog_pol[13],34.07
_04810_,34.06
_08259_,34.06
_12406_,34.06
net7740,34.045
_06667_,34.04
_06719_,34.04
_07698_,34.04
_08376_,34.04
_12854_,34.04
_14385_,34.04
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[8\]\[4\],34.04
soc.core.VexRiscv.RegFilePlugin_regFile\[12\]\[19\],34.04
net5949,34.04
net8425,34.04
net12695,34.04
_08477_,34.035
net6405,34.025
net7437,34.025
_03403_,34.02
_12666_,34.02
_04928_,34.01
net12268,34.005
_03274_,34
_06840_,34
_06953_,34
_06955_,34
_08967_,34
_09709_,34
mgmt_buffers.la_data_in_mprj_bar\[61\],34
net212,34
net280,34
net10439,34
_09612_,33.985
net5273,33.985
_00010_,33.98
_02966_,33.98
soc.core.gpioin5_pending_r,33.98
mask_rev\[24\],33.97
_07017_,33.965
net10395,33.965
_00588_,33.96
_01035_,33.96
_01449_,33.96
_01938_,33.96
gpio_control_bidir_2\[1\].shift_register\[8\],33.96
pll.pll_control.prep\[0\],33.96
soc.core.VexRiscv.RegFilePlugin_regFile\[6\]\[15\],33.96
soc.core.dbg_uart_tx_phase\[6\],33.96
clknet_leaf_87_mgmt_buffers.caravel_clk,33.96
clknet_leaf_169_mgmt_buffers.caravel_clk,33.96
clknet_leaf_804_mgmt_buffers.caravel_clk,33.96
net3766,33.96
net12234,33.96
net12557,33.96
_05116_,33.95
net10622,33.94
_01714_,33.92
_04467_,33.92
_09328_,33.92
soc.core.VexRiscv.RegFilePlugin_regFile\[4\]\[0\],33.92
net7168,33.92
net8511,33.92
mgmt_buffers.la_data_in_mprj\[101\],33.905
net7645,33.905
_01077_,33.9
_01454_,33.9
_03249_,33.9
_03402_,33.9
_04468_,33.9
_06813_,33.9
_11965_,33.9
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[15\]\[19\],33.9
net5991,33.9
net11744,33.9
_09107_,33.885
_03114_,33.88
_10969_,33.88
gpio_control_in_1\[3\].shift_register\[5\],33.88
gpio_control_in_1a\[2\].shift_register\[11\],33.88
mgmt_buffers.la_data_in_mprj_bar\[96\],33.88
soc.core.VexRiscv.RegFilePlugin_regFile\[14\]\[27\],33.88
net3327,33.88
net4402,33.88
net5473,33.88
net8573,33.88
net11541,33.88
net9051,33.865
_00925_,33.86
_01246_,33.86
_02098_,33.86
_13895_,33.86
gpio_control_in_1a\[4\].gpio_holdover,33.86
net12010,33.86
net10495,33.85
_04816_,33.84
_06212_,33.84
_10648_,33.84
_13133_,33.84
_14990_,33.84
net10539,33.84
_10232_,33.835
mprj_io_dm[8],33.83
_07736_,33.82
_07881_,33.82
_09540_,33.82
_10278_,33.82
_14868_,33.82
soc.core.VexRiscv.RegFilePlugin_regFile\[19\]\[21\],33.82
_08219_,33.805
_00143_,33.8
_04426_,33.8
_07815_,33.8
_08594_,33.8
_09031_,33.8
_12005_,33.8
_12206_,33.8
soc.core.multiregimpl103_regs0,33.8
net7644,33.8
net8417,33.8
gpio_control_in_2\[5\].gpio_ana_pol,33.795
_04212_,33.78
_06685_,33.78
_09613_,33.78
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[10\]\[1\],33.78
net6065,33.78
net8667,33.78
_04417_,33.76
_05762_,33.76
_07150_,33.76
_13009_,33.76
_08711_,33.745
net6529,33.745
_02228_,33.74
_02935_,33.74
_04068_,33.74
_07948_,33.74
_10360_,33.74
gpio_control_in_2\[2\].gpio_vtrip_sel,33.74
soc.core.VexRiscv.RegFilePlugin_regFile\[8\]\[23\],33.74
net9746,33.74
mprj_io_holdover[12],33.73
net10912,33.725
_00670_,33.72
_01265_,33.72
_03129_,33.72
_12267_,33.72
_13683_,33.72
net11966,33.72
_00747_,33.7
_03539_,33.7
_06712_,33.7
_10096_,33.7
_11393_,33.7
_11820_,33.7
net65,33.7
net305,33.7
net8062,33.7
net9290,33.7
_14234_,33.685
_01317_,33.68
_04466_,33.68
net4719,33.68
net10621,33.68
net10575,33.665
_00193_,33.66
_01674_,33.66
_02045_,33.66
_07115_,33.66
_14001_,33.66
net4909,33.66
net7348,33.66
net11696,33.66
_01510_,33.64
_09980_,33.64
_14288_,33.64
soc.core.VexRiscv.RegFilePlugin_regFile\[30\]\[8\],33.64
net12732,33.64
net3744,33.625
_00749_,33.62
_01640_,33.62
_04198_,33.62
_06441_,33.62
_06442_,33.62
_06476_,33.62
_06708_,33.62
_08175_,33.62
soc.core.VexRiscv.RegFilePlugin_regFile\[16\]\[30\],33.62
soc.core.mgmtsoc_scratch_storage\[25\],33.62
soc.core.multiregimpl69_regs0,33.62
net311,33.62
net4329,33.62
net5924,33.62
net8103,33.62
_02124_,33.6
_08705_,33.6
_14992_,33.6
clknet_leaf_648_mgmt_buffers.caravel_clk,33.6
net4451,33.6
net9865,33.6
net5739,33.585
_01163_,33.58
_02215_,33.58
_06362_,33.58
_07784_,33.58
_09089_,33.58
_09379_,33.58
_14441_,33.58
_14915_,33.58
gpio_control_in_1\[1\].shift_register\[5\],33.58
pll.ringosc.dstage\[5\].id.d2,33.58
soc.core.VexRiscv.IBusCachedPlugin_cache.lineLoader_address\[20\],33.58
clknet_leaf_637_mgmt_buffers.caravel_clk,33.58
clknet_leaf_1059_mgmt_buffers.caravel_clk,33.58
net6968,33.58
net7739,33.58
net9456,33.58
_03519_,33.56
_04856_,33.56
_13836_,33.56
_14914_,33.56
_09024_,33.55
_09255_,33.545
net8702,33.545
_03210_,33.54
_03413_,33.54
_04021_,33.54
_06348_,33.54
_07002_,33.54
_10198_,33.54
_12554_,33.54
mgmt_buffers.la_data_in_enable\[45\],33.54
soc.core.uart_phy_rx_data\[3\],33.54
clknet_leaf_110_mgmt_buffers.caravel_clk,33.54
clknet_leaf_135_mgmt_buffers.caravel_clk,33.54
clknet_leaf_941_mgmt_buffers.caravel_clk,33.54
net5296,33.54
net5458,33.54
net8284,33.54
net12559,33.54
net10416,33.535
net7546,33.525
_02863_,33.52
_07041_,33.52
_07460_,33.52
_09839_,33.52
soc.core.VexRiscv.RegFilePlugin_regFile\[24\]\[9\],33.52
net4840,33.52
net10882,33.52
_00535_,33.5
_05083_,33.5
_09204_,33.5
_10451_,33.5
clknet_leaf_910_mgmt_buffers.caravel_clk,33.5
net4788,33.5
net8391,33.5
net8782,33.5
net12043,33.5
_02891_,33.48
_03601_,33.48
_06345_,33.48
_08994_,33.48
_09583_,33.48
soc.core.VexRiscv.RegFilePlugin_regFile\[24\]\[5\],33.48
net225,33.48
net2991,33.465
net11272,33.465
_01108_,33.46
_01162_,33.46
_02469_,33.46
_03044_,33.46
_03391_,33.46
soc.core.multiregimpl11_regs0,33.46
gpio_control_in_1\[0\].gpio_defaults\[12\],33.45
net8136,33.445
_06619_,33.44
_06951_,33.44
net359,33.44
net11926,33.44
net11842,33.43
_09623_,33.425
_01650_,33.42
_03961_,33.42
net10510,33.42
net12751,33.42
net6288,33.405
_01666_,33.4
_11701_,33.4
net4964,33.4
gpio_control_in_1\[0\].gpio_defaults\[3\],33.39
net3171,33.385
_00462_,33.38
_02801_,33.38
_04635_,33.38
_07358_,33.38
_07954_,33.38
_08504_,33.38
_09718_,33.38
_11771_,33.38
pll.itrim\[6\],33.38
net6576,33.38
net12199,33.38
gpio_control_in_2\[1\].gpio_defaults\[3\],33.37
soc.core.VexRiscv.RegFilePlugin_regFile\[0\]\[7\],33.36
net10645,33.36
mgmt_buffers.mprj_logic1\[338\],33.35
_02401_,33.34
_02700_,33.34
_06631_,33.34
_07143_,33.34
_07732_,33.34
_08867_,33.34
_10325_,33.34
_12263_,33.34
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[11\]\[9\],33.34
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[5\]\[25\],33.34
soc.core.spimaster_state\[0\],33.34
soc.core.storage_1\[5\]\[1\],33.34
net3553,33.34
net4782,33.34
net5736,33.34
net8423,33.34
net3496,33.325
net6338,33.325
_01819_,33.32
_03414_,33.32
_06277_,33.32
_07610_,33.32
_07749_,33.32
_10001_,33.32
soc.core.multiregimpl105_regs0,33.32
clknet_leaf_406_mgmt_buffers.caravel_clk,33.32
net4389,33.32
net11212,33.32
net3456,33.315
_01966_,33.3
_06324_,33.3
_15270_,33.3
net111,33.3
_02466_,33.28
_09331_,33.28
_14394_,33.28
soc.core.VexRiscv.RegFilePlugin_regFile\[26\]\[17\],33.28
net3460,33.28
net12895,33.28
net9783,33.265
_00890_,33.26
_01708_,33.26
_04364_,33.26
_08374_,33.26
_14420_,33.255
net10599,33.255
net6727,33.245
net7188,33.245
net8193,33.245
_04492_,33.24
_07016_,33.24
_08796_,33.24
_11097_,33.24
_11462_,33.24
_12042_,33.24
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[10\]\[31\],33.24
soc.core.dff_bus_ack,33.24
net362,33.24
clknet_leaf_1110_mgmt_buffers.caravel_clk,33.24
net7804,33.24
net10627,33.24
net11963,33.24
mprj_io_oeb[20],33.23
_02251_,33.22
_06687_,33.22
_07082_,33.22
_07776_,33.22
_09528_,33.22
_10053_,33.22
_12677_,33.22
_13041_,33.22
mgmt_buffers.la_data_in_mprj\[59\],33.22
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[8\]\[27\],33.22
_08434_,33.215
_00953_,33.2
_02878_,33.2
_06405_,33.2
_08133_,33.2
_08266_,33.2
_08480_,33.2
_09674_,33.2
gpio_control_in_1a\[0\].gpio_vtrip_sel,33.2
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[11\]\[3\],33.2
soc.core.VexRiscv.IBusCachedPlugin_cache.io_cpu_prefetch_pc\[20\],33.2
soc.core.VexRiscv.RegFilePlugin_regFile\[6\]\[21\],33.2
net4988,33.2
net7928,33.2
_09074_,33.185
_00941_,33.18
_07404_,33.18
_08389_,33.18
_11812_,33.18
_15296_,33.18
gpio_control_in_2\[8\].gpio_ana_en,33.18
clknet_leaf_1099_mgmt_buffers.caravel_clk,33.18
net11521,33.18
net9648,33.175
gpio_control_in_2\[7\].gpio_defaults\[4\],33.17
net10545,33.165
_00677_,33.16
_01270_,33.16
_09530_,33.16
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[8\]\[31\],33.16
soc.core.VexRiscv.RegFilePlugin_regFile\[8\]\[13\],33.16
soc.core.interface3_bank_bus_dat_r\[28\],33.16
soc.core.la_ien_storage\[68\],33.16
net4284,33.16
net4671,33.16
net10318,33.16
_01181_,33.14
_07923_,33.14
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[11\]\[27\],33.14
net6873,33.135
gpio_control_in_1a\[3\].gpio_defaults\[9\],33.13
net4173,33.125
_00563_,33.12
_01693_,33.12
_07794_,33.12
_09664_,33.12
_10094_,33.12
_14362_,33.12
gpio_control_in_1\[4\].shift_register\[5\],33.12
soc.core.multiregimpl51_regs1,33.12
net7258,33.12
net10096,33.12
net2664,33.12
_09645_,33.115
net10541,33.115
_01146_,33.1
_05770_,33.1
_10984_,33.1
_11600_,33.1
pll.ext_trim\[8\],33.1
net4972,33.1
net8118,33.1
net7159,33.085
_00412_,33.08
_00631_,33.08
_01645_,33.08
_04025_,33.08
_12788_,33.08
_13945_,33.08
_14280_,33.08
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[2\]\[31\],33.08
net379,33.08
_12205_,33.07
_02883_,33.06
_11026_,33.06
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[11\]\[11\],33.06
gpio_control_in_2\[3\].gpio_defaults\[3\],33.05
net8482,33.045
net9101,33.045
_05512_,33.04
_05638_,33.04
_06225_,33.04
_06413_,33.04
_14664_,33.04
mgmt_buffers.mprj_adr_o_core\[5\],33.04
soc.core.VexRiscv.RegFilePlugin_regFile\[10\]\[21\],33.04
net4109,33.04
net4942,33.04
net12428,33.04
net12486,33.04
_01844_,33.02
_09713_,33.02
_11039_,33.02
_12656_,33.02
soc.core.dbg_uart_rx_phase\[14\],33.02
net3283,33.005
_03234_,33
_06337_,33
_07071_,33
_07957_,33
gpio_control_in_1\[1\].gpio_defaults\[7\],33
soc.core.VexRiscv.execute_to_memory_PC\[27\],33
clknet_leaf_1002_mgmt_buffers.caravel_clk,33
net4540,33
net7664,33
net8557,33
_03356_,32.98
_05760_,32.98
_06517_,32.98
_06587_,32.98
_12816_,32.98
_13012_,32.98
net6253,32.98
net11719,32.98
net10411,32.975
_05246_,32.97
_03390_,32.96
_07063_,32.96
_08485_,32.96
_13456_,32.96
gpio_control_in_1\[0\].shift_register\[4\],32.96
gpio_control_in_1a\[2\].shift_register\[1\],32.96
gpio_control_in_1a\[4\].shift_register\[4\],32.96
soc.core.storage\[8\]\[3\],32.96
net6683,32.96
net10189,32.96
net11211,32.96
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[11\]\[0\],32.94
net6598,32.94
net6655,32.94
net12185,32.94
_07184_,32.92
_11564_,32.92
gpio_control_in_1a\[2\].shift_register\[3\],32.92
soc.core.VexRiscv.RegFilePlugin_regFile\[18\]\[18\],32.92
net9247,32.92
net6302,32.905
soc.core.storage\[7\]\[3\],32.9
net6761,32.9
net10064,32.9
net10653,32.9
_04477_,32.88
_06599_,32.88
_06692_,32.88
_12556_,32.88
gpio_control_in_2\[8\].shift_register\[1\],32.88
mgmt_buffers.la_data_in_mprj_bar\[94\],32.88
net3890,32.88
net9684,32.88
net11617,32.88
net12583,32.88
_00230_,32.86
_00585_,32.86
_02871_,32.86
_04473_,32.86
clknet_leaf_146_mgmt_buffers.caravel_clk,32.86
net4073,32.86
_08837_,32.845
clknet_leaf_258_mgmt_buffers.caravel_clk,32.84
clknet_leaf_408_mgmt_buffers.caravel_clk,32.84
net7808,32.84
net7912,32.84
net8322,32.84
net10554,32.835
_02892_,32.82
_04077_,32.82
_06272_,32.82
_06655_,32.82
gpio_control_in_2\[5\].shift_register\[7\],32.82
soc.core.VexRiscv.lastStagePc\[17\],32.82
clknet_leaf_415_mgmt_buffers.caravel_clk,32.82
clknet_leaf_809_mgmt_buffers.caravel_clk,32.82
net5328,32.82
_10656_,32.8
_12097_,32.8
_12187_,32.8
_13517_,32.8
mgmt_buffers.la_data_in_mprj_bar\[125\],32.8
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[4\]\[11\],32.8
net9767,32.8
_08443_,32.785
net3399,32.785
_06570_,32.78
_07380_,32.78
mgmt_buffers.la_data_in_mprj_bar\[111\],32.78
soc.core.VexRiscv.RegFilePlugin_regFile\[20\]\[8\],32.78
net9499,32.78
net11745,32.78
net9857,32.765
_07977_,32.76
soc.core.VexRiscv.RegFilePlugin_regFile\[31\]\[11\],32.76
net11139,32.76
net12002,32.76
_13162_,32.755
net10804,32.755
_08114_,32.74
_14356_,32.74
soc.core.mgmtsoc_value_status\[15\],32.74
net12056,32.74
net10662,32.735
_05080_,32.73
_08518_,32.725
net9527,32.725
_00589_,32.72
_03083_,32.72
_12098_,32.72
soc.core.VexRiscv.RegFilePlugin_regFile\[15\]\[26\],32.72
soc.core.dbg_uart_rx_phase\[27\],32.72
net9720,32.72
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[10\]\[27\],32.71
_02292_,32.7
_02411_,32.7
_05125_,32.7
_07110_,32.7
_09354_,32.7
_10620_,32.7
_12817_,32.7
_13356_,32.7
_15045_,32.7
soc.core.storage\[1\]\[4\],32.7
soc.core.storage\[3\]\[6\],32.7
clknet_leaf_97_mgmt_buffers.caravel_clk,32.7
net4992,32.7
net7771,32.7
net11055,32.7
_01467_,32.68
_02164_,32.68
_04045_,32.68
_04993_,32.68
_10410_,32.68
_12021_,32.68
soc.core.count\[9\],32.68
net2988,32.68
net5832,32.68
_08736_,32.665
net9364,32.665
_00266_,32.66
_03326_,32.66
_06930_,32.66
_08800_,32.66
_09835_,32.66
_13931_,32.66
gpio_control_in_1a\[3\].shift_register\[8\],32.66
soc.core.VexRiscv.IBusCachedPlugin_cache.decodeStage_mmuRsp_physicalAddress\[30\],32.66
net4578,32.66
net6542,32.66
net11638,32.66
_10127_,32.645
_01313_,32.64
_01466_,32.64
_05612_,32.64
_10123_,32.64
soc.core.VexRiscv.RegFilePlugin_regFile\[18\]\[30\],32.64
_00931_,32.62
_02562_,32.62
_03148_,32.62
_06367_,32.62
_06919_,32.62
_08590_,32.62
_09160_,32.62
_10222_,32.62
_11666_,32.62
_11838_,32.62
gpio_control_in_2\[4\].gpio_ana_sel,32.62
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[10\]\[30\],32.62
soc.core.multiregimpl104_regs0,32.62
clknet_leaf_575_mgmt_buffers.caravel_clk,32.62
net7128,32.62
net12808,32.62
_00352_,32.6
_01561_,32.6
_03398_,32.6
_04395_,32.6
_06242_,32.6
_07751_,32.6
net9315,32.6
gpio_control_in_1\[0\].gpio_defaults\[8\],32.59
net7949,32.585
_02777_,32.58
_04768_,32.58
_07759_,32.58
soc.core.VexRiscv.RegFilePlugin_regFile\[11\]\[2\],32.58
net5424,32.58
net12038,32.58
_05626_,32.57
_07205_,32.565
_01209_,32.56
_04053_,32.56
net9066,32.56
_01553_,32.54
_05139_,32.54
_06974_,32.54
_13571_,32.54
gpio_control_in_1\[4\].shift_register\[8\],32.54
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[11\]\[31\],32.54
soc.core.storage_1\[12\]\[6\],32.54
soc.core.storage_1\[14\]\[7\],32.54
net6828,32.54
_01928_,32.52
_04071_,32.52
_09543_,32.52
_12620_,32.52
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[9\]\[5\],32.52
net107,32.52
_01743_,32.5
_02080_,32.5
_02986_,32.5
_03192_,32.5
_08051_,32.5
_09524_,32.5
_14000_,32.5
soc.core.VexRiscv.RegFilePlugin_regFile\[8\]\[2\],32.5
net4727,32.5
net5392,32.5
net9378,32.5
net11030,32.5
_11639_,32.49
_00764_,32.48
_03576_,32.48
soc.core.VexRiscv.RegFilePlugin_regFile\[0\]\[3\],32.48
soc.core.VexRiscv.RegFilePlugin_regFile\[16\]\[21\],32.48
clknet_leaf_342_mgmt_buffers.caravel_clk,32.48
net4796,32.48
net11102,32.48
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[1\]\[27\],32.47
mgmt_buffers.la_data_in_mprj\[127\],32.465
_03162_,32.46
_05496_,32.46
_06858_,32.46
_13212_,32.46
soc.core.dbg_uart_count\[19\],32.46
net3530,32.46
net6739,32.46
net10887,32.46
net13175,32.46
gpio_control_in_1a\[3\].gpio_defaults\[11\],32.45
net10039,32.45
_13395_,32.44
soc.core.VexRiscv.RegFilePlugin_regFile\[8\]\[22\],32.44
soc.core.multiregimpl109_regs0,32.44
clknet_leaf_41_mgmt_buffers.caravel_clk,32.44
net9819,32.44
_08914_,32.425
_02881_,32.42
_03733_,32.42
_06651_,32.42
_08009_,32.42
_09417_,32.42
_12339_,32.42
_13043_,32.42
_15003_,32.42
gpio_control_in_1a\[2\].shift_register\[5\],32.42
mgmt_buffers.la_data_in_mprj\[61\],32.42
net7464,32.42
net9680,32.42
net10226,32.42
_02615_,32.4
_07960_,32.4
soc.core.VexRiscv.RegFilePlugin_regFile\[7\]\[21\],32.4
net2940,32.4
net6477,32.4
gpio_control_in_1a\[5\].gpio_defaults\[8\],32.39
gpio_control_in_2\[5\].gpio_defaults\[9\],32.39
_03254_,32.38
_06226_,32.38
_06978_,32.38
_13412_,32.38
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[1\]\[19\],32.38
net275,32.38
net12225,32.38
soc.core.VexRiscv.RegFilePlugin_regFile\[7\]\[0\],32.37
_03400_,32.36
_06335_,32.36
soc.core.storage_1\[12\]\[2\],32.36
net6665,32.36
net11133,32.36
mgmt_buffers.la_data_in_mprj\[51\],32.355
_05230_,32.35
_05544_,32.35
net6508,32.35
_04705_,32.34
_09533_,32.34
pll.ext_trim\[9\],32.34
soc.core.VexRiscv.RegFilePlugin_regFile\[21\]\[0\],32.34
net9466,32.34
_10182_,32.325
net3849,32.325
net11007,32.325
_00714_,32.32
_09135_,32.32
_13658_,32.32
gpio_control_in_2\[5\].gpio_holdover,32.32
soc.core.VexRiscv.IBusCachedPlugin_cache.lineLoader_address\[5\],32.32
soc.core.VexRiscv.RegFilePlugin_regFile\[23\]\[22\],32.32
soc.core.spimaster_state\[1\],32.32
soc.core.storage_1\[13\]\[3\],32.32
clknet_leaf_139_mgmt_buffers.caravel_clk,32.32
net10881,32.32
_00891_,32.3
_01404_,32.3
_04052_,32.3
_11582_,32.3
_13497_,32.3
_14085_,32.3
gpio_control_bidir_2\[1\].gpio_inenb,32.3
net9036,32.3
net11496,32.3
net7081,32.285
net11027,32.285
_01325_,32.28
_05499_,32.28
_07033_,32.28
_12154_,32.28
_12972_,32.28
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[12\]\[20\],32.28
soc.core.VexRiscv.RegFilePlugin_regFile\[10\]\[30\],32.28
soc.core.mgmtsoc_master_tx_fifo_source_payload_len\[0\],32.28
soc.core.storage_1\[15\]\[5\],32.28
net7916,32.28
_03862_,32.26
_10395_,32.26
_12919_,32.26
_13527_,32.26
net4986,32.26
_10045_,32.245
net8700,32.245
net8724,32.245
_04391_,32.24
gpio_control_in_2\[3\].pad_gpio_outenb,32.24
soc.core.VexRiscv.RegFilePlugin_regFile\[18\]\[15\],32.24
soc.core.mgmtsoc_reload_storage\[28\],32.24
clknet_leaf_1071_mgmt_buffers.caravel_clk,32.24
net6153,32.24
gpio_control_in_1\[2\].gpio_defaults\[11\],32.23
_02965_,32.22
_03517_,32.22
_10283_,32.22
gpio_control_bidir_1\[1\].shift_register\[9\],32.22
soc.core.VexRiscv.RegFilePlugin_regFile\[3\]\[21\],32.22
net7533,32.22
net12163,32.22
net10223,32.215
_10117_,32.205
net8407,32.205
net10821,32.205
_01709_,32.2
_02212_,32.2
_07925_,32.2
_13486_,32.2
_13603_,32.2
_14371_,32.2
_14602_,32.2
_14903_,32.2
gpio_control_in_2\[1\].pad_gpio_outenb,32.2
net4956,32.2
net5904,32.2
net12680,32.2
net10650,32.195
_02086_,32.18
_05492_,32.18
_06504_,32.18
_07975_,32.18
_12094_,32.18
gpio_control_in_1a\[3\].gpio_inenb,32.18
soc.core.storage_1\[15\]\[3\],32.18
_07202_,32.165
net10442,32.165
_04356_,32.16
_05151_,32.16
_06573_,32.16
_07647_,32.16
_14624_,32.16
net376,32.16
net9327,32.16
net11671,32.16
gpio_control_bidir_2\[0\].gpio_inenb,32.155
_01372_,32.14
_02227_,32.14
_02299_,32.14
_03147_,32.14
_10056_,32.14
_11633_,32.14
gpio_control_in_1a\[1\].gpio_holdover,32.14
gpio_control_in_1a\[4\].gpio_vtrip_sel,32.14
soc.core.dbg_uart_address\[5\],32.14
_11098_,32.12
soc.core.VexRiscv.RegFilePlugin_regFile\[28\]\[20\],32.12
soc.core.csrbank10_ev_status_w,32.12
soc.core.interface10_bank_bus_dat_r\[4\],32.12
clknet_leaf_535_mgmt_buffers.caravel_clk,32.12
net3387,32.12
net3443,32.12
net4759,32.12
net7006,32.12
_12384_,32.11
_14714_,32.11
gpio_control_in_1a\[2\].gpio_defaults\[11\],32.11
net6939,32.105
_02122_,32.1
_12152_,32.1
_13966_,32.1
net160,32.1
net232,32.1
net8125,32.1
net9794,32.1
_00298_,32.085
_08843_,32.085
_00845_,32.08
_05501_,32.08
_05506_,32.08
_08100_,32.08
_09551_,32.08
_12307_,32.08
soc.core.VexRiscv.RegFilePlugin_regFile\[22\]\[27\],32.08
soc.core.storage\[15\]\[5\],32.08
soc.core.storage\[15\]\[6\],32.08
clknet_leaf_903_mgmt_buffers.caravel_clk,32.08
net4306,32.08
net8087,32.08
net8646,32.08
_06607_,32.06
_07955_,32.06
_09546_,32.06
_12413_,32.06
gpio_control_in_1\[0\].gpio_ana_pol,32.06
gpio_control_in_2\[2\].gpio_ana_sel,32.06
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[10\]\[15\],32.06
clknet_leaf_311_mgmt_buffers.caravel_clk,32.06
net8140,32.06
gpio_control_in_2\[2\].gpio_defaults\[4\],32.05
_08444_,32.045
net5068,32.045
_00637_,32.04
_08015_,32.04
_11503_,32.04
_12527_,32.04
_12989_,32.04
mgmt_buffers.la_data_in_mprj_bar\[98\],32.04
soc.core.VexRiscv.RegFilePlugin_regFile\[31\]\[13\],32.04
net5414,32.04
net7118,32.04
net13192,32.04
_08475_,32.035
_00274_,32.02
_13560_,32.02
net3475,32.02
net10315,32.02
_08198_,32.015
_03866_,32.01
_06202_,32.01
gpio_control_in_2\[5\].gpio_defaults\[2\],32.01
_08474_,32.005
net2899,32.005
_04065_,32
_07234_,32
_07809_,32
_08048_,32
_14703_,32
_14785_,32
clknet_leaf_181_mgmt_buffers.caravel_clk,32
clknet_leaf_395_mgmt_buffers.caravel_clk,32
_14638_,31.98
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[9\]\[26\],31.98
soc.core.VexRiscv.IBusCachedPlugin_cache.io_cpu_decode_data\[9\],31.98
soc.core.VexRiscv.RegFilePlugin_regFile\[7\]\[14\],31.98
net8415,31.98
net9916,31.98
_02653_,31.96
_04413_,31.96
_05033_,31.96
gpio_control_in_1\[0\].resetn_out,31.96
mgmt_buffers.la_data_in_mprj_bar\[101\],31.96
soc.core.storage\[9\]\[3\],31.96
soc.core.uart_phy_rx_phase\[30\],31.96
net8489,31.96
_05451_,31.94
_05688_,31.94
_06727_,31.94
_07094_,31.94
_07928_,31.94
_08728_,31.94
_12359_,31.94
_14147_,31.94
_14200_,31.94
_14373_,31.94
net4068,31.94
net6767,31.94
net7901,31.94
net8740,31.94
_00796_,31.92
_01612_,31.92
_15179_,31.92
soc.core.VexRiscv.RegFilePlugin_regFile\[22\]\[15\],31.92
net3059,31.92
net9936,31.92
net11507,31.92
net5889,31.915
mprj_io_analog_sel[21],31.91
net6742,31.905
_02773_,31.9
_06911_,31.9
_07661_,31.9
_09629_,31.9
_11910_,31.9
soc.core.interface10_bank_bus_dat_r\[0\],31.9
clknet_leaf_844_mgmt_buffers.caravel_clk,31.9
net4974,31.9
_05272_,31.89
_03330_,31.88
gpio_control_in_1\[2\].shift_register\[7\],31.88
soc.core.VexRiscv.RegFilePlugin_regFile\[12\]\[15\],31.88
net4131,31.88
net10443,31.875
net3922,31.865
net7514,31.865
_00242_,31.86
_06843_,31.86
_07101_,31.86
_13098_,31.86
soc.core.VexRiscv._zz_CsrPlugin_csrMapping_readDataInit\[21\],31.86
clknet_leaf_1102_mgmt_buffers.caravel_clk,31.86
_04958_,31.85
net4599,31.845
net4977,31.845
_00469_,31.84
_03412_,31.84
_04874_,31.84
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[2\]\[9\],31.84
_07591_,31.835
net10452,31.835
net4362,31.825
_00665_,31.82
_03021_,31.82
_08077_,31.82
_08168_,31.82
_12024_,31.82
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[0\]\[5\],31.82
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[1\]\[0\],31.82
soc.core.VexRiscv.RegFilePlugin_regFile\[31\]\[25\],31.82
soc.core.VexRiscv._zz_execute_to_memory_REGFILE_WRITE_DATA\[18\],31.82
soc.core.mgmtsoc_bus_errors\[23\],31.82
clknet_leaf_369_mgmt_buffers.caravel_clk,31.82
net3061,31.82
net7377,31.82
net8308,31.82
net8801,31.82
net10238,31.82
_06375_,31.8
_07969_,31.8
_13712_,31.8
net5066,31.8
_00699_,31.78
_00945_,31.78
_02552_,31.78
_07993_,31.78
_13039_,31.78
_14969_,31.78
soc.core.storage_1\[1\]\[0\],31.78
soc.core.uart_rx_fifo_consume\[2\],31.78
net78,31.78
net11531,31.78
net12668,31.78
_01470_,31.76
_08289_,31.76
_10060_,31.76
_13163_,31.76
_13702_,31.76
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[0\]\[19\],31.76
soc.core.VexRiscv.IBusCachedPlugin_cache.lineLoader_address\[8\],31.76
net231,31.76
net11520,31.76
net4304,31.755
gpio_control_in_2\[6\].shift_register\[11\],31.75
_08598_,31.745
_09082_,31.745
net3730,31.745
net5292,31.745
_01018_,31.74
_07692_,31.74
_08997_,31.74
_09668_,31.74
soc.core.VexRiscv.RegFilePlugin_regFile\[22\]\[16\],31.74
soc.core.storage\[2\]\[1\],31.74
net7284,31.74
net8383,31.74
net8583,31.74
net10514,31.74
net12080,31.74
net12470,31.74
_02089_,31.72
_08951_,31.72
_10454_,31.72
_13879_,31.72
_14045_,31.72
gpio_control_in_2\[5\].gpio_ana_en,31.72
pll.ext_trim\[7\],31.72
net4186,31.705
net7861,31.705
_00908_,31.7
_01879_,31.7
_02258_,31.7
_07374_,31.7
_09218_,31.7
_09373_,31.7
_10361_,31.7
_14386_,31.7
gpio_control_in_2\[6\].pad_gpio_out,31.7
net4581,31.7
_01101_,31.68
gpio_control_in_1a\[2\].gpio_holdover,31.68
soc.core.VexRiscv.CsrPlugin_pipelineLiberator_pcValids_2,31.68
net8029,31.68
mgmt_buffers.la_data_in_mprj\[124\],31.665
net7728,31.665
_00949_,31.66
_02302_,31.66
_04490_,31.66
_04508_,31.66
soc.core.storage_1\[13\]\[5\],31.66
net5113,31.66
net5222,31.66
net6186,31.66
net12875,31.66
_02156_,31.64
soc.core.VexRiscv.RegFilePlugin_regFile\[27\]\[14\],31.64
net8665,31.64
net9362,31.625
_00800_,31.62
_03278_,31.62
_04215_,31.62
_04728_,31.62
_11083_,31.62
soc.core.VexRiscv.DebugPlugin_busReadDataReg\[23\],31.62
clknet_leaf_319_mgmt_buffers.caravel_clk,31.62
net4070,31.62
net6030,31.62
net10280,31.615
mgmt_buffers.la_data_in_mprj\[100\],31.605
_00194_,31.6
_06461_,31.6
_08866_,31.6
net8695,31.6
net3697,31.585
net8112,31.585
_01295_,31.58
_06364_,31.58
clknet_leaf_118_mgmt_buffers.caravel_clk,31.58
net10253,31.58
net6717,31.565
_00970_,31.56
_02223_,31.56
_02861_,31.56
_04436_,31.56
_13830_,31.56
soc.core.VexRiscv.RegFilePlugin_regFile\[1\]\[23\],31.56
soc.core.VexRiscv.RegFilePlugin_regFile\[21\]\[18\],31.56
soc.core.mgmtsoc_load_storage\[8\],31.56
soc.core.multiregimpl9_regs0,31.56
soc.core.storage\[0\]\[3\],31.56
net5607,31.56
_00304_,31.545
_01990_,31.54
_05091_,31.54
_07124_,31.54
_10935_,31.54
_12935_,31.54
clknet_leaf_132_mgmt_buffers.caravel_clk,31.54
net9114,31.54
_08269_,31.525
_02182_,31.52
_03006_,31.52
_13271_,31.52
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[0\]\[10\],31.52
clknet_leaf_402_mgmt_buffers.caravel_clk,31.52
clknet_leaf_1188_mgmt_buffers.caravel_clk,31.52
net4225,31.52
net6280,31.52
net7601,31.52
net9248,31.52
net6575,31.505
net9586,31.505
_01681_,31.5
_10348_,31.5
_12821_,31.5
mgmt_buffers.la_data_in_mprj_bar\[35\],31.5
soc.core.storage\[6\]\[0\],31.5
net12553,31.5
net8668,31.485
_00671_,31.48
_08046_,31.48
_12600_,31.48
soc.core.VexRiscv.IBusCachedPlugin_cache._zz_fetchStage_read_waysValues_0_tag_valid_2\[22\],31.48
net8526,31.48
net12007,31.48
net12070,31.48
net12491,31.48
_12655_,31.475
gpio_control_in_1a\[3\].gpio_defaults\[8\],31.47
net10829,31.47
net7779,31.465
_00518_,31.46
_01357_,31.46
_06793_,31.46
_14432_,31.46
soc.core.VexRiscv.RegFilePlugin_regFile\[20\]\[21\],31.46
soc.core.VexRiscv.RegFilePlugin_regFile\[5\]\[2\],31.46
soc.core.gpioin5_gpioin5_mode_storage,31.46
soc.core.multiregimpl32_regs0,31.46
net12104,31.46
net12302,31.46
_09924_,31.455
_05736_,31.45
net7797,31.445
_00466_,31.44
_02533_,31.44
_06810_,31.44
_09158_,31.44
_11861_,31.44
_13561_,31.44
clknet_leaf_213_mgmt_buffers.caravel_clk,31.44
net9544,31.44
_02409_,31.42
_07506_,31.42
_07718_,31.42
net6179,31.415
net7419,31.405
_04001_,31.4
_06332_,31.4
_06400_,31.4
_07159_,31.4
_10951_,31.4
_13157_,31.4
net304,31.4
net361,31.4
net7148,31.4
net11123,31.4
net12987,31.4
net6048,31.39
_01560_,31.38
_08382_,31.38
_10594_,31.38
soc.core.count\[19\],31.38
net3631,31.38
net8546,31.365
_02608_,31.36
_02985_,31.36
_06414_,31.36
_06724_,31.36
_08178_,31.36
_10097_,31.36
gpio_control_in_1\[0\].shift_register\[6\],31.36
net3406,31.36
net8479,31.36
net8723,31.36
net11430,31.36
net12311,31.36
mprj_io_holdover[17],31.35
net7501,31.345
_03064_,31.34
_03993_,31.34
_08008_,31.34
_11674_,31.34
gpio_control_in_1a\[2\].pad_gpio_outenb,31.34
soc.core.VexRiscv.RegFilePlugin_regFile\[4\]\[25\],31.34
net7482,31.34
_01052_,31.32
_02538_,31.32
_02970_,31.32
_03170_,31.32
_06860_,31.32
_07839_,31.32
_08792_,31.32
_11472_,31.32
_12348_,31.32
clknet_leaf_750_mgmt_buffers.caravel_clk,31.32
clknet_leaf_942_mgmt_buffers.caravel_clk,31.32
net4998,31.32
net3453,31.305
_06671_,31.3
_13847_,31.3
soc.core.VexRiscv.CsrPlugin_mtvec_base\[9\],31.3
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[11\]\[5\],31.3
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[2\]\[11\],31.3
gpio_control_bidir_2\[0\].gpio_vtrip_sel,31.295
_14861_,31.285
net2975,31.285
_02569_,31.28
_02780_,31.28
_03103_,31.28
_07133_,31.28
soc.core.VexRiscv.RegFilePlugin_regFile\[13\]\[10\],31.28
net221,31.28
clknet_leaf_101_mgmt_buffers.caravel_clk,31.28
clknet_leaf_224_mgmt_buffers.caravel_clk,31.28
clknet_leaf_949_mgmt_buffers.caravel_clk,31.28
net4549,31.28
net4980,31.28
net9111,31.28
_14808_,31.27
gpio_control_in_2\[1\].gpio_defaults\[6\],31.27
_02600_,31.26
_09714_,31.26
_11924_,31.26
soc.core.VexRiscv.RegFilePlugin_regFile\[14\]\[25\],31.26
soc.core.storage_1\[11\]\[5\],31.26
soc.core.storage_1\[1\]\[5\],31.26
soc.core.uart_phy_rx_phase\[20\],31.26
net270,31.26
net10086,31.26
_05156_,31.25
net10067,31.25
_03354_,31.24
_06701_,31.24
_07055_,31.24
_07652_,31.24
_07764_,31.24
_08371_,31.24
_11463_,31.24
_13792_,31.24
soc.core.storage\[3\]\[1\],31.24
net6272,31.24
net9807,31.24
net12119,31.24
_01913_,31.22
_06530_,31.22
net9172,31.22
soc.core.mgmtsoc_vexriscv_debug_bus_dat_r\[20\],31.215
_01512_,31.2
_01900_,31.2
_02884_,31.2
_04543_,31.2
_06548_,31.2
_09853_,31.2
_10833_,31.2
_12379_,31.2
_15013_,31.2
soc.core.VexRiscv.RegFilePlugin_regFile\[8\]\[30\],31.2
net12510,31.2
_05202_,31.19
mprj_io_inp_dis[20],31.19
mprj_io_slow_sel[26],31.19
soc.core.mgmtsoc_litespimmap_burst_cs_litespi_next_value_ce0,31.19
net6035,31.185
_01628_,31.18
_07744_,31.18
_13863_,31.18
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[11\]\[16\],31.18
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[8\]\[6\],31.18
net11018,31.18
net12655,31.18
net2638,31.18
net11326,31.165
_02555_,31.16
_03341_,31.16
_07109_,31.16
_10100_,31.16
_11019_,31.16
_12091_,31.16
soc.core.mgmtsoc_reload_storage\[16\],31.16
clknet_leaf_481_mgmt_buffers.caravel_clk,31.16
net4735,31.16
net10283,31.16
gpio_control_in_2\[0\].gpio_ib_mode_sel,31.155
net10437,31.145
_01906_,31.14
_05732_,31.14
_06532_,31.14
_06639_,31.14
_12088_,31.14
_12128_,31.14
_14783_,31.14
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[2\]\[10\],31.14
soc.core.VexRiscv.IBusCachedPlugin_cache.io_cpu_prefetch_pc\[28\],31.14
soc.core.VexRiscv.RegFilePlugin_regFile\[15\]\[9\],31.14
clknet_leaf_715_mgmt_buffers.caravel_clk,31.14
net9553,31.14
net10232,31.135
net5747,31.125
net10559,31.125
_04369_,31.12
_04425_,31.12
_04584_,31.12
_08102_,31.12
_09622_,31.12
_12886_,31.12
_13674_,31.12
_14892_,31.12
_14998_,31.12
net391,31.12
net8115,31.12
mprj_io_dm[4],31.11
net4448,31.105
net9126,31.105
_04112_,31.1
_11044_,31.1
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[12\]\[0\],31.1
soc.core.multiregimpl5_regs0,31.1
net246,31.1
net266,31.1
net5214,31.1
_02502_,31.08
_03017_,31.08
_04581_,31.08
_08725_,31.08
_11591_,31.08
_12427_,31.08
_12915_,31.08
soc.core.VexRiscv.RegFilePlugin_regFile\[8\]\[7\],31.08
soc.core.storage\[5\]\[1\],31.08
net9539,31.08
net12129,31.08
gpio_control_bidir_2\[2\].gpio_ana_sel,31.075
net10546,31.075
net10739,31.065
_03634_,31.06
_07362_,31.06
_08041_,31.06
_10296_,31.06
_11960_,31.06
soc.core.storage_1\[8\]\[2\],31.06
net9787,31.06
_05222_,31.05
_05330_,31.05
_05336_,31.05
net5244,31.045
net11674,31.045
_06830_,31.04
_10087_,31.04
_12856_,31.04
net9509,31.04
net11965,31.04
_09336_,31.025
net3595,31.025
net5530,31.025
net9301,31.025
_03388_,31.02
_13069_,31.02
net5712,31.02
net8209,31.02
net11080,31.02
_09857_,31
_12608_,31
net3100,31
mprj_io_ib_mode_sel[19],30.99
_00160_,30.985
net5415,30.985
net8529,30.985
net12233,30.985
_00934_,30.98
_01863_,30.98
_02619_,30.98
_06680_,30.98
_07256_,30.98
_09195_,30.98
_12387_,30.98
_14661_,30.98
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[10\]\[21\],30.98
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[9\]\[23\],30.98
net12676,30.98
_11102_,30.97
net9113,30.965
_12480_,30.96
soc.core.interface3_bank_bus_dat_r\[27\],30.96
_11844_,30.95
gpio_control_bidir_1\[1\].gpio_defaults\[8\],30.95
mgmt_buffers.la_data_in_mprj\[110\],30.945
_00740_,30.94
_04143_,30.94
_06473_,30.94
_06923_,30.94
_12147_,30.94
_12807_,30.94
net5152,30.94
net9414,30.94
_00734_,30.92
_03492_,30.92
_04079_,30.92
_10023_,30.92
_13736_,30.92
clknet_leaf_231_mgmt_buffers.caravel_clk,30.92
net5922,30.92
net4892,30.905
_00429_,30.9
_00689_,30.9
_04101_,30.9
_08755_,30.9
_08936_,30.9
_13813_,30.9
net10387,30.9
net8644,30.895
_05248_,30.89
gpio_control_in_1\[3\].gpio_defaults\[12\],30.89
_09214_,30.885
_03307_,30.88
_14015_,30.88
_14383_,30.88
net81,30.88
net8566,30.865
_06213_,30.86
_07660_,30.86
_09101_,30.86
soc.core.spi_master_miso\[2\],30.86
clknet_leaf_718_mgmt_buffers.caravel_clk,30.86
net6353,30.86
_02153_,30.84
_09535_,30.84
_14662_,30.84
soc.core.VexRiscv.RegFilePlugin_regFile\[21\]\[14\],30.84
net8661,30.84
gpio_control_in_2\[5\].gpio_ib_mode_sel,30.835
_07230_,30.825
net6314,30.825
_02747_,30.82
_07006_,30.82
_07639_,30.82
_14782_,30.82
gpio_control_bidir_2\[0\].shift_register\[3\],30.82
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[12\]\[2\],30.82
soc.core.VexRiscv.memory_to_writeBack_REGFILE_WRITE_DATA\[28\],30.82
soc.core.storage\[6\]\[5\],30.82
soc.core.storage\[7\]\[4\],30.82
net7691,30.82
net7755,30.82
net10141,30.82
net6139,30.815
soc.core.VexRiscv.CsrPlugin_mepc\[1\],30.805
_02119_,30.8
_06230_,30.8
_07916_,30.8
_10329_,30.8
gpio_control_in_1\[0\].gpio_slow_sel,30.8
soc.core.VexRiscv.RegFilePlugin_regFile\[5\]\[5\],30.8
net254,30.8
net2651,30.8
gpio_control_in_1a\[2\].gpio_defaults\[12\],30.79
_02093_,30.78
_03025_,30.78
_06509_,30.78
_07157_,30.78
_09915_,30.78
_10237_,30.78
_10239_,30.78
clknet_leaf_62_mgmt_buffers.caravel_clk,30.78
net7989,30.78
net12979,30.78
net2626,30.78
_10250_,30.775
mprj_io_vtrip_sel[8],30.77
_06769_,30.76
_13951_,30.76
soc.core.storage_1\[9\]\[3\],30.76
net8047,30.76
mprj_io_analog_en[26],30.75
mgmt_buffers.la_data_in_mprj\[94\],30.745
_00420_,30.74
_02783_,30.74
_06065_,30.74
_13446_,30.74
gpio_control_in_1a\[3\].shift_register\[4\],30.74
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[3\]\[5\],30.74
clknet_leaf_46_mgmt_buffers.caravel_clk,30.74
clknet_leaf_220_mgmt_buffers.caravel_clk,30.74
net6525,30.74
_02305_,30.72
_02515_,30.72
_02221_,30.7
_02925_,30.7
_14632_,30.7
gpio_control_in_1a\[3\].shift_register\[7\],30.7
clknet_leaf_513_mgmt_buffers.caravel_clk,30.7
net4428,30.7
soc.core.multiregimpl50_regs1,30.685
_01114_,30.68
_07823_,30.68
_10290_,30.68
_10919_,30.68
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[13\]\[9\],30.68
net4528,30.68
mprj_io_ib_mode_sel[0],30.67
_09925_,30.665
_01360_,30.66
_05772_,30.66
_07131_,30.66
_07309_,30.66
_09006_,30.66
_14062_,30.66
_14894_,30.66
clknet_leaf_394_mgmt_buffers.caravel_clk,30.66
clknet_leaf_1083_mgmt_buffers.caravel_clk,30.66
net6866,30.66
net7246,30.66
net9156,30.66
net6292,30.655
mprj_io_holdover[20],30.65
_08200_,30.645
net6203,30.645
_02819_,30.64
_10894_,30.64
soc.core.VexRiscv.IBusCachedPlugin_cache.decodeStage_mmuRsp_physicalAddress\[29\],30.64
net5310,30.64
net8392,30.64
_09038_,30.625
net7724,30.625
_09618_,30.62
mgmt_buffers.mprj_logic1\[30\],30.62
net5325,30.62
net8625,30.605
_01107_,30.6
_02096_,30.6
_04736_,30.6
_06523_,30.6
_06895_,30.6
_08505_,30.6
gpio_control_in_1\[3\].gpio_inenb,30.6
_05254_,30.59
net8925,30.59
_03524_,30.58
_09150_,30.58
_10791_,30.58
_14152_,30.58
gpio_control_in_1\[2\].shift_register\[2\],30.58
gpio_control_in_1\[3\].shift_register\[8\],30.58
gpio_control_in_1\[5\].shift_register\[10\],30.58
net5217,30.58
net6082,30.58
net10840,30.58
gpio_control_in_2\[3\].gpio_vtrip_sel,30.575
gpio_control_in_2\[2\].gpio_defaults\[3\],30.57
_09642_,30.565
net3602,30.565
_01252_,30.56
_04607_,30.56
_12818_,30.56
soc.core.storage\[7\]\[2\],30.56
net7398,30.56
net8473,30.56
net12253,30.56
_14857_,30.55
_08834_,30.545
_02375_,30.54
_10058_,30.54
_12161_,30.54
_12900_,30.54
_14659_,30.54
gpio_control_in_1a\[5\].shift_register\[3\],30.54
pll.itrim\[3\],30.54
clknet_leaf_977_mgmt_buffers.caravel_clk,30.54
net5010,30.54
net6503,30.54
gpio_control_in_1\[3\].gpio_defaults\[2\],30.53
net3927,30.525
net8656,30.525
net12048,30.525
_00938_,30.52
_02372_,30.52
_02688_,30.52
_05456_,30.52
_06304_,30.52
_14053_,30.52
gpio_control_in_1\[3\].gpio_vtrip_sel,30.52
soc.core.VexRiscv.IBusCachedPlugin_cache.decodeStage_mmuRsp_physicalAddress\[10\],30.52
soc.core.dbg_uart_rx_phase\[16\],30.52
net4626,30.52
net12322,30.52
net2657,30.52
mprj_io_inp_dis[17],30.51
_02090_,30.5
_04024_,30.5
_09585_,30.5
_10315_,30.5
_14363_,30.5
soc.core.VexRiscv.lastStagePc\[13\],30.5
net8651,30.5
net12167,30.5
_08481_,30.495
gpio_control_bidir_2\[0\].gpio_defaults\[6\],30.49
net11366,30.485
_01068_,30.48
_01916_,30.48
_02311_,30.48
_05777_,30.48
_06266_,30.48
_06859_,30.48
_08124_,30.48
_09023_,30.48
_10091_,30.48
_14123_,30.48
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[14\]\[26\],30.48
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[7\]\[10\],30.48
net378,30.48
clknet_leaf_746_mgmt_buffers.caravel_clk,30.48
net6147,30.465
_10822_,30.46
_14986_,30.46
gpio_control_in_2\[1\].gpio_ana_pol,30.46
gpio_control_in_2\[7\].shift_register\[5\],30.46
clknet_leaf_1163_mgmt_buffers.caravel_clk,30.46
net8895,30.46
_08876_,30.455
_02618_,30.44
_12477_,30.44
_13528_,30.44
clknet_leaf_832_mgmt_buffers.caravel_clk,30.44
net8699,30.44
net8910,30.43
_01267_,30.42
_02068_,30.42
_04110_,30.42
_06193_,30.42
_11073_,30.42
_13566_,30.42
mgmt_buffers.la_data_in_mprj_bar\[99\],30.42
net3841,30.42
net6468,30.405
net7619,30.405
net8175,30.405
_02456_,30.4
_09631_,30.4
soc.core.count\[8\],30.4
net52,30.4
net6780,30.4
net10901,30.4
net12669,30.4
_02565_,30.38
_13883_,30.38
_05144_,30.37
_05746_,30.37
_02544_,30.36
_02691_,30.36
_07341_,30.36
_14464_,30.36
_14809_,30.36
gpio_control_in_2\[3\].shift_register\[3\],30.36
soc.core.VexRiscv._zz_RegFilePlugin_regFile_port0\[23\],30.36
net5470,30.36
net8107,30.36
mprj_io_vtrip_sel[12],30.35
net9717,30.35
net10814,30.345
_14192_,30.34
_14948_,30.34
gpio_control_in_1\[5\].gpio_ana_pol,30.34
net6610,30.34
net7259,30.325
net7893,30.325
net9091,30.325
_01334_,30.32
_02242_,30.32
_02415_,30.32
_07968_,30.32
_09809_,30.32
_10035_,30.32
_14831_,30.32
soc.core.mgmtsoc_scratch_storage\[28\],30.32
net4294,30.32
net7697,30.32
net10222,30.32
mprj_io_vtrip_sel[14],30.31
net5401,30.305
_03389_,30.3
_11813_,30.3
_12003_,30.3
soc.core.VexRiscv.RegFilePlugin_regFile\[2\]\[28\],30.3
net3023,30.3
mgmt_buffers.la_data_in_mprj\[35\],30.285
net8447,30.285
_01218_,30.28
_03377_,30.28
_09627_,30.28
_09896_,30.28
soc.core.VexRiscv._zz_CsrPlugin_csrMapping_readDataInit\[27\],30.28
soc.core.VexRiscv.lastStagePc\[30\],30.28
soc.core.storage\[14\]\[5\],30.28
soc.core.storage_1\[12\]\[1\],30.28
clknet_leaf_961_mgmt_buffers.caravel_clk,30.28
net4794,30.28
net6051,30.28
net10045,30.28
net11026,30.28
soc.core.multiregimpl53_regs1,30.265
soc.core.VexRiscv.RegFilePlugin_regFile\[15\]\[14\],30.26
net92,30.26
net11342,30.26
net12045,30.26
_02011_,30.24
_02636_,30.24
_07888_,30.24
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[6\]\[26\],30.24
soc.core.interface6_bank_bus_dat_r\[24\],30.24
net3838,30.24
net6196,30.24
net9050,30.24
gpio_control_in_2\[0\].gpio_ana_en,30.235
gpio_control_in_2\[5\].gpio_defaults\[4\],30.23
_02847_,30.22
_05072_,30.22
_06229_,30.22
_06333_,30.22
_09146_,30.22
soc.core.dbg_uart_tx_data\[4\],30.22
net10227,30.22
net10943,30.22
_05142_,30.21
_01980_,30.2
_10116_,30.2
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[10\]\[23\],30.2
soc.core.mgmtsoc_reload_storage\[5\],30.2
soc.core.mgmtsoc_value_status\[1\],30.2
net12468,30.2
net4533,30.185
net4673,30.185
_01436_,30.18
_10760_,30.18
gpio_control_in_1\[4\].gpio_ib_mode_sel,30.18
soc.core.VexRiscv.RegFilePlugin_regFile\[30\]\[15\],30.18
net5531,30.18
net10485,30.18
net11281,30.18
net10371,30.165
_10755_,30.16
_13131_,30.16
_15218_,30.16
net253,30.16
net12545,30.16
net8804,30.145
_00977_,30.14
_08538_,30.14
_12297_,30.14
net3450,30.14
net12396,30.14
net11154,30.125
_12104_,30.12
_13439_,30.12
_14778_,30.12
net8251,30.12
net12314,30.12
gpio_control_in_2\[9\].gpio_holdover,30.115
net6609,30.115
net8851,30.105
_06491_,30.1
_06933_,30.1
_08011_,30.1
_10906_,30.1
soc.core.VexRiscv.RegFilePlugin_regFile\[1\]\[15\],30.1
soc.core.mgmtsoc_bus_errors\[28\],30.1
net4478,30.1
net4676,30.1
net6910,30.1
net7852,30.1
net10697,30.1
net11110,30.1
_08299_,30.085
_04763_,30.08
_05085_,30.08
_10280_,30.08
soc.core.VexRiscv.CsrPlugin_mtvec_base\[19\],30.08
soc.core.VexRiscv.RegFilePlugin_regFile\[14\]\[18\],30.08
soc.core.dbg_uart_rx_phase\[12\],30.08
net5790,30.075
_00682_,30.06
_01111_,30.06
_04455_,30.06
_06468_,30.06
_08111_,30.06
_09900_,30.06
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[13\]\[0\],30.06
soc.core.storage_1\[15\]\[1\],30.06
net4920,30.06
net10506,30.06
_05338_,30.05
gpio_control_in_1\[5\].gpio_defaults\[7\],30.05
net9396,30.04
_09643_,30.025
_00947_,30.02
_01909_,30.02
_03320_,30.02
_05620_,30.02
_10749_,30.02
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[3\]\[11\],30.02
soc.core.VexRiscv.RegFilePlugin_regFile\[4\]\[5\],30.02
soc.core.mgmtsoc_bus_errors\[2\],30.02
net6392,30.02
net6534,30.02
net10797,30.02
_05212_,30.01
_14289_,30
soc.core.VexRiscv.RegFilePlugin_regFile\[22\]\[9\],30
soc.core.mgmtsoc_master_rx_fifo_source_payload_data\[14\],30
net12795,30
net5044,29.985
net7990,29.985
_01950_,29.98
_07001_,29.98
_09589_,29.98
_10356_,29.98
_11593_,29.98
_12089_,29.98
soc.core.VexRiscv.RegFilePlugin_regFile\[10\]\[3\],29.98
soc.core.VexRiscv.RegFilePlugin_regFile\[11\]\[21\],29.98
net7252,29.98
net9835,29.98
net4888,29.965
_01206_,29.96
_01922_,29.96
_04710_,29.96
_12176_,29.96
gpio_control_in_1\[1\].shift_register\[2\],29.96
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[13\]\[19\],29.96
soc.core.VexRiscv.IBusCachedPlugin_cache.io_cpu_prefetch_pc\[30\],29.95
_09126_,29.945
net3932,29.945
_09521_,29.94
_13396_,29.94
soc.core.storage\[0\]\[6\],29.94
net7350,29.94
net8846,29.94
net9669,29.94
net2647,29.94
_01657_,29.92
_02432_,29.92
_06285_,29.92
_09967_,29.92
clknet_leaf_191_mgmt_buffers.caravel_clk,29.92
net8305,29.905
net11215,29.905
_01723_,29.9
_06420_,29.9
_08568_,29.9
_08639_,29.9
net12067,29.9
net10198,29.89
_00844_,29.88
_02145_,29.88
_06567_,29.88
_07062_,29.88
_07780_,29.88
_10737_,29.88
soc.core.VexRiscv.RegFilePlugin_regFile\[28\]\[3\],29.88
net172,29.88
net5968,29.88
net8697,29.88
net10490,29.88
_05420_,29.87
net5556,29.865
net9144,29.865
_01556_,29.86
_02751_,29.86
_04378_,29.86
_06179_,29.86
_06801_,29.86
_09986_,29.86
soc.core.storage\[0\]\[0\],29.86
soc.core.storage\[1\]\[6\],29.86
clknet_leaf_153_mgmt_buffers.caravel_clk,29.86
net3810,29.86
net5621,29.86
net7725,29.86
net8994,29.86
net11535,29.85
_08400_,29.845
net11203,29.845
_00975_,29.84
_06638_,29.84
_07181_,29.84
gpio_control_in_2\[2\].gpio_ana_pol,29.84
soc.core.RAM256.Do0_pre\[1\]\[15\],29.84
soc.core.storage\[14\]\[6\],29.84
net6972,29.84
_07211_,29.825
_08286_,29.825
net4732,29.825
net8568,29.825
_01920_,29.82
_06121_,29.82
_06299_,29.82
_07129_,29.82
_09060_,29.82
_09667_,29.82
soc.core.mgmtsoc_load_storage\[12\],29.82
net3909,29.82
net5748,29.82
net11506,29.82
net11580,29.82
net12816,29.82
mprj_io_oeb[6],29.81
_08863_,29.805
_13729_,29.8
gpio_control_in_1a\[3\].shift_register\[1\],29.8
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[13\]\[31\],29.8
soc.core.mgmtsoc_master_phyconfig_storage\[12\],29.8
net7940,29.8
net10050,29.8
_04934_,29.79
net7439,29.785
net7667,29.785
net9159,29.785
_01655_,29.78
_01687_,29.78
_04500_,29.78
_06107_,29.78
_09866_,29.78
_11862_,29.78
_13878_,29.78
_14042_,29.78
_14639_,29.78
clknet_leaf_307_mgmt_buffers.caravel_clk,29.78
net4075,29.78
net8448,29.78
net12342,29.78
net10308,29.775
_02709_,29.76
_02714_,29.76
_02901_,29.76
_04189_,29.76
_04380_,29.76
_06901_,29.76
_07884_,29.76
soc.core.storage\[14\]\[0\],29.76
net11589,29.76
gpio_control_in_1a\[0\].gpio_defaults\[7\],29.75
mprj_io_slow_sel[25],29.75
net6464,29.745
net9185,29.745
_00922_,29.74
_08174_,29.74
_12563_,29.74
_12678_,29.74
_15018_,29.74
gpio_control_in_2\[9\].pad_gpio_outenb,29.74
gpio_control_in_2\[9\].shift_register\[1\],29.74
soc.core.VexRiscv.RegFilePlugin_regFile\[20\]\[9\],29.74
net6377,29.74
net6608,29.74
net7581,29.74
_08640_,29.725
_10235_,29.72
_10321_,29.72
gpio_control_in_1\[2\].shift_register\[4\],29.72
net5978,29.72
net7230,29.72
net10265,29.72
net10856,29.72
gpio_control_in_1\[2\].gpio_defaults\[9\],29.71
net7433,29.705
_00717_,29.7
_02111_,29.7
_02702_,29.7
_06120_,29.7
gpio_control_bidir_2\[2\].gpio_vtrip_sel,29.7
mgmt_buffers.mprj_logic1\[33\],29.7
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[5\]\[12\],29.7
net2810,29.7
net8609,29.685
_00308_,29.68
_01056_,29.68
_08277_,29.68
_13079_,29.68
net64,29.68
_02184_,29.66
_09876_,29.66
_14881_,29.66
mgmt_buffers.la_data_in_mprj\[27\],29.66
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[10\]\[9\],29.66
net5247,29.66
net5732,29.66
net10225,29.66
mprj_io_inp_dis[11],29.65
net5270,29.645
_09625_,29.64
gpio_control_bidir_2\[1\].gpio_ana_en,29.64
soc.core.la_ien_storage\[21\],29.64
soc.core.mgmtsoc_vexriscv_i_cmd_payload_data\[14\],29.64
net374,29.64
net5041,29.64
net6574,29.64
net9870,29.64
net12502,29.64
net10785,29.635
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[5\]\[4\],29.63
net7444,29.625
_04475_,29.62
_08341_,29.62
_08953_,29.62
clknet_leaf_1205_mgmt_buffers.caravel_clk,29.62
net10875,29.62
net11902,29.62
_09614_,29.615
_05280_,29.61
mprj_io_slow_sel[12],29.61
net3238,29.605
net7353,29.605
_01841_,29.6
_04210_,29.6
_07359_,29.6
_14512_,29.6
gpio_control_in_2\[6\].gpio_ana_en,29.6
soc.core.VexRiscv.lastStagePc\[5\],29.6
soc.core.interface17_bank_bus_dat_r\[0\],29.6
net10218,29.6
net12802,29.6
_05168_,29.58
_05232_,29.58
gpio_control_in_2\[8\].gpio_slow_sel,29.58
net7113,29.565
net7671,29.565
net9780,29.565
_12086_,29.56
_14563_,29.56
net242,29.56
net7521,29.56
net10329,29.56
_12877_,29.55
net9786,29.545
_05971_,29.54
net7948,29.54
net11615,29.54
net7251,29.525
_01314_,29.52
_01719_,29.52
_04573_,29.52
_07450_,29.52
_07730_,29.52
_08083_,29.52
_09944_,29.52
_13300_,29.52
soc.core.multiregimpl132_regs0,29.52
soc.core.storage\[2\]\[6\],29.52
net10788,29.52
_01312_,29.5
_07723_,29.5
pll.itrim\[20\],29.5
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[9\]\[16\],29.5
net7999,29.5
_08976_,29.48
soc.core.VexRiscv.RegFilePlugin_regFile\[14\]\[30\],29.48
soc.core.VexRiscv.RegFilePlugin_regFile\[20\]\[22\],29.48
net53,29.48
net3395,29.48
net6467,29.48
net7630,29.48
net10879,29.48
net12862,29.48
_00886_,29.46
_03202_,29.46
_06861_,29.46
_06948_,29.46
gpio_control_in_2\[5\].gpio_vtrip_sel,29.46
soc.core.storage\[8\]\[2\],29.46
_08624_,29.445
net5516,29.445
net7736,29.445
net10624,29.445
_01729_,29.44
_04546_,29.44
_10962_,29.44
net2882,29.44
net6050,29.44
net8986,29.44
net9599,29.44
net11109,29.44
net12410,29.44
_07210_,29.425
_04385_,29.42
_07630_,29.42
_07750_,29.42
gpio_control_in_2\[1\].gpio_defaults\[12\],29.42
net4376,29.42
net6227,29.42
_01025_,29.4
_02063_,29.4
_02470_,29.4
_07845_,29.4
_08727_,29.4
_09904_,29.4
_10621_,29.4
_13452_,29.4
_13941_,29.4
gpio_control_in_1\[0\].shift_register\[3\],29.4
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[12\]\[12\],29.4
soc.core.VexRiscv.RegFilePlugin_regFile\[23\]\[26\],29.4
clknet_leaf_295_mgmt_buffers.caravel_clk,29.4
net5828,29.4
soc.core.storage_1\[11\]\[3\],29.395
_08454_,29.385
_01537_,29.38
net5014,29.38
net6646,29.38
net9034,29.38
net7318,29.375
_02351_,29.36
_03139_,29.36
_07915_,29.36
_08252_,29.36
_13818_,29.36
gpio_control_in_1a\[2\].shift_register\[4\],29.36
soc.core.mgmtsoc_bus_errors\[24\],29.36
net8606,29.36
net8893,29.36
net9178,29.36
net11663,29.36
_05636_,29.35
_00909_,29.34
_01682_,29.34
_02862_,29.34
_12449_,29.34
_13016_,29.34
net6402,29.34
net8842,29.34
_08437_,29.325
_00698_,29.32
_02138_,29.32
_02204_,29.32
_02336_,29.32
_09751_,29.32
_13026_,29.32
soc.core.interface0_bank_bus_dat_r\[10\],29.32
net12034,29.32
net12372,29.32
_07192_,29.315
net10603,29.315
_08710_,29.305
net8926,29.305
_03158_,29.3
_06331_,29.3
_06646_,29.3
_07441_,29.3
_13563_,29.3
_14453_,29.3
_14906_,29.3
soc.core.storage\[1\]\[0\],29.3
net2871,29.3
net6622,29.3
net9710,29.3
net10309,29.3
mprj_io_analog_sel[20],29.29
mprj_io_ib_mode_sel[22],29.29
mprj_io_vtrip_sel[24],29.29
_01219_,29.28
_02300_,29.28
_04007_,29.28
_05676_,29.28
_07560_,29.28
_14615_,29.28
net4365,29.28
net4559,29.28
net4875,29.28
net10441,29.28
net10598,29.28
net8104,29.265
_02951_,29.26
_06645_,29.26
_10714_,29.26
_11706_,29.26
_15002_,29.26
soc.core.VexRiscv.RegFilePlugin_regFile\[26\]\[27\],29.26
soc.core.storage\[6\]\[3\],29.26
net9244,29.26
_12358_,29.25
net5923,29.245
net9295,29.245
_05627_,29.24
_11920_,29.24
_12774_,29.24
_14549_,29.24
soc.core.VexRiscv.decode_to_execute_RS1\[27\],29.24
net6732,29.24
_00904_,29.22
_08520_,29.22
_10119_,29.22
_13397_,29.22
_14651_,29.22
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[4\]\[4\],29.22
clknet_leaf_246_mgmt_buffers.caravel_clk,29.22
net6022,29.22
_05170_,29.21
gpio_control_in_2\[9\].gpio_defaults\[2\],29.21
_00033_,29.2
_01547_,29.2
_07100_,29.2
_08110_,29.2
_11402_,29.2
clknet_leaf_615_mgmt_buffers.caravel_clk,29.2
net9810,29.2
_00314_,29.185
net8728,29.185
_01983_,29.18
_04089_,29.18
_06742_,29.18
soc.core.VexRiscv.dBusWishbone_DAT_MOSI\[26\],29.18
soc.core.multiregimpl72_regs0,29.18
_03739_,29.17
_11586_,29.17
_14004_,29.16
_14626_,29.16
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[12\]\[9\],29.16
net8408,29.16
net10488,29.155
net10524,29.145
_06203_,29.14
_07982_,29.14
_09536_,29.14
soc.core.storage\[11\]\[2\],29.14
soc.core.storage\[4\]\[3\],29.14
net3424,29.14
net6645,29.14
net12222,29.14
net10301,29.135
_05290_,29.13
net10742,29.125
_00768_,29.12
_01429_,29.12
_03411_,29.12
_06539_,29.12
_08425_,29.12
_11779_,29.12
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[5\]\[9\],29.12
clknet_leaf_1200_mgmt_buffers.caravel_clk,29.12
_12159_,29.11
net7314,29.105
net11077,29.105
_03259_,29.1
_04076_,29.1
_06501_,29.1
_06754_,29.1
_09795_,29.1
gpio_control_in_1\[1\].gpio_outenb,29.1
soc.core.VexRiscv.RegFilePlugin_regFile\[10\]\[22\],29.1
soc.core.storage\[5\]\[0\],29.1
soc.core.storage_1\[14\]\[6\],29.1
net4422,29.1
net12126,29.1
net9157,29.085
_08135_,29.08
_13450_,29.08
soc.core.VexRiscv._zz_execute_to_memory_REGFILE_WRITE_DATA\[29\],29.08
net4775,29.08
net8057,29.08
net8543,29.08
_08778_,29.075
net7333,29.065
_01090_,29.06
_07258_,29.06
_07429_,29.06
net245,29.06
clknet_leaf_902_mgmt_buffers.caravel_clk,29.06
net4201,29.06
net5815,29.06
net6036,29.06
net10833,29.055
_00837_,29.04
_01992_,29.04
_02950_,29.04
_04479_,29.04
_06347_,29.04
_08729_,29.04
soc.core.gpioin2_gpioin2_in_pads_n_d,29.04
net10914,29.04
gpio_control_in_1\[1\].gpio_defaults\[2\],29.03
mprj_io_analog_pol[8],29.03
net6661,29.03
_08856_,29.025
_03056_,29.02
_07036_,29.02
_07762_,29.02
gpio_control_in_1\[2\].gpio_inenb,29.02
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[10\]\[5\],29.02
soc.core.dbg_uart_data\[8\],29.02
clknet_leaf_1148_mgmt_buffers.caravel_clk,29.02
clknet_leaf_1169_mgmt_buffers.caravel_clk,29.02
net5599,29.02
net8199,29.02
gpio_control_in_2\[3\].gpio_defaults\[4\],29.01
_09066_,29.005
_06604_,29
_08947_,29
_11793_,29
_12095_,29
_13742_,29
net5810,29
net8490,29
_00669_,28.98
_01015_,28.98
_03969_,28.98
_06636_,28.98
_07054_,28.98
_10062_,28.98
_10066_,28.98
_15194_,28.98
gpio_control_in_1\[1\].shift_register\[6\],28.98
soc.core.dbg_uart_count\[12\],28.98
soc.core.spi_master_control_storage\[7\],28.98
clknet_leaf_905_mgmt_buffers.caravel_clk,28.98
net3448,28.98
net7776,28.98
net12824,28.98
net12844,28.98
net11288,28.965
_01412_,28.96
_01822_,28.96
_11410_,28.96
_13323_,28.95
mprj_io_analog_pol[23],28.95
net6045,28.945
_13916_,28.94
_14895_,28.94
soc.core.VexRiscv.RegFilePlugin_regFile\[6\]\[4\],28.94
net289,28.94
net7860,28.94
net7720,28.935
_09005_,28.925
_04147_,28.92
_12315_,28.92
gpio_control_in_2\[1\].gpio_vtrip_sel,28.92
net7233,28.92
_05340_,28.91
net9232,28.905
_01106_,28.9
_07080_,28.9
_08557_,28.9
_13161_,28.9
soc.core.VexRiscv.lastStagePc\[25\],28.9
soc.core.storage\[5\]\[2\],28.9
clknet_leaf_759_mgmt_buffers.caravel_clk,28.9
gpio_control_in_2\[5\].gpio_ana_sel,28.895
gpio_control_in_1\[0\].gpio_defaults\[9\],28.89
_09080_,28.885
_00927_,28.88
_01140_,28.88
_09933_,28.88
_12044_,28.88
_12055_,28.88
net5767,28.88
net7460,28.88
net6306,28.865
_01585_,28.86
_02443_,28.86
_14526_,28.86
_15026_,28.86
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[12\]\[14\],28.86
net389,28.86
clknet_leaf_79_mgmt_buffers.caravel_clk,28.86
net8437,28.86
net9004,28.86
net9271,28.86
net10731,28.86
net10921,28.86
net10636,28.855
_00601_,28.84
_06408_,28.84
_14633_,28.84
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[6\]\[9\],28.84
soc.core.storage_1\[14\]\[2\],28.84
net7953,28.84
net8754,28.84
net9990,28.84
net11028,28.84
net12493,28.84
net10373,28.835
net8768,28.825
net9380,28.825
_01897_,28.82
_05601_,28.82
_05684_,28.82
_06715_,28.82
_08868_,28.82
_09106_,28.82
_11035_,28.82
_13259_,28.82
_14118_,28.82
_06876_,28.8
soc.core.VexRiscv.RegFilePlugin_regFile\[1\]\[5\],28.8
net7618,28.8
_06306_,28.78
mgmt_buffers.la_data_in_mprj_bar\[75\],28.78
soc.core.storage_1\[0\]\[1\],28.78
net5194,28.78
net9031,28.765
_02073_,28.76
_06797_,28.76
_07151_,28.76
_08108_,28.76
gpio_control_in_1\[0\].gpio_inenb,28.76
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[3\]\[16\],28.76
net7319,28.76
net10889,28.76
_05270_,28.75
gpio_control_bidir_2\[1\].gpio_defaults\[3\],28.75
gpio_control_in_2\[7\].gpio_defaults\[3\],28.75
_08392_,28.745
_01676_,28.74
_03295_,28.74
_06838_,28.74
_12439_,28.74
_14340_,28.74
_15005_,28.74
gpio_control_in_1\[1\].shift_register\[4\],28.74
net373,28.74
clknet_leaf_437_mgmt_buffers.caravel_clk,28.74
net4600,28.74
net10993,28.74
net12040,28.74
net10377,28.735
_03038_,28.72
_04732_,28.72
_06629_,28.72
_09591_,28.72
_09638_,28.72
_10221_,28.72
_14367_,28.72
net9410,28.72
_08513_,28.705
_02194_,28.7
_08712_,28.7
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[12\]\[24\],28.7
net12289,28.7
net12800,28.7
net10487,28.695
_04348_,28.68
_06894_,28.68
_07756_,28.68
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[13\]\[26\],28.68
soc.core.uart_phy_rx_data\[4\],28.68
net5605,28.68
net6303,28.68
net7632,28.68
net3365,28.665
net3971,28.665
_02536_,28.66
_08600_,28.66
_08790_,28.66
_14126_,28.66
mgmt_buffers.la_data_in_mprj_bar\[124\],28.66
soc.core.VexRiscv.RegFilePlugin_regFile\[10\]\[16\],28.66
net11436,28.66
net4973,28.655
_02022_,28.64
_02027_,28.64
_02262_,28.64
_02492_,28.64
_12167_,28.64
soc.core.VexRiscv.RegFilePlugin_regFile\[25\]\[15\],28.64
soc.core.la_ien_storage\[75\],28.64
net8320,28.64
net10536,28.635
_00188_,28.62
_01715_,28.62
_01845_,28.62
_02500_,28.62
_03569_,28.62
_10897_,28.62
gpio_control_bidir_2\[2\].gpio_ana_pol,28.62
soc.core.VexRiscv.RegFilePlugin_regFile\[6\]\[30\],28.62
net11636,28.62
gpio_control_bidir_2\[0\].gpio_holdover,28.615
mprj_io_analog_en[21],28.61
mprj_io_analog_sel[17],28.61
mprj_io_vtrip_sel[15],28.61
net8828,28.605
_11061_,28.6
_13015_,28.6
net8202,28.6
net8608,28.6
net8827,28.6
net9708,28.6
net12828,28.6
net10423,28.595
net10591,28.595
mprj_io_analog_sel[8],28.59
_07216_,28.585
_02794_,28.58
_06319_,28.58
_09783_,28.58
_11603_,28.58
_13946_,28.58
soc.core.VexRiscv.dBusWishbone_DAT_MOSI\[9\],28.58
soc.core.dbg_uart_rx_count\[0\],28.58
net5159,28.565
net7097,28.565
net8144,28.565
net9253,28.565
_01664_,28.56
_08507_,28.56
_13865_,28.56
soc.core.VexRiscv.lastStagePc\[6\],28.56
soc.core.mgmtsoc_vexriscv_i_cmd_payload_data\[20\],28.56
soc.core.storage_1\[8\]\[1\],28.56
clknet_leaf_514_mgmt_buffers.caravel_clk,28.56
net3628,28.56
net9163,28.56
_05220_,28.55
_04819_,28.54
_06308_,28.54
_06531_,28.54
_09879_,28.54
_11996_,28.54
_12659_,28.54
gpio_control_bidir_2\[1\].gpio_ib_mode_sel,28.54
net8508,28.54
net10520,28.535
gpio_control_in_2\[4\].gpio_defaults\[4\],28.53
net9765,28.525
_01441_,28.52
_02855_,28.52
_04463_,28.52
_05925_,28.52
_10590_,28.52
_13254_,28.52
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[14\]\[31\],28.52
soc.core.VexRiscv.RegFilePlugin_regFile\[11\]\[18\],28.52
soc.core.VexRiscv.RegFilePlugin_regFile\[15\]\[10\],28.52
soc.core.VexRiscv.RegFilePlugin_regFile\[2\]\[15\],28.52
soc.core.dbg_uart_count\[16\],28.52
soc.core.dbg_uart_rx_phase\[24\],28.52
soc.core.storage_1\[12\]\[7\],28.52
soc.core.uart_phy_tx_data\[3\],28.52
net3311,28.52
net5617,28.52
net6242,28.52
net9941,28.505
_00223_,28.5
_02473_,28.5
_06276_,28.5
_09416_,28.5
_13068_,28.5
soc.core.VexRiscv.RegFilePlugin_regFile\[6\]\[27\],28.5
net6763,28.5
_10180_,28.485
net6374,28.485
net8715,28.485
_04971_,28.48
_07120_,28.48
_07755_,28.48
_09425_,28.48
_10251_,28.48
_10500_,28.48
_12892_,28.48
_13893_,28.48
soc.core.VexRiscv.RegFilePlugin_regFile\[10\]\[6\],28.48
net7946,28.48
net8053,28.48
net8496,28.48
net9105,28.48
net10467,28.48
net12927,28.48
net10435,28.475
net7067,28.465
net8427,28.46
_13453_,28.45
_08641_,28.445
_09605_,28.445
_09632_,28.445
_06829_,28.44
_13905_,28.44
_15012_,28.44
soc.core.VexRiscv.execute_to_memory_PC\[20\],28.44
net5595,28.44
net7124,28.44
_02043_,28.42
soc.core.VexRiscv.RegFilePlugin_regFile\[21\]\[8\],28.42
soc.core.VexRiscv.RegFilePlugin_regFile\[24\]\[27\],28.42
net3781,28.42
net5265,28.42
net9220,28.405
_01865_,28.4
_02207_,28.4
_03095_,28.4
_05241_,28.4
_07859_,28.4
_11699_,28.4
_12894_,28.4
_13165_,28.4
_13967_,28.4
_14995_,28.4
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[7\]\[3\],28.4
net8011,28.4
net10166,28.4
_04118_,28.38
_06311_,28.38
_08101_,28.38
_08128_,28.38
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[10\]\[17\],28.38
soc.core.VexRiscv.RegFilePlugin_regFile\[8\]\[9\],28.38
soc.core.multiregimpl75_regs0,28.38
net9171,28.38
_12151_,28.375
net4587,28.365
net5305,28.365
_01812_,28.36
_11187_,28.36
net7328,28.36
gpio_control_in_2\[3\].gpio_ib_mode_sel,28.355
net10254,28.355
mprj_io_holdover[8],28.35
_12102_,28.345
net9059,28.345
_00440_,28.34
_00706_,28.34
_02961_,28.34
_07979_,28.34
_09257_,28.34
_09703_,28.34
_09954_,28.34
_13574_,28.34
soc.core.storage_1\[3\]\[0\],28.34
soc.core.uart_phy_tx_phase\[23\],28.34
net117,28.34
net119,28.34
net5896,28.34
_00459_,28.32
_03266_,28.32
_06427_,28.32
_08985_,28.32
_09619_,28.32
net6324,28.305
_05704_,28.3
net6297,28.3
net12165,28.3
soc.core.VexRiscv.IBusCachedPlugin_cache.io_cpu_prefetch_pc\[24\],28.29
_09256_,28.285
_03368_,28.28
_07878_,28.28
_10792_,28.28
_12363_,28.28
_12993_,28.28
soc.core.VexRiscv.RegFilePlugin_regFile\[13\]\[17\],28.28
soc.core.VexRiscv.RegFilePlugin_regFile\[13\]\[26\],28.28
net6606,28.28
net8234,28.28
net6081,28.265
_02543_,28.26
_02646_,28.26
_04836_,28.26
_06713_,28.26
_08745_,28.26
_09902_,28.26
_11672_,28.26
gpio_control_in_2\[9\].gpio_slow_sel,28.26
soc.core.VexRiscv.RegFilePlugin_regFile\[5\]\[15\],28.26
net11220,28.26
net11401,28.26
_02699_,28.24
_11502_,28.24
net12087,28.24
net2603,28.24
net8451,28.225
net8486,28.225
_00822_,28.22
_01034_,28.22
_07052_,28.22
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[4\]\[16\],28.22
soc.core.VexRiscv.RegFilePlugin_regFile\[5\]\[27\],28.22
clknet_leaf_927_mgmt_buffers.caravel_clk,28.22
_01316_,28.2
_11534_,28.2
_12628_,28.2
net161,28.2
mprj_io_holdover[11],28.19
_10194_,28.185
net7111,28.185
net8812,28.185
_07447_,28.18
_08096_,28.18
_09216_,28.18
_09898_,28.18
net7122,28.18
net10035,28.18
_01009_,28.16
_02214_,28.16
_06024_,28.16
_07384_,28.16
_08665_,28.16
_13734_,28.16
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[11\]\[4\],28.16
net5853,28.16
net10324,28.16
net5383,28.145
net8787,28.145
net10604,28.145
_02007_,28.14
_03604_,28.14
_06660_,28.14
_06962_,28.14
_10228_,28.14
_11431_,28.14
soc.core.VexRiscv.lastStagePc\[8\],28.14
soc.core.mgmtsoc_litespisdrphycore_sr_in\[19\],28.14
net3686,28.14
net8933,28.14
net12642,28.14
_01262_,28.12
_07903_,28.12
_09928_,28.12
soc.core.dbg_uart_tx_phase\[14\],28.12
soc.core.mgmtsoc_vexriscv_debug_bus_dat_r\[8\],28.12
clknet_leaf_152_mgmt_buffers.caravel_clk,28.12
net6978,28.12
net7315,28.12
net7934,28.12
net7997,28.12
net8947,28.12
net3675,28.105
net5798,28.105
_00038_,28.1
_01203_,28.1
_02963_,28.1
_06064_,28.1
_06092_,28.1
_07056_,28.1
_07818_,28.1
_08891_,28.1
_14309_,28.1
gpio_control_in_1\[4\].gpio_inenb,28.1
clknet_leaf_730_mgmt_buffers.caravel_clk,28.1
net5644,28.1
net11676,28.1
net11809,28.1
net12175,28.1
gpio_control_in_1a\[1\].gpio_defaults\[9\],28.09
net9556,28.09
_08147_,28.085
_13315_,28.08
soc.core.VexRiscv.RegFilePlugin_regFile\[9\]\[17\],28.08
_04767_,28.07
net8497,28.065
net8615,28.065
_01527_,28.06
_01627_,28.06
_09893_,28.06
_10330_,28.06
_14445_,28.06
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[8\]\[24\],28.06
soc.core.VexRiscv._zz_CsrPlugin_csrMapping_readDataInit\[8\],28.06
soc.core.uart_phy_rx_phase\[11\],28.06
net3564,28.06
net4873,28.06
net9546,28.06
net6963,28.045
_02968_,28.04
_07199_,28.04
_08436_,28.04
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[12\]\[19\],28.04
net7436,28.04
net8778,28.04
net10348,28.04
gpio_control_in_1a\[0\].gpio_defaults\[10\],28.03
net7913,28.025
_02114_,28.02
_03366_,28.02
_04035_,28.02
_05165_,28.02
_06828_,28.02
_07048_,28.02
_07265_,28.02
_08638_,28.02
_08954_,28.02
soc.core.multiregimpl81_regs0,28.02
clknet_leaf_546_mgmt_buffers.caravel_clk,28.02
clknet_leaf_1184_mgmt_buffers.caravel_clk,28.02
net3445,28.02
net4396,28.02
net8677,28.02
net12901,28.02
_02593_,28
net6792,28
net8396,28
mask_rev\[19\],27.99
mprj_io_inp_dis[4],27.99
_00629_,27.98
_02237_,27.98
_03089_,27.98
_03544_,27.98
_04975_,27.98
_05720_,27.98
_06221_,27.98
_12456_,27.98
_13955_,27.98
gpio_control_in_2\[8\].shift_register\[9\],27.98
net233,27.98
clknet_leaf_995_mgmt_buffers.caravel_clk,27.98
net7064,27.98
net7761,27.98
net8131,27.98
net12407,27.98
_00430_,27.96
_01232_,27.96
_03975_,27.96
soc.core.VexRiscv.IBusCachedPlugin_cache.decodeStage_mmuRsp_physicalAddress\[27\],27.96
net8572,27.96
_08910_,27.945
net7766,27.945
net7863,27.945
_01999_,27.94
_03226_,27.94
_10480_,27.94
_10788_,27.94
_12212_,27.94
_12310_,27.94
pll.itrim\[10\],27.94
net6335,27.94
net8007,27.94
gpio_control_in_1a\[4\].resetn_out,27.93
mprj_io_analog_sel[15],27.93
mprj_io_analog_sel[23],27.93
mprj_io_holdover[23],27.93
mprj_io_inp_dis[25],27.93
mprj_io_vtrip_sel[21],27.93
_02866_,27.92
_06535_,27.92
net3524,27.92
net4770,27.92
net8071,27.92
net9356,27.92
net11969,27.92
net12206,27.92
net4340,27.905
_00863_,27.9
_01864_,27.9
_02226_,27.9
_04090_,27.9
_13657_,27.9
_14541_,27.9
net5678,27.9
net6427,27.9
net8310,27.9
net3037,27.885
net5526,27.885
_00700_,27.88
_01081_,27.88
_01253_,27.88
_10591_,27.88
_15248_,27.88
gpio_control_in_1\[2\].gpio_vtrip_sel,27.88
mgmt_buffers.la_data_in_mprj_bar\[40\],27.88
net377,27.88
clknet_leaf_572_mgmt_buffers.caravel_clk,27.88
net3657,27.88
net7603,27.88
net10438,27.88
net10789,27.88
net9640,27.865
_08258_,27.86
_14771_,27.86
_15244_,27.86
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[3\]\[19\],27.86
soc.core.mgmtsoc_litespisdrphycore_sr_cnt\[7\],27.85
_07106_,27.845
net8687,27.845
net8741,27.845
_00479_,27.84
_06809_,27.84
_06917_,27.84
_07621_,27.84
_13436_,27.84
net7262,27.84
net8575,27.84
net9985,27.84
net11938,27.84
_06714_,27.82
_09578_,27.82
_12400_,27.82
_12918_,27.82
net8807,27.82
net12096,27.82
pll.ringosc.dstage\[3\].id.ts,27.815
net6488,27.805
_02900_,27.8
_06247_,27.8
_06257_,27.8
_08852_,27.8
_09095_,27.8
_12051_,27.8
_12074_,27.8
_14845_,27.8
net5684,27.8
net7280,27.8
net11491,27.8
net11646,27.8
mprj_io_oeb[22],27.79
mprj_io_slow_sel[20],27.79
_08196_,27.785
_08859_,27.785
net5035,27.785
_01756_,27.78
_02860_,27.78
_06217_,27.78
net8790,27.78
_01434_,27.76
_06403_,27.76
_07412_,27.76
_07576_,27.76
gpio_control_in_2\[7\].pad_gpio_outenb,27.76
soc.core.VexRiscv.RegFilePlugin_regFile\[31\]\[15\],27.76
soc.core.gpioin4_pending_re,27.76
soc.core.mgmtsoc_scratch_storage\[13\],27.76
net7112,27.76
net8419,27.76
net10883,27.76
net12363,27.76
_01440_,27.74
_06437_,27.74
_10335_,27.74
soc.core.VexRiscv.RegFilePlugin_regFile\[12\]\[0\],27.74
clknet_leaf_736_mgmt_buffers.caravel_clk,27.74
net8931,27.74
gpio_control_in_1\[1\].gpio_defaults\[8\],27.73
mprj_io_vtrip_sel[26],27.73
net3242,27.725
_07087_,27.72
soc.core.VexRiscv.DebugPlugin_stepIt,27.72
soc.core.mgmtsoc_master_rx_fifo_source_payload_data\[29\],27.72
soc.core.uart_phy_rx_data\[2\],27.72
net279,27.72
net3720,27.72
net7109,27.72
net8229,27.72
_08530_,27.705
_02295_,27.7
_05119_,27.7
_08687_,27.7
_10965_,27.7
net4172,27.7
net7498,27.7
net8093,27.7
net9686,27.7
net5203,27.685
_00295_,27.68
_01129_,27.68
_01339_,27.68
_04042_,27.68
_06366_,27.68
_06890_,27.68
_07364_,27.68
_08599_,27.68
_08713_,27.68
_09935_,27.68
_14038_,27.68
_15175_,27.68
soc.core.mgmtsoc_litespisdrphycore_sr_cnt\[6\],27.68
soc.core.spi_master_cs_storage\[5\],27.68
net3572,27.68
net12718,27.68
net12820,27.68
_05458_,27.67
_08476_,27.665
_03892_,27.66
_06529_,27.66
_06910_,27.66
net3180,27.66
net9583,27.66
net10336,27.66
_08858_,27.655
_05404_,27.65
_09001_,27.645
net10717,27.645
_00425_,27.64
_07715_,27.64
_08617_,27.64
_10300_,27.64
gpio_control_bidir_2\[0\].gpio_ana_en,27.64
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[6\]\[27\],27.64
soc.core.VexRiscv.memory_to_writeBack_REGFILE_WRITE_DATA\[25\],27.64
_05316_,27.63
_12586_,27.625
net3907,27.625
net10631,27.625
_03789_,27.62
_10920_,27.62
net8226,27.62
net10733,27.615
mprj_io_vtrip_sel[11],27.61
_05104_,27.6
_07112_,27.6
_07748_,27.6
_09102_,27.6
_11505_,27.6
_14251_,27.6
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[8\]\[21\],27.6
soc.core.uart_phy_rx_count\[0\],27.6
net7193,27.6
net8149,27.6
net9056,27.6
net12964,27.6
_08547_,27.58
soc.core.storage\[3\]\[4\],27.58
net6311,27.58
net8261,27.58
net8353,27.58
net9382,27.58
net5352,27.565
net6066,27.565
_00997_,27.56
_01964_,27.56
_03008_,27.56
_07972_,27.56
_09384_,27.56
_11130_,27.56
_11194_,27.56
_11950_,27.56
_13838_,27.56
_13894_,27.56
_14040_,27.56
_14904_,27.56
soc.core.dbg_uart_data\[16\],27.56
net12729,27.56
_07271_,27.545
_01401_,27.54
_02364_,27.54
_12607_,27.54
net5446,27.54
_05260_,27.53
net8970,27.525
_00305_,27.52
_07220_,27.52
_12551_,27.52
soc.core.storage\[12\]\[2\],27.52
soc.core.storage_1\[8\]\[4\],27.52
clknet_leaf_238_mgmt_buffers.caravel_clk,27.52
net6778,27.52
net7031,27.505
_11360_,27.5
_13655_,27.5
gpio_control_in_1\[3\].gpio_ib_mode_sel,27.5
soc.core.VexRiscv.IBusCachedPlugin_cache.decodeStage_mmuRsp_physicalAddress\[4\],27.5
_05106_,27.49
mprj_io_analog_pol[21],27.49
_03102_,27.48
_05675_,27.48
_05679_,27.48
_06585_,27.48
_07060_,27.48
_07767_,27.48
_09059_,27.48
_13576_,27.48
_14620_,27.48
net5099,27.48
net7551,27.48
net11131,27.48
net6760,27.465
_00222_,27.46
_00426_,27.46
_07421_,27.46
_12570_,27.46
_14158_,27.46
soc.core.uart_tx_fifo_consume\[2\],27.46
net8458,27.46
net8505,27.46
net11503,27.46
_11080_,27.45
net5089,27.445
_09939_,27.44
_11588_,27.44
_13025_,27.44
_13455_,27.44
_13540_,27.44
_15315_,27.44
gpio_control_in_1a\[3\].shift_register\[3\],27.44
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[3\]\[17\],27.44
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[5\]\[16\],27.44
soc.core.VexRiscv.RegFilePlugin_regFile\[27\]\[3\],27.44
soc.core.VexRiscv._zz_execute_ALU_BITWISE_CTRL\[0\],27.44
soc.core.storage_1\[7\]\[0\],27.44
clknet_leaf_461_mgmt_buffers.caravel_clk,27.44
net4174,27.44
gpio_control_in_2\[4\].gpio_ana_en,27.435
net6195,27.435
gpio_control_in_2\[4\].gpio_defaults\[3\],27.43
net7212,27.425
net9443,27.425
_06302_,27.42
net6369,27.42
net2618,27.42
_05523_,27.4
_07856_,27.4
_13569_,27.4
clknet_leaf_336_mgmt_buffers.caravel_clk,27.4
net3455,27.4
net7956,27.4
net7895,27.395
net7592,27.385
_04419_,27.38
_05352_,27.38
_06623_,27.38
_08326_,27.38
_10021_,27.38
_12711_,27.38
gpio_control_bidir_2\[1\].gpio_holdover,27.38
net3342,27.38
net9462,27.38
mprj_io_vtrip_sel[9],27.37
_08301_,27.365
_00713_,27.36
_02604_,27.36
_02954_,27.36
_12916_,27.36
gpio_control_in_2\[2\].shift_register\[7\],27.36
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[0\]\[20\],27.36
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[10\]\[18\],27.36
soc.core.multiregimpl102_regs0,27.36
gpio_control_in_1\[2\].gpio_outenb,27.355
gpio_control_in_2\[9\].gpio_ana_en,27.355
_02142_,27.34
_02752_,27.34
_02958_,27.34
_06150_,27.34
_06341_,27.34
_06610_,27.34
_07122_,27.34
_10323_,27.34
_10439_,27.34
_12298_,27.34
gpio_control_in_2\[4\].gpio_ana_pol,27.34
mgmt_buffers.la_data_in_mprj_bar\[41\],27.34
net2756,27.34
net8837,27.34
net12188,27.34
net12879,27.34
net10425,27.335
_11561_,27.33
net5897,27.325
_02859_,27.32
_07943_,27.32
_09159_,27.32
net9285,27.32
net10683,27.315
mprj_io_oeb[4],27.31
_07573_,27.3
_07876_,27.3
_09517_,27.3
_10207_,27.3
_10258_,27.3
_11634_,27.3
_12825_,27.3
gpio_control_in_1\[2\].shift_register\[5\],27.3
gpio_control_in_2\[0\].shift_register\[11\],27.3
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[12\]\[26\],27.3
soc.core.VexRiscv.RegFilePlugin_regFile\[26\]\[5\],27.3
soc.core.interface3_bank_bus_dat_r\[10\],27.3
soc.core.storage_1\[11\]\[0\],27.3
net4041,27.3
net7555,27.3
net8888,27.3
net10743,27.3
net8696,27.295
gpio_control_in_1a\[2\].gpio_defaults\[8\],27.29
gpio_control_in_2\[1\].gpio_defaults\[2\],27.29
net11584,27.29
_09347_,27.28
_10579_,27.28
_13519_,27.28
_14668_,27.28
clknet_leaf_1044_mgmt_buffers.caravel_clk,27.28
_12157_,27.27
mprj_io_analog_sel[19],27.27
net9025,27.265
_01248_,27.26
_06926_,27.26
_07478_,27.26
_07965_,27.26
_11718_,27.26
_14523_,27.26
soc.core.VexRiscv.RegFilePlugin_regFile\[27\]\[5\],27.26
soc.core.mgmtsoc_en_storage,27.26
net3892,27.26
net9649,27.26
net10500,27.26
net12833,27.26
mprj_io_ib_mode_sel[18],27.25
mprj_io_vtrip_sel[16],27.25
net10496,27.25
_02537_,27.24
_02940_,27.24
_02995_,27.24
_07754_,27.24
_07873_,27.24
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[11\]\[23\],27.24
soc.core.VexRiscv.RegFilePlugin_regFile\[15\]\[22\],27.24
net3825,27.225
net10384,27.225
_02181_,27.22
_04441_,27.22
_09411_,27.22
_10866_,27.22
_12269_,27.22
gpio_control_in_2\[7\].gpio_ana_en,27.22
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[12\]\[31\],27.22
soc.core.VexRiscv.lastStagePc\[14\],27.22
clknet_leaf_52_mgmt_buffers.caravel_clk,27.22
net8729,27.22
net8900,27.22
net10569,27.22
net12580,27.22
net12806,27.22
net12852,27.22
net12966,27.22
net7789,27.205
net11180,27.205
_01010_,27.2
_01658_,27.2
_03395_,27.2
_03784_,27.2
_08791_,27.2
_14404_,27.2
gpio_control_in_1\[1\].gpio_inenb,27.2
soc.core.VexRiscv.decode_to_execute_DO_EBREAK,27.2
soc.core.storage_1\[15\]\[4\],27.2
net5964,27.185
_02213_,27.18
_05111_,27.18
_05123_,27.18
_06606_,27.18
_07584_,27.18
_10101_,27.18
_10158_,27.18
net5932,27.18
net11679,27.18
net7442,27.165
_03247_,27.16
_04552_,27.16
_04745_,27.16
soc.core.VexRiscv.RegFilePlugin_regFile\[29\]\[12\],27.16
soc.core.storage\[1\]\[1\],27.16
net12365,27.16
mprj_io_ib_mode_sel[26],27.15
net7690,27.145
_01038_,27.14
_01605_,27.14
_08542_,27.14
_09724_,27.14
_15001_,27.14
soc.core.VexRiscv.lastStagePc\[16\],27.14
net4098,27.14
net6667,27.14
net7287,27.14
net7983,27.14
net10784,27.135
net8588,27.125
_04476_,27.12
_13078_,27.12
_13082_,27.12
_13660_,27.12
mgmt_buffers.la_data_in_enable\[39\],27.12
net5426,27.12
net8587,27.12
net8906,27.12
_04931_,27.11
_13440_,27.11
_05897_,27.1
_08602_,27.1
_09539_,27.1
net4891,27.1
net5591,27.1
net11532,27.1
net6105,27.085
_02477_,27.08
_10110_,27.08
gpio_control_bidir_1\[1\].gpio_vtrip_sel,27.08
soc.core.multiregimpl58_regs1,27.08
net4970,27.08
net10036,27.08
_00427_,27.06
_01760_,27.06
_05484_,27.06
_11949_,27.06
gpio_control_in_1\[4\].shift_register\[3\],27.06
soc.core.VexRiscv.BranchPlugin_branchExceptionPort_payload_badAddr\[1\],27.06
net8210,27.06
net8304,27.06
mprj_io_analog_en[25],27.05
_13507_,27.04
_15240_,27.04
_02168_,27.02
_07398_,27.02
_08730_,27.02
_10465_,27.02
_15039_,27.02
soc.core.VexRiscv.RegFilePlugin_regFile\[13\]\[8\],27.02
clknet_leaf_1091_mgmt_buffers.caravel_clk,27.02
net6980,27.02
net7539,27.02
net8632,27.02
net9615,27.02
net6462,27.005
_01953_,27
_02092_,27
_09361_,27
_09542_,27
soc.core.mgmtsoc_value_status\[6\],27
net6102,27
net6389,27
_05394_,26.99
_12643_,26.99
net12156,26.99
net7303,26.985
_11675_,26.98
clknet_leaf_772_mgmt_buffers.caravel_clk,26.98
net4346,26.98
net8428,26.98
net12458,26.98
gpio_control_in_2\[3\].gpio_defaults\[9\],26.97
net8354,26.965
net8540,26.965
_00477_,26.96
_01238_,26.96
_01644_,26.96
_02399_,26.96
_05690_,26.96
_06023_,26.96
_09736_,26.96
_10057_,26.96
mgmt_buffers.la_data_in_mprj_bar\[110\],26.96
soc.core.mgmtsoc_value_status\[27\],26.96
net3088,26.96
net8510,26.96
net8831,26.96
net9074,26.96
net10866,26.96
net12577,26.96
net6867,26.955
net4752,26.945
_04091_,26.94
soc.core.VexRiscv.RegFilePlugin_regFile\[11\]\[5\],26.94
soc.core.VexRiscv._zz_CsrPlugin_csrMapping_readDataInit\[11\],26.94
gpio_control_in_2\[5\].gpio_slow_sel,26.935
_05652_,26.93
mprj_io_holdover[9],26.93
_01425_,26.92
_03262_,26.92
_08827_,26.92
_09916_,26.92
_13591_,26.92
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[4\]\[15\],26.92
soc.core.storage\[0\]\[1\],26.92
net229,26.92
net10182,26.92
_09142_,26.91
_02160_,26.9
_03225_,26.9
_05694_,26.9
_06896_,26.9
_07499_,26.9
_10936_,26.9
_13810_,26.9
soc.core.VexRiscv.BranchPlugin_branchExceptionPort_payload_badAddr\[12\],26.9
soc.core.storage\[10\]\[4\],26.9
net10007,26.9
mprj_io_inp_dis[14],26.89
net7841,26.885
_00756_,26.88
_04167_,26.88
_06228_,26.88
_06821_,26.88
_07119_,26.88
_09905_,26.88
_09956_,26.88
_13475_,26.88
soc.core.VexRiscv.IBusCachedPlugin_cache.io_cpu_decode_data\[11\],26.88
clknet_leaf_918_mgmt_buffers.caravel_clk,26.88
clknet_leaf_980_mgmt_buffers.caravel_clk,26.88
net4177,26.88
net6363,26.88
net7995,26.88
net10799,26.88
_14520_,26.86
mgmt_buffers.la_data_in_mprj_bar\[73\],26.86
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[11\]\[30\],26.86
_06025_,26.84
_06372_,26.84
_07688_,26.84
_10566_,26.84
_15266_,26.84
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[2\]\[16\],26.84
soc.core.VexRiscv.RegFilePlugin_regFile\[14\]\[1\],26.84
soc.core.mgmtsoc_scratch_storage\[2\],26.84
soc.core.uart_phy_rx_count\[1\],26.84
net3268,26.84
net6626,26.84
net7658,26.84
net8434,26.84
net9892,26.84
net10542,26.84
_02534_,26.82
_08626_,26.82
_10983_,26.82
_15322_,26.82
gpio_control_in_1a\[1\].pad_gpio_out,26.82
gpio_control_in_1a\[2\].shift_register\[6\],26.82
pll.ringosc.dstage\[2\].id.ts,26.82
net6430,26.82
net8734,26.815
net6068,26.805
_04980_,26.8
_06488_,26.8
_07377_,26.8
_08940_,26.8
_10313_,26.8
_11519_,26.8
_12031_,26.8
_12820_,26.8
soc.core.spi_master_control_storage\[5\],26.8
soc.core.storage\[10\]\[0\],26.8
net5448,26.8
soc.core.VexRiscv.RegFilePlugin_regFile\[6\]\[13\],26.79
_08251_,26.785
_09335_,26.785
net8698,26.785
_01569_,26.78
_02025_,26.78
_03507_,26.78
_06622_,26.78
_07505_,26.78
_07618_,26.78
gpio_control_in_2\[4\].gpio_ib_mode_sel,26.78
soc.core.VexRiscv.BranchPlugin_branchExceptionPort_payload_badAddr\[9\],26.78
soc.core.VexRiscv.RegFilePlugin_regFile\[8\]\[26\],26.78
soc.core.VexRiscv.RegFilePlugin_regFile\[9\]\[16\],26.78
net8838,26.775
_05368_,26.77
net7651,26.765
net8211,26.765
net8491,26.765
_00866_,26.76
_06878_,26.76
_07713_,26.76
gpio_control_in_2\[1\].gpio_slow_sel,26.76
soc.core.VexRiscv.RegFilePlugin_regFile\[13\]\[25\],26.76
soc.core.VexRiscv.lastStagePc\[31\],26.76
soc.core.multiregimpl62_regs0,26.76
soc.core.storage\[9\]\[4\],26.76
soc.core.storage_1\[4\]\[1\],26.76
clknet_leaf_573_mgmt_buffers.caravel_clk,26.76
net6339,26.76
net7656,26.76
net12811,26.76
net12863,26.76
_00437_,26.74
_04278_,26.74
_08998_,26.74
_10571_,26.74
_13214_,26.74
_00053_,26.72
_00310_,26.72
_01394_,26.72
_02481_,26.72
_02738_,26.72
_04158_,26.72
_04910_,26.72
_06032_,26.72
_07154_,26.72
_07337_,26.72
_08043_,26.72
_09969_,26.72
gpio_control_in_1a\[2\].gpio_inenb,26.72
gpio_control_in_1a\[5\].gpio_inenb,26.72
soc.core.storage\[7\]\[7\],26.72
net3014,26.72
net4996,26.72
net7786,26.72
net8953,26.72
gpio_control_in_2\[9\].gpio_defaults\[4\],26.71
soc.core.storage\[6\]\[2\],26.7
net8585,26.7
mprj_io_out[3],26.69
net7065,26.685
_00826_,26.68
_00847_,26.68
_06312_,26.68
_07034_,26.68
_08592_,26.68
_11543_,26.68
gpio_control_in_2\[2\].gpio_slow_sel,26.68
mgmt_buffers.la_data_in_mprj_bar\[51\],26.68
soc.core.VexRiscv.RegFilePlugin_regFile\[17\]\[5\],26.68
net3923,26.68
net4151,26.68
net7525,26.68
net11434,26.68
net11755,26.68
net12518,26.68
net11250,26.665
_01119_,26.66
_02438_,26.66
_02796_,26.66
_13087_,26.66
soc.core.VexRiscv.RegFilePlugin_regFile\[12\]\[30\],26.66
net7420,26.66
net12147,26.66
net7756,26.655
mprj_io_analog_sel[26],26.65
net8623,26.645
_02913_,26.64
_03018_,26.64
_04056_,26.64
_06505_,26.64
_07297_,26.64
_08541_,26.64
_09892_,26.64
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[13\]\[24\],26.64
soc.core.mgmtsoc_litespisdrphycore_sr_in\[14\],26.64
net7591,26.64
net12517,26.64
net12587,26.64
net3216,26.635
_01422_,26.62
_08349_,26.62
_11435_,26.62
_11457_,26.62
_05194_,26.61
mask_rev\[17\],26.61
net8169,26.605
_00356_,26.6
_00820_,26.6
_01305_,26.6
_01600_,26.6
_08459_,26.6
_08690_,26.6
soc.core.spi_master_miso\[7\],26.6
soc.core.spi_master_miso_data\[6\],26.6
gpio_control_in_2\[1\].gpio_ana_sel,26.595
_11806_,26.59
mprj_io_holdover[1],26.59
net6995,26.585
net10498,26.585
_10366_,26.58
gpio_control_bidir_1\[0\].gpio_ib_mode_sel,26.58
gpio_control_in_1\[1\].gpio_ib_mode_sel,26.58
gpio_control_in_1\[4\].gpio_slow_sel,26.58
mprj_io_slow_sel[18],26.57
net4837,26.565
net11293,26.565
_00581_,26.56
_01905_,26.56
_02407_,26.56
_04600_,26.56
_06445_,26.56
_08006_,26.56
_08338_,26.56
_08979_,26.56
_09672_,26.56
_12204_,26.56
_15231_,26.56
soc.core.VexRiscv.DebugPlugin_busReadDataReg\[17\],26.56
soc.core.multiregimpl91_regs0,26.56
clknet_leaf_323_mgmt_buffers.caravel_clk,26.56
net2953,26.56
net3273,26.56
net11608,26.56
net11920,26.56
net12047,26.56
net9828,26.555
net7061,26.545
_01180_,26.54
_06600_,26.54
_13352_,26.54
gpio_control_in_1a\[5\].gpio_vtrip_sel,26.54
soc.core.multiregimpl30_regs0,26.54
soc.core.storage\[0\]\[4\],26.54
soc.core.uart_phy_tx_phase\[24\],26.54
net7465,26.54
net11715,26.54
_08438_,26.525
_00432_,26.52
_02012_,26.52
_02265_,26.52
_02314_,26.52
_15015_,26.52
soc.core.VexRiscv.RegFilePlugin_regFile\[16\]\[7\],26.52
soc.core.VexRiscv.RegFilePlugin_regFile\[3\]\[15\],26.52
net12585,26.52
_06693_,26.5
soc.core.mgmtsoc_master_rx_fifo_source_payload_data\[25\],26.5
net6164,26.5
net3464,26.485
net7929,26.485
_09432_,26.48
net7494,26.48
net12421,26.48
gpio_control_in_2\[2\].gpio_ana_en,26.475
_09002_,26.465
net5770,26.465
_01846_,26.46
_01866_,26.46
_06360_,26.46
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[10\]\[3\],26.46
net4777,26.46
net5664,26.46
net8929,26.46
_05306_,26.45
_05412_,26.45
_00331_,26.44
_01024_,26.44
_04304_,26.44
_08878_,26.44
_08952_,26.44
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[14\]\[27\],26.44
soc.core.mgmtsoc_value_status\[29\],26.44
net8384,26.44
net9032,26.44
net11228,26.44
mprj_io_holdover[21],26.43
mprj_io_oeb[19],26.43
net7552,26.425
net8849,26.425
_01046_,26.42
_02076_,26.42
_03958_,26.42
_06237_,26.42
_08025_,26.42
_08030_,26.42
_12010_,26.42
clknet_leaf_176_mgmt_buffers.caravel_clk,26.42
clknet_leaf_835_mgmt_buffers.caravel_clk,26.42
net3978,26.42
net5219,26.42
net9966,26.42
net2690,26.42
soc.core.VexRiscv.RegFilePlugin_regFile\[12\]\[9\],26.415
_09161_,26.405
_00763_,26.4
_04460_,26.4
_07998_,26.4
_11789_,26.4
soc.core.storage_1\[5\]\[4\],26.4
net11184,26.4
_05228_,26.39
net5223,26.385
_02810_,26.38
_06328_,26.38
_07146_,26.38
_09508_,26.38
_15210_,26.38
mgmt_buffers.la_data_in_mprj_bar\[43\],26.38
net337,26.38
net4372,26.38
net5329,26.38
net6930,26.38
gpio_control_in_1\[0\].gpio_defaults\[7\],26.37
_02021_,26.36
_05692_,26.36
_14359_,26.36
_14436_,26.36
_15306_,26.36
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[14\]\[19\],26.36
soc.core.VexRiscv.IBusCachedPlugin_cache.io_cpu_prefetch_pc\[26\],26.36
soc.core.uart_phy_tx_phase\[5\],26.36
net12149,26.36
net12168,26.36
_02032_,26.34
_07535_,26.34
_07615_,26.34
_07703_,26.34
_07905_,26.34
_08210_,26.34
_08327_,26.34
soc.core.mgmtsoc_value_status\[3\],26.34
net234,26.34
net4849,26.34
net5349,26.34
net9191,26.34
net12967,26.34
_00683_,26.32
_01654_,26.32
_15014_,26.32
soc.core.VexRiscv.IBusCachedPlugin_cache.ways_0_tags\[0\]\[19\],26.32
soc.core.dbg_uart_bytes_count\[0\],26.32
net3872,26.32
_08386_,26.305
net3287,26.305
net4265,26.305
net6664,26.305
net6891,26.305
_04572_,26.3
_06127_,26.3
_06477_,26.3
_06739_,26.3
_06765_,26.3
_12973_,26.3
_13914_,26.3
soc.core.uart_phy_tx_data\[5\],26.3
net7268,26.3
_05342_,26.29
_00732_,26.28
_00817_,26.28
_01724_,26.28
_09402_,26.28
soc.core.storage_1\[13\]\[0\],26.28
net4792,26.28
net10275,26.28
net7608,26.265
net8601,26.265
_06986_,26.26
_08466_,26.26
_10761_,26.26
soc.core.uart_phy_tx_phase\[29\],26.26
clknet_leaf_745_mgmt_buffers.caravel_clk,26.26
net8982,26.26
gpio_control_in_1\[2\].gpio_defaults\[8\],26.25
mprj_io_ib_mode_sel[9],26.25
mprj_io_vtrip_sel[5],26.25
_01926_,26.24
_06615_,26.24
_06959_,26.24
_07858_,26.24
_10581_,26.24
soc.core.interface0_bank_bus_dat_r\[12\],26.24
soc.core.storage\[3\]\[2\],26.24
net7090,26.24
net9361,26.24
net8128,26.225
_00258_,26.22
_00472_,26.22
_01583_,26.22
_05507_,26.22
_07801_,26.22
_08793_,26.22
_09867_,26.22
clknet_leaf_149_mgmt_buffers.caravel_clk,26.22
net7438,26.22
net11515,26.22
net12046,26.22
net12868,26.22
net2620,26.22
_05164_,26.21
_05192_,26.21
_05300_,26.21
mgmt_buffers.la_data_in_mprj\[121\],26.205
_02880_,26.2
_10853_,26.2
_11374_,26.2
net6023,26.2
net8637,26.2
soc.core.VexRiscv.IBusCachedPlugin_cache.ways_0_tags\[0\]\[18\],26.19
_08880_,26.185
_09272_,26.185
net4370,26.185
_04550_,26.18
_06596_,26.18
_09844_,26.18
_10646_,26.18
_13638_,26.18
gpio_control_bidir_1\[1\].resetn_out,26.18
pll.pll_control.tint\[4\],26.18
soc.core.VexRiscv.RegFilePlugin_regFile\[19\]\[3\],26.18
net5523,26.18
net8483,26.18
net10734,26.18
net11050,26.18
net11952,26.18
_08294_,26.165
net7869,26.165
_01830_,26.16
_04726_,26.16
_07397_,26.16
_10042_,26.16
_12171_,26.16
net5824,26.16
net7180,26.16
_04093_,26.14
_11114_,26.14
_13469_,26.14
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[15\]\[3\],26.14
clknet_leaf_525_mgmt_buffers.caravel_clk,26.14
net7142,26.14
_05360_,26.13
mprj_io_analog_pol[22],26.13
_01083_,26.12
_02491_,26.12
net7826,26.12
net9766,26.12
net12359,26.12
net5954,26.105
_01126_,26.1
_01718_,26.1
_01860_,26.1
_02740_,26.1
_04048_,26.1
_06300_,26.1
_07403_,26.1
_08588_,26.1
_08593_,26.1
_09592_,26.1
_10921_,26.1
_13280_,26.1
soc.core.mgmtsoc_bus_errors\[1\],26.1
net7213,26.1
net9512,26.1
_05438_,26.09
_08823_,26.085
_01797_,26.08
_06560_,26.08
_08497_,26.08
_09364_,26.08
_09509_,26.08
_09906_,26.08
_10560_,26.08
_13065_,26.08
soc.core.VexRiscv.RegFilePlugin_regFile\[21\]\[3\],26.08
soc.core.multiregimpl12_regs0,26.08
net7138,26.08
net7432,26.08
_00638_,26.06
_01544_,26.06
_06597_,26.06
soc.core.dbg_uart_tx_phase\[5\],26.06
soc.core.multiregimpl42_regs1,26.06
net9770,26.06
net8435,26.055
mprj_io_analog_en[8],26.05
net6539,26.045
net8233,26.045
net8922,26.045
_00687_,26.04
_01507_,26.04
_02015_,26.04
_02932_,26.04
_12988_,26.04
soc.core.VexRiscv.when_DebugPlugin_l260_1,26.04
net7906,26.04
net11536,26.04
_01601_,26.02
_04107_,26.02
_14115_,26.02
gpio_control_in_1a\[5\].shift_register\[5\],26.02
soc.core.VexRiscv.dBus_cmd_halfPipe_payload_size\[1\],26.02
net4155,25.995
mgmt_buffers.la_data_in_mprj\[53\],25.985
_02693_,25.98
_10730_,25.98
_11754_,25.98
gpio_control_in_1a\[3\].shift_register\[6\],25.98
net8753,25.98
net6312,25.965
_05646_,25.96
soc.core.spi_master_loopback_storage,25.96
soc.core.storage_1\[9\]\[2\],25.96
net3788,25.96
net11450,25.96
net12166,25.96
soc.core.storage_1\[7\]\[1\],25.95
_07850_,25.94
soc.core.storage_1\[14\]\[1\],25.94
net10522,25.935
net3196,25.925
net4101,25.925
_09819_,25.92
soc.core.VexRiscv.RegFilePlugin_regFile\[15\]\[3\],25.92
soc.core.mgmtsoc_scratch_storage\[4\],25.92
soc.core.storage_1\[3\]\[6\],25.92
net8237,25.92
_04471_,25.9
_09452_,25.9
_12994_,25.9
_13451_,25.9
gpio_control_in_1\[0\].shift_register\[5\],25.895
mprj_io_holdover[16],25.89
_12893_,25.885
net8339,25.885
_05467_,25.88
_07875_,25.88
_08789_,25.88
_14213_,25.88
soc.core.gpioin1_enable_storage,25.88
soc.core.interface0_bank_bus_dat_r\[13\],25.88
soc.core.memdat_3\[2\],25.88
net9174,25.88
net10249,25.88
net10853,25.88
net11910,25.88
_03319_,25.86
_04185_,25.86
_06395_,25.86
_12465_,25.86
_14759_,25.86
mgmt_buffers.la_data_in_mprj_bar\[100\],25.86
mgmt_buffers.la_data_in_mprj_bar\[121\],25.86
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[14\]\[0\],25.86
net8480,25.86
_05146_,25.85
_01452_,25.84
_04028_,25.84
_04531_,25.84
_07773_,25.84
_09485_,25.84
_10314_,25.84
_11032_,25.84
soc.core.multiregimpl67_regs1,25.84
net380,25.84
clknet_leaf_638_mgmt_buffers.caravel_clk,25.84
net5961,25.84
net6962,25.84
net7778,25.84
net7866,25.84
net8162,25.84
net11173,25.84
net12829,25.84
_10030_,25.825
_12824_,25.82
soc.core.mgmtsoc_load_storage\[24\],25.82
net4195,25.82
_05378_,25.81
mgmt_buffers.la_data_in_mprj\[41\],25.805
net4728,25.805
net7075,25.805
_03629_,25.8
_06676_,25.8
_07574_,25.8
_07666_,25.8
_11719_,25.8
_12149_,25.8
clknet_leaf_201_mgmt_buffers.caravel_clk,25.8
net3010,25.8
net7152,25.8
net11512,25.8
net10132,25.79
_07198_,25.785
net3901,25.785
net8418,25.785
_01072_,25.78
_02017_,25.78
_06819_,25.78
_08612_,25.775
net7649,25.765
net8321,25.765
_01808_,25.76
_02987_,25.76
_06093_,25.76
_09687_,25.76
_10573_,25.76
_10707_,25.76
_11562_,25.76
_13151_,25.76
_13684_,25.76
_15292_,25.76
mgmt_buffers.la_data_in_enable\[42\],25.76
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[15\]\[26\],25.76
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[6\]\[14\],25.76
soc.core.state,25.76
net238,25.76
net4911,25.76
net8292,25.76
net8622,25.76
net11104,25.76
net13184,25.76
mprj_io_oeb[17],25.75
mprj_io_slow_sel[22],25.75
_00444_,25.74
_06128_,25.74
_11899_,25.74
_12103_,25.74
_13656_,25.74
soc.core.mgmtsoc_value_status\[12\],25.74
net12512,25.74
net7558,25.725
net10288,25.725
_12982_,25.72
_13939_,25.72
_15193_,25.72
net284,25.72
net4889,25.72
net6789,25.72
net12293,25.72
net6807,25.705
_00537_,25.7
_00774_,25.7
_01701_,25.7
_13028_,25.7
net8551,25.7
net3182,25.695
_13858_,25.69
user_io_oeb\[23\],25.69
net11318,25.685
_01973_,25.68
_02933_,25.68
_04403_,25.68
_04428_,25.68
_05912_,25.68
_08306_,25.68
_08938_,25.68
_11831_,25.68
_14144_,25.68
soc.core.interface3_bank_bus_dat_r\[18\],25.68
clknet_leaf_1185_mgmt_buffers.caravel_clk,25.68
net5032,25.68
net8345,25.68
_08918_,25.665
net6352,25.665
_01471_,25.66
_13801_,25.66
net369,25.66
net5589,25.66
net7774,25.66
_00299_,25.64
_00690_,25.64
_10061_,25.64
_13876_,25.64
_15027_,25.64
net8604,25.64
_05136_,25.63
_02196_,25.62
_06343_,25.62
_06722_,25.62
_08949_,25.62
_09909_,25.62
soc.core.dbg_uart_address\[27\],25.62
net12450,25.62
gpio_control_in_2\[8\].gpio_ib_mode_sel,25.615
_09039_,25.605
net4808,25.605
_02104_,25.6
_04566_,25.6
_10055_,25.6
_11966_,25.6
_12815_,25.6
_14885_,25.6
clknet_leaf_23_mgmt_buffers.caravel_clk,25.6
net11972,25.6
net7582,25.585
net8297,25.585
_01884_,25.58
_04095_,25.58
_06258_,25.58
_06542_,25.58
soc.core.VexRiscv.RegFilePlugin_regFile\[17\]\[6\],25.58
clknet_leaf_1146_mgmt_buffers.caravel_clk,25.58
net2954,25.58
net5060,25.58
net10231,25.58
mprj_io_holdover[5],25.57
mprj_io_vtrip_sel[10],25.57
_01952_,25.56
_03169_,25.56
_05982_,25.56
_08637_,25.56
_11716_,25.56
net11084,25.56
net13173,25.56
_02917_,25.54
_06344_,25.54
_06389_,25.54
_07543_,25.54
_07952_,25.54
_13249_,25.54
_13320_,25.54
_14392_,25.54
soc.core.VexRiscv.IBusCachedPlugin_cache._zz_banks_0_port1\[0\],25.54
net6580,25.54
net9083,25.54
net9598,25.54
net10167,25.54
_10858_,25.53
_01259_,25.52
_12383_,25.52
pll.ext_trim\[10\],25.52
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[13\]\[1\],25.52
soc.core.VexRiscv.RegFilePlugin_regFile\[15\]\[6\],25.52
soc.core.mgmtsoc_value_status\[17\],25.52
clknet_leaf_979_mgmt_buffers.caravel_clk,25.52
net5130,25.52
net7026,25.52
net8657,25.52
_08467_,25.515
net2935,25.505
net5833,25.505
_08663_,25.5
soc.core.VexRiscv.IBusCachedPlugin_cache._zz_banks_0_port1\[30\],25.5
soc.core.VexRiscv.RegFilePlugin_regFile\[29\]\[0\],25.5
soc.core.mgmtsoc_master_rx_fifo_source_payload_data\[19\],25.5
net5353,25.5
net7960,25.5
net12709,25.5
clknet_leaf_936_mgmt_buffers.caravel_clk,25.48
_09053_,25.465
net6919,25.465
net8156,25.465
_00952_,25.46
soc.core.storage_1\[11\]\[2\],25.46
net8803,25.46
net13166,25.46
_05568_,25.45
mprj_io_inp_dis[15],25.45
_01473_,25.44
net8316,25.44
net9826,25.44
net10076,25.44
net3415,25.425
net6173,25.425
net8932,25.425
net9457,25.425
_00214_,25.42
_03625_,25.42
_04062_,25.42
_06397_,25.42
_07568_,25.42
_08017_,25.42
_12426_,25.42
_14641_,25.42
net4531,25.42
net6956,25.42
_05366_,25.41
net6764,25.405
_00189_,25.4
_02081_,25.4
_02241_,25.4
_03632_,25.4
_04332_,25.4
_06384_,25.4
_07852_,25.4
_12255_,25.4
net6687,25.4
_12981_,25.395
net10646,25.395
net6848,25.385
_06296_,25.38
_06564_,25.38
_11717_,25.38
soc.core.VexRiscv.IBusCachedPlugin_cache._zz_banks_0_port1\[3\],25.38
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[2\]\[19\],25.38
soc.core.VexRiscv.IBusCachedPlugin_cache.lineLoader_cmdSent,25.38
net12682,25.38
_05386_,25.37
_05400_,25.37
gpio_control_in_1a\[0\].gpio_defaults\[8\],25.37
_13692_,25.365
net4860,25.365
_00197_,25.36
_00584_,25.36
_05718_,25.36
_12265_,25.36
net5427,25.36
net11749,25.36
_10184_,25.345
_00897_,25.34
_03079_,25.34
_03499_,25.34
_05089_,25.34
_05475_,25.34
_06922_,25.34
_07958_,25.34
net286,25.34
clknet_leaf_810_mgmt_buffers.caravel_clk,25.34
net4895,25.34
net7379,25.34
net11686,25.34
net10756,25.335
_12258_,25.325
net6674,25.325
net8116,25.325
_01770_,25.32
_06857_,25.32
_11043_,25.32
_02496_,25.3
_06989_,25.3
_07035_,25.3
_09153_,25.3
_10340_,25.3
soc.core.dbg_uart_count\[13\],25.3
soc.core.storage_1\[8\]\[6\],25.3
net265,25.3
net5168,25.3
net6648,25.3
net7886,25.3
net8402,25.3
net6865,25.295
_02250_,25.28
_02834_,25.28
_06479_,25.28
_11414_,25.28
_13558_,25.28
pll.ringosc.iss.d1,25.28
net4637,25.28
net8789,25.28
_03001_,25.26
_08079_,25.26
_08980_,25.26
soc.core.VexRiscv.RegFilePlugin_regFile\[0\]\[19\],25.26
net239,25.26
net4633,25.26
net8571,25.26
net9309,25.26
net12221,25.26
net12520,25.26
gpio_control_in_2\[7\].gpio_slow_sel,25.255
net3574,25.255
_08922_,25.245
_00799_,25.24
_02210_,25.24
_15342_,25.24
net6080,25.24
mprj_io_analog_en[17],25.23
_00710_,25.22
_01501_,25.22
_01575_,25.22
_02177_,25.22
_03504_,25.22
_05744_,25.22
gpio_control_in_2\[6\].gpio_inenb,25.215
clknet_leaf_1198_mgmt_buffers.caravel_clk,25.215
gpio_control_in_1\[4\].gpio_defaults\[8\],25.21
mprj_io_analog_sel[16],25.21
mprj_io_ib_mode_sel[21],25.21
mprj_io_vtrip_sel[17],25.21
net8752,25.205
_01795_,25.2
_03088_,25.2
_14380_,25.2
soc.core.VexRiscv.CsrPlugin_mtvec_base\[10\],25.2
net4364,25.2
net8135,25.2
net10477,25.19
net6821,25.185
net7045,25.185
_05109_,25.18
_07722_,25.18
_11377_,25.18
soc.core.dbg_uart_tx_data\[6\],25.18
soc.core.multiregimpl68_regs0,25.18
clknet_leaf_763_mgmt_buffers.caravel_clk,25.18
net3663,25.18
net4560,25.175
net7758,25.165
_00303_,25.16
_00337_,25.16
_00450_,25.16
_02003_,25.16
_02554_,25.16
_08054_,25.16
_09775_,25.16
_10355_,25.16
soc.core.storage\[7\]\[1\],25.16
net3543,25.16
net6722,25.16
net8421,25.16
net8493,25.16
net13161,25.16
net7049,25.145
_05738_,25.14
_10692_,25.14
_13253_,25.14
_15016_,25.14
gpio_control_in_1\[1\].shift_register\[8\],25.14
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[9\]\[6\],25.14
clknet_leaf_160_mgmt_buffers.caravel_clk,25.14
net9593,25.14
net12963,25.14
_13918_,25.135
_09393_,25.125
net8822,25.125
_04222_,25.12
soc.core.mgmtsoc_litespisdrphycore_storage\[6\],25.12
net3393,25.12
net4680,25.12
net6132,25.105
_00991_,25.1
_05671_,25.1
_05983_,25.1
_07022_,25.1
_09018_,25.1
_09694_,25.1
_13944_,25.1
net5711,25.085
_02234_,25.08
_05600_,25.08
_06811_,25.08
_07663_,25.08
_07697_,25.08
_08828_,25.08
net261,25.08
net3025,25.08
net7575,25.08
net7675,25.08
net10614,25.08
_02812_,25.06
_03342_,25.06
_05724_,25.06
_06755_,25.06
_08962_,25.06
_10789_,25.06
_14462_,25.06
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[11\]\[12\],25.06
soc.core.multiregimpl101_regs0,25.06
net4152,25.055
net7873,25.045
net9103,25.045
_01093_,25.04
_06946_,25.04
_12397_,25.04
_15267_,25.04
soc.core.VexRiscv.CsrPlugin_interrupt_code\[3\],25.04
net5658,25.04
net12584,25.04
_06966_,25.02
_08163_,25.02
_08272_,25.02
_08336_,25.02
_09953_,25.02
_12837_,25.02
_12910_,25.02
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[6\]\[12\],25.02
_05158_,25.01
_09597_,25.005
net7503,25.005
net8718,25.005
_01320_,25
_02513_,25
_06481_,25
_06833_,25
_07213_,25
_07742_,25
_07774_,25
_12702_,25
_13726_,25
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[0\]\[26\],25
net388,25
net2822,25
net6514,25
net9435,25
net11111,25
mprj_io_inp_dis[0],24.99
_09715_,24.985
_06850_,24.98
soc.core.uart_phy_rx_phase\[19\],24.98
net5491,24.98
net5801,24.98
net6890,24.98
net9038,24.98
net11449,24.98
gpio_control_in_2\[4\].gpio_defaults\[2\],24.97
_08911_,24.965
_01327_,24.96
_06837_,24.96
_07684_,24.96
_08123_,24.96
_09132_,24.96
_10611_,24.96
_11783_,24.96
_12432_,24.96
_13164_,24.96
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[4\]\[21\],24.96
soc.core.VexRiscv.RegFilePlugin_regFile\[18\]\[3\],24.96
net5160,24.96
net5623,24.96
_01266_,24.94
_01475_,24.94
_06500_,24.94
_07849_,24.94
_09968_,24.94
soc.core.VexRiscv.IBusCachedPlugin_cache.ways_0_tags\[1\]\[8\],24.94
soc.core.dbg_uart_tx_phase\[19\],24.94
net7914,24.94
net4456,24.925
net5266,24.925
net5796,24.925
net7224,24.925
_00564_,24.92
_00620_,24.92
_00726_,24.92
_01235_,24.92
_01402_,24.92
_14410_,24.92
_15181_,24.92
_15253_,24.92
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[8\]\[1\],24.92
soc.core.VexRiscv.RegFilePlugin_regFile\[28\]\[14\],24.92
soc.core.gpioin4_gpioin4_trigger_d,24.92
soc.core.storage\[4\]\[1\],24.92
soc.core.uart_phy_rx_phase\[21\],24.92
clknet_leaf_309_mgmt_buffers.caravel_clk,24.92
net4267,24.92
net7302,24.92
net11699,24.92
_08841_,24.905
_06544_,24.9
_07980_,24.9
_09320_,24.9
_09821_,24.9
_11818_,24.9
soc.core.mgmtsoc_reload_storage\[10\],24.9
net5720,24.9
net6096,24.9
net10465,24.9
mprj_io_holdover[10],24.89
net5774,24.885
net6623,24.885
_01037_,24.88
_01662_,24.88
_01818_,24.88
_04055_,24.88
_06678_,24.88
_09568_,24.88
_10107_,24.88
gpio_control_in_1a\[4\].shift_register\[6\],24.88
soc.core.VexRiscv.lastStagePc\[12\],24.88
net5251,24.88
net6170,24.88
net9325,24.88
net10706,24.88
net10969,24.88
_14774_,24.85
_10151_,24.845
net5572,24.845
net5608,24.845
net8358,24.845
_00678_,24.84
_00926_,24.84
_01447_,24.84
_01768_,24.84
_04588_,24.84
_05750_,24.84
_07527_,24.84
_07747_,24.84
_11063_,24.84
_12422_,24.84
_14178_,24.84
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[9\]\[19\],24.84
net5555,24.84
_00306_,24.835
gpio_control_in_2\[7\].gpio_vtrip_sel,24.835
_03614_,24.82
_06825_,24.82
soc.core.storage_1\[14\]\[4\],24.82
net4689,24.805
net7663,24.805
_04487_,24.8
_05247_,24.8
_11939_,24.8
_12806_,24.8
_13851_,24.8
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[12\]\[1\],24.8
soc.core.multiregimpl97_regs0,24.8
net60,24.8
clknet_leaf_841_mgmt_buffers.caravel_clk,24.8
net6504,24.8
net9875,24.8
_09903_,24.795
_08275_,24.785
soc.core.mgmtsoc_litespisdrphycore_count\[2\],24.78
soc.core.VexRiscv.DBusSimplePlugin_memoryExceptionPort_payload_badAddr\[19\],24.77
net3467,24.77
_00771_,24.76
_00944_,24.76
_01032_,24.76
_05822_,24.76
_06394_,24.76
_07104_,24.76
_07599_,24.76
gpio_control_in_1\[4\].gpio_defaults\[2\],24.76
gpio_control_in_1\[4\].shift_register\[2\],24.76
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[9\]\[21\],24.76
soc.core.VexRiscv.RegFilePlugin_regFile\[27\]\[9\],24.76
soc.core.VexRiscv.RegFilePlugin_regFile\[8\]\[5\],24.76
net11924,24.76
gpio_control_bidir_2\[0\].gpio_ana_sel,24.755
_05186_,24.75
mprj_io_analog_pol[1],24.75
_00978_,24.74
_02002_,24.74
_06297_,24.74
_08202_,24.74
_09389_,24.74
_13735_,24.74
net3958,24.74
net7747,24.74
mprj_io_ib_mode_sel[15],24.73
_08305_,24.725
net9037,24.725
_02193_,24.72
_04019_,24.72
_04960_,24.72
_06759_,24.72
_08627_,24.72
_10800_,24.72
_15025_,24.72
net397,24.72
_08510_,24.715
_03159_,24.7
_03574_,24.7
_04556_,24.7
_07786_,24.7
soc.core.dbg_uart_rx_phase\[30\],24.7
gpio_control_in_2\[9\].gpio_defaults\[3\],24.69
_15031_,24.68
net5379,24.665
_00041_,24.66
_03609_,24.66
_06030_,24.66
_06658_,24.66
_06864_,24.66
_07830_,24.66
_08107_,24.66
_09484_,24.66
net3473,24.66
net4845,24.66
net5609,24.66
net7472,24.66
net8749,24.66
net9409,24.66
net12939,24.66
net10399,24.655
net5132,24.645
net8474,24.645
_01049_,24.64
net5291,24.64
net6775,24.64
_03124_,24.62
_05814_,24.62
_06031_,24.62
_06808_,24.62
_07606_,24.62
_08308_,24.62
_09349_,24.62
soc.core.storage\[5\]\[4\],24.62
net3954,24.62
net8298,24.62
net3437,24.605
_00675_,24.6
_02989_,24.6
_06562_,24.6
_06673_,24.6
_08957_,24.6
_09865_,24.6
_14941_,24.6
gpio_control_in_2\[7\].gpio_ib_mode_sel,24.6
soc.core.VexRiscv.RegFilePlugin_regFile\[31\]\[9\],24.6
net5728,24.6
net7254,24.6
_10175_,24.585
net10190,24.585
_04192_,24.58
_04393_,24.58
_05494_,24.58
_06415_,24.58
_06885_,24.58
_08569_,24.58
_09302_,24.58
_09426_,24.58
soc.core.VexRiscv.CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr\[18\],24.58
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[7\]\[22\],24.58
soc.core.mgmtsoc_load_storage\[18\],24.58
soc.core.mgmtsoc_value_status\[19\],24.58
soc.core.storage_1\[9\]\[0\],24.58
clknet_leaf_812_mgmt_buffers.caravel_clk,24.58
net3638,24.58
net6040,24.58
_07800_,24.56
_13130_,24.56
_13319_,24.56
_13445_,24.56
_13804_,24.56
net12654,24.56
_00226_,24.54
_00784_,24.54
_01256_,24.54
_06702_,24.54
_07634_,24.54
_08570_,24.54
_08676_,24.54
soc.core.multiregimpl65_regs1,24.54
soc.core.storage\[11\]\[0\],24.54
net5182,24.54
net7565,24.54
net7707,24.54
net9484,24.54
net11846,24.54
mprj_io_analog_pol[17],24.53
mprj_io_holdover[22],24.53
mprj_io_slow_sel[16],24.53
mprj_io_vtrip_sel[23],24.53
_07212_,24.525
_04316_,24.52
_08249_,24.52
_10949_,24.52
_12975_,24.52
_13956_,24.52
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[6\]\[10\],24.52
soc.core.mgmtsoc_litespisdrphycore_cnt\[1\],24.52
net9486,24.52
_00052_,24.5
_00739_,24.5
_01686_,24.5
_06200_,24.5
_09796_,24.5
_09849_,24.5
soc.core.mgmtsoc_vexriscv_i_cmd_payload_data\[23\],24.5
soc.core.spi_master_miso\[5\],24.5
soc.core.uart_phy_tx_data_rs232phy_rs232phytx_next_value2\[6\],24.5
clknet_leaf_837_mgmt_buffers.caravel_clk,24.5
net5645,24.5
net7197,24.5
net7237,24.5
net12821,24.5
net12968,24.5
_12985_,24.485
_01694_,24.48
_05132_,24.48
_10202_,24.48
_14257_,24.48
_14262_,24.48
net6387,24.48
net7396,24.48
net12247,24.48
_05262_,24.47
_07222_,24.465
_06525_,24.46
_08247_,24.46
_10249_,24.46
_11371_,24.46
_13875_,24.46
soc.core.VexRiscv.execute_to_memory_INSTRUCTION\[12\],24.46
net8923,24.46
net10449,24.455
_02748_,24.44
_12813_,24.44
soc.core.VexRiscv.IBusCachedPlugin_cache._zz_banks_0_port1\[25\],24.44
soc.core.gpioin1_pending_r,24.44
net7870,24.44
_07013_,24.425
_10171_,24.425
net6263,24.425
net7580,24.425
net7909,24.425
net8429,24.425
net8995,24.425
_00793_,24.42
_02495_,24.42
_02906_,24.42
_02923_,24.42
_07156_,24.42
_07409_,24.42
_08265_,24.42
_08844_,24.42
_08960_,24.42
_09926_,24.42
_10173_,24.42
gpio_control_in_1a\[3\].gpio_vtrip_sel,24.42
mgmt_buffers.mprj_adr_o_core\[11\],24.42
soc.core.VexRiscv.RegFilePlugin_regFile\[22\]\[3\],24.42
clknet_leaf_566_mgmt_buffers.caravel_clk,24.42
net3505,24.42
net8355,24.42
net11971,24.42
net10571,24.415
net8088,24.405
_02355_,24.4
_07563_,24.4
gpio_control_in_1\[0\].gpio_ib_mode_sel,24.4
soc.core.VexRiscv.RegFilePlugin_regFile\[19\]\[27\],24.4
net5267,24.4
net7805,24.385
_00603_,24.38
_00930_,24.38
_01881_,24.38
_03022_,24.38
_04037_,24.38
_05532_,24.38
_06315_,24.38
_06738_,24.38
_09764_,24.38
_13066_,24.38
gpio_control_bidir_1\[0\].gpio_holdover,24.38
soc.core.interface0_bank_bus_dat_r\[29\],24.38
clknet_leaf_469_mgmt_buffers.caravel_clk,24.38
net9306,24.38
net11752,24.38
net2670,24.38
_00447_,24.36
_02171_,24.36
_06795_,24.36
soc.core.uart_tx_fifo_consume\[0\],24.36
_10106_,24.345
net5792,24.345
_03068_,24.34
_12314_,24.34
_14515_,24.34
_14625_,24.34
net394,24.34
clknet_leaf_150_mgmt_buffers.caravel_clk,24.34
mprj_io_oeb[16],24.33
_09043_,24.325
_01355_,24.32
_01716_,24.32
_02232_,24.32
_02323_,24.32
_09937_,24.32
soc.core.storage\[5\]\[7\],24.32
net8541,24.32
_08353_,24.305
_00528_,24.3
_08319_,24.3
_10746_,24.3
_12863_,24.3
_14197_,24.3
soc.core.count\[4\],24.3
net2815,24.3
net3440,24.3
net10033,24.3
gpio_control_in_2\[9\].gpio_ana_pol,24.295
net9797,24.295
net12220,24.295
net5715,24.285
net7416,24.28
net9317,24.28
net10286,24.28
net12238,24.28
_08310_,24.265
_01967_,24.26
_06578_,24.26
_07983_,24.26
_10433_,24.26
_14521_,24.26
net84,24.26
clknet_leaf_332_mgmt_buffers.caravel_clk,24.26
net5517,24.26
net6385,24.26
net7874,24.26
net9461,24.26
mprj_io_analog_pol[26],24.25
_00191_,24.24
_04081_,24.24
_05586_,24.24
_12029_,24.24
net7500,24.24
net11677,24.24
_05468_,24.23
net5019,24.225
net5421,24.225
_00851_,24.22
soc.core.VexRiscv.RegFilePlugin_regFile\[30\]\[6\],24.22
net7313,24.22
net11089,24.22
mprj_io_ib_mode_sel[8],24.21
mprj_io_slow_sel[2],24.21
mprj_io_vtrip_sel[4],24.21
net9968,24.21
_08288_,24.205
_09705_,24.205
net5937,24.205
_03235_,24.2
_06736_,24.2
_06882_,24.2
_07933_,24.2
_09346_,24.2
_09575_,24.2
_10088_,24.2
_11121_,24.2
soc.core.VexRiscv.BranchPlugin_branchExceptionPort_payload_badAddr\[14\],24.2
net5753,24.2
net8582,24.2
_01337_,24.18
_01954_,24.18
_09392_,24.18
_12671_,24.18
soc.core.VexRiscv.RegFilePlugin_regFile\[23\]\[4\],24.18
_08201_,24.165
net9010,24.165
_00731_,24.16
_00828_,24.16
_05710_,24.16
_06436_,24.16
_10328_,24.16
_10588_,24.16
soc.core.storage\[8\]\[1\],24.16
net345,24.16
net3461,24.16
net5854,24.16
net12985,24.16
_07236_,24.145
net7057,24.145
_05584_,24.14
_07043_,24.14
_12827_,24.14
_13348_,24.14
_14927_,24.14
soc.core.multiregimpl20_regs0,24.14
net61,24.14
clknet_leaf_168_mgmt_buffers.caravel_clk,24.14
net7848,24.14
net9632,24.14
net9800,24.14
net8381,24.135
net3147,24.125
net7232,24.125
_02065_,24.12
_04513_,24.12
_06507_,24.12
_06603_,24.12
_09579_,24.12
_11774_,24.12
_14691_,24.12
net11433,24.12
net12416,24.12
_06487_,24.1
_09784_,24.1
_13839_,24.1
_15166_,24.1
net11563,24.1
net11625,24.1
_09201_,24.095
net8070,24.085
_03069_,24.08
_04411_,24.08
_06370_,24.08
_06416_,24.08
_07552_,24.08
_09419_,24.08
_10153_,24.08
_11367_,24.08
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[4\]\[8\],24.08
soc.core.interface0_bank_bus_dat_r\[22\],24.08
net223,24.08
net4465,24.08
net6423,24.08
net11605,24.08
_05308_,24.07
_01826_,24.06
_08550_,24.06
soc.core.dbg_uart_rx_phase\[7\],24.06
net7872,24.06
net10255,24.06
net10778,24.06
net10657,24.055
mprj_io_analog_pol[20],24.05
net10090,24.05
net3725,24.045
net9198,24.045
_02698_,24.04
_04983_,24.04
_06796_,24.04
_07394_,24.04
_07827_,24.04
_08795_,24.04
_08970_,24.04
_09501_,24.04
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[15\]\[15\],24.04
soc.core.VexRiscv.IBusCachedPlugin_cache.decodeStage_mmuRsp_physicalAddress\[3\],24.04
net6337,24.04
net11620,24.04
_02418_,24.02
_04173_,24.02
_08207_,24.02
_09410_,24.02
net6741,24.02
net7947,24.02
net10540,24.02
net6827,24.005
_02540_,24
_02949_,24
_10843_,24
_13392_,24
_14792_,24
soc.core.mgmtsoc_litespisdrphycore_posedge_reg,24
net12142,24
net12155,24
net12870,24
net12940,24
net8534,23.995
_05206_,23.99
_07308_,23.985
_01094_,23.98
_06980_,23.98
_07700_,23.98
_08723_,23.98
_09830_,23.98
_10974_,23.98
_15188_,23.98
net7784,23.98
net6344,23.975
_05324_,23.97
net6688,23.965
net6737,23.965
net9579,23.965
_02479_,23.96
_04103_,23.96
_07226_,23.96
_07388_,23.96
_08430_,23.96
_08966_,23.96
_09891_,23.96
_10080_,23.96
_10751_,23.96
_12035_,23.96
_12803_,23.96
_15211_,23.96
net3082,23.96
net8704,23.96
net10729,23.96
net12707,23.96
_12272_,23.945
mgmt_buffers.la_data_in_mprj\[36\],23.945
_00507_,23.94
_01151_,23.94
_04481_,23.94
_08731_,23.94
_08861_,23.94
_11354_,23.94
_12320_,23.94
_13040_,23.94
gpio_control_in_1\[5\].gpio_slow_sel,23.94
gpio_control_in_2\[9\].shift_register\[8\],23.94
net5375,23.94
net7834,23.94
net8332,23.94
_09842_,23.925
net10562,23.925
_02062_,23.92
_04023_,23.92
_05728_,23.92
_06058_,23.92
_13948_,23.92
_14495_,23.92
soc.core.count\[13\],23.92
net262,23.92
net2944,23.92
net6586,23.92
net6996,23.92
net7242,23.92
net7488,23.92
net8200,23.92
net8535,23.92
net10260,23.92
_05292_,23.91
net6548,23.91
_09276_,23.905
net8006,23.905
net8468,23.905
net8743,23.905
_02735_,23.9
_02882_,23.9
_07728_,23.9
gpio_control_bidir_1\[1\].shift_register\[1\],23.9
net12336,23.9
mprj_io_analog_en[14],23.89
net3209,23.885
net10351,23.885
net11182,23.885
_02405_,23.88
_04178_,23.88
_05137_,23.88
_05177_,23.88
_05473_,23.88
_07051_,23.88
_11623_,23.88
_12261_,23.88
_13144_,23.88
soc.core.VexRiscv.IBusCachedPlugin_cache._zz_banks_0_port1\[7\],23.88
soc.core.dbg_uart_rx_phase\[11\],23.88
clknet_leaf_885_mgmt_buffers.caravel_clk,23.88
net5867,23.88
mprj_io_slow_sel[0],23.87
_02110_,23.86
_02137_,23.86
_02956_,23.86
pll.pll_control.prep\[1\],23.86
soc.core.VexRiscv.RegFilePlugin_regFile\[21\]\[15\],23.86
net5475,23.86
net7609,23.86
gpio_control_in_2\[8\].gpio_vtrip_sel,23.855
_05648_,23.85
mprj_io_analog_en[22],23.85
mprj_io_holdover[25],23.85
mprj_io_inp_dis[21],23.85
net7961,23.845
_01883_,23.84
_05776_,23.84
_10394_,23.84
gpio_control_in_1a\[0\].shift_register\[2\],23.84
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[11\]\[19\],23.84
soc.core.VexRiscv.RegFilePlugin_regFile\[29\]\[8\],23.84
soc.core.VexRiscv.lastStagePc\[28\],23.84
net3078,23.84
net4008,23.835
_00465_,23.82
_08274_,23.82
_08276_,23.82
gpio_control_in_1a\[2\].gpio_ana_pol,23.82
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[2\]\[17\],23.82
soc.core.VexRiscv.IBusCachedPlugin_cache.io_cpu_fill_valid,23.82
net5058,23.82
net8058,23.805
net9164,23.805
_00989_,23.8
_02112_,23.8
_04097_,23.8
_06789_,23.8
_07407_,23.8
_08625_,23.8
_15212_,23.8
net56,23.8
net5140,23.8
net9482,23.8
gpio_control_in_1\[4\].gpio_defaults\[9\],23.79
net9665,23.785
_00993_,23.78
_02465_,23.78
_04540_,23.78
_13393_,23.78
net59,23.78
net3381,23.78
net6952,23.78
net7334,23.78
net7892,23.78
net7950,23.78
net8432,23.78
net6326,23.765
_01145_,23.76
_08946_,23.76
net8594,23.745
_06425_,23.74
_09534_,23.74
_09569_,23.74
_10592_,23.74
soc.core.VexRiscv.RegFilePlugin_regFile\[7\]\[30\],23.74
soc.core.gpioin3_pending_re,23.74
soc.core.storage_1\[7\]\[2\],23.74
net2601,23.74
_13953_,23.73
net10241,23.725
_11088_,23.72
_14550_,23.72
net3875,23.72
mprj_io_ib_mode_sel[23],23.71
mprj_io_inp_dis[24],23.71
_01202_,23.7
_05462_,23.7
_06866_,23.7
_07354_,23.7
_13062_,23.7
soc.core.mgmtsoc_vexriscv_i_cmd_payload_data\[30\],23.7
soc.core.storage\[1\]\[2\],23.7
net12367,23.7
net12938,23.7
_05370_,23.69
soc.core.VexRiscv.DBusSimplePlugin_memoryExceptionPort_payload_badAddr\[22\],23.68
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[11\]\[17\],23.68
soc.core.storage_1\[6\]\[0\],23.68
net4183,23.68
_11560_,23.67
net12460,23.67
net4603,23.665
net5788,23.665
_00190_,23.66
_00517_,23.66
_06423_,23.66
_08012_,23.66
_09334_,23.66
_11002_,23.66
_13646_,23.66
pll.ringosc.iss.d2,23.66
soc.core.VexRiscv.CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr\[7\],23.66
net150,23.66
clknet_leaf_440_mgmt_buffers.caravel_clk,23.66
net5662,23.66
net7924,23.66
net8061,23.66
net5659,23.655
mprj_io_holdover[24],23.65
_09644_,23.645
_03624_,23.64
_08551_,23.64
soc.core.VexRiscv.BranchPlugin_branchExceptionPort_payload_badAddr\[25\],23.64
net4127,23.64
_00795_,23.62
_01542_,23.62
_06211_,23.62
_06851_,23.62
_07659_,23.62
soc.core.spi_master_cs_storage\[7\],23.62
net6425,23.62
net10565,23.62
net12805,23.62
net10668,23.615
_05276_,23.61
net9613,23.61
net9888,23.61
net6647,23.605
_00618_,23.6
_04458_,23.6
_06417_,23.6
_07936_,23.6
_11494_,23.6
_14414_,23.585
net8331,23.585
_00552_,23.58
_03493_,23.58
_06459_,23.58
_06510_,23.58
_07937_,23.58
_08579_,23.58
_10499_,23.58
soc.core.VexRiscv.RegFilePlugin_regFile\[8\]\[25\],23.58
clknet_leaf_299_mgmt_buffers.caravel_clk,23.58
net2911,23.58
net3449,23.58
net4746,23.58
net8871,23.58
net12982,23.58
net10313,23.575
net7768,23.565
_03115_,23.56
_07387_,23.56
_09950_,23.56
_12921_,23.56
_13216_,23.56
gpio_control_in_2\[7\].gpio_ana_pol,23.56
soc.core.VexRiscv.DebugPlugin_busReadDataReg\[0\],23.56
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[3\]\[10\],23.56
net6171,23.56
net7489,23.56
_09125_,23.555
_01060_,23.54
_02075_,23.54
_04519_,23.54
_07381_,23.54
_07724_,23.54
_07789_,23.54
_09469_,23.54
_09834_,23.54
_12701_,23.54
_14447_,23.54
gpio_control_in_2\[7\].pad_gpio_out,23.54
soc.core.VexRiscv.lastStagePc\[22\],23.54
net4354,23.54
net9419,23.54
mprj_io_holdover[4],23.53
mprj_io_vtrip_sel[7],23.53
_08845_,23.525
_07539_,23.52
_13471_,23.52
_15300_,23.52
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[1\]\[20\],23.52
soc.core.VexRiscv.IBusCachedPlugin_cache.decodeStage_mmuRsp_physicalAddress\[31\],23.52
soc.core.multiregimpl89_regs0,23.52
net75,23.52
_11709_,23.505
net4426,23.505
net6651,23.505
_07288_,23.5
_07716_,23.5
_09131_,23.5
_09460_,23.5
_09930_,23.5
_10076_,23.5
_14627_,23.5
soc.core.VexRiscv.IBusCachedPlugin_cache.io_cpu_prefetch_pc\[25\],23.5
soc.core.VexRiscv.memory_to_writeBack_REGFILE_WRITE_DATA\[13\],23.5
net10828,23.5
net12337,23.5
_09433_,23.48
_10224_,23.48
net1322,23.48
soc.core.storage\[10\]\[1\],23.465
_00720_,23.46
_02982_,23.46
_03214_,23.46
_04161_,23.46
_07264_,23.46
_07541_,23.46
_09288_,23.46
_14378_,23.46
_14994_,23.46
soc.core.interface3_bank_bus_dat_r\[22\],23.46
soc.core.uart_rx_fifo_produce\[3\],23.46
net106,23.46
net6765,23.46
net7745,23.46
net7202,23.455
_05214_,23.45
net4867,23.445
_01008_,23.44
_04127_,23.44
_04324_,23.44
_05686_,23.44
soc.core.mgmtsoc_bus_errors\[22\],23.44
net8626,23.44
net7823,23.425
net8834,23.425
net10772,23.425
_01606_,23.42
_02313_,23.42
_08004_,23.42
_08093_,23.42
_08950_,23.42
_09624_,23.42
_09655_,23.42
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[9\]\[24\],23.42
net385,23.42
net3049,23.42
_02155_,23.4
_02868_,23.4
_13799_,23.4
gpio_control_in_1a\[3\].gpio_ana_pol,23.4
gpio_control_in_1a\[5\].gpio_ib_mode_sel,23.4
net6100,23.4
net2649,23.4
_08933_,23.385
net6223,23.385
_00956_,23.38
_02079_,23.38
_02520_,23.38
_03137_,23.38
_07494_,23.38
soc.core.VexRiscv.RegFilePlugin_regFile\[7\]\[6\],23.38
net4153,23.38
net2622,23.38
gpio_control_in_2\[3\].gpio_slow_sel,23.375
net10639,23.365
_07299_,23.36
_14218_,23.36
net285,23.36
net10633,23.345
_01968_,23.34
_05113_,23.34
_08506_,23.34
_08748_,23.34
_09882_,23.34
_15329_,23.34
soc.core.mgmtsoc_bus_errors\[15\],23.34
net9151,23.34
net9626,23.34
net10444,23.33
_02725_,23.32
_06321_,23.32
soc.core.VexRiscv.RegFilePlugin_regFile\[18\]\[27\],23.32
net8627,23.305
_00600_,23.3
_11614_,23.3
net9565,23.3
_08313_,23.285
net5723,23.285
_01113_,23.28
_06583_,23.28
_06586_,23.28
_06960_,23.28
_08379_,23.28
soc.core.VexRiscv.RegFilePlugin_regFile\[6\]\[5\],23.28
soc.core.mgmtsoc_master_rx_fifo_source_payload_data\[15\],23.28
soc.core.storage\[5\]\[5\],23.28
net6495,23.28
_09768_,23.265
_00217_,23.26
_09856_,23.26
_14754_,23.26
gpio_control_in_1a\[0\].shift_register\[9\],23.26
net6284,23.26
net9053,23.255
net6619,23.245
_06256_,23.24
_09463_,23.24
_13816_,23.24
soc.core.VexRiscv._zz_execute_to_memory_REGFILE_WRITE_DATA\[28\],23.24
soc.core.mgmtsoc_master_rx_fifo_source_payload_data\[13\],23.24
soc.core.storage_1\[4\]\[0\],23.24
clknet_leaf_272_mgmt_buffers.caravel_clk,23.24
net12980,23.24
_08737_,23.225
_00058_,23.22
_05454_,23.22
_06773_,23.22
_07985_,23.22
_11363_,23.22
net11098,23.22
net10543,23.215
_13291_,23.21
mprj_io_analog_pol[16],23.21
net5992,23.205
net6670,23.205
_06841_,23.2
_07679_,23.2
_07711_,23.2
_09586_,23.2
_14452_,23.2
gpio_control_in_1\[0\].gpio_outenb,23.2
mgmt_buffers.la_data_in_mprj_bar\[27\],23.2
soc.core.VexRiscv.RegFilePlugin_regFile\[4\]\[13\],23.2
soc.core.VexRiscv.when_DebugPlugin_l264_1,23.2
net383,23.2
net6216,23.2
net12429,23.2
net12973,23.2
_05382_,23.19
_07317_,23.185
_08439_,23.185
_10109_,23.185
_07107_,23.18
soc.core.storage\[8\]\[0\],23.18
net12531,23.18
_11823_,23.175
net10303,23.175
mprj_io_analog_en[15],23.17
mprj_io_analog_en[24],23.17
mprj_io_inp_dis[23],23.17
net10298,23.165
_00834_,23.16
_01613_,23.16
_04084_,23.16
_05030_,23.16
_06467_,23.16
_10863_,23.16
_13820_,23.16
net5694,23.16
net7311,23.16
net9288,23.16
net12230,23.16
_09147_,23.14
_09635_,23.14
_12767_,23.14
_13824_,23.14
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[12\]\[16\],23.14
clknet_leaf_1104_mgmt_buffers.caravel_clk,23.14
net6159,23.14
net9778,23.135
_05466_,23.13
net12400,23.125
_00278_,23.12
_00525_,23.12
_01996_,23.12
_03419_,23.12
_06723_,23.12
_07372_,23.12
_09502_,23.12
_10225_,23.12
_10473_,23.12
_11100_,23.12
_15249_,23.12
soc.core.VexRiscv.IBusCachedPlugin_cache._zz_banks_0_port1\[8\],23.12
soc.core.mgmtsoc_master_rx_fifo_source_payload_data\[24\],23.12
net2857,23.12
net12256,23.12
net12646,23.12
soc.core.VexRiscv.CsrPlugin_mstatus_MPP\[1\],23.11
_08614_,23.105
_02980_,23.1
_06579_,23.1
_07566_,23.1
_07920_,23.1
soc.core.VexRiscv.memory_arbitration_isValid,23.1
net6957,23.095
_04925_,23.09
_08428_,23.085
_09262_,23.085
_00743_,23.08
_06526_,23.08
_06999_,23.08
_07029_,23.08
_07117_,23.08
_09812_,23.08
_10816_,23.08
_11531_,23.08
_12660_,23.08
_13394_,23.08
soc.core.mgmtsoc_bus_errors\[21\],23.08
soc.core.multiregimpl2_regs0,23.08
net350,23.08
clknet_leaf_108_mgmt_buffers.caravel_clk,23.08
clknet_leaf_133_mgmt_buffers.caravel_clk,23.08
net3106,23.08
net3925,23.08
net6234,23.08
net7577,23.08
net12062,23.08
mgmt_buffers.la_data_in_mprj\[75\],23.075
net7035,23.075
_10199_,23.06
_10310_,23.06
_10834_,23.06
_11811_,23.06
net4755,23.06
net5989,23.045
net7271,23.045
net8605,23.045
net8987,23.045
_00036_,23.04
_00801_,23.04
_00841_,23.04
_02572_,23.04
_02983_,23.04
_08696_,23.04
_09407_,23.04
_09727_,23.04
_10073_,23.04
_14945_,23.04
_15049_,23.04
net4325,23.04
net7225,23.04
net12866,23.04
net3488,23.025
_10364_,23.02
_12208_,23.02
_12445_,23.02
clknet_leaf_495_mgmt_buffers.caravel_clk,23.02
net8133,23.02
_05288_,23.01
net3833,23.005
_00918_,23
_01157_,23
_02131_,23
_04122_,23
_06036_,23
_06831_,23
_10917_,23
net5668,23
net6880,23
net8647,23
net11032,23
net12013,23
net12384,23
gpio_control_bidir_2\[1\].gpio_slow_sel,22.995
net9390,22.995
_01105_,22.98
_01559_,22.98
_05486_,22.98
_10128_,22.98
_14396_,22.98
_14509_,22.98
net8069,22.98
net8586,22.98
net5761,22.965
net6715,22.965
_00311_,22.96
_11436_,22.96
_13996_,22.96
_15337_,22.96
clknet_leaf_419_mgmt_buffers.caravel_clk,22.96
net6011,22.96
net11702,22.96
gpio_control_in_2\[0\].gpio_ana_sel,22.955
mprj_io_analog_pol[19],22.95
net7726,22.945
_01089_,22.94
gpio_control_in_2\[9\].shift_register\[7\],22.94
net5102,22.94
net7814,22.94
net8206,22.94
_07028_,22.925
_08788_,22.92
_10113_,22.92
_10520_,22.92
_12996_,22.92
_14532_,22.92
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[13\]\[14\],22.92
soc.core.VexRiscv._zz_CsrPlugin_csrMapping_readDataInit\[28\],22.92
clknet_leaf_937_mgmt_buffers.caravel_clk,22.92
net6131,22.92
net9318,22.92
net6167,22.905
_02684_,22.9
_08877_,22.9
_09541_,22.9
_13585_,22.9
_14596_,22.9
gpio_control_in_1\[0\].shift_register\[1\],22.9
soc.core.uart_rx_fifo_consume\[0\],22.9
net244,22.9
net6404,22.9
net6801,22.9
net8312,22.9
net6097,22.885
_02512_,22.88
_05495_,22.88
_09324_,22.88
_12057_,22.88
_13305_,22.88
_13316_,22.88
_13697_,22.88
_15052_,22.88
_15313_,22.88
soc.core.VexRiscv.RegFilePlugin_regFile\[26\]\[3\],22.88
net6682,22.88
net9774,22.88
net11267,22.88
net11354,22.88
_08368_,22.865
net8670,22.865
_00715_,22.86
_00773_,22.86
_02088_,22.86
_02842_,22.86
_06870_,22.86
_14548_,22.86
_14983_,22.86
soc.core.VexRiscv.RegFilePlugin_regFile\[28\]\[15\],22.86
net4430,22.86
net4485,22.86
net4950,22.86
net9430,22.86
mprj_io_inp_dis[8],22.85
net7297,22.845
_00910_,22.84
_01801_,22.84
_01939_,22.84
_04605_,22.84
_15092_,22.84
soc.core.mgmtsoc_value_status\[26\],22.84
net6942,22.84
net9823,22.84
_12270_,22.83
mprj_io_analog_sel[24],22.83
mprj_io_slow_sel[19],22.83
net9585,22.83
_10387_,22.825
_12471_,22.82
pll.ringosc.dstage\[11\].id.ts,22.82
soc.core.VexRiscv.RegFilePlugin_regFile\[8\]\[6\],22.82
soc.core.VexRiscv.lastStagePc\[4\],22.82
net3586,22.82
net6678,22.82
net11141,22.82
_00499_,22.8
_00577_,22.8
_00782_,22.8
_06553_,22.8
_07123_,22.8
_08983_,22.8
_14529_,22.8
_15011_,22.8
net4015,22.8
net4847,22.8
net9397,22.8
net12054,22.8
net8619,22.795
_05740_,22.79
_08442_,22.785
net6781,22.785
net7931,22.785
_00966_,22.78
_04570_,22.78
_06576_,22.78
_11469_,22.78
soc.core.VexRiscv.DebugPlugin_debugUsed,22.78
soc.core.rs232phy_rs232phyrx_state,22.78
net7926,22.78
net8016,22.78
net10027,22.78
_06748_,22.76
_07355_,22.76
_09455_,22.76
_09994_,22.76
_11095_,22.76
_12627_,22.76
soc.core.VexRiscv.RegFilePlugin_regFile\[24\]\[12\],22.76
net7932,22.76
net8010,22.755
_01717_,22.74
_04070_,22.74
_06233_,22.74
_07019_,22.74
_07806_,22.74
_07879_,22.74
_08010_,22.74
_08155_,22.74
soc.core.la_ien_storage\[15\],22.74
net351,22.74
net3577,22.74
net4918,22.74
_01118_,22.72
_07370_,22.72
_15318_,22.72
_15328_,22.72
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[8\]\[0\],22.72
soc.core.VexRiscv.RegFilePlugin_regFile\[23\]\[12\],22.72
net5088,22.72
net10185,22.72
_05102_,22.71
net6985,22.705
net7123,22.705
net7467,22.705
_00923_,22.7
_08693_,22.7
_09344_,22.7
soc.core.VexRiscv.RegFilePlugin_regFile\[23\]\[15\],22.7
soc.core.storage_1\[12\]\[4\],22.7
net392,22.7
net6636,22.7
net9748,22.7
net12201,22.7
net12643,22.7
net12671,22.7
_00633_,22.68
_04632_,22.68
_12650_,22.68
_13587_,22.68
soc.core.VexRiscv.IBusCachedPlugin_cache.ways_0_tags\[1\]\[11\],22.68
net8024,22.68
mprj_io_ib_mode_sel[1],22.67
_09607_,22.665
net7305,22.665
_04216_,22.66
_05705_,22.66
_06635_,22.66
_09640_,22.66
_09828_,22.66
_10344_,22.66
_12812_,22.66
_13730_,22.66
pll.itrim\[22\],22.66
soc.core.VexRiscv._zz_execute_SRC2\[28\],22.66
soc.core.VexRiscv.execute_LightShifterPlugin_amplitudeReg\[2\],22.66
clknet_leaf_1101_mgmt_buffers.caravel_clk,22.66
net5324,22.66
net5764,22.66
net9018,22.66
net11627,22.66
net12860,22.66
net6672,22.655
net5085,22.645
_07502_,22.64
_09254_,22.64
_10970_,22.64
_11099_,22.64
soc.core.VexRiscv.RegFilePlugin_regFile\[11\]\[6\],22.64
soc.core.VexRiscv.RegFilePlugin_regFile\[7\]\[27\],22.64
net4894,22.64
net6841,22.64
net7529,22.64
_05210_,22.63
_08525_,22.625
net5100,22.625
_06015_,22.62
_08801_,22.62
_09477_,22.62
_12974_,22.62
_13541_,22.62
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[12\]\[29\],22.62
soc.core.mgmtsoc_litespisdrphycore_sr_cnt_litespiphy_next_value\[0\],22.62
clknet_leaf_187_mgmt_buffers.caravel_clk,22.62
net6720,22.62
net10349,22.62
net12981,22.62
_05238_,22.61
_00735_,22.6
_01065_,22.6
_07475_,22.6
_07681_,22.6
_07861_,22.6
net9570,22.6
net12463,22.6
net7972,22.585
net8035,22.585
net10054,22.585
net11132,22.585
_00998_,22.58
_02482_,22.58
_05253_,22.58
_07683_,22.58
_07867_,22.58
_08802_,22.58
_09100_,22.58
_09476_,22.58
_09588_,22.58
_10231_,22.58
soc.core.VexRiscv._zz_CsrPlugin_csrMapping_readDataInit\[10\],22.58
soc.core.storage_1\[2\]\[1\],22.58
net4179,22.58
net4190,22.58
_00892_,22.56
_03495_,22.56
_04129_,22.56
_12006_,22.56
_12166_,22.56
_14402_,22.56
net7397,22.56
net4795,22.545
net7875,22.545
_00531_,22.54
_01011_,22.54
_02341_,22.54
_08347_,22.54
_10482_,22.54
_11511_,22.54
_13512_,22.54
_15144_,22.54
soc.core.VexRiscv.CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr\[17\],22.54
soc.core.uart_rx_fifo_consume\[3\],22.54
clknet_leaf_404_mgmt_buffers.caravel_clk,22.54
net5498,22.54
net6013,22.54
net6121,22.54
net9682,22.54
net12402,22.54
_05160_,22.53
_08879_,22.525
_00561_,22.52
_04472_,22.52
_06686_,22.52
gpio_control_in_1\[2\].gpio_ana_pol,22.52
soc.core.VexRiscv._zz_CsrPlugin_csrMapping_readDataInit\[20\],22.52
net4511,22.52
net12076,22.52
_11651_,22.51
_13146_,22.51
_05081_,22.5
_07904_,22.5
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[15\]\[6\],22.5
net5987,22.5
net10040,22.5
net11647,22.5
gpio_control_in_2\[3\].gpio_ana_en,22.495
mprj_io_analog_pol[15],22.49
mprj_io_analog_sel[14],22.49
net5947,22.49
net10838,22.49
net5207,22.485
net6281,22.485
_02047_,22.48
_08552_,22.48
net3184,22.48
net5406,22.48
net8044,22.48
net12215,22.48
_12002_,22.465
net7544,22.465
_04555_,22.46
_05992_,22.46
_13176_,22.46
_13463_,22.46
_13871_,22.46
_15229_,22.46
net7383,22.46
_00906_,22.44
_02220_,22.44
_10495_,22.44
soc.core.mgmtsoc_litespisdrphycore_count\[3\],22.44
net9408,22.44
_00156_,22.42
_01816_,22.42
_02793_,22.42
_02928_,22.42
_05447_,22.42
_07766_,22.42
_07832_,22.42
_12933_,22.42
_14544_,22.42
_15062_,22.42
_15101_,22.42
net8364,22.42
net10289,22.415
_08932_,22.405
_00867_,22.4
_00875_,22.4
_01603_,22.4
_07637_,22.4
_08086_,22.4
_10622_,22.4
soc.core.storage\[9\]\[1\],22.4
soc.core.storage_1\[6\]\[2\],22.4
net6796,22.4
net7136,22.4
net7699,22.4
net11610,22.4
_08842_,22.385
net5173,22.385
_13940_,22.38
gpio_control_bidir_2\[1\].gpio_ana_pol,22.375
gpio_control_in_1a\[3\].gpio_outenb,22.375
net6183,22.365
net7003,22.365
_00471_,22.36
_01147_,22.36
_01229_,22.36
_02084_,22.36
_06469_,22.36
_06981_,22.36
_07685_,22.36
_07734_,22.36
soc.core.VexRiscv.CsrPlugin_exceptionPendings_0,22.36
soc.core.VexRiscv.dBusWishbone_DAT_MOSI\[11\],22.36
soc.core.mgmtsoc_litespimmap_count\[7\],22.36
net62,22.36
net3765,22.36
net7622,22.36
net8033,22.36
net8386,22.36
net2629,22.36
net5893,22.345
_01005_,22.34
_02993_,22.34
_03556_,22.34
_05575_,22.34
_07924_,22.34
_11047_,22.34
_15180_,22.34
soc.core.mgmtsoc_value_status\[14\],22.34
net6632,22.34
net7719,22.34
net11758,22.34
net5313,22.335
net8424,22.325
net10332,22.325
_01566_,22.32
_03061_,22.32
_05043_,22.32
_05678_,22.32
_05714_,22.32
_07224_,22.32
_07335_,22.32
_09118_,22.32
_09495_,22.32
_13511_,22.32
_14461_,22.32
gpio_control_in_2\[4\].gpio_slow_sel,22.32
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[7\]\[7\],22.32
net348,22.32
net6270,22.32
net6856,22.32
_05392_,22.31
_10043_,22.305
net8276,22.305
_05196_,22.3
_07668_,22.3
_11066_,22.3
_13099_,22.3
_00141_,22.295
_09769_,22.285
_04013_,22.28
_06654_,22.28
_07548_,22.28
_11134_,22.28
_13351_,22.28
_14605_,22.28
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[6\]\[22\],22.28
soc.core.VexRiscv.RegFilePlugin_regFile\[14\]\[3\],22.28
soc.core.count\[12\],22.28
net11207,22.28
net11711,22.28
net6362,22.265
_02790_,22.26
_08256_,22.26
_11419_,22.26
_12611_,22.26
_12831_,22.26
soc.core.VexRiscv.dBusWishbone_DAT_MOSI\[24\],22.26
net4254,22.26
gpio_control_bidir_2\[0\].gpio_defaults\[8\],22.25
gpio_control_in_1\[5\].gpio_defaults\[8\],22.25
net4657,22.245
net8457,22.245
_04134_,22.24
_06883_,22.24
_09134_,22.24
_09368_,22.24
_10763_,22.24
_13437_,22.24
soc.core.VexRiscv.dBusWishbone_DAT_MOSI\[20\],22.24
soc.core.multiregimpl59_regs1,22.24
net4203,22.24
net6351,22.24
net11015,22.24
net12204,22.24
net12823,22.24
net12951,22.24
_05218_,22.23
_05482_,22.23
_05598_,22.23
_10204_,22.225
_00760_,22.22
_00850_,22.22
_07555_,22.22
_09725_,22.22
_11617_,22.22
_11713_,22.22
_12262_,22.22
mgmt_buffers.la_data_in_mprj_bar\[69\],22.22
net10561,22.21
_08290_,22.205
net7299,22.205
_00294_,22.2
_02267_,22.2
_03094_,22.2
_08628_,22.2
_08786_,22.2
_09716_,22.2
_09982_,22.2
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[10\]\[4\],22.2
soc.core.mgmtsoc_vexriscv_i_cmd_payload_data\[15\],22.2
soc.core.spi_master_mosi_storage\[3\],22.2
net83,22.2
clknet_leaf_467_mgmt_buffers.caravel_clk,22.2
net4504,22.2
net4771,22.2
net6520,22.2
_00885_,22.18
_01014_,22.18
_06430_,22.18
_07938_,22.18
_10072_,22.18
_14527_,22.18
soc.core.mgmtsoc_litespimmap_burst_cs_litespi_next_value0,22.18
net258,22.18
net6410,22.18
net7317,22.18
net11704,22.18
mprj_io_analog_sel[12],22.17
mprj_io_holdover[7],22.17
mprj_io_ib_mode_sel[12],22.17
mprj_io_slow_sel[1],22.17
net8008,22.165
_01767_,22.16
_08287_,22.16
_08965_,22.16
_15261_,22.16
net384,22.16
net6759,22.16
net10702,22.16
net11851,22.16
net2607,22.16
mprj_io_holdover[15],22.15
_08433_,22.145
_08853_,22.145
_01098_,22.14
pll.itrim\[21\],22.14
soc.core.VexRiscv.RegFilePlugin_regFile\[7\]\[5\],22.14
soc.core.mgmtsoc_vexriscv_i_cmd_payload_data\[21\],22.14
soc.core.storage_1\[2\]\[2\],22.14
net11743,22.14
_07207_,22.135
_09000_,22.125
net5780,22.125
net7265,22.125
net7704,22.125
_00645_,22.12
_01673_,22.12
_01707_,22.12
_01710_,22.12
_04049_,22.12
_05075_,22.12
_05077_,22.12
_06191_,22.12
_08871_,22.12
_08943_,22.12
_09197_,22.12
_11407_,22.12
_11542_,22.12
_13299_,22.12
_14505_,22.12
_14893_,22.12
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[6\]\[21\],22.12
net287,22.12
net4065,22.12
net5290,22.12
net5443,22.12
net5698,22.12
net6512,22.12
net7531,22.12
net8294,22.12
net11407,22.12
net12276,22.12
_01901_,22.1
_15199_,22.1
net6507,22.1
net6917,22.1
net12578,22.1
_05310_,22.09
_05362_,22.09
net4655,22.085
net6350,22.085
net8399,22.085
_01850_,22.08
_05552_,22.08
_06975_,22.08
_07025_,22.08
_08424_,22.08
_09428_,22.08
_09507_,22.08
_13118_,22.08
soc.core.uart_phy_rx_phase\[7\],22.08
soc.core.uart_phy_tx_phase\[6\],22.08
net353,22.08
clknet_leaf_523_mgmt_buffers.caravel_clk,22.08
net5571,22.08
net7666,22.08
net10191,22.08
net2812,22.065
_02550_,22.06
_06259_,22.06
_08372_,22.06
_10277_,22.06
_13581_,22.06
gpio_control_in_1a\[4\].gpio_inenb,22.06
soc.core.interface3_bank_bus_dat_r\[23\],22.06
net3830,22.06
net7700,22.06
net3951,22.045
net4045,22.045
_01504_,22.04
_02261_,22.04
_05227_,22.04
_06699_,22.04
_08677_,22.04
_08981_,22.04
_10501_,22.04
_14536_,22.04
_14779_,22.04
soc.core.VexRiscv.execute_to_memory_INSTRUCTION\[14\],22.04
net5898,22.04
net11534,22.04
net11564,22.04
net11799,22.04
net10426,22.035
gpio_control_in_2\[6\].gpio_defaults\[2\],22.03
net9550,22.025
_01749_,22.02
soc.core.storage_1\[6\]\[5\],22.02
_05334_,22.01
net5338,22.005
net6921,22.005
net7292,22.005
net10062,22.005
_00704_,22
_01286_,22
_11092_,22
_11796_,22
_14946_,22
_15087_,22
net4298,22
net6198,22
net11238,22
net11560,22
net12983,22
net7520,21.995
net6117,21.985
_00832_,21.98
soc.core.dbg_uart_rx_phase\[18\],21.98
net4826,21.98
net6118,21.98
net6571,21.98
net7055,21.98
_08835_,21.965
gpio_control_in_1a\[5\].shift_register\[6\],21.965
_00711_,21.96
_01582_,21.96
_01653_,21.96
_08329_,21.96
_08457_,21.96
soc.core.uart_phy_tx_data_rs232phy_rs232phytx_next_value2\[5\],21.96
net12394,21.96
net6012,21.945
_01774_,21.94
_02013_,21.94
_09081_,21.94
_09729_,21.94
soc.core.VexRiscv._zz_RegFilePlugin_regFile_port1\[12\],21.94
net6408,21.94
net7170,21.94
net7184,21.94
net8119,21.94
net8795,21.94
net12411,21.94
gpio_control_in_1\[3\].gpio_defaults\[3\],21.93
_08995_,21.925
_00034_,21.92
_02850_,21.92
_12211_,21.92
_13321_,21.92
_14499_,21.92
_14762_,21.92
soc.core.spi_master_cs_mode,21.92
net5816,21.92
gpio_control_bidir_2\[1\].gpio_defaults\[2\],21.91
net8478,21.905
_01227_,21.9
_04067_,21.9
_07894_,21.9
_08818_,21.9
_11763_,21.9
_15131_,21.9
soc.core.VexRiscv.RegFilePlugin_regFile\[30\]\[11\],21.9
net8091,21.9
net8591,21.9
_01245_,21.88
_02926_,21.88
_05541_,21.88
_05609_,21.88
_12895_,21.88
_13442_,21.88
_15236_,21.88
net8788,21.88
net6217,21.865
net7331,21.865
_01127_,21.86
_06877_,21.86
_07893_,21.86
_09919_,21.86
_10276_,21.86
_13822_,21.86
net8945,21.86
_12075_,21.85
mprj_io_oeb[23],21.85
_02672_,21.84
soc.core.dbg_uart_tx_count\[3\],21.84
soc.core.multiregimpl19_regs0,21.84
net3292,21.84
_12046_,21.83
net3808,21.825
net3822,21.825
net5465,21.825
_00870_,21.82
_01156_,21.82
_01239_,21.82
_06033_,21.82
_06327_,21.82
_06781_,21.82
_07423_,21.82
_09590_,21.82
_12823_,21.82
_13713_,21.82
gpio_control_in_2\[3\].gpio_ana_pol,21.82
net4393,21.82
net6994,21.82
net7082,21.82
net7652,21.82
mprj_io_analog_sel[18],21.81
mprj_io_inp_dis[22],21.81
mprj_io_slow_sel[23],21.81
_02464_,21.8
_03000_,21.8
_10489_,21.8
_13698_,21.8
soc.core.mgmtsoc_litespisdrphycore_sr_cnt_litespiphy_next_value\[5\],21.8
net4738,21.785
net4768,21.785
net6697,21.785
_01241_,21.78
_08069_,21.78
_08813_,21.78
soc.core.dbg_uart_cmd\[4\],21.78
soc.core.storage_1\[6\]\[7\],21.78
net393,21.78
clknet_leaf_396_mgmt_buffers.caravel_clk,21.78
clknet_leaf_1178_mgmt_buffers.caravel_clk,21.78
net5839,21.78
net6830,21.78
net7030,21.78
net12670,21.78
net12969,21.78
_05176_,21.77
_01326_,21.76
_06109_,21.76
_06740_,21.76
_13002_,21.76
soc.core.VexRiscv._zz_RegFilePlugin_regFile_port1\[23\],21.76
soc.core.uart_phy_tx_count\[0\],21.76
net250,21.76
net8267,21.76
net10246,21.745
_07587_,21.74
_07971_,21.74
_08014_,21.74
_08635_,21.74
_09499_,21.74
_10022_,21.74
_10226_,21.74
_10516_,21.74
_12271_,21.74
_13060_,21.74
_14114_,21.74
_15294_,21.74
soc.core.VexRiscv.memory_to_writeBack_REGFILE_WRITE_DATA\[24\],21.74
soc.core.uart_phy_tx_phase\[28\],21.74
net7769,21.74
net9887,21.74
net10271,21.74
net4255,21.735
net10187,21.73
_02642_,21.72
_02936_,21.72
_06361_,21.72
soc.core.dbg_uart_cmd\[5\],21.72
_05122_,21.71
_05182_,21.71
_05244_,21.71
net10910,21.705
_01080_,21.7
_02287_,21.7
_02851_,21.7
_03275_,21.7
_07114_,21.7
_08555_,21.7
_10861_,21.7
soc.core.VexRiscv.lastStagePc\[23\],21.7
soc.core.mgmtsoc_value_status\[16\],21.7
soc.core.spi_master_cs_storage\[15\],21.7
clknet_leaf_801_mgmt_buffers.caravel_clk,21.7
net5762,21.7
net9148,21.7
net10795,21.7
_10167_,21.685
_01885_,21.68
net11400,21.68
net10475,21.675
_05376_,21.67
net3322,21.665
net5488,21.665
net6599,21.665
net9250,21.665
_01620_,21.66
_02741_,21.66
_03027_,21.66
_03251_,21.66
_07096_,21.66
_08320_,21.66
_10256_,21.66
_11884_,21.66
soc.core.VexRiscv.DebugPlugin_busReadDataReg\[20\],21.66
clknet_leaf_312_mgmt_buffers.caravel_clk,21.66
net3703,21.66
net4512,21.66
net7215,21.66
net7541,21.66
net8581,21.66
net3571,21.645
net6122,21.645
_00502_,21.64
_06979_,21.64
net4523,21.64
net4695,21.64
net6555,21.64
net11513,21.64
net11662,21.64
_05252_,21.63
net9075,21.625
_02209_,21.62
_02712_,21.62
_05235_,21.62
_08826_,21.62
_15204_,21.62
_15324_,21.62
net237,21.62
net6345,21.62
net8013,21.62
net8848,21.62
net9651,21.62
mprj_io_inp_dis[18],21.61
_10186_,21.605
net5604,21.605
_02952_,21.6
_10370_,21.6
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[13\]\[15\],21.6
net7325,21.6
_14637_,21.585
net3274,21.585
net4373,21.585
net8258,21.585
_02579_,21.58
_05020_,21.58
_05699_,21.58
_07636_,21.58
_10146_,21.58
_12810_,21.58
net63,21.58
net11582,21.58
_01170_,21.56
_13756_,21.56
soc.core.VexRiscv.lastStagePc\[24\],21.56
net5226,21.56
net12838,21.56
_05266_,21.55
_00284_,21.545
_00960_,21.54
_04152_,21.54
_07118_,21.54
_10485_,21.54
_10794_,21.54
_13380_,21.54
_13826_,21.54
_15004_,21.54
_15028_,21.54
soc.core.VexRiscv.IBusCachedPlugin_cache.io_cpu_prefetch_pc\[29\],21.54
soc.core.uart_phy_tx_phase\[8\],21.54
net7102,21.54
net10024,21.54
net2621,21.54
_09028_,21.535
net7234,21.525
_00736_,21.52
_01993_,21.52
_03627_,21.52
_10893_,21.52
net6784,21.52
net7260,21.52
net10112,21.52
net10566,21.52
net11554,21.52
gpio_control_in_2\[3\].gpio_defaults\[2\],21.51
net7594,21.505
_00835_,21.5
_02005_,21.5
_02549_,21.5
_05493_,21.5
_05650_,21.5
_05673_,21.5
soc.core.VexRiscv.IBusCachedPlugin_cache.lineLoader_wordIndex\[2\],21.5
net8269,21.5
net5548,21.485
_00042_,21.48
_00461_,21.48
_02914_,21.48
_04571_,21.48
_05758_,21.48
_08509_,21.48
_09244_,21.48
_13530_,21.48
soc.core.VexRiscv.IBusCachedPlugin_cache.lineLoader_address\[4\],21.48
soc.core.VexRiscv.IBusCachedPlugin_cache.ways_0_tags\[0\]\[8\],21.48
soc.core.VexRiscv.RegFilePlugin_regFile\[20\]\[12\],21.48
net5960,21.48
net7532,21.48
_05590_,21.47
mprj_io_analog_en[16],21.47
mprj_io_slow_sel[17],21.47
_01665_,21.46
_05911_,21.46
_07303_,21.46
_11269_,21.46
_12301_,21.46
gpio_control_in_1\[5\].shift_register\[11\],21.46
net11374,21.46
net2689,21.46
gpio_control_in_1\[3\].gpio_outenb,21.455
_08472_,21.445
_03584_,21.44
_04063_,21.44
_06788_,21.44
_13360_,21.44
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[4\]\[9\],21.44
soc.core.mgmtsoc_litespisdrphycore_storage\[7\],21.44
net5529,21.44
net6445,21.44
net8450,21.44
net10073,21.44
net10873,21.425
_07760_,21.42
soc.core.VexRiscv.memory_to_writeBack_REGFILE_WRITE_DATA\[30\],21.42
net9228,21.42
net9286,21.42
_09046_,21.405
net6597,21.405
_01531_,21.4
_04747_,21.4
_05660_,21.4
_06190_,21.4
_06698_,21.4
_07978_,21.4
_10577_,21.4
gpio_control_in_1\[5\].gpio_outenb,21.4
gpio_control_in_1a\[2\].gpio_ib_mode_sel,21.4
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[6\]\[7\],21.4
soc.core.gpioin5_gpioin5_trigger_d,21.4
clknet_leaf_21_mgmt_buffers.caravel_clk,21.4
net12006,21.4
_00636_,21.38
_06206_,21.38
_11048_,21.38
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[10\]\[19\],21.38
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[14\]\[6\],21.38
net6898,21.38
net7368,21.38
net7557,21.38
net11347,21.38
mprj_io_analog_pol[14],21.37
net4825,21.365
net6831,21.365
net7027,21.365
_01685_,21.36
_01915_,21.36
_02144_,21.36
_02921_,21.36
_04066_,21.36
_07401_,21.36
_07871_,21.36
_09350_,21.36
_09738_,21.36
_10273_,21.36
_13860_,21.36
soc.core.dbg_uart_tx_phase\[2\],21.36
net4572,21.36
net5090,21.36
net6675,21.36
net7126,21.36
net9860,21.36
net7807,21.345
_00881_,21.34
_01759_,21.34
_05637_,21.34
_07242_,21.34
_08744_,21.34
_13630_,21.34
_15316_,21.34
_15320_,21.34
net5504,21.34
_08104_,21.325
net6746,21.325
net6881,21.325
_03597_,21.32
_14644_,21.32
_15209_,21.32
soc.core.VexRiscv.IBusCachedPlugin_cache.ways_0_tags\[1\]\[22\],21.32
soc.core.storage_1\[14\]\[0\],21.32
soc.core.storage_1\[15\]\[0\],21.32
soc.core.uart_phy_tx_phase\[14\],21.32
net9257,21.32
net10688,21.32
_00630_,21.3
_01623_,21.3
_02034_,21.3
_08746_,21.3
_09305_,21.3
_15114_,21.3
soc.core.dbg_uart_count\[17\],21.3
soc.core.storage\[11\]\[4\],21.3
net12170,21.3
_07215_,21.295
_09646_,21.295
net7994,21.295
_05298_,21.29
net4917,21.285
net5701,21.285
net7996,21.285
net9642,21.285
_01263_,21.28
_02976_,21.28
_03070_,21.28
_07508_,21.28
_07571_,21.28
_09492_,21.28
_14760_,21.28
gpio_control_bidir_1\[1\].shift_register\[4\],21.28
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[13\]\[30\],21.28
soc.core.storage_1\[8\]\[3\],21.28
net82,21.28
clknet_leaf_26_mgmt_buffers.caravel_clk,21.28
net8089,21.28
net11157,21.28
net12435,21.28
_13476_,21.275
net10548,21.275
_01679_,21.26
_07518_,21.26
net4798,21.26
net6375,21.26
net7074,21.26
net10659,21.255
net9445,21.245
net9938,21.245
_00940_,21.24
_02724_,21.24
_06350_,21.24
_06561_,21.24
_06787_,21.24
_07491_,21.24
_07585_,21.24
_07899_,21.24
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[14\]\[14\],21.24
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[2\]\[27\],21.24
clknet_leaf_189_mgmt_buffers.caravel_clk,21.24
net4486,21.24
net4820,21.24
net5282,21.24
net6808,21.24
net6843,21.24
net11341,21.24
net12320,21.24
net12681,21.24
_00767_,21.22
_07486_,21.22
_09459_,21.22
net5074,21.22
net5943,21.22
net7729,21.22
net8854,21.22
_04650_,21.21
mprj_io_inp_dis[5],21.21
net4288,21.205
net7935,21.205
net8281,21.205
net8356,21.205
net8793,21.205
_00165_,21.2
_01121_,21.2
_05093_,21.2
_05509_,21.2
_09104_,21.2
_10197_,21.2
_11506_,21.2
_12416_,21.2
_13303_,21.2
_15275_,21.2
net4202,21.2
net6981,21.2
net7264,21.2
net7767,21.2
net8239,21.2
net5996,21.195
net3042,21.185
net8961,21.185
_01397_,21.18
_01481_,21.18
_02754_,21.18
_06827_,21.18
_09311_,21.18
soc.core.storage\[7\]\[0\],21.18
net8161,21.18
net5913,21.165
net8672,21.165
net10367,21.165
_04075_,21.16
_05530_,21.16
_08955_,21.16
_09381_,21.16
_12394_,21.16
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[3\]\[30\],21.16
soc.core.VexRiscv.RegFilePlugin_regFile\[29\]\[22\],21.16
net5726,21.16
net7543,21.16
net9878,21.16
net12334,21.16
net12843,21.16
net10596,21.155
mprj_io_analog_sel[6],21.15
_09647_,21.145
net3298,21.145
net7391,21.145
_00685_,21.14
_05752_,21.14
_07501_,21.14
_08321_,21.14
_14244_,21.14
soc.core.storage\[4\]\[7\],21.14
net3110,21.14
net7344,21.14
_13510_,21.135
mprj_io_holdover[19],21.13
mprj_io_slow_sel[21],21.13
net5070,21.125
_07911_,21.12
_08045_,21.12
_09890_,21.12
_11025_,21.12
_12896_,21.12
_13370_,21.12
_13531_,21.12
net4684,21.12
net5799,21.12
net6874,21.12
net11339,21.12
net12536,21.12
net8134,21.115
_00776_,21.1
_02118_,21.1
_09549_,21.1
_11056_,21.1
net251,21.1
net6979,21.1
net7787,21.1
net8241,21.1
_05332_,21.09
soc.core.interface3_bank_bus_dat_r\[19\],21.09
_05282_,21.08
_08465_,21.08
_11755_,21.08
soc.core.mgmtsoc_master_rx_fifo_source_payload_data\[1\],21.08
net264,21.08
net7127,21.08
net7681,21.08
net8671,21.08
net10694,21.08
_10493_,21.07
net3390,21.065
_00896_,21.06
_04530_,21.06
gpio_control_in_1\[3\].gpio_slow_sel,21.06
net110,21.06
net5124,21.06
net10831,21.06
net11814,21.06
net12050,21.06
_00696_,21.04
_01304_,21.04
_04511_,21.04
_07701_,21.04
_09850_,21.04
_09872_,21.04
_10419_,21.04
_13732_,21.04
_14748_,21.04
_15262_,21.04
net3295,21.04
net5553,21.04
net10827,21.04
net12292,21.04
net8948,21.025
_06718_,21.02
_07417_,21.02
_07653_,21.02
_09415_,21.02
_09740_,21.02
gpio_control_in_1\[5\].pad_gpio_out,21.02
soc.core.uart_phy_rx_phase\[27\],21.02
net3468,21.02
net3773,21.02
net5339,21.02
net5351,21.02
net7058,21.02
net7858,21.02
net11604,21.02
_08865_,21.005
_05989_,21
_07802_,21
_13330_,21
_15079_,21
net12212,21
net12490,21
net4216,20.985
_03503_,20.98
_04009_,20.98
_07419_,20.98
_09004_,20.98
_09516_,20.98
_10174_,20.98
_10728_,20.98
_12306_,20.98
_14361_,20.98
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[13\]\[10\],20.98
soc.core.VexRiscv._zz_execute_to_memory_REGFILE_WRITE_DATA\[31\],20.98
soc.core.VexRiscv.dBusWishbone_DAT_MOSI\[21\],20.98
soc.core.VexRiscv.execute_LightShifterPlugin_amplitudeReg\[1\],20.98
net7332,20.98
net8998,20.98
_05410_,20.97
_08449_,20.965
_02041_,20.96
_05505_,20.96
_13355_,20.96
_15269_,20.96
_15311_,20.96
net13165,20.96
_09200_,20.945
_00277_,20.94
_04516_,20.94
_06924_,20.94
_08078_,20.94
_13173_,20.94
soc.core.uart_phy_tx_data_rs232phy_rs232phytx_next_value2\[0\],20.94
net390,20.94
net6806,20.94
net8498,20.94
net10192,20.94
net11530,20.94
net12812,20.94
_05258_,20.93
_08521_,20.925
net3559,20.925
_05488_,20.92
_07200_,20.92
_07974_,20.92
_13520_,20.92
gpio_control_in_2\[6\].pad_gpio_outenb,20.92
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[12\]\[28\],20.92
net7054,20.92
net4783,20.915
_01016_,20.91
_01413_,20.9
_05463_,20.9
_05995_,20.9
_07581_,20.9
_09515_,20.9
_09838_,20.9
_12295_,20.9
_13780_,20.9
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[5\]\[21\],20.9
soc.core.VexRiscv._zz_execute_to_memory_REGFILE_WRITE_DATA\[19\],20.9
soc.core.dbg_uart_count\[0\],20.9
soc.core.multiregimpl79_regs0,20.9
net372,20.9
net8717,20.9
net8737,20.9
net9692,20.9
net12698,20.9
net10447,20.885
_13740_,20.88
net3607,20.88
net5097,20.88
net11875,20.88
net7793,20.865
_06643_,20.86
_09911_,20.86
_12377_,20.86
_12392_,20.86
_14066_,20.86
soc.core.VexRiscv.HazardSimplePlugin_writeBackWrites_payload_address\[4\],20.86
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[14\]\[22\],20.86
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[5\]\[27\],20.86
soc.core.la_ien_storage\[42\],20.86
soc.core.uart_phy_tx_phase\[12\],20.86
clknet_leaf_482_mgmt_buffers.caravel_clk,20.86
net3389,20.86
net3896,20.86
net7414,20.86
net7646,20.86
net7828,20.86
net11737,20.86
net11959,20.86
net12877,20.86
net12984,20.86
net2624,20.86
_05428_,20.85
net3723,20.845
_00493_,20.84
_07812_,20.84
clknet_leaf_471_mgmt_buffers.caravel_clk,20.84
_08435_,20.825
net3910,20.825
net4933,20.825
net8311,20.825
_05449_,20.82
_05642_,20.82
_06803_,20.82
_07368_,20.82
_07497_,20.82
_07554_,20.82
_08062_,20.82
_08747_,20.82
_08959_,20.82
_09976_,20.82
_11442_,20.82
_11464_,20.82
_12286_,20.82
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[13\]\[29\],20.82
soc.core.VexRiscv.execute_CsrPlugin_csr_773,20.82
net8194,20.82
net12495,20.82
gpio_control_in_1\[1\].gpio_defaults\[9\],20.81
mprj_io_analog_en[9],20.81
mprj_io_ib_mode_sel[7],20.81
mprj_io_oeb[18],20.81
_08150_,20.805
_01492_,20.8
_02846_,20.8
_11143_,20.8
soc.core.mgmtsoc_enable_storage,20.8
net7289,20.8
net7461,20.8
net7468,20.8
_05326_,20.79
_05754_,20.79
mprj_io_one[17],20.79
net7226,20.785
_01564_,20.78
_01763_,20.78
_07891_,20.78
_08044_,20.78
_09084_,20.78
_09749_,20.78
_12528_,20.78
soc.core.VexRiscv.CsrPlugin_mie_MEIE,20.78
soc.core.mgmtsoc_scratch_storage\[30\],20.78
soc.core.storage_1\[0\]\[6\],20.78
soc.core.uart_phy_rx_phase\[18\],20.78
net5308,20.78
net6190,20.78
net6944,20.78
net10230,20.78
_01411_,20.76
_01975_,20.76
_06971_,20.76
_11478_,20.76
net8731,20.76
net6768,20.745
net7730,20.745
_05095_,20.74
_05683_,20.74
_07620_,20.74
_07632_,20.74
_07807_,20.74
_07963_,20.74
_09948_,20.74
_13771_,20.74
_14522_,20.74
_15308_,20.74
soc.core.gpioin5_pending_re,20.74
net4388,20.74
net8880,20.74
net10143,20.74
net11468,20.74
_08271_,20.72
_08304_,20.72
_08575_,20.72
_09050_,20.715
net5083,20.705
net5252,20.705
net5474,20.705
net5772,20.705
net7141,20.705
net7837,20.705
net7881,20.705
net8832,20.705
net9193,20.705
_00236_,20.7
_03271_,20.7
_10612_,20.7
_15118_,20.7
_15257_,20.7
net2874,20.7
net3375,20.7
net3388,20.7
net6540,20.7
net8001,20.7
net8243,20.7
net8430,20.7
net3201,20.685
_01169_,20.68
_15162_,20.68
net4455,20.68
_07021_,20.665
_08839_,20.665
net4969,20.665
net9042,20.665
_05117_,20.66
_06159_,20.66
_12804_,20.66
_13589_,20.66
_14422_,20.66
soc.core.storage_1\[3\]\[1\],20.66
clknet_leaf_291_mgmt_buffers.caravel_clk,20.66
net3286,20.66
mgmt_buffers.la_data_in_mprj\[34\],20.655
net3623,20.645
net8431,20.645
_02872_,20.64
_08724_,20.64
gpio_control_in_1\[2\].gpio_ib_mode_sel,20.64
net4841,20.64
net5625,20.64
gpio_control_in_2\[2\].gpio_defaults\[9\],20.63
_10385_,20.625
net4415,20.625
net6931,20.625
net7530,20.625
_12530_,20.62
soc.core.storage\[10\]\[6\],20.62
net4407,20.605
_02271_,20.6
_12308_,20.6
net6237,20.6
net8865,20.585
_01159_,20.58
_01589_,20.58
_02522_,20.58
_07846_,20.58
net3338,20.58
net3617,20.58
net4577,20.58
net11106,20.58
net5199,20.565
net7885,20.565
net9873,20.565
_00152_,20.56
_06818_,20.56
_07559_,20.56
_09914_,20.56
soc.core.VexRiscv.RegFilePlugin_regFile\[0\]\[6\],20.56
net346,20.56
net3277,20.56
net3988,20.56
net5817,20.56
net9937,20.56
net11011,20.56
_05624_,20.55
gpio_control_in_2\[7\].gpio_defaults\[2\],20.55
_01931_,20.54
_06210_,20.54
_06716_,20.54
_06763_,20.54
_08977_,20.54
pll.pll_control.tint\[1\],20.54
soc.core.storage_1\[2\]\[6\],20.54
_08431_,20.535
net5456,20.525
net7173,20.525
_02149_,20.52
_02822_,20.52
_03971_,20.52
_06249_,20.52
_06972_,20.52
_09418_,20.52
_09679_,20.52
gpio_control_in_1a\[4\].gpio_outenb,20.52
soc.core.VexRiscv.RegFilePlugin_regFile\[8\]\[3\],20.52
soc.core.count\[10\],20.52
soc.core.la_ien_storage\[29\],20.52
soc.core.storage\[15\]\[0\],20.52
net236,20.52
net5086,20.52
net5142,20.52
net7733,20.52
net11472,20.52
_01593_,20.5
_07848_,20.5
clknet_leaf_274_mgmt_buffers.caravel_clk,20.5
clknet_leaf_897_mgmt_buffers.caravel_clk,20.5
net6271,20.485
net6395,20.485
net7384,20.485
_01479_,20.48
_02010_,20.48
_04647_,20.48
_06291_,20.48
_06569_,20.48
_07422_,20.48
_09493_,20.48
_13516_,20.48
soc.core.mgmtsoc_master_phyconfig_storage\[11\],20.48
soc.core.storage_1\[10\]\[1\],20.48
net7635,20.48
net9202,20.48
net10105,20.48
net11705,20.48
_05374_,20.47
_05668_,20.47
mprj_io_analog_pol[6],20.47
mprj_io_vtrip_sel[1],20.47
_09895_,20.465
_03182_,20.46
_06234_,20.46
_06301_,20.46
_06940_,20.46
_07204_,20.46
_08958_,20.46
_09518_,20.46
_10157_,20.46
soc.core.storage_1\[7\]\[7\],20.46
net10429,20.455
mprj_io_analog_en[19],20.45
mprj_io_analog_pol[25],20.45
mprj_io_holdover[14],20.45
mprj_io_ib_mode_sel[24],20.45
_09396_,20.445
net6684,20.445
_02772_,20.44
_09423_,20.44
_09678_,20.44
_09807_,20.44
_12254_,20.44
_12977_,20.44
_13869_,20.44
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[1\]\[26\],20.44
soc.core.VexRiscv.RegFilePlugin_regFile\[21\]\[12\],20.44
soc.core.mgmtsoc_litespisdrphycore_sr_in\[29\],20.44
clknet_leaf_145_mgmt_buffers.caravel_clk,20.44
net2979,20.44
net4953,20.44
net6570,20.44
net11383,20.44
net11742,20.44
net12815,20.44
_01629_,20.42
_06598_,20.42
_06932_,20.42
_09483_,20.42
net2889,20.42
net4541,20.42
net7174,20.42
net12004,20.42
gpio_control_in_2\[1\].gpio_defaults\[9\],20.41
net6842,20.405
_00142_,20.4
_05526_,20.4
_05702_,20.4
_07500_,20.4
_07547_,20.4
_09581_,20.4
_12321_,20.4
_13535_,20.4
_14772_,20.4
soc.core.mgmtsoc_litespisdrphycore_sr_cnt_litespiphy_next_value\[4\],20.4
clknet_leaf_1166_mgmt_buffers.caravel_clk,20.4
net9998,20.395
net10482,20.395
_10282_,20.38
_12412_,20.38
net9268,20.375
net10684,20.375
mprj_io_slow_sel[10],20.37
net6033,20.365
net7245,20.365
net7925,20.365
net8060,20.365
net8938,20.365
net9115,20.365
_01856_,20.36
_07470_,20.36
_07558_,20.36
_09734_,20.36
_12099_,20.36
_13202_,20.36
soc.core.VexRiscv.DebugPlugin_busReadDataReg\[13\],20.36
soc.core.VexRiscv._zz_CsrPlugin_csrMapping_readDataInit\[15\],20.36
soc.core.VexRiscv.lastStagePc\[11\],20.36
soc.core.memdat_3\[5\],20.36
soc.core.mgmtsoc_vexriscv_i_cmd_payload_address\[5\],20.36
net4616,20.36
net5098,20.36
net5306,20.36
net5956,20.36
net11410,20.36
_02594_,20.34
_02674_,20.34
_08129_,20.34
net6034,20.34
net6988,20.34
net8240,20.34
net9130,20.34
net4344,20.325
net7781,20.325
_02280_,20.32
_02291_,20.32
_02551_,20.32
_03059_,20.32
_03599_,20.32
_07462_,20.32
_08061_,20.32
_10200_,20.32
_14463_,20.32
_14501_,20.32
_14609_,20.32
soc.core.VexRiscv.dBusWishbone_ADR\[3\],20.32
clknet_leaf_583_mgmt_buffers.caravel_clk,20.32
net3843,20.32
net3921,20.32
net5871,20.32
net7751,20.32
net8629,20.32
net10470,20.32
net12317,20.32
net12867,20.32
_01419_,20.3
_01736_,20.3
_03581_,20.3
_07018_,20.3
_14163_,20.3
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[15\]\[24\],20.3
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[6\]\[6\],20.3
soc.core.multiregimpl99_regs0,20.3
soc.core.storage_1\[10\]\[6\],20.3
net6782,20.3
_09497_,20.285
net6869,20.285
net7712,20.285
_05455_,20.28
_08206_,20.28
_10786_,20.28
_12431_,20.28
gpio_control_in_1\[3\].shift_register\[6\],20.28
gpio_control_in_1a\[0\].gpio_holdover,20.28
net3683,20.28
net7713,20.28
gpio_control_in_1a\[1\].shift_register\[2\],20.265
_00556_,20.26
_01590_,20.26
_02854_,20.26
_07887_,20.26
_11654_,20.26
net4955,20.26
net10648,20.255
mprj_io_inp_dis[19],20.25
net7678,20.245
_01809_,20.24
_02095_,20.24
_04775_,20.24
_05566_,20.24
_11772_,20.24
_14165_,20.24
clknet_leaf_547_mgmt_buffers.caravel_clk,20.24
net7441,20.24
net8288,20.24
net8683,20.24
net9088,20.24
net10846,20.24
net11100,20.24
net12362,20.24
_00297_,20.235
_09908_,20.23
net5112,20.225
net6579,20.225
net7316,20.225
_07582_,20.22
_07781_,20.22
net3790,20.22
net7620,20.22
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[15\]\[16\],20.21
_01898_,20.2
_03375_,20.2
_09291_,20.2
_11839_,20.2
_12641_,20.2
_12917_,20.2
_14628_,20.2
net6116,20.2
_00607_,20.18
_01226_,20.18
_11008_,20.18
_09198_,20.175
gpio_control_in_1a\[2\].shift_register\[2\],20.165
_01116_,20.16
_08016_,20.16
net9922,20.16
net11841,20.16
net9070,20.155
net9907,20.15
net4355,20.145
_00775_,20.14
_00814_,20.14
_02264_,20.14
_03943_,20.14
_04139_,20.14
net354,20.14
net4483,20.14
net6538,20.14
net6773,20.14
net8230,20.14
mprj_io_analog_en[3],20.13
mprj_io_ib_mode_sel[11],20.13
mprj_io_slow_sel[8],20.13
net6666,20.125
net7339,20.125
_00498_,20.12
_01579_,20.12
_01619_,20.12
_01675_,20.12
_01842_,20.12
_05115_,20.12
_05155_,20.12
_05846_,20.12
_10478_,20.12
soc.core.VexRiscv.RegFilePlugin_regFile\[10\]\[1\],20.12
soc.core.VexRiscv.RegFilePlugin_regFile\[14\]\[11\],20.12
soc.core.interface0_bank_bus_dat_r\[28\],20.12
soc.core.uart_phy_rx_phase\[14\],20.12
net4984,20.12
net8655,20.12
net10766,20.12
_00246_,20.1
_01989_,20.1
_02467_,20.1
_02505_,20.1
_04484_,20.1
_07556_,20.1
_09514_,20.1
_10284_,20.1
_12303_,20.1
gpio_control_bidir_2\[1\].gpio_ana_sel,20.1
soc.core.VexRiscv.IBusCachedPlugin_cache._zz_banks_0_port1\[6\],20.1
net3258,20.1
net7050,20.1
net7567,20.1
net8280,20.1
net9102,20.1
net9955,20.1
net10521,20.1
net11508,20.1
net11706,20.1
net8954,20.095
_05250_,20.09
net6346,20.085
net8090,20.085
net8248,20.085
_01660_,20.08
_02170_,20.08
_11630_,20.08
_11837_,20.08
_15040_,20.08
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[11\]\[26\],20.08
_10164_,20.065
net6215,20.065
net8401,20.065
_02946_,20.06
_06608_,20.06
_06993_,20.06
_09656_,20.06
_13334_,20.06
soc.core.VexRiscv.IBusCachedPlugin_cache._zz_banks_0_port1\[4\],20.06
soc.core.VexRiscv.RegFilePlugin_regFile\[0\]\[12\],20.06
clknet_leaf_792_mgmt_buffers.caravel_clk,20.06
net4805,20.06
net11155,20.06
net11789,20.06
_08298_,20.045
_09602_,20.045
net5653,20.045
_05685_,20.04
_07522_,20.04
_07824_,20.04
_10699_,20.04
_12575_,20.04
net6553,20.04
_08278_,20.025
net7247,20.025
net7355,20.025
net7821,20.025
_02374_,20.02
_02583_,20.02
_09858_,20.02
_13207_,20.02
_13723_,20.02
_14991_,20.02
soc.core.VexRiscv.DebugPlugin_busReadDataReg\[11\],20.02
soc.core.dbg_uart_address\[7\],20.02
soc.core.storage\[11\]\[1\],20.02
net7405,20.02
net9545,20.02
net12848,20.02
net12851,20.02
gpio_control_in_1\[3\].gpio_defaults\[9\],20.01
_02077_,20
_02198_,20
_07671_,20
_09151_,20
_11001_,20
_11599_,20
_13482_,20
_13564_,20
net5575,20
net8092,20
net9488,20
net12262,20
net8004,19.995
net6310,19.985
net7827,19.985
_06556_,19.98
_07645_,19.98
_09520_,19.98
_10297_,19.98
_13612_,19.98
_13933_,19.98
mgmt_buffers.la_data_in_mprj_bar\[38\],19.98
soc.core.VexRiscv.RegFilePlugin_regFile\[5\]\[10\],19.98
soc.core.VexRiscv._zz_CsrPlugin_csrMapping_readDataInit\[30\],19.98
soc.core.mgmtsoc_litespimmap_count\[8\],19.98
net3275,19.98
net5886,19.98
net6834,19.98
net11405,19.98
net7986,19.975
net5536,19.965
net7574,19.965
_00171_,19.96
_00290_,19.96
_07481_,19.96
_08416_,19.96
_08631_,19.96
_08698_,19.96
soc.core.storage_1\[6\]\[1\],19.96
net10389,19.955
_05314_,19.95
net7801,19.945
net8100,19.945
net9702,19.945
_01416_,19.94
_01533_,19.94
_01987_,19.94
_02858_,19.94
_02972_,19.94
_06004_,19.94
_07378_,19.94
_09572_,19.94
_10719_,19.94
_15103_,19.94
soc.core.VexRiscv.RegFilePlugin_regFile\[19\]\[11\],19.94
soc.core.mgmtsoc_load_storage\[10\],19.94
soc.core.multiregimpl60_regs1,19.94
net5170,19.94
net6946,19.94
net10093,19.94
net12146,19.94
net12854,19.94
_00312_,19.925
_06353_,19.925
_01045_,19.92
_03026_,19.92
_03933_,19.92
_05556_,19.92
_08556_,19.92
_14078_,19.92
gpio_control_in_1\[3\].gpio_defaults\[8\],19.91
_08794_,19.905
net9690,19.905
net9705,19.905
_01335_,19.9
_05141_,19.9
_06832_,19.9
_07641_,19.9
_09513_,19.9
_12063_,19.9
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[12\]\[23\],19.9
soc.core.count\[5\],19.9
net4629,19.9
net7677,19.9
net2635,19.9
gpio_control_in_1\[4\].gpio_defaults\[3\],19.89
_00684_,19.88
_01042_,19.88
_01292_,19.88
_01731_,19.88
soc.core.mgmtsoc_master_phyconfig_storage\[9\],19.88
net6333,19.88
net7526,19.88
net10527,19.875
_05356_,19.87
gpio_control_in_2\[0\].gpio_defaults\[7\],19.87
net4648,19.865
net6211,19.865
net8337,19.865
_02999_,19.86
_04098_,19.86
_05245_,19.86
_06925_,19.86
_07680_,19.86
_09610_,19.86
_09800_,19.86
_12080_,19.86
_13243_,19.86
_14195_,19.86
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[15\]\[14\],19.86
soc.core.mgmtsoc_master_rx_fifo_source_payload_data\[28\],19.86
soc.core.storage_1\[10\]\[0\],19.86
net2847,19.86
net6250,19.86
net8600,19.86
net9133,19.86
net9821,19.86
net10133,19.86
net11428,19.86
net12524,19.86
net10723,19.855
_05518_,19.85
_01667_,19.84
_01815_,19.84
_05630_,19.84
_12907_,19.84
_13636_,19.84
_14418_,19.84
soc.core.VexRiscv._zz_execute_SRC2\[30\],19.84
soc.core.mgmtsoc_value_status\[21\],19.84
net7692,19.84
net10157,19.84
_04838_,19.83
_06641_,19.825
_08523_,19.825
net2878,19.825
net3413,19.825
net4353,19.825
net4570,19.825
net4880,19.825
_06122_,19.82
_08629_,19.82
_10522_,19.82
_12872_,19.82
_15323_,19.82
clknet_leaf_198_mgmt_buffers.caravel_clk,19.82
net5012,19.82
net5051,19.82
net5400,19.82
net7615,19.82
net12878,19.82
net8309,19.815
gpio_control_in_2\[6\].gpio_defaults\[6\],19.81
_01862_,19.8
_04409_,19.8
_05618_,19.8
_12500_,19.8
_14607_,19.8
soc.core.litespiphy_state\[0\],19.8
net4286,19.8
net5006,19.8
net6400,19.8
net7020,19.8
net10859,19.8
net5733,19.785
net8426,19.785
_01223_,19.78
_08446_,19.78
_14933_,19.78
_15221_,19.78
net5073,19.78
net5519,19.78
net6295,19.78
net8997,19.78
net11378,19.78
net11648,19.78
net12351,19.78
net9027,19.775
mprj_io_analog_sel[25],19.77
mprj_io_ib_mode_sel[25],19.77
_00529_,19.76
_00574_,19.76
_01361_,19.76
_01872_,19.76
_02094_,19.76
_15126_,19.76
soc.core.VexRiscv.RegFilePlugin_regFile\[4\]\[3\],19.76
net352,19.76
net7623,19.76
net7610,19.745
_01552_,19.74
_09871_,19.74
_14634_,19.74
_15279_,19.74
clknet_leaf_761_mgmt_buffers.caravel_clk,19.74
clknet_leaf_1103_mgmt_buffers.caravel_clk,19.74
net6479,19.74
net7164,19.74
net7806,19.74
net12472,19.74
net3244,19.725
net6564,19.725
net7192,19.725
net10455,19.725
_00148_,19.72
_03541_,19.72
_12868_,19.72
net55,19.72
net381,19.72
net6530,19.72
net7968,19.72
net9388,19.72
net9863,19.72
_08514_,19.705
net5800,19.705
_14399_,19.7
_14449_,19.7
_15094_,19.7
soc.core.storage\[6\]\[1\],19.7
net9040,19.7
gpio_control_in_2\[0\].gpio_defaults\[9\],19.69
net6937,19.685
net7033,19.685
net7253,19.685
net9176,19.685
net10163,19.685
_02825_,19.68
_03589_,19.68
_04459_,19.68
_08281_,19.68
_13003_,19.68
gpio_control_in_2\[8\].gpio_ana_pol,19.68
net54,19.68
net5227,19.68
net8561,19.68
_00777_,19.66
_05289_,19.66
_05491_,19.66
_06591_,19.66
_08094_,19.66
_08814_,19.66
_09566_,19.66
_11547_,19.66
_11824_,19.66
_12065_,19.66
_12906_,19.66
mgmt_buffers.mprj_logic1\[29\],19.66
net4887,19.66
net7957,19.655
_01346_,19.64
_01520_,19.64
soc.core.gpioin0_gpioin0_trigger_d,19.64
soc.core.multiregimpl63_regs0,19.64
net3853,19.64
net5218,19.64
net5316,19.64
net7975,19.64
net8232,19.64
net8565,19.64
net10048,19.64
net12705,19.64
_00184_,19.62
_01041_,19.62
_04181_,19.62
_05759_,19.62
_06549_,19.62
_10514_,19.62
_10616_,19.62
_10782_,19.62
_14546_,19.62
net9131,19.62
net9475,19.62
net9926,19.62
_09846_,19.605
_10240_,19.605
net7633,19.605
net8023,19.605
_00898_,19.6
_01772_,19.6
_05580_,19.6
_08000_,19.6
_09295_,19.6
_09686_,19.6
_09719_,19.6
soc.core.memdat_3\[4\],19.6
net395,19.6
net8394,19.6
net10094,19.6
_08227_,19.585
_08766_,19.585
_00046_,19.58
_05574_,19.58
_15256_,19.58
gpio_control_in_2\[9\].gpio_ib_mode_sel,19.58
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[5\]\[1\],19.58
soc.core.uart_phy_tx_data\[7\],19.58
soc.core.uartwishbonebridge_rs232phyrx_next_state,19.58
net5590,19.565
net5977,19.565
net6446,19.565
_01634_,19.56
_02817_,19.56
_06490_,19.56
_12808_,19.56
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[4\]\[1\],19.56
clknet_leaf_740_mgmt_buffers.caravel_clk,19.56
_01002_,19.54
_03973_,19.54
_08375_,19.54
_08610_,19.54
_09695_,19.54
_12100_,19.54
soc.core.mgmtsoc_load_storage\[11\],19.54
net9281,19.54
net3251,19.525
net3569,19.525
net4702,19.525
net5201,19.525
net8365,19.525
_00759_,19.52
_03215_,19.52
_03501_,19.52
_07988_,19.52
_11521_,19.52
_12834_,19.52
gpio_control_in_2\[0\].shift_register\[12\],19.52
soc.core.VexRiscv.dBusWishbone_DAT_MOSI\[18\],19.52
soc.core.mgmtsoc_load_storage\[13\],19.52
soc.core.spi_master_cs_storage\[11\],19.52
soc.core.storage_1\[14\]\[3\],19.52
net248,19.52
net5527,19.52
net12949,19.52
net7556,19.505
_01472_,19.5
_12213_,19.5
_12870_,19.5
soc.core.VexRiscv.IBusCachedPlugin_cache.ways_0_tags\[1\]\[20\],19.5
net8821,19.5
net6372,19.495
_06289_,19.485
net4573,19.485
net4774,19.485
net6454,19.485
net8289,19.485
_01135_,19.48
_05329_,19.48
_07570_,19.48
_07708_,19.48
_09014_,19.48
_09802_,19.48
soc.core.VexRiscv.HazardSimplePlugin_writeBackWrites_payload_address\[3\],19.48
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[12\]\[8\],19.48
soc.core.VexRiscv.lastStagePc\[15\],19.48
soc.core.mgmtsoc_master_tx_fifo_source_valid,19.48
net4714,19.48
net4922,19.48
net5455,19.48
net12856,19.48
net6191,19.465
net6401,19.465
_02824_,19.46
_11714_,19.46
_12168_,19.46
gpio_control_bidir_2\[1\].gpio_vtrip_sel,19.46
soc.core.dbg_uart_rx_phase\[22\],19.46
soc.core.interface3_bank_bus_dat_r\[21\],19.46
mprj_io_inp_dis[2],19.45
net4311,19.445
net7037,19.445
_05149_,19.44
_05511_,19.44
_06154_,19.44
_06438_,19.44
_06611_,19.44
_06995_,19.44
_07152_,19.44
_09680_,19.44
_10059_,19.44
_11572_,19.44
soc.core.VexRiscv.dBusWishbone_DAT_MOSI\[4\],19.44
net4515,19.44
net11421,19.44
net11683,19.44
net11935,19.44
net12282,19.44
net12465,19.44
net12475,19.44
_02040_,19.42
_07822_,19.42
_08064_,19.42
_13868_,19.42
net5202,19.42
net5593,19.42
net7513,19.42
net8628,19.42
net8706,19.42
net11099,19.42
_08450_,19.415
net6448,19.405
_06409_,19.4
_06541_,19.4
_08081_,19.4
_08421_,19.4
_08699_,19.4
_13664_,19.4
_15336_,19.4
soc.core.VexRiscv.decode_to_execute_IS_CSR,19.4
soc.core.la_ien_storage\[45\],19.4
net228,19.4
net382,19.4
net3323,19.4
net4580,19.4
net4930,19.4
net7108,19.4
net9838,19.4
net11406,19.4
net12266,19.4
net12976,19.4
net7257,19.395
_10185_,19.385
_01477_,19.38
_01976_,19.38
_11799_,19.38
_11814_,19.38
soc.core.multiregimpl52_regs0,19.38
net7902,19.38
net4110,19.365
net6987,19.365
_05639_,19.36
_08203_,19.36
_10729_,19.36
_12060_,19.36
_12805_,19.36
_12924_,19.36
_15288_,19.36
soc.core.VexRiscv.DebugPlugin_busReadDataReg\[1\],19.36
net57,19.36
net80,19.36
clknet_leaf_194_mgmt_buffers.caravel_clk,19.36
net4115,19.36
net5276,19.36
net6862,19.36
net8653,19.36
net9666,19.36
net11432,19.36
net12822,19.36
net12959,19.36
net2612,19.36
net8179,19.345
net12522,19.34
net4384,19.325
net5560,19.325
_02035_,19.32
_02726_,19.32
_08633_,19.32
net257,19.32
net4936,19.32
net5650,19.32
net5851,19.32
net7424,19.32
net9267,19.32
net10553,19.32
net11197,19.32
_00602_,19.3
_08307_,19.3
_11356_,19.3
_12415_,19.3
gpio_control_in_1a\[1\].gpio_inenb,19.3
net7214,19.3
net12975,19.3
net8205,19.285
net9524,19.285
_05079_,19.28
_05782_,19.28
_08988_,19.28
_12177_,19.28
_12312_,19.28
soc.core.gpioin0_pending_r,19.28
clknet_leaf_1030_mgmt_buffers.caravel_clk,19.28
net5038,19.28
net6394,19.28
net7587,19.28
net9112,19.28
net12198,19.28
net3028,19.265
net8730,19.265
net8881,19.265
_01021_,19.26
_03928_,19.26
_09975_,19.26
net4293,19.26
_01109_,19.24
_09851_,19.24
_10876_,19.24
_12277_,19.24
soc.core.uart_phy_tx_phase\[11\],19.24
net10658,19.24
_03551_,19.22
_04730_,19.22
net13068,19.22
soc.core.VexRiscv.RegFilePlugin_regFile\[22\]\[5\],19.22
net4319,19.22
net8073,19.22
net8992,19.22
net9073,19.22
net12773,19.22
_05348_,19.21
mprj_io_analog_en[20],19.21
_00762_,19.2
_01599_,19.2
_01611_,19.2
_01690_,19.2
_05231_,19.2
_05582_,19.2
_05640_,19.2
_07551_,19.2
_08057_,19.2
_10461_,19.2
mgmt_buffers.mprj_logic1\[335\],19.2
net3034,19.2
net6024,19.2
net8005,19.2
net10118,19.2
net11129,19.2
net11613,19.2
_09085_,19.185
net6428,19.185
_05730_,19.18
_08049_,19.18
_08817_,19.18
_10902_,19.18
_13121_,19.18
_13359_,19.18
soc.core.VexRiscv.DebugPlugin_busReadDataReg\[7\],19.18
soc.core.VexRiscv.RegFilePlugin_regFile\[27\]\[12\],19.18
net4085,19.18
net6886,19.18
net8951,19.18
net10266,19.18
net11942,19.18
_01755_,19.16
_02289_,19.16
_05915_,19.16
_07533_,19.16
_11825_,19.16
_14823_,19.16
_15048_,19.16
_15072_,19.16
_15186_,19.16
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[9\]\[17\],19.16
gpio_control_in_2\[9\].gpio_ana_sel,19.155
net4664,19.155
net9049,19.155
net10385,19.155
net10412,19.155
net6296,19.145
_07880_,19.14
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[5\]\[28\],19.14
soc.core.VexRiscv.RegFilePlugin_regFile\[21\]\[10\],19.14
soc.core.VexRiscv._zz_execute_SRC2\[26\],19.14
soc.core.uart_phy_tx_tick,19.14
net5318,19.14
net6894,19.14
_11113_,19.12
_14100_,19.12
_14357_,19.12
soc.core.VexRiscv.CsrPlugin_selfException_payload_badAddr\[0\],19.12
net260,19.12
_08913_,19.115
mprj_io_analog_en[5],19.11
mprj_io_inp_dis[9],19.11
_08524_,19.105
net6411,19.105
net7216,19.105
net8014,19.105
net9084,19.105
_00291_,19.1
_05622_,19.1
_06199_,19.1
_07426_,19.1
_07530_,19.1
_07837_,19.1
_08182_,19.1
_09547_,19.1
_09814_,19.1
_15187_,19.1
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[7\]\[21\],19.1
soc.core.VexRiscv.dBusWishbone_DAT_MOSI\[28\],19.1
soc.core.gpioin0_enable_storage,19.1
soc.core.storage_1\[10\]\[2\],19.1
net11431,19.1
_08468_,19.085
net2946,19.085
net5469,19.085
_00798_,19.08
_08972_,19.08
_09378_,19.08
_10188_,19.08
_11240_,19.08
_12092_,19.08
_12905_,19.08
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[1\]\[11\],19.08
soc.core.VexRiscv.IBusCachedPlugin_cache.io_cpu_prefetch_pc\[23\],19.08
soc.core.gpioin0_gpioin0_edge_storage,19.08
net8015,19.08
net8467,19.08
net11045,19.08
net5476,19.065
net7570,19.065
_00438_,19.06
_00558_,19.06
_00979_,19.06
_02903_,19.06
_03512_,19.06
_07513_,19.06
_07770_,19.06
_08063_,19.06
_09554_,19.06
_09556_,19.06
_13441_,19.06
_14635_,19.06
soc.core.mgmtsoc_litespisdrphycore_storage\[3\],19.06
soc.core.storage_1\[13\]\[1\],19.06
net3080,19.06
net4962,19.06
net6094,19.06
net6810,19.06
net8678,19.06
net10089,19.06
net12272,19.06
net12697,19.06
net12836,19.06
gpio_control_in_2\[2\].gpio_defaults\[2\],19.05
_03383_,19.04
_09413_,19.04
_11808_,19.04
_14698_,19.04
_14729_,19.04
net6059,19.04
net12665,19.04
net6422,19.035
net8574,19.035
net8894,19.035
net8915,19.035
_09596_,19.025
net5307,19.025
net7643,19.025
net7839,19.025
net7911,19.025
net12331,19.025
_01706_,19.02
_03203_,19.02
_04034_,19.02
_06207_,19.02
_06595_,19.02
_07588_,19.02
_08020_,19.02
_10152_,19.02
_12716_,19.02
_13345_,19.02
_13769_,19.02
_13903_,19.02
soc.core.storage_1\[11\]\[7\],19.02
clknet_leaf_148_mgmt_buffers.caravel_clk,19.02
net3660,19.02
net6800,19.02
net6960,19.02
net9657,19.02
net2652,19.02
net13182,19.02
_05364_,19.01
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[11\]\[14\],19
net10450,18.995
mprj_io_analog_en[18],18.99
mprj_io_inp_dis[16],18.99
_00287_,18.985
net3447,18.985
net3650,18.985
net4230,18.985
net4366,18.985
net5679,18.985
_02126_,18.98
_02517_,18.98
_03841_,18.98
_04083_,18.98
_06053_,18.98
_07493_,18.98
_07862_,18.98
_08423_,18.98
_08732_,18.98
_09636_,18.98
_13920_,18.98
_15301_,18.98
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[8\]\[28\],18.98
soc.core.VexRiscv.lastStagePc\[29\],18.98
soc.core.spi_master_control_storage\[13\],18.98
net358,18.98
net3819,18.98
net5020,18.98
net5754,18.98
net6071,18.98
net6911,18.98
net7466,18.98
net8612,18.98
net11253,18.98
net12566,18.98
_00467_,18.96
_06515_,18.96
_09952_,18.96
_15281_,18.96
net5820,18.96
net7850,18.96
net7971,18.96
net8249,18.96
net8461,18.96
_00313_,18.955
net3507,18.945
net5566,18.945
net9439,18.945
net9696,18.945
_02468_,18.94
_07488_,18.94
_07557_,18.94
_07738_,18.94
_08072_,18.94
_08109_,18.94
_09034_,18.94
_09156_,18.94
_09490_,18.94
_09934_,18.94
_13917_,18.94
_13968_,18.94
_15326_,18.94
soc.core.VexRiscv.RegFilePlugin_regFile\[25\]\[5\],18.94
soc.core.VexRiscv._zz_CsrPlugin_csrMapping_readDataInit\[26\],18.94
net7203,18.94
net8049,18.94
net11820,18.94
net7089,18.935
_05384_,18.93
_01161_,18.92
_01427_,18.92
_01985_,18.92
_02072_,18.92
soc.core.VexRiscv.RegFilePlugin_regFile\[10\]\[5\],18.92
net6144,18.92
net6187,18.905
_00813_,18.9
_01073_,18.9
_02964_,18.9
_03078_,18.9
_06987_,18.9
_15274_,18.9
_15282_,18.9
_15309_,18.9
gpio_control_in_1a\[1\].shift_register\[4\],18.9
clknet_leaf_698_mgmt_buffers.caravel_clk,18.9
net4221,18.9
net5775,18.9
net6826,18.9
_08630_,18.88
net4721,18.865
_01572_,18.86
_05742_,18.86
_09750_,18.86
_15022_,18.86
_15140_,18.86
_15341_,18.86
soc.core.VexRiscv.CsrPlugin_interrupt_valid,18.86
soc.core.mgmtsoc_litespisdrphycore_sr_cnt_litespiphy_next_value\[1\],18.86
net370,18.86
net3026,18.86
net5127,18.86
net5980,18.86
net6997,18.86
net7177,18.86
net8026,18.86
net8404,18.86
net11359,18.86
net11442,18.86
net11469,18.86
net12236,18.86
net5546,18.855
net10459,18.855
net4269,18.845
_02927_,18.84
_02938_,18.84
_07600_,18.84
soc.core.dbg_uart_tx_phase\[8\],18.84
soc.core.storage\[2\]\[4\],18.84
net386,18.84
net4307,18.84
net5286,18.84
net6718,18.84
net6879,18.825
_00240_,18.82
_01730_,18.82
_02216_,18.82
_02422_,18.82
_02786_,18.82
_05121_,18.82
_05761_,18.82
_05802_,18.82
_11589_,18.82
_13695_,18.82
_15149_,18.82
_15202_,18.82
_15280_,18.82
net2834,18.82
net6483,18.82
net11305,18.82
net10626,18.815
net9993,18.81
_01506_,18.8
_01788_,18.8
_04102_,18.8
_10371_,18.8
_14746_,18.8
net5521,18.8
net5141,18.785
net8422,18.785
net8558,18.785
_00719_,18.78
_01712_,18.78
_02055_,18.78
_02707_,18.78
_04131_,18.78
_05388_,18.78
_05564_,18.78
_06091_,18.78
_07796_,18.78
_10504_,18.78
_13398_,18.78
net6685,18.78
net8796,18.78
mprj_io_ib_mode_sel[5],18.77
mprj_io_slow_sel[3],18.77
net5326,18.765
_00963_,18.76
_08706_,18.76
pll.itrim\[24\],18.76
soc.core.storage\[4\]\[5\],18.76
net5462,18.76
net8446,18.76
net9493,18.76
_08860_,18.745
net6101,18.745
net6797,18.745
net8523,18.745
_02048_,18.74
_05733_,18.74
_06594_,18.74
_07956_,18.74
_10781_,18.74
_15332_,18.74
net3334,18.74
net7868,18.74
net12388,18.74
net10517,18.735
net4730,18.725
_02268_,18.72
_02388_,18.72
_04724_,18.72
_07677_,18.72
_08734_,18.72
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[2\]\[7\],18.72
soc.core.VexRiscv.RegFilePlugin_regFile\[21\]\[5\],18.72
soc.core.VexRiscv._zz_execute_SRC2\[29\],18.72
net7146,18.72
net7502,18.72
net7723,18.72
_08429_,18.705
_04130_,18.7
_07097_,18.7
_07111_,18.7
_13596_,18.7
_15053_,18.7
soc.core.count\[16\],18.7
net12567,18.7
net5348,18.695
net9779,18.69
net4395,18.685
net6793,18.685
net8225,18.685
net9089,18.685
_00591_,18.68
_01446_,18.68
_05588_,18.68
_06457_,18.68
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[4\]\[28\],18.68
soc.core.uart_phy_rx_data\[5\],18.68
net3231,18.68
net12252,18.68
_08785_,18.665
net5663,18.665
_10506_,18.66
_15344_,18.66
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[10\]\[26\],18.66
net5220,18.66
net7104,18.66
_10032_,18.655
_10103_,18.645
net6478,18.645
net8287,18.645
_00836_,18.64
_01982_,18.64
_07532_,18.64
_07580_,18.64
_08130_,18.64
_10149_,18.64
_14905_,18.64
_15245_,18.64
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[8\]\[14\],18.64
soc.core.VexRiscv.RegFilePlugin_regFile\[16\]\[15\],18.64
soc.core.VexRiscv.RegFilePlugin_regFile\[25\]\[6\],18.64
net8957,18.64
net9745,18.64
net11353,18.64
net12962,18.64
_00915_,18.62
_07347_,18.62
_08726_,18.62
_09451_,18.62
_12331_,18.62
_13438_,18.62
_14365_,18.62
net5502,18.62
net9308,18.62
_07240_,18.605
_09921_,18.605
net5157,18.605
_02856_,18.6
_05279_,18.6
_06750_,18.6
_07483_,18.6
_07797_,18.6
_07882_,18.6
_08088_,18.6
_08406_,18.6
_08501_,18.6
_08571_,18.6
_08605_,18.6
_08753_,18.6
_08974_,18.6
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[4\]\[22\],18.6
soc.core.mgmtsoc_master_phyconfig_storage\[8\],18.6
soc.core.spi_master_control_storage\[3\],18.6
soc.core.uart_rx_fifo_produce\[0\],18.6
net3297,18.6
net8703,18.6
net12701,18.6
net12850,18.6
net12941,18.6
net11310,18.585
_12455_,18.58
soc.core.uart_phy_tx_data\[0\],18.58
_08810_,18.565
net5657,18.565
net7290,18.565
net7659,18.565
net8317,18.565
_00037_,18.56
_00707_,18.56
_02229_,18.56
_03136_,18.56
_07561_,18.56
_07872_,18.56
_09832_,18.56
_12667_,18.56
_12706_,18.56
_13743_,18.56
soc.core.VexRiscv.RegFilePlugin_regFile\[11\]\[1\],18.56
soc.core.multiregimpl38_regs0,18.56
net8117,18.56
net9785,18.56
net10810,18.56
net11492,18.56
net12123,18.56
net12647,18.56
net12835,18.56
net12970,18.56
gpio_control_in_2\[8\].gpio_defaults\[3\],18.55
_00557_,18.54
_06134_,18.54
_06411_,18.54
_07489_,18.54
gpio_control_bidir_2\[1\].gpio_defaults\[4\],18.54
_08869_,18.535
_11832_,18.53
net6064,18.525
_00019_,18.52
_05719_,18.52
_06915_,18.52
_13226_,18.52
soc.core.interface14_bank_bus_dat_r\[0\],18.52
soc.core.storage_1\[8\]\[7\],18.52
net5928,18.52
net7820,18.52
net10217,18.52
net11365,18.52
net11403,18.52
_01004_,18.5
_01734_,18.5
_06555_,18.5
_06879_,18.5
_10625_,18.5
_12335_,18.5
net128,18.5
clknet_leaf_1209_mgmt_buffers.caravel_clk,18.5
net7617,18.5
net10468,18.495
_00664_,18.48
_01503_,18.48
_02839_,18.48
_03359_,18.48
_05887_,18.48
_06379_,18.48
_06935_,18.48
_07049_,18.48
_07433_,18.48
_07820_,18.48
_08105_,18.48
_09760_,18.48
_13666_,18.48
_14996_,18.48
_15073_,18.48
net288,18.48
net3964,18.48
net5630,18.48
net7490,18.48
net8539,18.48
net9491,18.48
net9856,18.48
gpio_control_bidir_2\[0\].gpio_defaults\[9\],18.47
_11712_,18.46
_13493_,18.46
pll.itrim\[4\],18.46
soc.core.storage_1\[0\]\[2\],18.46
net5500,18.46
_09606_,18.445
net4476,18.445
net6002,18.445
net8080,18.445
net9044,18.445
_01836_,18.44
_02959_,18.44
_06137_,18.44
_08961_,18.44
_11015_,18.44
_15127_,18.44
_15254_,18.44
net3944,18.44
net8874,18.44
net9365,18.44
net9756,18.44
net12232,18.44
net12683,18.44
_04140_,18.42
_05608_,18.42
_05664_,18.42
_07531_,18.42
net13069,18.42
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[5\]\[13\],18.42
net5037,18.42
net6128,18.42
net6138,18.42
net7624,18.42
net7944,18.42
net8038,18.42
net8259,18.42
_04898_,18.41
mprj_io_holdover[18],18.41
mprj_io_vtrip_sel[18],18.41
_03516_,18.4
_05522_,18.4
_06909_,18.4
_10618_,18.4
_11940_,18.4
_14286_,18.4
clknet_leaf_720_mgmt_buffers.caravel_clk,18.4
net3107,18.4
net5440,18.4
net7480,18.4
net8190,18.4
net9100,18.4
net11013,18.4
net11499,18.4
_08469_,18.395
net10409,18.395
mprj_io_inp_dis[3],18.39
mprj_io_one[1],18.39
_08311_,18.385
_01500_,18.38
_02681_,18.38
_02696_,18.38
_07826_,18.38
net3188,18.38
net7211,18.38
net8338,18.38
_05211_,18.36
_05237_,18.36
_06130_,18.36
_08325_,18.36
_15299_,18.36
soc.core.mgmtsoc_master_rx_fifo_source_payload_data\[10\],18.36
_05480_,18.35
net10572,18.35
net10710,18.35
_03981_,18.34
_07310_,18.34
soc.core.VexRiscv.CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr\[30\],18.34
soc.core.storage\[2\]\[7\],18.34
net357,18.34
net7151,18.34
net7927,18.34
_07504_,18.33
net7606,18.325
net9729,18.325
_05596_,18.32
_05578_,18.3
_09041_,18.3
gpio_control_in_2\[6\].gpio_ib_mode_sel,18.3
soc.core.uart_phy_rx_count\[3\],18.3
net209,18.3
net4023,18.3
net8212,18.3
net12677,18.3
net12861,18.3
net10252,18.295
_08770_,18.285
net9314,18.285
_07564_,18.28
_08070_,18.28
_08103_,18.28
_09498_,18.28
_11067_,18.28
_11408_,18.28
_13750_,18.28
net12202,18.28
_10177_,18.265
net4454,18.265
_00544_,18.26
_02091_,18.26
_02566_,18.26
_09574_,18.26
_15335_,18.26
gpio_control_in_1a\[3\].gpio_ana_sel,18.26
soc.core.VexRiscv.RegFilePlugin_regFile\[26\]\[12\],18.26
soc.core.VexRiscv.execute_to_memory_PC\[5\],18.26
soc.core.mgmtsoc_scratch_storage\[7\],18.26
net347,18.26
net2813,18.26
net3102,18.26
net4418,18.26
net5758,18.26
net11202,18.26
net12349,18.26
net12547,18.26
net10424,18.255
_05402_,18.25
_05670_,18.25
net9128,18.245
_07134_,18.24
_11128_,18.24
net10513,18.24
net11757,18.24
net12184,18.24
net4257,18.225
_03299_,18.22
_06575_,18.22
_07569_,18.22
_08055_,18.22
_08502_,18.22
_10172_,18.22
soc.core.VexRiscv.RegFilePlugin_regFile\[7\]\[15\],18.22
net7742,18.22
net12459,18.22
gpio_control_in_2\[4\].gpio_defaults\[9\],18.21
_09087_,18.205
_00887_,18.2
_07389_,18.2
_15189_,18.2
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[4\]\[17\],18.2
soc.core.storage_1\[7\]\[5\],18.2
net4741,18.2
net10457,18.195
net3021,18.185
_01502_,18.18
_04282_,18.18
_06244_,18.18
_08154_,18.18
_15091_,18.18
clknet_leaf_498_mgmt_buffers.caravel_clk,18.18
net8886,18.18
net10341,18.175
net10352,18.175
net9712,18.165
_00187_,18.16
_00441_,18.16
_01439_,18.16
_01669_,18.16
_05208_,18.16
_07515_,18.16
_15271_,18.16
mgmt_buffers.la_data_in_mprj_bar\[32\],18.16
net10142,18.16
net5729,18.155
net4316,18.145
net5095,18.145
net6627,18.145
_02571_,18.14
_06195_,18.14
_07510_,18.14
_07577_,18.14
_10317_,18.14
_10580_,18.14
_12466_,18.14
_13725_,18.14
soc.core.spi_master_miso_data\[4\],18.14
soc.core.storage\[10\]\[5\],18.14
net4025,18.14
net6541,18.14
net10124,18.14
net10458,18.14
net11299,18.14
net12242,18.14
net12645,18.14
net12649,18.14
_00159_,18.125
net8323,18.125
_01861_,18.12
_06899_,18.12
_09519_,18.12
_13714_,18.12
gpio_control_in_2\[2\].gpio_outenb,18.12
net5776,18.12
net6076,18.12
net9187,18.12
net12441,18.12
net5447,18.105
net6336,18.105
net9260,18.105
net10721,18.105
_02050_,18.1
_04321_,18.1
_06434_,18.1
_08578_,18.1
_09277_,18.1
gpio_control_in_1a\[0\].gpio_ana_sel,18.1
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[15\]\[11\],18.1
soc.core.VexRiscv.IBusCachedPlugin_cache.ways_0_tags\[1\]\[27\],18.1
soc.core.VexRiscv.RegFilePlugin_regFile\[31\]\[5\],18.1
soc.core.spi_master_cs_storage\[12\],18.1
net3581,18.1
net4786,18.1
net5119,18.1
net8850,18.1
net9604,18.1
net9607,18.1
net9959,18.1
net12487,18.1
net12651,18.1
net12827,18.1
net12847,18.1
mprj_io_analog_en[2],18.09
mprj_io_analog_pol[4],18.09
mprj_io_ib_mode_sel[10],18.09
mprj_io_slow_sel[4],18.09
net8385,18.085
_00742_,18.08
_08721_,18.08
_10424_,18.08
soc.core.multiregimpl45_regs1,18.08
net5905,18.08
net6391,18.08
_07003_,18.065
mgmt_buffers.la_data_in_mprj\[69\],18.065
net3229,18.065
net4495,18.065
net7653,18.065
net9179,18.065
_00396_,18.06
_00884_,18.06
_01017_,18.06
_01137_,18.06
_02132_,18.06
_05105_,18.06
_05233_,18.06
_06081_,18.06
_06929_,18.06
_07712_,18.06
_08666_,18.06
_10997_,18.06
_13132_,18.06
_13215_,18.06
_15302_,18.06
clknet_leaf_207_mgmt_buffers.caravel_clk,18.06
net5632,18.06
net6441,18.06
_00856_,18.04
_01059_,18.04
_01442_,18.04
_02775_,18.04
_02994_,18.04
_08821_,18.04
_09351_,18.04
_13170_,18.04
_13533_,18.04
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[4\]\[13\],18.04
net6305,18.04
net7162,18.04
_00250_,18.02
_02099_,18.02
_04080_,18.02
_05130_,18.02
_05312_,18.02
_07369_,18.02
_07509_,18.02
_10140_,18.02
_10357_,18.02
_13126_,18.02
_13573_,18.02
_15066_,18.02
_15067_,18.02
clknet_leaf_158_mgmt_buffers.caravel_clk,18.02
net2823,18.02
net9165,18.02
net10376,18.02
net8506,18.005
_01670_,18
_01838_,18
_02044_,18
_03090_,18
_03977_,18
_08775_,18
net6095,17.985
net7269,17.985
net7285,17.985
net8713,17.985
_02174_,17.98
_07516_,17.98
_07676_,17.98
_15217_,17.98
_15239_,17.98
soc.core.dbg_uart_tx_phase\[26\],17.98
net5432,17.98
net5993,17.98
net6677,17.98
net8487,17.98
net3782,17.975
net4691,17.975
net4424,17.965
net4983,17.965
_01713_,17.96
_04060_,17.96
_04287_,17.96
_05659_,17.96
_10589_,17.96
net11889,17.96
_01104_,17.94
_01426_,17.94
_04073_,17.94
_06040_,17.94
_10322_,17.94
_11003_,17.94
_11919_,17.94
_13844_,17.94
_13857_,17.94
_15105_,17.94
net5442,17.94
net5920,17.94
net6293,17.94
net10295,17.94
net11700,17.94
net11916,17.94
net12503,17.94
_02331_,17.92
net6360,17.92
_03009_,17.91
net8785,17.905
net9894,17.905
_00752_,17.9
_01820_,17.9
net9208,17.895
_08855_,17.885
net7661,17.885
_02230_,17.88
_03636_,17.88
gpio_control_in_1a\[1\].gpio_ib_mode_sel,17.88
net109,17.88
net5563,17.88
net6522,17.88
net8666,17.88
net12974,17.88
net12978,17.88
_08314_,17.865
_08762_,17.865
net5373,17.865
net5524,17.865
_01744_,17.86
_02853_,17.86
_04114_,17.86
_05562_,17.86
_05819_,17.86
_07810_,17.86
_13625_,17.86
net126,17.86
net5866,17.845
_01807_,17.84
_01859_,17.84
_04031_,17.84
_04539_,17.84
_04637_,17.84
soc.core.storage\[2\]\[2\],17.84
net5619,17.84
net6166,17.84
net7445,17.84
net8099,17.84
net8222,17.84
net10537,17.84
mprj_io_analog_pol[5],17.83
net6660,17.825
_00515_,17.82
_01115_,17.82
_03050_,17.82
_05663_,17.82
_05984_,17.82
_06538_,17.82
_07709_,17.82
_08989_,17.82
_14773_,17.82
soc.core.VexRiscv.DebugPlugin_busReadDataReg\[12\],17.82
soc.core.VexRiscv.IBusCachedPlugin_cache.ways_0_tags\[0\]\[20\],17.82
net3738,17.82
net4429,17.82
net10762,17.82
net11575,17.82
_07127_,17.805
net7117,17.805
_00480_,17.8
_00778_,17.8
_02874_,17.8
_06906_,17.8
_07353_,17.8
_07525_,17.8
_07567_,17.8
_08002_,17.8
_08034_,17.8
_09015_,17.8
_09440_,17.8
_10063_,17.8
pll.ringosc.dstage\[6\].id.d0,17.8
soc.core.VexRiscv.DebugPlugin_busReadDataReg\[27\],17.8
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[3\]\[9\],17.8
soc.core.VexRiscv._zz_CsrPlugin_csrMapping_readDataInit\[23\],17.8
soc.core.multiregimpl15_regs0,17.8
soc.core.storage\[0\]\[2\],17.8
net7611,17.8
net8767,17.8
net10753,17.8
net12358,17.8
net12740,17.8
net9472,17.785
_08634_,17.78
_11941_,17.78
pll.ringosc.dstage\[11\].id.d1,17.78
clknet_leaf_314_mgmt_buffers.caravel_clk,17.78
net12340,17.78
net11328,17.775
net3984,17.765
net6680,17.765
net7473,17.765
net8877,17.765
_01087_,17.76
_04622_,17.76
_05682_,17.76
_06690_,17.76
_07808_,17.76
_09401_,17.76
soc.core.VexRiscv.BranchPlugin_branchExceptionPort_payload_badAddr\[16\],17.76
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[1\]\[13\],17.76
soc.core.VexRiscv.IBusCachedPlugin_cache.lineLoader_address\[3\],17.76
soc.core.VexRiscv.RegFilePlugin_regFile\[0\]\[5\],17.76
soc.core.storage\[6\]\[6\],17.76
net8524,17.76
net9685,17.76
net10728,17.76
net12513,17.76
_10162_,17.745
net3007,17.745
net6452,17.745
_02803_,17.74
_02840_,17.74
_09951_,17.74
_10402_,17.74
_15238_,17.74
_15251_,17.74
_15268_,17.74
soc.core.VexRiscv.IBusCachedPlugin_cache.ways_0_tags\[0\]\[12\],17.74
net7511,17.74
mprj_io_analog_en[23],17.73
mprj_io_analog_pol[18],17.73
mprj_io_oeb[21],17.73
mprj_io_slow_sel[15],17.73
mprj_io_vtrip_sel[25],17.73
net5948,17.725
_05731_,17.72
_06758_,17.72
_08042_,17.72
_08381_,17.72
_12840_,17.72
_13634_,17.72
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[11\]\[13\],17.72
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[7\]\[13\],17.72
soc.core.VexRiscv.execute_to_memory_PC\[16\],17.72
net3791,17.72
net5826,17.72
net8257,17.72
net11804,17.72
net11866,17.72
net2636,17.72
net6629,17.715
_05436_,17.71
mprj_io_one[10],17.71
_08534_,17.705
net7147,17.705
net9389,17.705
_05781_,17.7
_06283_,17.7
_06780_,17.7
_07373_,17.7
_07538_,17.7
_11064_,17.7
_14863_,17.7
soc.core.mgmtsoc_litespisdrphycore_sr_cnt_litespiphy_next_value\[6\],17.7
soc.core.mgmtsoc_master_rx_fifo_source_payload_data\[7\],17.7
soc.core.mgmtsoc_value_status\[2\],17.7
net4520,17.7
net8295,17.7
net5149,17.685
net6380,17.685
net7179,17.685
net8126,17.685
net8242,17.685
_02290_,17.68
_05273_,17.68
_07907_,17.68
_08760_,17.68
_09294_,17.68
_09382_,17.68
_09398_,17.68
_10285_,17.68
_11082_,17.68
_13537_,17.68
_14614_,17.68
pll.pll_control.tint\[3\],17.68
net5777,17.68
net9357,17.68
net9950,17.68
net10140,17.68
net10909,17.68
net6591,17.675
_08170_,17.665
_03579_,17.66
_03619_,17.66
net3046,17.655
_05198_,17.65
_11815_,17.65
net5104,17.645
net8102,17.645
_01030_,17.64
_05143_,17.64
_08082_,17.64
_08642_,17.64
_09270_,17.64
_09482_,17.64
_10306_,17.64
_11029_,17.64
_12414_,17.64
_15298_,17.64
soc.core.VexRiscv.DebugPlugin_resetIt,17.64
soc.core.VexRiscv.dBusWishbone_DAT_MOSI\[19\],17.64
soc.core.storage_1\[12\]\[3\],17.64
net10748,17.64
net10962,17.64
net11509,17.64
net12689,17.64
net12716,17.64
net12943,17.64
_00524_,17.62
_02329_,17.62
_12106_,17.62
gpio_control_in_2\[0\].gpio_outenb,17.62
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[9\]\[9\],17.62
soc.core.VexRiscv.IBusCachedPlugin_cache.lineLoader_wordIndex\[0\],17.62
soc.core.VexRiscv.execute_to_memory_PC\[6\],17.62
net4064,17.62
net8000,17.62
_12997_,17.615
_07194_,17.605
net5361,17.605
net6713,17.605
net6889,17.605
net7143,17.605
_02206_,17.6
_06537_,17.6
_06627_,17.6
_06947_,17.6
_07148_,17.6
_07357_,17.6
_07788_,17.6
_07901_,17.6
_09790_,17.6
_11409_,17.6
_14217_,17.6
gpio_control_in_2\[8\].pad_gpio_out,17.6
net11004,17.6
net2672,17.6
net10171,17.59
net9653,17.585
_01323_,17.58
_03594_,17.58
_07477_,17.58
_09454_,17.58
gpio_control_in_1\[3\].gpio_ana_sel,17.58
soc.core.dbg_uart_rx_phase\[21\],17.58
net4019,17.58
net5147,17.58
net5449,17.565
net8299,17.565
net9564,17.565
net10272,17.565
net10362,17.565
_01132_,17.56
_01222_,17.56
_02083_,17.56
_05281_,17.56
_06235_,17.56
_07301_,17.56
_09403_,17.56
_09500_,17.56
_12405_,17.56
soc.core.dbg_uart_tx_tick,17.56
net249,17.56
net4522,17.56
net10173,17.56
net11311,17.56
net11546,17.56
_11658_,17.55
gpio_control_in_1\[0\].gpio_ana_sel,17.54
net6368,17.525
net7007,17.525
net7013,17.525
net8329,17.525
net8564,17.525
net11284,17.525
_00050_,17.52
_01174_,17.52
_01386_,17.52
_07868_,17.52
_08809_,17.52
_13285_,17.52
_14629_,17.52
soc.core.count\[17\],17.52
net7250,17.52
net8314,17.52
net8359,17.52
net8618,17.52
net9513,17.52
net11941,17.52
net11389,17.515
_00954_,17.5
_04154_,17.5
_13651_,17.5
gpio_control_in_1\[4\].gpio_ana_pol,17.5
net7412,17.5
net8552,17.5
net10644,17.5
_00451_,17.48
_01214_,17.48
_01604_,17.48
_01700_,17.48
_01742_,17.48
_01986_,17.48
_05816_,17.48
_09149_,17.48
_11777_,17.48
_14136_,17.48
_14928_,17.48
net3934,17.48
net7418,17.48
net8620,17.48
mprj_io_one[5],17.47
mprj_io_one[8],17.47
net7435,17.465
net8076,17.465
_00218_,17.46
_00569_,17.46
_01144_,17.46
_12053_,17.46
soc.core.mgmtsoc_vexriscv_i_cmd_payload_data\[19\],17.46
net3348,17.46
net5731,17.46
net7008,17.46
net7094,17.46
net7243,17.445
_02597_,17.44
_12875_,17.44
_15310_,17.44
net6184,17.44
net9949,17.44
_00861_,17.42
mgmt_buffers.la_data_in_mprj\[38\],17.42
net4457,17.42
net6679,17.42
net11587,17.42
mprj_io_analog_sel[3],17.41
mprj_io_holdover[6],17.41
net4971,17.405
net6635,17.405
_01354_,17.4
_02078_,17.4
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[3\]\[7\],17.4
net8771,17.4
net10486,17.395
_07010_,17.385
net7025,17.385
net10420,17.385
soc.core.VexRiscv.IBusCachedPlugin_cache.io_cpu_prefetch_pc\[27\],17.38
soc.core.storage\[7\]\[6\],17.38
net4332,17.38
net6475,17.38
net4413,17.365
net8898,17.365
_00043_,17.36
_05167_,17.36
_05765_,17.36
_06298_,17.36
_07578_,17.36
_09970_,17.36
_11358_,17.36
_15061_,17.36
_15293_,17.36
net4137,17.36
net10601,17.36
net12650,17.36
net12696,17.36
net12840,17.36
_00614_,17.355
net7859,17.345
_00786_,17.34
_01592_,17.34
_04529_,17.34
_09152_,17.34
_10316_,17.34
_12557_,17.34
_12826_,17.34
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[14\]\[15\],17.34
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[1\]\[30\],17.34
soc.core.VexRiscv.RegFilePlugin_regFile\[3\]\[6\],17.34
soc.core.mgmtsoc_value\[5\],17.34
soc.core.multiregimpl22_regs0,17.34
net5858,17.34
net8974,17.34
net9276,17.34
soc.core.dbg_uart_address\[13\],17.32
net10693,17.32
net3429,17.305
net4766,17.305
net5015,17.305
net6185,17.305
net7009,17.305
_00619_,17.3
_01871_,17.3
_02366_,17.3
_03204_,17.3
_06399_,17.3
_12207_,17.3
_12257_,17.3
_12689_,17.3
_14384_,17.3
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[15\]\[29\],17.3
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[7\]\[12\],17.3
soc.core.VexRiscv.RegFilePlugin_regFile\[8\]\[1\],17.3
soc.core.gpioin5_gpioin5_pending,17.3
net6974,17.3
net7492,17.3
net11881,17.3
net12208,17.3
net13172,17.3
net9678,17.295
net5614,17.285
_01028_,17.28
_01179_,17.28
_05616_,17.28
_09443_,17.28
_10515_,17.28
_13142_,17.28
_14562_,17.28
_15074_,17.28
net6379,17.28
_05358_,17.27
_05708_,17.27
net5584,17.265
net10916,17.265
_02864_,17.26
_04183_,17.26
_06845_,17.26
_06998_,17.26
_08759_,17.26
_09765_,17.26
_13785_,17.26
_13831_,17.26
_14932_,17.26
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[0\]\[23\],17.26
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[14\]\[20\],17.26
soc.core.gpioin1_gpioin1_trigger_d,17.26
net8236,17.26
_00186_,17.24
_00243_,17.24
_01757_,17.24
_04133_,17.24
_11133_,17.24
_13047_,17.24
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[13\]\[12\],17.24
soc.core.VexRiscv.RegFilePlugin_regFile\[14\]\[12\],17.24
soc.core.mgmtsoc_litespisdrphycore_sr_in\[2\],17.24
net3017,17.24
net6633,17.225
net6695,17.225
net8553,17.225
net8958,17.225
net9183,17.225
_01478_,17.22
_01825_,17.22
_02057_,17.22
_02222_,17.22
_02274_,17.22
_07646_,17.22
_07691_,17.22
_07847_,17.22
_07997_,17.22
_08767_,17.22
_09032_,17.22
_09399_,17.22
_09917_,17.22
_10086_,17.22
_10722_,17.22
_12830_,17.22
_13115_,17.22
soc.core.mgmtsoc_master_rx_fifo_source_payload_data\[3\],17.22
net3058,17.22
net6694,17.22
net7773,17.22
net9480,17.22
net11093,17.22
net12569,17.22
net12834,17.22
net13185,17.22
_10181_,17.205
_11612_,17.2
_15089_,17.2
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[7\]\[15\],17.2
soc.core.mgmtsoc_litespisdrphycore_sr_in\[3\],17.2
_05216_,17.19
_05268_,17.19
soc.core.mgmtsoc_load_storage\[20\],17.19
net5975,17.185
net6418,17.185
net6787,17.185
net7095,17.185
net7295,17.185
net8416,17.185
_00901_,17.18
_03497_,17.18
_06590_,17.18
_07990_,17.18
_09448_,17.18
_09473_,17.18
_11628_,17.18
_12372_,17.18
_13218_,17.18
_13762_,17.18
_14354_,17.18
_14901_,17.18
_15137_,17.18
soc.core.VexRiscv.IBusCachedPlugin_cache.ways_0_tags\[0\]\[3\],17.18
net12294,17.18
net12304,17.18
net12476,17.18
mprj_io_analog_pol[12],17.17
_07113_,17.16
_09065_,17.16
_10576_,17.16
gpio_control_in_2\[9\].gpio_vtrip_sel,17.16
soc.core.multiregimpl94_regs0,17.16
net5655,17.16
net4937,17.145
net6175,17.145
net8106,17.145
_00526_,17.14
_01096_,17.14
_05103_,17.14
_07472_,17.14
_07689_,17.14
_09573_,17.14
_14457_,17.14
_14873_,17.14
soc.core.VexRiscv.RegFilePlugin_regFile\[28\]\[5\],17.14
soc.core.storage_1\[0\]\[4\],17.14
clknet_leaf_34_mgmt_buffers.caravel_clk,17.14
net3733,17.14
net6017,17.14
net11044,17.14
net11691,17.14
net11831,17.14
net11934,17.14
net12250,17.14
_00697_,17.12
_01614_,17.12
_01722_,17.12
_02279_,17.12
_06869_,17.12
_09314_,17.12
net6386,17.12
net9305,17.12
_08923_,17.105
_10848_,17.105
net7629,17.105
net8519,17.105
_02238_,17.1
_05363_,17.1
_08342_,17.1
_09496_,17.1
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[8\]\[7\],17.1
soc.core.storage\[11\]\[6\],17.1
clknet_leaf_681_mgmt_buffers.caravel_clk,17.1
_09611_,17.085
_00648_,17.08
_02052_,17.08
_09472_,17.08
gpio_control_in_1a\[3\].gpio_ib_mode_sel,17.08
soc.core.mgmtsoc_master_rx_fifo_source_payload_data\[9\],17.08
net5730,17.08
net7760,17.08
net10786,17.08
net12323,17.08
mprj_io_vtrip_sel[3],17.07
net7073,17.065
net8227,17.065
net8950,17.065
net9033,17.065
_02942_,17.06
_05367_,17.06
_05957_,17.06
_07805_,17.06
_08303_,17.06
_10444_,17.06
_11221_,17.06
_11951_,17.06
_15123_,17.06
_15277_,17.06
net3943,17.06
net4405,17.06
net7757,17.06
net7854,17.06
net9731,17.06
net9505,17.055
net10097,17.045
_07549_,17.04
net4897,17.04
net12265,17.03
_01197_,17.02
_01831_,17.02
_08324_,17.02
_14741_,17.02
_15038_,17.02
gpio_control_in_1a\[0\].shift_register\[4\],17.02
pll.ringosc.dstage\[9\].id.ts,17.02
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[4\]\[30\],17.02
soc.core.dbg_uart_rx_rx_d,17.02
net3998,17.02
net5569,17.02
net6258,17.02
net6971,17.02
net11021,17.02
net11653,17.02
net12972,17.02
net10353,17.015
net10445,17.015
net7241,17.005
net7337,17.005
_01315_,17
_02887_,17
_05528_,17
_10338_,17
_10362_,17
_10434_,17
_13665_,17
net4314,17
net8054,16.985
net8652,16.985
_02831_,16.98
_03743_,16.98
_05611_,16.98
_05769_,16.98
_14196_,16.98
_14559_,16.98
_15227_,16.98
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[5\]\[20\],16.98
net3208,16.98
net11906,16.98
net10654,16.97
net4326,16.965
net7493,16.965
net8603,16.965
_02561_,16.96
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[6\]\[3\],16.96
net6228,16.96
net7731,16.96
net10483,16.96
_13433_,16.95
_08535_,16.945
net6484,16.945
net7479,16.945
_01120_,16.94
_01867_,16.94
_08996_,16.94
_10960_,16.94
pll.ringosc.dstage\[4\].id.d1,16.94
net12690,16.94
net10461,16.935
net8580,16.925
_00423_,16.92
_02115_,16.92
_10178_,16.905
_01997_,16.9
_02102_,16.9
_02298_,16.9
_04561_,16.9
_09133_,16.9
_10464_,16.9
_15043_,16.9
_15222_,16.9
_15243_,16.9
soc.core.VexRiscv.BranchPlugin_branchExceptionPort_payload_badAddr\[13\],16.9
soc.core.VexRiscv.CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr\[21\],16.9
soc.core.mgmtsoc_vexriscv_debug_bus_dat_r\[9\],16.9
net11630,16.9
net5281,16.895
net7043,16.885
_01595_,16.88
_01752_,16.88
_02069_,16.88
_04194_,16.88
_07565_,16.88
_10064_,16.88
_14852_,16.88
soc.core.VexRiscv.RegFilePlugin_regFile\[10\]\[12\],16.88
soc.core.VexRiscv.RegFilePlugin_regFile\[28\]\[11\],16.88
soc.core.uartwishbonebridge_state\[1\],16.88
net6472,16.88
net11733,16.88
net5558,16.875
_00608_,16.86
_09959_,16.86
_13570_,16.86
_08703_,16.845
net5268,16.845
net6611,16.845
net7329,16.845
net7803,16.845
net8909,16.845
_00876_,16.84
_01817_,16.84
_02211_,16.84
_03526_,16.84
_06355_,16.84
_07338_,16.84
_08824_,16.84
_11752_,16.84
_13483_,16.84
_13746_,16.84
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[9\]\[22\],16.84
soc.core.VexRiscv.IBusCachedPlugin_cache.ways_0_tags\[1\]\[5\],16.84
soc.core.VexRiscv.RegFilePlugin_regFile\[23\]\[5\],16.84
soc.core.multiregimpl51_regs0,16.84
net3834,16.84
net6618,16.84
net2623,16.84
net7194,16.835
_15077_,16.82
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[4\]\[7\],16.82
net9904,16.82
net6193,16.815
_05296_,16.81
net8855,16.805
_03082_,16.8
_05390_,16.8
_06480_,16.8
_08028_,16.8
_09931_,16.8
_10706_,16.8
soc.core.spi_master_control_storage\[0\],16.8
net4425,16.8
net9991,16.8
net10476,16.795
net6241,16.785
net9214,16.785
_06197_,16.78
_06617_,16.78
_10736_,16.78
_13900_,16.78
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[6\]\[15\],16.78
soc.core.VexRiscv.lastStagePc\[3\],16.78
net85,16.78
net8445,16.765
_01919_,16.76
_07917_,16.76
_09468_,16.76
_09684_,16.76
_13866_,16.76
_15303_,16.76
gpio_control_in_1\[1\].gpio_slow_sel,16.76
soc.core.VexRiscv.dBusWishbone_DAT_MOSI\[31\],16.76
soc.core.dbg_uart_tx_phase\[22\],16.76
soc.core.gpioin4_pending_r,16.76
soc.core.mgmtsoc_load_storage\[19\],16.76
soc.core.storage\[3\]\[7\],16.76
net5164,16.76
net7042,16.76
net12674,16.76
net11950,16.745
_06768_,16.74
_09972_,16.74
gpio_control_in_2\[8\].gpio_outenb,16.74
mgmt_buffers.la_data_in_mprj_bar\[83\],16.74
clknet_leaf_714_mgmt_buffers.caravel_clk,16.74
mprj_io_analog_en[1],16.73
mprj_io_holdover[2],16.73
mprj_io_slow_sel[7],16.73
net6819,16.725
_00144_,16.72
_00783_,16.72
_00819_,16.72
_04771_,16.72
_05815_,16.72
_06630_,16.72
_07102_,16.72
_08097_,16.72
_08098_,16.72
_08187_,16.72
_09446_,16.72
_09466_,16.72
_13502_,16.72
_15325_,16.72
soc.core.VexRiscv.dBusWishbone_DAT_MOSI\[14\],16.72
net3621,16.72
net6390,16.72
net6594,16.72
net7381,16.72
net9406,16.72
net10673,16.72
net10798,16.72
_09955_,16.7
_11074_,16.7
_11762_,16.7
gpio_control_in_1a\[0\].gpio_inenb,16.7
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[0\]\[15\],16.7
net4154,16.7
net9188,16.7
_08889_,16.685
net4789,16.685
net8413,16.685
_02904_,16.68
_05251_,16.68
_05735_,16.68
_06563_,16.68
_07931_,16.68
_08417_,16.68
_08606_,16.68
_11476_,16.68
_15312_,16.68
net4764,16.68
net5520,16.68
_00652_,16.66
_03592_,16.66
_05929_,16.66
_07059_,16.66
_08151_,16.66
_13322_,16.66
net11124,16.66
net13074,16.65
_08352_,16.645
net3509,16.645
net4375,16.645
net5554,16.645
net7516,16.645
net8885,16.645
net9012,16.645
_01529_,16.64
_01875_,16.64
_02487_,16.64
_02857_,16.64
_04682_,16.64
_05349_,16.64
_06001_,16.64
_06038_,16.64
_07208_,16.64
_07435_,16.64
_07992_,16.64
_09444_,16.64
_10295_,16.64
soc.core.uart_phy_tx_phase\[15\],16.64
net6563,16.64
net6812,16.64
net8853,16.635
_00510_,16.62
_00639_,16.62
_01607_,16.62
_01739_,16.62
net5248,16.62
_07024_,16.605
net3640,16.605
net7915,16.605
net8830,16.605
net8907,16.605
_00738_,16.6
_04163_,16.6
_06067_,16.6
_13001_,16.6
_13276_,16.6
soc.core.mgmtsoc_vexriscv_i_cmd_payload_data\[28\],16.6
net7002,16.6
net9574,16.6
net11994,16.6
net12318,16.595
net5850,16.585
_01251_,16.58
_08153_,16.58
_13417_,16.58
soc.core.VexRiscv.DebugPlugin_busReadDataReg\[2\],16.58
net3828,16.58
net4083,16.58
net7549,16.58
mprj_io_one[19],16.57
mprj_io_one[26],16.57
net3444,16.565
net8836,16.565
_03067_,16.56
_04717_,16.56
_05315_,16.56
_06046_,16.56
_07040_,16.56
_07125_,16.56
_08990_,16.56
_11400_,16.56
net5601,16.56
net5750,16.56
net7326,16.56
net7478,16.56
net8406,16.56
net8949,16.56
net9246,16.56
net10913,16.56
net8141,16.545
net9918,16.545
_01639_,16.54
_02478_,16.54
_02870_,16.54
_06483_,16.54
net7864,16.54
net8393,16.54
net8470,16.525
_00872_,16.52
_00990_,16.52
_01773_,16.52
_03851_,16.52
_05058_,16.52
_05593_,16.52
_15044_,16.52
net4087,16.52
net10456,16.515
net4975,16.505
_00676_,16.5
_00723_,16.5
_01195_,16.5
_01455_,16.5
net118,16.5
net5547,16.5
_05204_,16.49
_05396_,16.49
_12980_,16.485
net5860,16.485
_01902_,16.48
_05756_,16.48
_12633_,16.48
net11819,16.48
net12113,16.48
net9995,16.475
net5737,16.465
_02140_,16.46
_02678_,16.46
_04014_,16.46
_04135_,16.46
_14781_,16.46
net108,16.46
net4343,16.46
net6447,16.46
net6474,16.46
net7917,16.46
net8980,16.46
_09626_,16.445
net4856,16.445
_01221_,16.44
_01695_,16.44
_05483_,16.44
_06201_,16.44
_06934_,16.44
_08544_,16.44
_08764_,16.44
_12430_,16.44
_15230_,16.44
soc.core.VexRiscv.RegFilePlugin_regFile\[4\]\[6\],16.44
net8036,16.44
net10635,16.44
net8872,16.435
_01097_,16.42
_01493_,16.42
_09512_,16.42
_09730_,16.42
_10462_,16.42
_11085_,16.42
soc.core.mgmtsoc_litespisdrphycore_sr_in\[16\],16.42
soc.core.multiregimpl49_regs0,16.42
soc.core.storage\[9\]\[0\],16.42
net6550,16.42
net7665,16.42
net8216,16.42
net8235,16.42
net10915,16.42
net12497,16.42
net6079,16.405
net8333,16.405
_04136_,16.4
_08499_,16.4
_12318_,16.4
_13488_,16.4
_15234_,16.4
net5111,16.4
_09008_,16.395
net8293,16.395
net10235,16.395
net10547,16.395
net10320,16.39
_08908_,16.385
net4793,16.385
net6482,16.385
net7093,16.385
net7586,16.385
net8709,16.385
_03180_,16.38
_06513_,16.38
_07644_,16.38
_09456_,16.38
_09464_,16.38
_11697_,16.38
_13462_,16.38
soc.core.VexRiscv.CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr\[23\],16.38
net3385,16.38
net7867,16.365
_02106_,16.36
_13776_,16.36
net10544,16.355
net5661,16.345
net8596,16.345
_07245_,16.34
_08563_,16.34
_09297_,16.34
_10987_,16.34
soc.core.VexRiscv.IBusCachedPlugin_cache.lineLoader_address\[2\],16.34
soc.core.memdat_3\[7\],16.34
soc.core.mgmtsoc_master_phyconfig_storage\[10\],16.34
net4524,16.34
net7351,16.34
net10014,16.34
net11417,16.325
_01495_,16.32
_02134_,16.32
_05184_,16.32
_11671_,16.32
_15145_,16.32
gpio_control_in_1\[2\].gpio_slow_sel,16.32
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[11\]\[20\],16.32
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[4\]\[20\],16.32
soc.core.dbg_uart_rx_phase\[19\],16.32
soc.core.mgmtsoc_load_storage\[31\],16.32
soc.core.multiregimpl64_regs0,16.32
net3225,16.32
net5969,16.32
_05536_,16.31
net5183,16.305
net6799,16.305
net7694,16.305
net7939,16.305
_00660_,16.3
_00929_,16.3
_05101_,16.3
_05197_,16.3
_05209_,16.3
_06275_,16.3
_07396_,16.3
_07474_,16.3
_09412_,16.3
_09753_,16.3
_12443_,16.3
soc.core.VexRiscv.RegFilePlugin_regFile\[25\]\[11\],16.3
net6924,16.3
net7364,16.3
net9468,16.3
net11009,16.3
net12526,16.3
net12644,16.3
net12699,16.3
net12700,16.3
_00164_,16.28
_12316_,16.28
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[13\]\[18\],16.28
soc.core.dbg_uart_cmd\[7\],16.28
soc.core.uart_phy_tx_phase\[21\],16.28
_01319_,16.26
_02523_,16.26
_02621_,16.26
_06426_,16.26
_06835_,16.26
_07885_,16.26
_07906_,16.26
_08669_,16.26
_08872_,16.26
_09488_,16.26
_09717_,16.26
_14897_,16.26
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[9\]\[8\],16.26
soc.core.storage_1\[10\]\[3\],16.26
soc.core.storage_1\[10\]\[7\],16.26
clknet_leaf_143_mgmt_buffers.caravel_clk,16.26
net4816,16.26
net9827,16.26
net11538,16.26
net11747,16.26
net11893,16.26
net12177,16.26
net2613,16.26
net2628,16.26
net7023,16.255
_08969_,16.24
_10508_,16.24
_10995_,16.24
_11126_,16.24
_14413_,16.24
soc.core.VexRiscv.CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr\[15\],16.24
soc.core.VexRiscv.CsrPlugin_selfException_payload_badAddr\[4\],16.24
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[9\]\[7\],16.24
mprj_io_one[18],16.23
mprj_io_one[20],16.23
mprj_io_one[22],16.23
net5689,16.225
net6811,16.225
net7382,16.225
_01403_,16.22
_03587_,16.22
_04123_,16.22
_05737_,16.22
_07761_,16.22
_07932_,16.22
_09787_,16.22
_12631_,16.22
_15136_,16.22
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[14\]\[18\],16.22
clknet_leaf_1086_mgmt_buffers.caravel_clk,16.22
net6301,16.22
net9320,16.22
net9447,16.22
net11175,16.22
net12482,16.22
_10704_,16.2
gpio_control_in_1a\[0\].gpio_slow_sel,16.2
clknet_leaf_493_mgmt_buffers.caravel_clk,16.2
net6025,16.2
net8808,16.2
_07326_,16.185
_08328_,16.185
_02499_,16.18
_07084_,16.18
_07869_,16.18
_09438_,16.18
_09825_,16.18
_10732_,16.18
_14475_,16.18
soc.core.VexRiscv.IBusCachedPlugin_cache.ways_0_tags\[0\]\[14\],16.18
soc.core.uart_tx_trigger_d,16.18
net6266,16.18
net6624,16.18
net8336,16.18
net11602,16.18
net11668,16.18
_00741_,16.16
_07778_,16.16
soc.core.count\[3\],16.16
net10884,16.16
_08807_,16.145
_10223_,16.145
net4196,16.145
net7481,16.145
net7937,16.145
net8350,16.145
net9700,16.145
net10557,16.145
_01117_,16.14
_02686_,16.14
_02836_,16.14
_05549_,16.14
_07155_,16.14
_07247_,16.14
_07927_,16.14
_15264_,16.14
soc.core.uart_phy_rx_count\[2\],16.14
clknet_leaf_240_mgmt_buffers.caravel_clk,16.14
net5237,16.14
net8412,16.14
net10497,16.135
net4858,16.125
net6955,16.125
_07526_,16.12
net3132,16.12
net7457,16.12
net9997,16.12
mprj_io_one[2],16.11
net7105,16.105
_00625_,16.1
_02294_,16.1
_02749_,16.1
_05520_,16.1
_05570_,16.1
_05873_,16.1
_06155_,16.1
_09143_,16.1
_11512_,16.1
_11828_,16.1
_13275_,16.1
clknet_leaf_228_mgmt_buffers.caravel_clk,16.1
net6949,16.1
net7880,16.1
net8873,16.1
net11645,16.1
net12060,16.1
net7512,16.085
_00781_,16.08
_01904_,16.08
_03991_,16.08
_08893_,16.08
soc.core.storage_1\[8\]\[0\],16.08
net4568,16.08
net7491,16.08
mgmt_buffers.la_data_in_mprj\[93\],16.065
net5882,16.065
_01551_,16.06
_02447_,16.06
_15046_,16.06
soc.core.gpioin3_gpioin3_trigger_d,16.06
net5690,16.06
net5945,16.06
net7523,16.06
net7628,16.06
net10923,16.06
net11108,16.06
net10705,16.055
mprj_io_slow_sel[11],16.05
net3039,16.045
net6018,16.045
net8246,16.045
_01307_,16.04
_02312_,16.04
_05662_,16.04
net3367,16.04
net6926,16.04
net8050,16.04
net12865,16.04
net13188,16.04
net5675,16.025
_02071_,16.02
_02567_,16.02
clknet_leaf_717_mgmt_buffers.caravel_clk,16.02
net6399,16.005
net7005,16.005
net7732,16.005
_00040_,16
_02570_,16
_08529_,15.985
_10166_,15.985
_01247_,15.98
_02042_,15.98
_02731_,15.98
_09639_,15.98
_13149_,15.98
_15333_,15.98
soc.core.VexRiscv.RegFilePlugin_regFile\[14\]\[15\],15.98
net3101,15.98
net10117,15.98
gpio_control_in_2\[7\].gpio_ana_sel,15.975
net3300,15.965
_00765_,15.96
_05256_,15.96
_06466_,15.96
_06790_,15.96
_06997_,15.96
_08248_,15.96
_13413_,15.96
_14111_,15.96
soc.core.VexRiscv.RegFilePlugin_regFile\[2\]\[6\],15.96
net102,15.96
net127,15.96
net4215,15.96
net4276,15.96
net7024,15.96
net2614,15.96
net6358,15.945
net7021,15.945
_08113_,15.94
_09404_,15.94
_10510_,15.94
_12991_,15.94
net3065,15.925
net5264,15.925
net5917,15.925
net6269,15.925
net9961,15.925
_07319_,15.92
_07498_,15.92
_07853_,15.92
_08031_,15.92
_08191_,15.92
_08812_,15.92
_09503_,15.92
_09771_,15.92
soc.core.mgmtsoc_scratch_storage\[1\],15.92
net3161,15.92
net9479,15.92
net9736,15.92
net6213,15.905
_05543_,15.9
_05884_,15.9
_13755_,15.9
net9300,15.9
_11138_,15.89
mprj_io_one[14],15.89
mprj_io_one[15],15.89
mprj_io_one[16],15.89
mprj_io_one[21],15.89
mprj_io_one[23],15.89
mprj_io_one[24],15.89
mprj_io_one[25],15.89
net3121,15.885
net7051,15.885
_02703_,15.88
_05351_,15.88
_06770_,15.88
_09785_,15.88
_12709_,15.88
_13892_,15.88
soc.core.VexRiscv.execute_to_memory_PC\[31\],15.88
soc.core.dbg_uart_tx_phase\[18\],15.88
soc.core.mgmtsoc_litespisdrphycore_sr_in\[31\],15.88
soc.core.storage_1\[12\]\[0\],15.88
net7727,15.88
net8366,15.88
net12469,15.88
net12704,15.88
_02417_,15.86
_10339_,15.86
_12691_,15.86
soc.core.VexRiscv.RegFilePlugin_regFile\[12\]\[3\],15.86
soc.core.mgmtsoc_value_status\[22\],15.86
net9273,15.855
net10430,15.855
soc.core.uart_phy_rx_phase\[24\],15.85
net6480,15.845
net6531,15.845
net7722,15.845
net8039,15.845
net8985,15.845
net9014,15.845
_00153_,15.84
_01282_,15.84
_02139_,15.84
_04329_,15.84
_06756_,15.84
_07311_,15.84
_07579_,15.84
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[12\]\[15\],15.84
soc.core.dbg_uart_rx_phase\[10\],15.84
soc.core.la_ien_storage\[12\],15.84
soc.core.spi_master_control_storage\[4\],15.84
net4034,15.84
net4819,15.84
net4868,15.84
net5234,15.84
net6986,15.84
net7509,15.84
net11885,15.84
net12279,15.84
net12673,15.84
_00647_,15.82
_01754_,15.82
_02685_,15.82
_08991_,15.82
_10575_,15.82
net3618,15.82
net5212,15.82
mprj_io_ib_mode_sel[4],15.81
mprj_io_slow_sel[9],15.81
net5872,15.805
net6089,15.805
net7288,15.805
_01053_,15.8
_01149_,15.8
_01584_,15.8
_02180_,15.8
_02326_,15.8
_02394_,15.8
_06077_,15.8
_06647_,15.8
_09098_,15.8
_09757_,15.8
_13283_,15.8
_15225_,15.8
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[13\]\[7\],15.8
soc.core.storage\[8\]\[4\],15.8
soc.core.storage\[8\]\[5\],15.8
clknet_leaf_30_mgmt_buffers.caravel_clk,15.8
net4125,15.8
net9537,15.8
net9839,15.8
net11413,15.8
net11626,15.8
net12562,15.8
_01236_,15.78
_03787_,15.78
soc.core.uart_phy_rx_phase\[9\],15.78
net3256,15.78
mprj_io_one[0],15.77
mprj_io_one[4],15.77
mprj_io_one[7],15.77
net6835,15.765
net10003,15.765
_00436_,15.76
_01020_,15.76
_01103_,15.76
_01517_,15.76
_02830_,15.76
_03239_,15.76
_06016_,15.76
_06260_,15.76
_07023_,15.76
_07528_,15.76
_09306_,15.76
_10518_,15.76
_10710_,15.76
_12170_,15.76
pll.ringosc.dstage\[8\].id.out,15.76
soc.core.mgmtsoc_litespisdrphycore_count\[1\],15.76
net3433,15.76
net8634,15.76
net10700,15.76
net12395,15.76
net12819,15.76
_01554_,15.74
_09075_,15.74
_13336_,15.74
net5713,15.74
net7120,15.74
net10000,15.74
net10587,15.74
net4544,15.725
net9039,15.725
_02524_,15.72
_03287_,15.72
_05135_,15.72
_06287_,15.72
_08026_,15.72
_13222_,15.72
_13628_,15.72
_15109_,15.72
_15246_,15.72
_15331_,15.72
soc.core.VexRiscv.DebugPlugin_busReadDataReg\[24\],15.72
net5236,15.72
net5408,15.72
net7878,15.72
net8475,15.72
net10578,15.72
net11913,15.72
mprj_io_analog_en[6],15.71
mprj_io_analog_pol[2],15.71
_00422_,15.7
_00666_,15.7
_02317_,15.7
_04474_,15.7
_10271_,15.7
_10386_,15.7
_13929_,15.7
_09040_,15.685
net8254,15.685
net8542,15.685
net9348,15.685
_00936_,15.68
_05193_,15.68
_05201_,15.68
_05259_,15.68
_06095_,15.68
_08408_,15.68
_08695_,15.68
_11931_,15.68
_14631_,15.68
_15010_,15.68
_15203_,15.68
soc.core.mgmtsoc_scratch_storage\[5\],15.68
net112,15.68
clknet_leaf_643_mgmt_buffers.caravel_clk,15.68
net3081,15.68
net3719,15.68
net6168,15.68
net8079,15.68
net10611,15.675
_01725_,15.66
_02309_,15.66
clknet_leaf_294_mgmt_buffers.caravel_clk,15.66
net10427,15.645
_00238_,15.64
_00805_,15.64
_01486_,15.64
_01548_,15.64
_05813_,15.64
_06057_,15.64
_06160_,15.64
_07900_,15.64
_08162_,15.64
_12850_,15.64
_13840_,15.64
_15009_,15.64
_15034_,15.64
_15035_,15.64
_15047_,15.64
_15086_,15.64
_15153_,15.64
_15235_,15.64
_15304_,15.64
net5579,15.64
net6084,15.64
net6433,15.64
net9526,15.64
net10830,15.64
_00821_,15.62
_01591_,15.62
_10425_,15.62
gpio_control_in_1\[4\].gpio_ana_sel,15.62
soc.core.VexRiscv.RegFilePlugin_regFile\[24\]\[7\],15.62
soc.core.multiregimpl24_regs0,15.62
net5366,15.62
net7844,15.62
net8094,15.62
net8031,15.605
net8680,15.605
_00464_,15.6
_01155_,15.6
_01514_,15.6
_05818_,15.6
_11112_,15.6
_13010_,15.6
_13464_,15.6
_15321_,15.6
mgmt_buffers.la_data_in_mprj_bar\[81\],15.6
clknet_leaf_138_mgmt_buffers.caravel_clk,15.6
net11703,15.6
net8513,15.585
_01398_,15.58
_01469_,15.58
_01663_,15.58
net5496,15.58
net5648,15.58
net8318,15.58
net8537,15.58
_05808_,15.56
_05985_,15.56
_13361_,15.56
_15060_,15.56
pll.ringosc.dstage\[8\].id.ts,15.56
_05634_,15.55
_05780_,15.55
net5518,15.545
net7206,15.545
net7277,15.545
net7346,15.54
_01342_,15.52
_06853_,15.52
_09394_,15.52
_10721_,15.52
_11033_,15.52
_13943_,15.52
soc.core.multiregimpl17_regs0,15.52
net3120,15.52
net8858,15.52
net10038,15.52
net8633,15.515
net6662,15.505
net6735,15.505
net8274,15.505
net9150,15.505
_00632_,15.5
_09559_,15.5
_13607_,15.5
soc.core.mgmtsoc_value_status\[25\],15.5
net9925,15.5
net10127,15.5
net11836,15.5
net6607,15.485
net12244,15.485
_04780_,15.48
_07855_,15.48
net4925,15.475
_08373_,15.465
net6723,15.465
net10589,15.465
_00728_,15.46
_05656_,15.46
_06815_,15.46
_07999_,15.46
_08038_,15.46
_09316_,15.46
_09480_,15.46
_09510_,15.46
_10422_,15.46
soc.core.VexRiscv.RegFilePlugin_regFile\[20\]\[6\],15.46
soc.core.VexRiscv.RegFilePlugin_regFile\[4\]\[15\],15.46
soc.core.multiregimpl48_regs1,15.46
soc.core.uart_phy_tx_phase\[16\],15.46
net93,15.46
net9882,15.46
net10243,15.46
net10758,15.46
net2619,15.46
net7249,15.445
_01329_,15.44
_11805_,15.44
_14547_,15.44
mprj_io_one[11],15.43
mprj_io_one[12],15.43
mprj_io_one[13],15.43
mprj_io_one[3],15.43
mprj_io_one[6],15.43
mprj_io_one[9],15.43
net3589,15.425
net6649,15.425
net7190,15.425
net9307,15.425
net9478,15.425
_01753_,15.42
_07833_,15.42
_13378_,15.42
_15070_,15.42
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[5\]\[29\],15.42
soc.core.VexRiscv.execute_to_memory_PC\[12\],15.42
soc.core.dbg_uart_tx_phase\[20\],15.42
soc.core.mgmtsoc_value_status\[18\],15.42
net5511,15.42
net8563,15.42
net11545,15.42
net12224,15.42
_05408_,15.41
_01102_,15.4
_04121_,15.4
_08413_,15.4
_08415_,15.4
gpio_control_in_2\[7\].gpio_outenb,15.4
soc.core.VexRiscv.RegFilePlugin_regFile\[3\]\[5\],15.4
net8739,15.4
net8884,15.4
net11162,15.4
_05318_,15.39
_09789_,15.385
net6969,15.385
net7616,15.385
net8207,15.385
net8747,15.385
_00788_,15.38
_02016_,15.38
_04503_,15.38
_05169_,15.38
_06807_,15.38
_06918_,15.38
_08322_,15.38
_09465_,15.38
_09940_,15.38
_10089_,15.38
_10205_,15.38
_13175_,15.38
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[15\]\[22\],15.38
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[3\]\[27\],15.38
soc.core.VexRiscv.execute_to_memory_INSTRUCTION\[28\],15.38
soc.core.multiregimpl14_regs0,15.38
soc.core.storage_1\[4\]\[5\],15.38
net3622,15.38
net5506,15.38
net7172,15.38
net9446,15.38
net11480,15.38
net12944,15.38
net12971,15.38
mprj_io_analog_sel[9],15.37
net4204,15.365
_01289_,15.36
_07449_,15.36
_11136_,15.36
net5501,15.355
_05154_,15.35
mgmt_buffers.la_data_in_mprj\[32\],15.345
net5478,15.345
net5522,15.345
net6752,15.345
_01696_,15.34
_06868_,15.34
_07521_,15.34
_08095_,15.34
_09748_,15.34
_13247_,15.34
_13565_,15.34
_15093_,15.34
soc.core.VexRiscv.CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr\[22\],15.34
soc.core.dbg_uart_tx_data\[0\],15.34
net91,15.34
net3511,15.34
net5335,15.34
net7084,15.34
net7240,15.34
net9224,15.34
net10158,15.34
net12530,15.34
net12653,15.34
_00516_,15.32
gpio_control_bidir_1\[0\].gpio_inenb,15.32
soc.core.mgmtsoc_master_rx_fifo_source_payload_data\[21\],15.32
clknet_leaf_1003_mgmt_buffers.caravel_clk,15.32
net5030,15.32
net10454,15.32
net11609,15.32
_08822_,15.305
net6378,15.305
net7959,15.305
_04612_,15.3
_04774_,15.3
_05943_,15.3
_06558_,15.3
_07464_,15.3
_08803_,15.3
_10196_,15.3
_11349_,15.3
_11737_,15.3
_13670_,15.3
_15033_,15.3
_15198_,15.3
soc.core.VexRiscv.IBusCachedPlugin_cache.ways_0_tags\[0\]\[24\],15.3
soc.core.VexRiscv.RegFilePlugin_regFile\[17\]\[15\],15.3
net2808,15.3
net5543,15.3
net8507,15.3
_00562_,15.28
_01322_,15.28
_01530_,15.28
_06323_,15.28
_12639_,15.28
net9654,15.28
_07285_,15.275
net2955,15.265
net4896,15.265
net5177,15.265
_00849_,15.26
_01671_,15.26
_01781_,15.26
_02941_,15.26
_06039_,15.26
_07436_,15.26
_08963_,15.26
_09022_,15.26
_09981_,15.26
_11787_,15.26
_12396_,15.26
mgmt_buffers.la_data_in_mprj_bar\[53\],15.26
soc.core.VexRiscv.IBusCachedPlugin_cache.ways_0_tags\[1\]\[9\],15.26
soc.core.VexRiscv.execute_to_memory_PC\[29\],15.26
net259,15.26
clknet_leaf_232_mgmt_buffers.caravel_clk,15.26
net5894,15.26
net7515,15.26
net7527,15.26
net7595,15.26
net8283,15.26
_02362_,15.24
_02547_,15.24
_06485_,15.24
_13768_,15.24
net8030,15.24
net8253,15.24
net9283,15.24
_09761_,15.225
net3935,15.225
net4995,15.225
net6783,15.225
net7833,15.225
net7976,15.225
net8074,15.225
net9624,15.225
_05645_,15.22
_07633_,15.22
_11089_,15.22
_13057_,15.22
_13936_,15.22
_14443_,15.22
_15177_,15.22
soc.core.VexRiscv.CsrPlugin_mcause_interrupt,15.22
clknet_leaf_1105_mgmt_buffers.caravel_clk,15.22
net3245,15.22
net5345,15.22
mgmt_buffers.la_data_in_mprj\[92\],15.205
net7524,15.205
_01191_,15.2
_02009_,15.2
_08185_,15.2
_12276_,15.2
gpio_control_in_1a\[2\].gpio_slow_sel,15.2
net5714,15.2
net8184,15.2
net6197,15.185
net8327,15.185
_00785_,15.18
_01746_,15.18
_02474_,15.18
_04734_,15.18
_06012_,15.18
_09938_,15.18
soc.core.VexRiscv.RegFilePlugin_regFile\[2\]\[5\],15.18
clknet_leaf_287_mgmt_buffers.caravel_clk,15.18
net9909,15.18
net3664,15.165
net6239,15.165
net6420,15.165
_01965_,15.16
_02717_,15.16
_03013_,15.16
net4978,15.16
_08471_,15.145
net5076,15.145
net9065,15.145
_00974_,15.14
_05271_,15.14
_07302_,15.14
_10438_,15.14
_15184_,15.14
_15242_,15.14
soc.core.dbg_uart_tx_phase\[21\],15.14
net5724,15.14
net12717,15.14
_12419_,15.13
net3912,15.125
net6466,15.125
_01353_,15.12
_08188_,15.12
net344,15.12
net4148,15.12
net5033,15.12
net5425,15.12
net6565,15.12
net7092,15.12
net8433,15.12
_00914_,15.1
_04568_,15.1
_05726_,15.1
clknet_leaf_728_mgmt_buffers.caravel_clk,15.1
net6309,15.1
net6902,15.1
net13181,15.1
_00626_,15.08
_01196_,15.08
_01890_,15.08
_02244_,15.08
_13129_,15.08
pll.pll_control.prep\[2\],15.08
net7140,15.08
net5393,15.065
net9577,15.065
_06898_,15.06
_07390_,15.06
_14484_,15.06
soc.core.count\[7\],15.06
soc.core.storage_1\[3\]\[2\],15.06
_01376_,15.04
_02392_,15.04
_02807_,15.04
_09506_,15.04
_11616_,15.04
_12418_,15.04
_12676_,15.04
_13399_,15.04
soc.core.VexRiscv.IBusCachedPlugin_cache._zz_banks_0_port1\[9\],15.04
soc.core.VexRiscv.RegFilePlugin_regFile\[18\]\[11\],15.04
soc.core.VexRiscv.RegFilePlugin_regFile\[6\]\[12\],15.04
net3265,15.04
net4031,15.04
net8911,15.04
net11283,15.04
net11687,15.04
net11760,15.04
net6925,15.035
mprj_io_analog_en[4],15.03
mprj_io_analog_sel[11],15.03
net6686,15.025
net8221,15.025
_05548_,15.02
_13326_,15.02
net3372,15.02
_08862_,15.015
net5878,15.005
net6556,15.005
net6658,15.005
_01027_,15
_01463_,15
_06374_,15
_06628_,15
_06921_,15
_08577_,15
_08668_,15
_09421_,15
_12048_,15
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[7\]\[28\],15
net3358,15
net6932,15
net11973,15
net12328,15
_00147_,14.985
_09251_,14.985
net4817,14.985
net9978,14.985
_01100_,14.98
_01698_,14.98
_05059_,14.98
_07039_,14.98
_07221_,14.98
_13371_,14.98
_13787_,14.98
net12818,14.98
_13593_,14.975
gpio_control_in_1a\[4\].gpio_ib_mode_sel,14.975
_10191_,14.965
net3894,14.965
net6581,14.965
net6631,14.965
net11174,14.965
_00797_,14.96
_02732_,14.96
_03016_,14.96
_05180_,14.96
_05907_,14.96
_06729_,14.96
_07291_,14.96
_07442_,14.96
_07970_,14.96
_13154_,14.96
_14490_,14.96
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[15\]\[12\],14.96
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[1\]\[23\],14.96
soc.core.mgmtsoc_litespisdrphycore_storage\[2\],14.96
net5250,14.96
net8173,14.96
net8819,14.96
net9026,14.96
net9923,14.96
net9932,14.96
net10911,14.96
net12278,14.96
net12438,14.96
net12713,14.96
net12960,14.96
_14856_,14.955
_05148_,14.95
net13084,14.95
net10839,14.95
net3873,14.945
net8981,14.945
_01594_,14.94
_02200_,14.94
_09453_,14.94
_11579_,14.94
_12852_,14.94
_13141_,14.94
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[0\]\[13\],14.94
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[14\]\[24\],14.94
net6042,14.94
net6698,14.94
mprj_io_vtrip_sel[2],14.93
net10512,14.93
_14567_,14.925
net6805,14.925
net7210,14.925
_00746_,14.92
_05145_,14.92
_05339_,14.92
_05417_,14.92
_05440_,14.92
_05558_,14.92
_07572_,14.92
_07673_,14.92
_07785_,14.92
_09531_,14.92
_10265_,14.92
_10437_,14.92
_13343_,14.92
_14630_,14.92
mgmt_buffers.la_data_in_mprj_bar\[46\],14.92
soc.core.spi_master_mosi_storage\[2\],14.92
clknet_leaf_538_mgmt_buffers.caravel_clk,14.92
net5938,14.92
net8890,14.92
net9497,14.92
net11670,14.92
net12037,14.91
_04059_,14.9
_07919_,14.9
pll.itrim\[23\],14.9
soc.core.mgmtsoc_litespisdrphycore_sr_in\[23\],14.9
net4814,14.9
net4742,14.885
net9418,14.885
_00721_,14.88
_02208_,14.88
_02992_,14.88
_05393_,14.88
_05827_,14.88
_06475_,14.88
_06681_,14.88
_07524_,14.88
_07534_,14.88
_07536_,14.88
_08065_,14.88
_08331_,14.88
_08720_,14.88
_09481_,14.88
_09745_,14.88
_10118_,14.88
_13341_,14.88
_15125_,14.88
net2599,14.88
net4876,14.88
net5278,14.88
net8908,14.88
net7612,14.865
_11459_,14.86
gpio_control_in_1a\[4\].gpio_ana_sel,14.86
net7407,14.845
net8387,14.845
_02049_,14.84
_02205_,14.84
_02651_,14.84
_02744_,14.84
_02826_,14.84
_04558_,14.84
_05335_,14.84
_05643_,14.84
_05743_,14.84
_07158_,14.84
_13337_,14.84
soc.core.VexRiscv.RegFilePlugin_regFile\[29\]\[10\],14.84
net4260,14.84
net9117,14.84
net10841,14.84
_01609_,14.82
_02061_,14.82
_06964_,14.82
_07467_,14.82
_08074_,14.82
_13891_,14.82
soc.core.interface3_bank_bus_dat_r\[20\],14.82
net4994,14.82
net5054,14.82
net7209,14.82
net5637,14.805
_01075_,14.8
_01194_,14.8
_01217_,14.8
_04562_,14.8
_07405_,14.8
_10122_,14.8
_15106_,14.8
soc.core.VexRiscv.RegFilePlugin_regFile\[26\]\[6\],14.8
clknet_leaf_281_mgmt_buffers.caravel_clk,14.8
clknet_leaf_1147_mgmt_buffers.caravel_clk,14.8
net5460,14.8
net8176,14.8
net7657,14.795
_01784_,14.78
gpio_control_in_1a\[3\].gpio_slow_sel,14.78
soc.core.VexRiscv.dBusWishbone_DAT_MOSI\[3\],14.78
net4080,14.78
net5376,14.78
net5557,14.78
net6604,14.78
net6614,14.78
net7400,14.78
_05025_,14.77
net3207,14.765
net4591,14.765
net7560,14.765
net7809,14.765
_00737_,14.76
_01418_,14.76
_02944_,14.76
_05641_,14.76
_05727_,14.76
_06110_,14.76
_06920_,14.76
_07227_,14.76
_08053_,14.76
_09292_,14.76
_12552_,14.76
_12654_,14.76
_15135_,14.76
net4521,14.76
net7888,14.76
net8147,14.76
net11447,14.76
net11927,14.76
net12064,14.76
_07327_,14.745
_08926_,14.745
net5395,14.745
net9694,14.745
_00827_,14.74
_07330_,14.74
_07517_,14.74
_10633_,14.74
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[13\]\[8\],14.74
net8196,14.74
net9910,14.74
net6016,14.725
_00862_,14.72
_05810_,14.72
_10645_,14.72
_11034_,14.72
_12640_,14.72
_13557_,14.72
soc.core.interface13_bank_bus_dat_r\[0\],14.72
net94,14.72
net3136,14.72
net8919,14.72
net11751,14.72
mgmt_buffers.la_data_in_mprj\[43\],14.705
net5405,14.705
_00213_,14.7
_00234_,14.7
_02943_,14.7
_07763_,14.7
net3709,14.7
net5877,14.7
net12869,14.7
mprj_io_analog_en[11],14.69
mprj_io_slow_sel[5],14.69
mprj_io_slow_sel[6],14.69
net8098,14.685
_05469_,14.68
_05554_,14.68
_05755_,14.68
_07116_,14.68
net8273,14.68
_09025_,14.665
_00831_,14.66
_01806_,14.66
_01848_,14.66
_01893_,14.66
_04580_,14.66
_08440_,14.66
mgmt_buffers.la_data_in_mprj_bar\[76\],14.66
net3299,14.66
net7696,14.66
net9508,14.66
_05322_,14.65
_05328_,14.65
net7369,14.645
net8979,14.645
_00744_,14.64
_05619_,14.64
_06008_,14.64
_07228_,14.64
_08697_,14.64
_10617_,14.64
_11062_,14.64
_15124_,14.64
net3848,14.64
net7366,14.64
net10474,14.635
_09020_,14.625
_01076_,14.62
_01143_,14.62
_02578_,14.62
_04175_,14.62
_13236_,14.615
net13072,14.61
net13077,14.61
_02064_,14.6
_06609_,14.6
_06992_,14.6
_08749_,14.6
_15232_,14.6
clknet_leaf_1033_mgmt_buffers.caravel_clk,14.6
net6112,14.6
net8829,14.6
net11226,14.6
_10170_,14.585
net4513,14.585
net6416,14.585
net6707,14.585
net9120,14.585
_06498_,14.58
_06512_,14.58
_06973_,14.58
_07540_,14.58
_09471_,14.58
_15143_,14.58
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[15\]\[28\],14.58
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[2\]\[28\],14.58
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[9\]\[12\],14.58
soc.core.VexRiscv.RegFilePlugin_regFile\[6\]\[6\],14.58
soc.core.dbg_uart_tx_phase\[4\],14.58
soc.core.la_ien_storage\[18\],14.58
net10763,14.58
net11086,14.58
net11135,14.58
net11518,14.58
_08930_,14.575
net5649,14.575
net8025,14.565
_05658_,14.56
_08787_,14.56
_09489_,14.56
soc.core.VexRiscv.BranchPlugin_branchExceptionPort_payload_badAddr\[11\],14.56
_09670_,14.545
_00155_,14.54
_00609_,14.54
_04567_,14.54
_05074_,14.54
_06626_,14.54
_06886_,14.54
_07834_,14.54
_07897_,14.54
_09265_,14.54
_09427_,14.54
_13357_,14.54
_13825_,14.54
soc.core.mgmtsoc_litespisdrphycore_posedge_reg2,14.54
net10737,14.54
_01254_,14.52
net4301,14.505
net6115,14.505
net7149,14.505
net9893,14.505
_00145_,14.5
_00504_,14.5
_02319_,14.5
_06074_,14.5
_06270_,14.5
_06326_,14.5
_06903_,14.5
_07284_,14.5
_07743_,14.5
_09130_,14.5
_09511_,14.5
_09525_,14.5
_10272_,14.5
_12469_,14.5
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[11\]\[7\],14.5
soc.core.dbg_uart_tx_phase\[17\],14.5
soc.core.gpioin3_pending_r,14.5
soc.core.mgmtsoc_litespisdrphycore_sr_out\[27\],14.5
soc.core.storage\[11\]\[5\],14.5
clknet_leaf_933_mgmt_buffers.caravel_clk,14.5
net5369,14.5
net8369,14.5
net12014,14.5
_13896_,14.485
_15260_,14.48
gpio_control_bidir_1\[1\].gpio_ana_pol,14.48
soc.core.VexRiscv.IBusCachedPlugin_cache.ways_0_tags\[0\]\[11\],14.48
soc.core.dbg_uart_rx_phase\[1\],14.48
soc.core.interface9_bank_bus_dat_r\[7\],14.48
soc.core.la_ien_storage\[48\],14.48
soc.core.mgmtsoc_scratch_storage\[6\],14.48
net8313,14.48
net9621,14.48
net9898,14.48
net7239,14.475
_07951_,14.47
net4579,14.465
net6290,14.465
net7283,14.465
net7522,14.465
net7540,14.465
net7578,14.465
net8303,14.465
_00641_,14.46
_06536_,14.46
_06842_,14.46
_08427_,14.46
_09287_,14.46
_09788_,14.46
_09983_,14.46
_10302_,14.46
_13458_,14.46
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[13\]\[23\],14.46
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[3\]\[28\],14.46
soc.core.VexRiscv.RegFilePlugin_regFile\[21\]\[26\],14.46
soc.core.VexRiscv.RegFilePlugin_regFile\[9\]\[15\],14.46
soc.core.VexRiscv.dBusWishbone_DAT_MOSI\[30\],14.46
soc.core.gpioin1_pending_re,14.46
soc.core.storage_1\[7\]\[4\],14.46
net3157,14.46
net3401,14.46
net3779,14.46
net3837,14.46
net4818,14.46
net5380,14.46
net7189,14.46
net8870,14.46
net11414,14.46
net11651,14.46
net12162,14.46
net12273,14.46
net12947,14.46
_09003_,14.445
_06219_,14.44
_06577_,14.44
_09282_,14.44
_09429_,14.44
_09462_,14.44
gpio_control_in_1a\[4\].gpio_ana_en,14.44
mprj_io_analog_en[12],14.43
mprj_io_inp_dis[10],14.43
net9270,14.43
net3485,14.425
net10602,14.425
_00151_,14.42
_05311_,14.42
_08682_,14.42
_10139_,14.42
_10211_,14.42
_11773_,14.42
_13331_,14.42
_14018_,14.42
_14636_,14.42
_15041_,14.42
_15110_,14.42
_15157_,14.42
_15286_,14.42
soc.core.VexRiscv.lastStagePc\[9\],14.42
soc.core.uart_phy_tx_phase\[17\],14.42
net5999,14.42
net9377,14.42
net9755,14.42
net10229,14.42
net10851,14.42
_01765_,14.4
_07648_,14.4
_08870_,14.4
_09441_,14.4
_13489_,14.4
_14388_,14.4
net3304,14.385
net4734,14.385
net5062,14.385
net6744,14.385
net8764,14.385
_01230_,14.38
_02386_,14.38
_06170_,14.38
_07991_,14.38
_09567_,14.38
_10246_,14.38
_10912_,14.38
_11051_,14.38
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[5\]\[17\],14.38
soc.core.mgmtsoc_master_rx_fifo_source_payload_data\[4\],14.38
net4356,14.38
net5688,14.38
net10370,14.38
net11826,14.38
net12855,14.38
net2633,14.38
net10372,14.375
_00158_,14.36
_01876_,14.36
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[10\]\[14\],14.36
net7685,14.36
net8056,14.36
net9024,14.36
net4516,14.345
net9753,14.345
_00933_,14.34
_01066_,14.34
_01341_,14.34
_01641_,14.34
_01908_,14.34
_02453_,14.34
_03227_,14.34
_04046_,14.34
_05375_,14.34
_05825_,14.34
_07461_,14.34
_10964_,14.34
_12642_,14.34
_15272_,14.34
net104,14.34
net5186,14.34
net7759,14.34
net9180,14.34
net10999,14.34
net10760,14.335
_00806_,14.32
_02051_,14.32
_08419_,14.32
_11060_,14.32
net4758,14.32
net6554,14.32
net7028,14.32
net5809,14.315
net3240,14.305
net5574,14.305
net6444,14.305
net6585,14.305
net7263,14.305
net10408,14.305
_00216_,14.3
_02136_,14.3
_05341_,14.3
_05539_,14.3
_05585_,14.3
_05631_,14.3
_05998_,14.3
_08608_,14.3
_09026_,14.3
_13318_,14.3
_14329_,14.3
_15021_,14.3
net88,14.3
clknet_leaf_767_mgmt_buffers.caravel_clk,14.3
net6028,14.3
net6210,14.3
net8334,14.3
net9915,14.3
net8930,14.295
net6941,14.285
net9200,14.285
_01165_,14.28
gpio_control_bidir_1\[0\].gpio_slow_sel,14.28
net6417,14.28
net6509,14.28
net7794,14.28
net8340,14.28
net13085,14.27
net13078,14.27
net13113,14.27
net6124,14.265
net6409,14.265
_01352_,14.26
_01780_,14.26
_02085_,14.26
_04707_,14.26
_05623_,14.26
_05800_,14.26
_05893_,14.26
_09076_,14.26
_10994_,14.26
_13513_,14.26
_14731_,14.26
_15121_,14.26
pll.ringosc.dstage\[3\].id.out,14.26
clknet_leaf_242_mgmt_buffers.caravel_clk,14.26
net6872,14.26
net7304,14.26
net9237,14.26
net7566,14.245
net8082,14.245
net8806,14.245
_00789_,14.24
soc.core.mgmtsoc_master_rx_fifo_source_payload_data\[22\],14.24
net5049,14.24
net10029,14.24
_09767_,14.225
net5955,14.225
_05525_,14.22
_05749_,14.22
_05771_,14.22
_08681_,14.22
_11807_,14.22
_13171_,14.22
net3977,14.22
net8852,14.22
net11768,14.22
net7427,14.215
net6209,14.205
net7706,14.205
_02166_,14.2
_03138_,14.2
_05592_,14.2
soc.core.VexRiscv.RegFilePlugin_regFile\[13\]\[15\],14.2
net3243,14.2
net4832,14.2
net5188,14.2
net8114,14.2
net8159,14.2
net9205,14.195
_05572_,14.19
_05821_,14.18
_11058_,14.18
_11558_,14.18
_15112_,14.18
net5190,14.18
net4635,14.165
net5895,14.165
net6927,14.165
net7817,14.165
net8183,14.165
gpio_control_bidir_2\[0\].gpio_ib_mode_sel,14.16
gpio_control_in_1a\[1\].gpio_ana_en,14.16
soc.core.VexRiscv.RegFilePlugin_regFile\[6\]\[3\],14.16
net10593,14.16
net11140,14.155
_08907_,14.145
_10259_,14.145
net7680,14.145
net8521,14.145
_00355_,14.14
_01433_,14.14
_07444_,14.14
_09086_,14.14
_09318_,14.14
_12550_,14.14
_14478_,14.14
net4404,14.14
net9013,14.14
net10049,14.14
net11561,14.14
net2631,14.14
net13159,14.14
_09259_,14.125
net4585,14.125
net9637,14.125
_01044_,14.12
_06884_,14.12
_07814_,14.12
_08023_,14.12
_10065_,14.12
_13790_,14.12
gpio_control_in_2\[9\].gpio_outenb,14.12
pll.ringosc.dstage\[11\].id.d2,14.12
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[12\]\[10\],14.12
soc.core.VexRiscv.execute_LightShifterPlugin_amplitudeReg\[0\],14.12
soc.core.mgmtsoc_value_status\[30\],14.12
net6590,14.12
net7098,14.12
net7150,14.12
net9280,14.12
net10812,14.12
net11427,14.12
net12254,14.12
net8598,14.105
net9943,14.105
_00543_,14.1
_09390_,14.1
_14491_,14.1
soc.core.multiregimpl96_regs0,14.1
net6106,14.1
net9740,14.095
net4762,14.085
net7165,14.085
net8504,14.085
_04117_,14.08
_05996_,14.08
_08928_,14.08
_09414_,14.08
_10855_,14.08
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[11\]\[29\],14.08
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[6\]\[28\],14.08
soc.core.mgmtsoc_litespisdrphycore_sr_in\[12\],14.08
soc.core.spi_master_cs_storage\[2\],14.08
net3713,14.08
net7660,14.08
net8669,14.08
net11178,14.08
net2685,14.08
_11761_,14.075
_00154_,14.065
_07203_,14.065
_09657_,14.065
net4748,14.065
_00548_,14.06
_01941_,14.06
_07819_,14.06
_11744_,14.06
soc.core.VexRiscv.BranchPlugin_branchExceptionPort_payload_badAddr\[18\],14.06
soc.core.la_ien_storage\[124\],14.06
net6833,14.06
net12437,14.06
net3203,14.055
net10380,14.055
net10386,14.055
net6370,14.045
_00146_,14.04
_01974_,14.04
_02736_,14.04
_04196_,14.04
_04200_,14.04
_05323_,14.04
_07996_,14.04
_08804_,14.04
_08836_,14.04
_09260_,14.04
_12647_,14.04
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[3\]\[22\],14.04
soc.core.mgmtsoc_master_phyconfig_storage\[0\],14.04
net4037,14.04
net5317,14.04
net5881,14.04
net6440,14.04
net8964,14.04
net10849,14.04
net11465,14.04
net12307,14.04
net13065,14.03
net13075,14.03
net13063,14.03
net6795,14.025
_00694_,14.02
_06891_,14.02
_10341_,14.02
_12876_,14.02
_13492_,14.02
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[3\]\[13\],14.02
soc.core.la_ien_storage\[23\],14.02
net6127,14.02
net10584,14.02
_05240_,14.01
mprj_io_holdover[3],14.01
net2868,14.005
net4904,14.005
net4941,14.005
net5749,14.005
net7686,14.005
net7819,14.005
net7967,14.005
net10022,14.005
_01536_,14
_05261_,14
_05309_,14
_05713_,14
_06814_,14
_07406_,14
_07457_,14
_07741_,14
_07866_,14
_08132_,14
_08418_,14
_09280_,14
_10600_,14
_10717_,14
_12610_,14
soc.core.VexRiscv.CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr\[26\],14
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[14\]\[16\],14
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[6\]\[29\],14
soc.core.VexRiscv.memory_to_writeBack_REGFILE_WRITE_DATA\[16\],14
soc.core.interface3_bank_bus_dat_r\[14\],14
soc.core.mgmtsoc_vexriscv_i_cmd_payload_data\[8\],14
soc.core.uart_pending_r\[1\],14
net5628,14
net5845,14
net7802,14
net8390,14
net9340,14
net11444,14
net11632,14
net9759,13.985
_01651_,13.98
_06096_,13.98
net4884,13.965
net6863,13.965
net7411,13.965
_00241_,13.96
_00349_,13.96
_01539_,13.96
_01711_,13.96
_01889_,13.96
_03015_,13.96
_04731_,13.96
_05649_,13.96
_05824_,13.96
_06486_,13.96
_07014_,13.96
_07512_,13.96
_07657_,13.96
_07959_,13.96
_08024_,13.96
_08982_,13.96
_09267_,13.96
_09293_,13.96
_09474_,13.96
_10208_,13.96
_11854_,13.96
_13309_,13.96
_13904_,13.96
_14572_,13.96
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[5\]\[26\],13.96
soc.core.VexRiscv._zz_execute_SRC2\[24\],13.96
soc.core.mgmtsoc_litespisdrphycore_sr_in\[22\],13.96
net5257,13.96
net5354,13.96
net8464,13.96
net9245,13.96
net12357,13.96
net12799,13.96
net8578,13.955
_05172_,13.95
net4596,13.945
_06151_,13.94
_07841_,13.94
_08204_,13.94
_09304_,13.94
_10247_,13.94
net13082,13.94
clknet_leaf_646_mgmt_buffers.caravel_clk,13.94
net9646,13.94
_08445_,13.935
net10764,13.935
net13073,13.93
net13076,13.93
net5285,13.925
net5391,13.925
net5552,13.925
net6366,13.925
net7417,13.925
_05213_,13.92
_05215_,13.92
_05357_,13.92
_05437_,13.92
_08345_,13.92
_11038_,13.92
soc.core.VexRiscv.lastStagePc\[18\],13.92
soc.core.uart_phy_rx_phase\[29\],13.92
net125,13.92
net5000,13.92
net5138,13.92
net9698,13.92
net4458,13.905
net11961,13.905
_00401_,13.9
_00421_,13.9
_02598_,13.9
_08090_,13.9
_12285_,13.9
_12453_,13.9
_13495_,13.9
_13496_,13.9
soc.core.dbg_uart_cmd\[3\],13.9
net6340,13.9
net8077,13.9
net9211,13.9
net10410,13.895
net6496,13.885
net10612,13.885
_01811_,13.88
_06132_,13.88
_08189_,13.88
_13307_,13.88
_15152_,13.88
_15156_,13.88
_15250_,13.88
net256,13.88
net3094,13.88
net3950,13.88
net5567,13.88
net5700,13.88
net10466,13.88
net12143,13.88
net12164,13.88
_04141_,13.86
_05444_,13.86
_07469_,13.86
_12284_,13.86
net5461,13.845
net5507,13.845
net7085,13.845
net11385,13.845
_02321_,13.84
_02909_,13.84
_05131_,13.84
_05465_,13.84
_05687_,13.84
_08426_,13.84
_08576_,13.84
_10145_,13.84
_10545_,13.84
_10787_,13.84
_11840_,13.84
_12596_,13.84
_14554_,13.84
net120,13.84
net3143,13.84
net4503,13.84
net6244,13.84
net9655,13.84
net12186,13.84
net4589,13.825
net6031,13.825
_00951_,13.82
_02129_,13.82
net3346,13.82
net6334,13.82
net8218,13.82
_07197_,13.815
net4797,13.805
net7887,13.805
net8066,13.805
net9352,13.805
_15273_,13.8
pll.ringosc.dstage\[10\].id.ts,13.8
soc.core.uart_phy_rx_phase\[16\],13.8
net4926,13.8
net5765,13.8
net6361,13.8
net6616,13.8
net7422,13.8
net7474,13.8
net7703,13.8
net9373,13.8
net10564,13.8
_01832_,13.78
_02410_,13.78
_04137_,13.78
_04169_,13.78
_04627_,13.78
_14797_,13.78
net4912,13.78
net6332,13.78
net7099,13.78
_08302_,13.765
net4949,13.765
_03371_,13.76
_05753_,13.76
_05806_,13.76
_06076_,13.76
_07624_,13.76
_15069_,13.76
_15220_,13.76
net4822,13.76
net5863,13.76
net6256,13.76
net8769,13.76
net9069,13.76
net3307,13.755
net4518,13.745
net6233,13.745
_01796_,13.74
_03781_,13.74
gpio_control_in_2\[6\].gpio_outenb,13.74
soc.core.storage_1\[6\]\[4\],13.74
net5587,13.74
net7144,13.74
net8186,13.74
net11014,13.74
net12295,13.74
net7499,13.725
net8120,13.725
_02440_,13.72
_05470_,13.72
_05778_,13.72
_05845_,13.72
_05859_,13.72
_11055_,13.72
_15185_,13.72
net8388,13.72
net9587,13.72
net11487,13.72
net4965,13.715
_10136_,13.705
net2907,13.705
net7933,13.705
net8556,13.705
net11276,13.705
_00532_,13.7
gpio_control_in_1a\[1\].gpio_slow_sel,13.7
net5718,13.7
_00244_,13.68
_02890_,13.68
_05453_,13.68
_05537_,13.68
_06448_,13.68
_09479_,13.68
_10643_,13.68
_11733_,13.68
net5042,13.68
net9015,13.68
net9052,13.68
net11455,13.68
net11763,13.68
net12371,13.68
net4020,13.675
net7485,13.675
mprj_io_dm[5],13.67
net6294,13.665
_00044_,13.66
_00452_,13.66
_00617_,13.66
_00770_,13.66
_01164_,13.66
_02297_,13.66
_06519_,13.66
_06566_,13.66
_06982_,13.66
_07707_,13.66
_13499_,13.66
_13745_,13.66
_13800_,13.66
_15265_,13.66
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[12\]\[22\],13.66
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[8\]\[12\],13.66
soc.core.VexRiscv.RegFilePlugin_regFile\[24\]\[15\],13.66
soc.core.dbg_uart_rx_data\[5\],13.66
net5808,13.66
net11275,13.66
net11628,13.66
net2645,13.66
net13176,13.66
_09012_,13.645
net5616,13.645
net5778,13.645
_01079_,13.64
net8658,13.635
_09779_,13.625
net7965,13.625
net8262,13.625
_05243_,13.62
_06017_,13.62
_07507_,13.62
_09555_,13.62
_09855_,13.62
_10293_,13.62
_10345_,13.62
_12819_,13.62
_14955_,13.62
soc.core.VexRiscv.CsrPlugin_selfException_payload_badAddr\[1\],13.62
soc.core.int_rst,13.62
soc.core.mgmtsoc_reset_re,13.62
net6086,13.62
net8113,13.62
net9470,13.62
_09558_,13.6
_11474_,13.6
mgmt_buffers.mprj_logic1\[336\],13.6
net5935,13.585
net6316,13.585
net6376,13.585
net6776,13.585
net8617,13.585
net8732,13.585
net9326,13.585
_04144_,13.58
_06196_,13.58
_08019_,13.58
_10169_,13.58
_13251_,13.58
gpio_control_in_1a\[1\].gpio_ana_pol,13.58
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[12\]\[21\],13.58
soc.core.VexRiscv.RegFilePlugin_regFile\[28\]\[21\],13.58
soc.core.VexRiscv.execute_to_memory_BRANCH_DO,13.58
soc.core.VexRiscv.execute_to_memory_PC\[15\],13.58
soc.core.VexRiscv.execute_to_memory_PC\[26\],13.58
soc.core.mgmtsoc_litespisdrphycore_sr_in\[26\],13.58
soc.core.spi_master_mosi_storage\[4\],13.58
net7799,13.58
net12471,13.58
net12693,13.58
_00623_,13.56
_02805_,13.56
_09400_,13.56
_09491_,13.56
_09685_,13.56
_09961_,13.56
soc.core.VexRiscv.DebugPlugin_busReadDataReg\[19\],13.56
soc.core.VexRiscv.RegFilePlugin_regFile\[5\]\[12\],13.56
soc.core.la_ien_storage\[44\],13.56
soc.core.la_ien_storage\[46\],13.56
soc.core.mgmtsoc_scratch_storage\[3\],13.56
net5340,13.56
_01837_,13.54
_02804_,13.54
_04051_,13.54
_05029_,13.54
_05403_,13.54
_06443_,13.54
_07643_,13.54
_07745_,13.54
_07964_,13.54
_08323_,13.54
_09813_,13.54
_10074_,13.54
_10201_,13.54
_10953_,13.54
_13850_,13.54
_13937_,13.54
_14839_,13.54
soc.core.VexRiscv.DebugPlugin_busReadDataReg\[28\],13.54
soc.core.mgmtsoc_reload_storage\[20\],13.54
net4990,13.54
net5450,13.54
net5580,13.54
net5823,13.54
net6057,13.54
net6544,13.54
_08701_,13.525
_01456_,13.52
_06672_,13.52
_12638_,13.52
_14034_,13.52
soc.core.VexRiscv.dBusWishbone_DAT_MOSI\[0\],13.52
net6871,13.515
net9167,13.515
net10845,13.515
_09278_,13.505
net2957,13.505
net4781,13.505
net6456,13.505
_00489_,13.5
_00857_,13.5
_01907_,13.5
_02028_,13.5
_02873_,13.5
_02929_,13.5
_04559_,13.5
_07296_,13.5
_07520_,13.5
_08708_,13.5
_09743_,13.5
_09782_,13.5
_10269_,13.5
_10367_,13.5
_11760_,13.5
_11926_,13.5
_12451_,13.5
_13314_,13.5
_13479_,13.5
_13881_,13.5
_14553_,13.5
_15029_,13.5
_15200_,13.5
_15241_,13.5
pll.ringosc.dstage\[10\].id.in,13.5
soc.core.VexRiscv.RegFilePlugin_regFile\[23\]\[3\],13.5
soc.core.VexRiscv.execute_to_memory_PC\[18\],13.5
soc.core.mgmtsoc_litespisdrphycore_sr_in\[28\],13.5
soc.core.mgmtsoc_reload_storage\[2\],13.5
soc.core.multiregimpl98_regs0,13.5
soc.core.uart_phy_tx_phase\[30\],13.5
net4055,13.5
net4299,13.5
net9226,13.5
net7401,13.495
_11700_,13.485
net5950,13.485
_01661_,13.48
_09478_,13.48
net3655,13.465
net5836,13.465
net7063,13.465
net8272,13.465
net8924,13.465
_03011_,13.46
_05621_,13.46
_05823_,13.46
_06080_,13.46
_06419_,13.46
_07825_,13.46
_08085_,13.46
_08333_,13.46
_08609_,13.46
_12458_,13.46
_13342_,13.46
net8306,13.46
net9594,13.46
net12841,13.46
net7714,13.455
_01735_,13.44
_02020_,13.44
_02695_,13.44
_04994_,13.44
_08761_,13.44
net4219,13.44
net4967,13.44
net5370,13.44
net5430,13.44
net6257,13.44
net7783,13.44
_00248_,13.42
_00686_,13.42
_00984_,13.42
_01233_,13.42
_01995_,13.42
_04027_,13.42
_04138_,13.42
_04554_,13.42
_05257_,13.42
_05764_,13.42
_07984_,13.42
_09522_,13.42
_13536_,13.42
_15081_,13.42
_15219_,13.42
soc.core.VexRiscv.RegFilePlugin_regFile\[26\]\[15\],13.42
net3048,13.42
net3239,13.42
net4371,13.42
net6708,13.42
net6859,13.42
net8157,13.42
net9814,13.42
net11371,13.42
_02201_,13.4
_02370_,13.4
_02902_,13.4
_08033_,13.4
gpio_control_in_1a\[5\].gpio_ana_en,13.4
net6273,13.4
net7607,13.4
net10580,13.4
net5031,13.395
net5271,13.385
net5804,13.385
net7415,13.385
net7572,13.385
net10462,13.385
_00435_,13.38
_01474_,13.38
_03135_,13.38
_03455_,13.38
_06090_,13.38
_08455_,13.38
_12809_,13.38
_15287_,13.38
net5660,13.38
net6307,13.38
net6436,13.38
net9858,13.38
_08833_,13.375
net3266,13.365
net3986,13.365
net5994,13.365
net6756,13.365
_00693_,13.36
_07322_,13.36
_12861_,13.36
gpio_control_bidir_1\[1\].gpio_ana_sel,13.36
pll.ringosc.dstage\[7\].id.d1,13.36
net4024,13.36
net6276,13.36
net13064,13.35
net13066,13.35
net13067,13.35
_09049_,13.345
_01022_,13.34
_01499_,13.34
_05674_,13.34
_06156_,13.34
_07020_,13.34
_08384_,13.34
net123,13.34
net3611,13.34
net4960,13.34
net8378,13.34
net12125,13.34
net12192,13.34
net12762,13.34
mprj_io_analog_sel[5],13.33
mprj_io_dm[3],13.33
net6774,13.325
_00790_,13.32
_02937_,13.32
soc.core.VexRiscv._zz_execute_SRC2\[27\],13.32
net87,13.32
net252,13.32
net7392,13.32
net7496,13.32
net7945,13.32
net8002,13.32
net11577,13.32
net12399,13.32
net3513,13.305
net5315,13.305
_05275_,13.3
_05305_,13.3
_05826_,13.3
_08158_,13.3
_11530_,13.3
_12162_,13.3
net8271,13.3
net10682,13.295
net4666,13.285
_04061_,13.28
_04164_,13.28
_08232_,13.28
soc.core.mgmtsoc_load_storage\[1\],13.28
net3756,13.28
net5793,13.28
net8326,13.28
net9263,13.28
net12667,13.28
net12842,13.28
_05418_,13.27
net5331,13.265
net8772,13.265
_05953_,13.26
_05969_,13.26
_13364_,13.26
_13843_,13.26
_14483_,13.26
_15119_,13.26
_15138_,13.26
pll.ringosc.dstage\[3\].id.d2,13.26
soc.core.VexRiscv.RegFilePlugin_regFile\[15\]\[15\],13.26
net8763,13.26
net3979,13.255
net6625,13.255
net7365,13.255
_05712_,13.25
net3293,13.245
net3689,13.245
net6983,13.245
net9584,13.245
_01659_,13.24
net8989,13.235
net12017,13.225
_00185_,13.22
_00624_,13.22
_01960_,13.22
_02301_,13.22
_05829_,13.22
_05837_,13.22
_07453_,13.22
_08087_,13.22
_11458_,13.22
_11507_,13.22
_15172_,13.22
soc.core.VexRiscv.RegFilePlugin_regFile\[19\]\[12\],13.22
net3103,13.22
net6818,13.22
net12672,13.22
_00539_,13.2
_02745_,13.2
_03312_,13.2
_06263_,13.2
_06310_,13.2
_06743_,13.2
_07466_,13.2
_07490_,13.2
_07537_,13.2
_07777_,13.2
_09576_,13.2
_09688_,13.2
_12697_,13.2
_13289_,13.2
soc.core.VexRiscv.RegFilePlugin_regFile\[5\]\[6\],13.2
soc.core.VexRiscv.lastStageIsFiring,13.2
soc.core.dbg_uart_cmd\[6\],13.2
soc.core.multiregimpl31_regs0,13.2
soc.core.spi_master_miso_data\[5\],13.2
net4467,13.2
net5565,13.2
net5795,13.2
net8889,13.2
net8913,13.2
net10968,13.2
net12015,13.2
net13160,13.2
_07289_,13.185
_09009_,13.185
net7281,13.185
_05538_,13.18
_12008_,13.18
soc.core.VexRiscv.IBusCachedPlugin_cache.ways_0_tags\[0\]\[10\],13.18
net3637,13.18
net7762,13.175
net10666,13.175
_01231_,13.16
_01269_,13.16
_01293_,13.16
_06292_,13.16
_07995_,13.16
_12855_,13.16
soc.core.VexRiscv.lastStagePc\[20\],13.16
soc.core.mgmtsoc_master_phyconfig_storage\[21\],13.16
soc.core.mgmtsoc_vexriscv_i_cmd_payload_data\[27\],13.16
soc.core.storage_1\[3\]\[5\],13.16
net4646,13.16
net9354,13.16
net9804,13.16
net11292,13.16
net12191,13.16
net4993,13.145
_07415_,13.14
_13205_,13.14
_14239_,13.14
net4159,13.14
net10343,13.14
net8154,13.135
net6676,13.125
net7378,13.125
net9476,13.125
_06391_,13.12
_06462_,13.12
_06779_,13.12
_07465_,13.12
_09854_,13.12
mgmt_buffers.la_data_in_mprj_bar\[48\],13.12
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[10\]\[28\],13.12
soc.core.VexRiscv.IBusCachedPlugin_cache.ways_0_tags\[0\]\[17\],13.12
net8569,13.12
net9551,13.12
net9639,13.12
net11327,13.12
net12846,13.12
_05426_,13.11
_00402_,13.1
_01608_,13.1
_06694_,13.1
_09457_,13.1
_13048_,13.1
_13548_,13.1
_15104_,13.1
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[13\]\[28\],13.1
soc.core.dbg_uart_rx_data\[4\],13.1
soc.core.rs232phy_rs232phytx_next_state,13.1
_07324_,13.085
net4401,13.085
net6899,13.085
net7641,13.085
net8750,13.085
net9928,13.085
_06044_,13.08
_06771_,13.08
_06950_,13.08
_07420_,13.08
_07431_,13.08
_09386_,13.08
_09962_,13.08
_13632_,13.08
gpio_control_in_1a\[2\].gpio_ana_en,13.08
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[6\]\[17\],13.08
soc.core.VexRiscv.RegFilePlugin_regFile\[30\]\[5\],13.08
soc.core.VexRiscv.dBusWishbone_DAT_MOSI\[1\],13.08
soc.core.VexRiscv.dBusWishbone_DAT_MOSI\[22\],13.08
soc.core.spi_master_cs_storage\[4\],13.08
net89,13.08
clknet_leaf_739_mgmt_buffers.caravel_clk,13.08
net4076,13.08
net6286,13.08
net7070,13.08
net7114,13.08
net7987,13.08
net9342,13.08
net9490,13.08
net11005,13.08
net11151,13.08
net11461,13.08
net12077,13.08
net12708,13.08
net10210,13.075
net4931,13.065
_07950_,13.06
_10745_,13.06
net6766,13.045
net7813,13.045
net8177,13.045
net8187,13.045
net8887,13.045
_00527_,13.04
_05874_,13.04
_06118_,13.04
_07480_,13.04
_08180_,13.04
_10114_,13.04
_10632_,13.04
_10963_,13.04
_11947_,13.04
_12548_,13.04
_13000_,13.04
_13168_,13.04
_13308_,13.04
_13427_,13.04
_15327_,13.04
soc.core.uart_tx_fifo_consume\[1\],13.04
net2919,13.04
net3721,13.04
net6274,13.04
net9334,13.04
net9463,13.04
net11384,13.04
net11386,13.04
net11576,13.04
_00229_,13.02
_10519_,13.02
net13083,13.02
net13081,13.02
net13079,13.02
net13080,13.02
soc.core.VexRiscv.RegFilePlugin_regFile\[1\]\[10\],13.02
soc.core.dbg_uart_count\[8\],13.02
_11118_,13.015
net8389,13.015
_08927_,13.005
net4614,13.005
net5025,13.005
net5143,13.005
net7087,13.005
_05217_,13
_05857_,13
_08022_,13
_08675_,13
_10497_,13
_11115_,13
_12468_,13
_12832_,13
net103,13
clknet_leaf_766_mgmt_buffers.caravel_clk,13
net4834,13
net5061,13
net9287,13
_14020_,12.995
mprj_io_analog_pol[3],12.99
mprj_io_inp_dis[7],12.99
_00761_,12.98
_04159_,12.98
_05567_,12.98
_06550_,12.98
_08032_,12.98
_08707_,12.98
_10693_,12.98
soc.core.mgmtsoc_master_rx_fifo_source_payload_data\[31\],12.98
net6469,12.98
net6991,12.98
net7119,12.98
net6643,12.965
_00964_,12.96
_06421_,12.96
_08702_,12.96
_08783_,12.96
_12619_,12.96
_13938_,12.96
net99,12.96
net100,12.96
net2880,12.96
net6692,12.96
net7454,12.96
net7896,12.96
net8966,12.96
net9983,12.96
net12079,12.96
net12488,12.96
_00616_,12.94
_02024_,12.94
_15059_,12.94
soc.core.VexRiscv.RegFilePlugin_regFile\[15\]\[5\],12.94
net11377,12.94
net12505,12.94
net5743,12.925
net6748,12.925
net7115,12.925
net7200,12.925
net7343,12.925
net7845,12.925
net9346,12.925
net9415,12.925
_00573_,12.92
_02852_,12.92
_05535_,12.92
_05773_,12.92
_05896_,12.92
_07623_,12.92
_08774_,12.92
_11050_,12.92
_11473_,12.92
_13849_,12.92
_14618_,12.92
soc.core.dbg_uart_rx_phase\[15\],12.92
net3303,12.92
net12219,12.92
_14416_,12.915
net5952,12.905
net6498,12.905
net6593,12.905
net8160,12.905
net8420,12.905
net9355,12.905
_02327_,12.9
gpio_control_in_1a\[1\].gpio_ana_sel,12.9
net5381,12.9
mprj_io_analog_en[0],12.89
net6758,12.885
net7891,12.885
_04964_,12.88
_05560_,12.88
_07870_,12.88
_10635_,12.88
_12802_,12.88
_13153_,12.88
_13206_,12.88
_14287_,12.88
soc.core.VexRiscv.DebugPlugin_busReadDataReg\[15\],12.88
soc.core.VexRiscv.execute_to_memory_PC\[25\],12.88
net4569,12.88
net11364,12.88
net12329,12.88
net10360,12.875
_12553_,12.87
_01395_,12.86
net3755,12.86
net7171,12.86
net7335,12.86
net7404,12.86
net7406,12.86
net8538,12.86
net8879,12.86
_01496_,12.84
_01914_,12.84
_04157_,12.84
_05701_,12.84
_05832_,12.84
_11498_,12.84
_13425_,12.84
_14229_,12.84
_15334_,12.84
net4548,12.84
net12675,12.84
net7389,12.825
net8191,12.825
_00533_,12.82
_00900_,12.82
_01699_,12.82
_04535_,12.82
_04737_,12.82
soc.core.uart_phy_rx_phase\[12\],12.82
net6714,12.82
net7370,12.82
net8455,12.82
net9278,12.82
_05788_,12.81
net3113,12.805
_00810_,12.8
_02192_,12.8
_07312_,12.8
_08106_,12.8
_08350_,12.8
_14888_,12.8
net7518,12.795
net3376,12.785
net4987,12.785
_00871_,12.78
gpio_control_in_1a\[5\].gpio_ana_sel,12.78
net77,12.78
_00545_,12.76
_01823_,12.76
_03028_,12.76
_03420_,12.76
_06846_,12.76
_09317_,12.76
soc.core.VexRiscv.RegFilePlugin_regFile\[24\]\[6\],12.76
_00309_,12.745
net3989,12.745
net6844,12.745
_01949_,12.74
_02328_,12.74
_02346_,12.74
_03621_,12.74
_04151_,12.74
_04712_,12.74
_05644_,12.74
_06991_,12.74
_07304_,12.74
_09737_,12.74
_09831_,12.74
_10148_,12.74
_10298_,12.74
_13284_,12.74
_13449_,12.74
_13498_,12.74
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[5\]\[15\],12.74
soc.core.mgmtsoc_litespisdrphycore_sr_in\[11\],12.74
soc.core.mgmtsoc_load_storage\[7\],12.74
net9633,12.74
net8952,12.725
net9908,12.725
net10111,12.725
_01911_,12.72
_06385_,12.72
_09833_,12.72
_09985_,12.72
_13465_,12.72
_14833_,12.72
soc.core.mgmtsoc_litespisdrphycore_sr_in\[6\],12.72
net5396,12.72
net4308,12.705
net5027,12.705
net8635,12.705
_00848_,12.7
_01776_,12.7
_02154_,12.7
_04088_,12.7
_06398_,12.7
_06511_,12.7
_07459_,12.7
_10227_,12.7
soc.core.VexRiscv.dBusWishbone_DAT_MOSI\[29\],12.7
soc.core.interface15_bank_bus_dat_r\[0\],12.7
net11333,12.7
net11524,12.7
net12158,12.7
net2659,12.7
net10390,12.695
net4653,12.685
_09431_,12.68
_13728_,12.68
_13898_,12.68
pll.ringosc.dstage\[0\].id.d0,12.68
_05632_,12.67
net5600,12.665
net6537,12.665
net6605,12.665
net6770,12.665
net11208,12.665
_00410_,12.66
_01234_,12.66
_06042_,12.66
_06334_,12.66
_07455_,12.66
_07813_,12.66
_07949_,12.66
_10342_,12.66
_11382_,12.66
_13624_,12.66
soc.core.VexRiscv.CsrPlugin_selfException_payload_badAddr\[3\],12.66
soc.core.VexRiscv.DebugPlugin_busReadDataReg\[3\],12.66
soc.core.VexRiscv.IBusCachedPlugin_cache.ways_0_tags\[1\]\[3\],12.66
soc.core.mgmtsoc_vexriscv_i_cmd_payload_data\[7\],12.66
net2965,12.66
net2986,12.66
net5734,12.66
net7770,12.66
net10855,12.66
net11591,12.66
net12194,12.66
net7279,12.655
mprj_io_analog_en[10],12.65
mprj_io_analog_sel[10],12.65
mprj_io_analog_sel[2],12.65
mprj_io_ib_mode_sel[2],12.65
_08925_,12.645
_00644_,12.64
_06543_,12.64
_06897_,12.64
_12984_,12.64
_13582_,12.64
_15258_,12.64
gpio_control_bidir_1\[1\].gpio_holdover,12.64
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[1\]\[15\],12.64
net7395,12.64
net10422,12.635
_07331_,12.625
net4854,12.625
net5346,12.625
net6913,12.625
net7423,12.625
_05153_,12.62
_05221_,12.62
_05361_,12.62
_06804_,12.62
_08092_,12.62
_09763_,12.62
_13266_,12.62
_13669_,12.62
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[14\]\[7\],12.62
soc.core.VexRiscv.execute_to_memory_PC\[14\],12.62
soc.core.mgmtsoc_litespisdrphycore_sr_cnt_litespiphy_next_value\[2\],12.62
net6090,12.62
net7036,12.62
net8649,12.62
net9824,12.62
_01896_,12.6
_04284_,12.6
_08971_,12.6
_13539_,12.6
pll.ringosc.dstage\[4\].id.d2,12.6
soc.core.VexRiscv.RegFilePlugin_regFile\[7\]\[12\],12.6
soc.core.VexRiscv.execute_to_memory_PC\[28\],12.6
net4330,12.585
net6432,12.585
net7775,12.585
_02683_,12.58
_02829_,12.58
_04119_,12.58
_05128_,12.58
_05411_,12.58
_05883_,12.58
_05910_,12.58
_06022_,12.58
_07425_,12.58
_09283_,12.58
_09505_,12.58
_14477_,12.58
_14811_,12.58
_14900_,12.58
_15151_,12.58
_15158_,12.58
_15307_,12.58
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[14\]\[13\],12.58
soc.core.multiregimpl47_regs0,12.58
clknet_leaf_126_mgmt_buffers.caravel_clk,12.58
net3620,12.58
net8105,12.58
net12477,12.58
net2646,12.58
_08383_,12.56
_09434_,12.56
gpio_control_in_1a\[2\].gpio_ana_sel,12.56
net4144,12.555
_08448_,12.545
net4744,12.545
net5641,12.545
net8315,12.545
_01001_,12.54
_05265_,12.54
_07030_,12.54
_07099_,12.54
_11961_,12.54
_12822_,12.54
_14494_,12.54
_14552_,12.54
_14814_,12.54
soc.core.dbg_uart_rx_phase\[0\],12.54
net4447,12.54
net6092,12.54
net6546,12.54
net9251,12.54
net12263,12.54
net12560,12.54
_04004_,12.52
_08875_,12.52
_11827_,12.52
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[3\]\[26\],12.52
net3667,12.52
net4804,12.52
net7451,12.52
net11611,12.52
net8770,12.505
net8826,12.505
_00812_,12.5
_01672_,12.5
_01704_,12.5
_05898_,12.5
_08337_,12.5
_09070_,12.5
_15071_,12.5
_15141_,12.5
_15183_,12.5
soc.core.VexRiscv.lastStagePc\[2\],12.5
net255,12.5
net4492,12.5
net7599,12.5
net7830,12.5
net7840,12.5
net8034,12.5
net10095,12.5
net12934,12.5
_00750_,12.48
_03149_,12.48
_11119_,12.48
soc.core.VexRiscv.execute_to_memory_PC\[13\],12.48
net7222,12.48
net10806,12.48
_10640_,12.47
net3480,12.465
net5403,12.465
net5703,12.465
net8012,12.465
_03066_,12.46
_05191_,12.46
_05545_,12.46
_05579_,12.46
_11011_,12.46
_13255_,12.46
net5577,12.46
net7561,12.46
net3316,12.455
net5163,12.455
net3673,12.445
_00902_,12.44
net6751,12.44
net7266,12.44
_08779_,12.425
net6951,12.425
_00442_,12.42
_01359_,12.42
_05716_,12.42
_05830_,12.42
_05899_,12.42
_11728_,12.42
_11794_,12.42
_11836_,12.42
_13137_,12.42
net5771,12.42
net10989,12.42
net11476,12.42
net12413,12.42
net10364,12.41
net5735,12.405
net10220,12.405
_01133_,12.4
_02867_,12.4
_04003_,12.4
_10864_,12.4
_12079_,12.4
net5477,12.4
net7668,12.4
net7982,12.4
net9425,12.4
_01761_,12.38
_04288_,12.38
_05195_,12.38
_05207_,12.38
_05219_,12.38
_05461_,12.38
_08460_,12.38
_11052_,12.38
net6229,12.38
net8758,12.375
net6219,12.365
_10610_,12.36
gpio_control_in_1a\[0\].gpio_ib_mode_sel,12.36
net355,12.36
net4678,12.36
net6451,12.36
net6791,12.36
net8520,12.36
_10281_,12.34
net5642,12.34
net9733,12.33
_02849_,12.32
net363,12.32
mprj_io_inp_dis[6],12.31
net3083,12.305
net9341,12.305
_00554_,12.3
_04617_,12.3
_06805_,12.3
_06854_,12.3
_07479_,12.3
_07910_,12.3
_08883_,12.3
_09958_,12.3
_10309_,12.3
_10868_,12.3
_10967_,12.3
_15088_,12.3
soc.core.VexRiscv.RegFilePlugin_regFile\[7\]\[11\],12.3
net3416,12.3
net4779,12.3
net12153,12.3
net12839,12.3
net5544,12.285
net6119,12.285
_00205_,12.28
_01785_,12.28
_01937_,12.28
_06914_,12.28
_07482_,12.28
_08751_,12.28
_09406_,12.28
_09907_,12.28
_14542_,12.28
_15117_,12.28
pll.ringosc.dstage\[3\].id.d1,12.28
soc.core.VexRiscv._zz_CsrPlugin_csrMapping_readDataInit\[19\],12.28
net6640,12.28
net10107,12.28
net4498,12.265
net6943,12.265
net7137,12.265
_01344_,12.26
_01852_,12.26
_05767_,12.26
_10334_,12.26
_12986_,12.26
_15099_,12.26
soc.core.mgmtsoc_scratch_storage\[31\],12.26
net8792,12.26
net10414,12.255
net6156,12.245
net6283,12.245
_03494_,12.24
_03983_,12.24
_06994_,12.24
_08116_,12.24
_08503_,12.24
_08583_,12.24
_09017_,12.24
_09047_,12.24
_09296_,12.24
_10134_,12.24
soc.core.VexRiscv.DebugPlugin_busReadDataReg\[31\],12.24
soc.core.VexRiscv.RegFilePlugin_regFile\[10\]\[15\],12.24
soc.core.mgmtsoc_load_storage\[14\],12.24
soc.core.mgmtsoc_reload_storage\[11\],12.24
net3410,12.24
net7846,12.24
net8599,12.24
_01074_,12.22
_01769_,12.22
_11795_,12.22
net8373,12.215
_09121_,12.205
net5106,12.205
net9495,12.205
_00289_,12.2
_01523_,12.2
_01577_,12.2
_03311_,12.2
_03987_,12.2
_07735_,12.2
_07746_,12.2
_08052_,12.2
_15169_,12.2
soc.core.VexRiscv.CsrPlugin_pipelineLiberator_pcValids_0,12.2
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[2\]\[13\],12.2
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[2\]\[23\],12.2
soc.core.VexRiscv.execute_to_memory_MEMORY_ADDRESS_LOW\[1\],12.2
soc.core.dbg_uart_rx_phase\[31\],12.2
soc.core.uart_phy_tx_data\[2\],12.2
net12035,12.2
net12694,12.2
net12849,12.2
_08420_,12.18
_14617_,12.18
_15130_,12.18
soc.core.VexRiscv.CsrPlugin_mtval\[21\],12.18
soc.core.VexRiscv.RegFilePlugin_regFile\[25\]\[12\],12.18
soc.core.multiregimpl83_regs0,12.18
net7032,12.18
net8684,12.18
net10759,12.18
net9400,12.175
net4593,12.165
net5874,12.165
net6249,12.165
net8165,12.165
net10061,12.165
_00640_,12.16
_03959_,12.16
_04179_,12.16
_05337_,12.16
_05581_,12.16
_05691_,12.16
_05723_,12.16
_06027_,12.16
_07318_,12.16
_07650_,12.16
_07775_,12.16
_07926_,12.16
_09007_,12.16
_09072_,12.16
_09420_,12.16
_09711_,12.16
_09817_,12.16
_12040_,12.16
_12101_,12.16
_13544_,12.16
_14899_,12.16
gpio_control_in_2\[9\].pad_gpio_out,12.16
soc.core.VexRiscv.CsrPlugin_selfException_payload_badAddr\[6\],12.16
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[1\]\[24\],12.16
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[8\]\[9\],12.16
soc.core.VexRiscv.IBusCachedPlugin_cache.ways_0_tags\[1\]\[24\],12.16
soc.core.VexRiscv.dBusWishbone_DAT_MOSI\[2\],12.16
soc.core.VexRiscv.dBusWishbone_DAT_MOSI\[6\],12.16
soc.core.la_ien_storage\[76\],12.16
net8484,12.16
net10065,12.16
net5413,12.155
_06041_,12.14
_11373_,12.14
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[13\]\[22\],12.14
soc.core.VexRiscv._zz_CsrPlugin_csrMapping_readDataInit\[22\],12.14
soc.core.mgmtsoc_pending_re,12.14
_05354_,12.13
net5087,12.125
net5385,12.125
net9515,12.125
_04171_,12.12
_05229_,12.12
_11084_,12.12
net4780,12.12
net5384,12.12
net5453,12.12
net7062,12.12
net9919,12.12
net10051,12.12
net11335,12.12
net12275,12.12
net12442,12.12
net12977,12.12
_00288_,12.1
_01581_,12.1
_08888_,12.1
_09723_,12.1
mgmt_buffers.la_data_in_mprj\[80\],12.085
net4233,12.085
net5126,12.085
net5727,12.085
net6641,12.085
net7598,12.085
net9146,12.085
net9802,12.085
_05531_,12.08
_10220_,12.08
_10701_,12.08
_10977_,12.08
_10992_,12.08
_11580_,12.08
_13864_,12.08
mgmt_buffers.la_data_in_mprj_bar\[91\],12.08
soc.core.uart_phy_rx_phase\[15\],12.08
net3737,12.08
net5197,12.075
_01622_,12.06
_05775_,12.06
_10289_,12.06
soc.core.VexRiscv.RegFilePlugin_regFile\[8\]\[15\],12.06
net4957,12.06
net6165,12.06
net6319,12.06
net6699,12.06
net7195,12.06
net7650,12.06
net9768,12.045
_02197_,12.04
_02934_,12.04
_03490_,12.04
_03506_,12.04
_07105_,12.04
_07542_,12.04
_08452_,12.04
_08714_,12.04
_08780_,12.04
_10844_,12.04
_11345_,12.04
_13088_,12.04
_13179_,12.04
_13386_,12.04
_15080_,12.04
soc.core.VexRiscv.execute_to_memory_PC\[23\],12.04
soc.core.mgmtsoc_master_tx_fifo_source_payload_len\[4\],12.04
soc.core.storage_1\[2\]\[5\],12.04
net2952,12.04
net6058,12.04
net6240,12.04
net7447,12.04
net8465,12.04
net9704,12.04
net12473,12.04
net12483,12.04
net12710,12.04
_01546_,12.02
_13199_,12.02
net6499,12.02
net7223,12.02
_11710_,12.005
net3285,12.005
net4006,12.005
net4874,12.005
net5927,12.005
net6322,12.005
net7528,12.005
_01487_,12
_01691_,12
_05709_,12
soc.core.storage_1\[0\]\[5\],12
net6180,12
net8530,12
net9541,12
net6111,11.985
net7267,11.985
net7897,11.985
_00895_,11.98
_11559_,11.98
soc.core.VexRiscv.CsrPlugin_mtvec_base\[14\],11.98
soc.core.mgmtsoc_litespisdrphycore_sr_in\[8\],11.98
net5485,11.98
net6864,11.98
net6255,11.965
net8132,11.965
_03502_,11.96
_05908_,11.96
_06111_,11.96
_07007_,11.96
_08447_,11.96
_10626_,11.96
_12549_,11.96
_12728_,11.96
_13727_,11.96
_15054_,11.96
_15075_,11.96
_15255_,11.96
net8550,11.96
net8825,11.96
net9107,11.96
net10043,11.96
net11196,11.96
net12069,11.96
net12330,11.96
net6091,11.945
net6840,11.945
net7477,11.945
net8824,11.945
_00207_,11.94
_00615_,11.94
_01000_,11.94
_01338_,11.94
_01814_,11.94
_03999_,11.94
_08670_,11.94
_10609_,11.94
_11835_,11.94
_13208_,11.94
net7593,11.94
_01371_,11.92
_01824_,11.92
_10383_,11.92
net7116,11.92
net7709,11.92
net4295,11.915
net6027,11.905
_02006_,11.9
_02444_,11.9
pll.ringosc.dstage\[2\].id.d1,11.9
net5692,11.9
net6958,11.9
net7456,11.9
net11306,11.9
net3707,11.885
net9529,11.885
_01521_,11.88
_01956_,11.88
_12862_,11.88
_13225_,11.88
_10374_,11.865
mgmt_buffers.la_data_in_mprj\[91\],11.865
net4910,11.865
net6039,11.865
net6577,11.865
_00208_,11.86
net96,11.86
net5709,11.86
net8738,11.86
net12958,11.86
net7361,11.845
_02019_,11.84
_05185_,11.84
_05485_,11.84
_06278_,11.84
_06996_,11.84
_07487_,11.84
_09467_,11.84
_09781_,11.84
_11365_,11.84
_15036_,11.84
_15338_,11.84
soc.core.VexRiscv.RegFilePlugin_regFile\[11\]\[15\],11.84
soc.core.mgmtsoc_load_storage\[27\],11.84
net6769,11.84
net7962,11.84
net12448,11.84
net12942,11.84
net10567,11.835
_05304_,11.83
_05604_,11.83
_05614_,11.83
net7218,11.825
_00654_,11.82
_00674_,11.82
_00939_,11.82
_06644_,11.82
_07342_,11.82
_07545_,11.82
_07649_,11.82
_07791_,11.82
_08230_,11.82
_09408_,11.82
_09693_,11.82
_10257_,11.82
_10724_,11.82
_12688_,11.82
_13262_,11.82
_13434_,11.82
_15078_,11.82
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[10\]\[7\],11.82
soc.core.VexRiscv.RegFilePlugin_regFile\[22\]\[12\],11.82
soc.core.mgmtsoc_scratch_storage\[29\],11.82
soc.core.multiregimpl86_regs0,11.82
net114,11.82
net9697,11.82
net11470,11.82
_10210_,11.805
_10574_,11.8
_11053_,11.8
soc.core.multiregimpl95_regs0,11.8
net4391,11.8
net8325,11.795
net9608,11.795
_08906_,11.785
net5110,11.785
_05267_,11.78
_06214_,11.78
_07346_,11.78
_07553_,11.78
_07843_,11.78
_08414_,11.78
_09504_,11.78
_11012_,11.78
_14369_,11.78
gpio_control_bidir_1\[1\].gpio_slow_sel,11.78
soc.core.mgmtsoc_load_storage\[21\],11.78
soc.core.mgmtsoc_master_phyconfig_storage\[16\],11.78
net5682,11.78
net7426,11.78
net9644,11.78
net12144,11.78
_00163_,11.76
net3151,11.755
net5279,11.745
net5582,11.745
net5766,11.745
net6247,11.745
net6515,11.745
net7497,11.745
_00219_,11.74
_00237_,11.74
_04719_,11.74
_06767_,11.74
_10952_,11.74
_12685_,11.74
soc.core.uart_phy_rx_data\[7\],11.74
net8108,11.74
net9129,11.74
net9398,11.74
net9403,11.74
net9426,11.74
net9757,11.74
net11423,11.74
_01013_,11.72
_02644_,11.72
_08743_,11.72
_13490_,11.72
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[4\]\[6\],11.72
soc.core.VexRiscv.IBusCachedPlugin_cache.ways_0_tags\[0\]\[26\],11.72
soc.core.VexRiscv.IBusCachedPlugin_cache.ways_0_tags\[0\]\[9\],11.72
soc.core.dbg_uart_rx_data\[6\],11.72
soc.core.la_ien_storage\[13\],11.72
soc.core.uart_phy_rx_phase\[31\],11.72
net6582,11.72
net11424,11.72
net5592,11.705
net8443,11.705
net10570,11.705
_02169_,11.7
_04156_,11.7
_05655_,11.7
_06011_,11.7
_07413_,11.7
_07496_,11.7
_07989_,11.7
_09792_,11.7
_10217_,11.7
_11388_,11.7
_13333_,11.7
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[0\]\[24\],11.7
soc.core.VexRiscv._zz_CsrPlugin_csrMapping_readDataInit\[16\],11.7
soc.core.VexRiscv.execute_to_memory_PC\[8\],11.7
soc.core.uart_phy_rx_tick,11.7
net6381,11.7
net8844,11.7
net11209,11.7
net11440,11.7
net12178,11.7
net2641,11.7
mgmt_buffers.la_data_in_mprj\[78\],11.695
_11753_,11.69
_02402_,11.68
_02828_,11.68
_06034_,11.68
_06169_,11.68
_06295_,11.68
_07391_,11.68
_09758_,11.68
_11123_,11.68
_13241_,11.68
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[13\]\[13\],11.68
net10499,11.675
net3133,11.665
net6915,11.665
net7988,11.665
net8078,11.665
net10379,11.665
_00792_,11.66
_02058_,11.66
_02930_,11.66
_08881_,11.66
_10233_,11.66
_13611_,11.66
soc.core.user_irq_ena_storage\[1\],11.66
clknet_leaf_1004_mgmt_buffers.caravel_clk,11.66
net2876,11.66
net5355,11.66
net9801,11.66
net12335,11.66
net13178,11.66
_11695_,11.655
_14352_,11.65
_13623_,11.64
soc.core.dbg_uart_tx_phase\[28\],11.64
net6517,11.64
mprj_io_analog_sel[1],11.63
_08273_,11.625
net3685,11.625
net6560,11.625
net8371,11.625
net9173,11.625
net12200,11.625
_05249_,11.62
_05325_,11.62
_07987_,11.62
_08387_,11.62
_10427_,11.62
_10607_,11.62
_12632_,11.62
_13478_,11.62
soc.core.mgmtsoc_value_status\[20\],11.62
net122,11.62
net3914,11.62
net5946,11.62
net9896,11.62
_00924_,11.6
_01596_,11.6
_02960_,11.6
_03150_,11.6
_05391_,11.6
_07300_,11.6
_08993_,11.6
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[10\]\[24\],11.6
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[8\]\[15\],11.6
soc.core.mgmtsoc_load_storage\[6\],11.6
net10505,11.6
_08909_,11.585
net5677,11.585
net7738,11.585
_05840_,11.58
_10734_,11.58
_11040_,11.58
_14480_,11.58
_15215_,11.58
soc.core.VexRiscv.IBusCachedPlugin_cache.ways_0_tags\[1\]\[10\],11.58
soc.core.dbg_uart_rx_phase\[3\],11.58
net3228,11.58
net3476,11.58
net11552,11.58
net11669,11.58
net12315,11.58
_03489_,11.56
_09754_,11.56
_13766_,11.56
net6259,11.56
net9707,11.56
net12368,11.56
_09275_,11.545
net4810,11.545
net5606,11.545
net6010,11.545
net6054,11.545
net6320,11.545
net6450,11.545
net6703,11.545
net6817,11.545
net6947,11.545
net7963,11.545
net8086,11.545
net9650,11.545
_01349_,11.54
_05529_,11.54
_05555_,11.54
_05565_,11.54
_05583_,11.54
_05625_,11.54
_05741_,11.54
_10347_,11.54
pll.itrim\[11\],11.54
_00315_,11.525
net5482,11.525
net7167,11.525
net7754,11.525
_00809_,11.52
_02382_,11.52
net6120,11.52
net7855,11.52
net8685,11.52
_07329_,11.515
_05190_,11.51
net3108,11.505
_00840_,11.5
_01095_,11.5
_02459_,11.5
_07306_,11.5
_09092_,11.5
_10092_,11.5
_13901_,11.5
_14573_,11.5
_15083_,11.5
_15132_,11.5
net5581,11.5
net7938,11.5
net8374,11.5
net8705,11.5
net11748,11.5
net12430,11.5
_00211_,11.48
_01464_,11.48
_01957_,11.48
_02101_,11.48
net5390,11.48
net6098,11.48
net8022,11.48
net9436,11.48
_09739_,11.475
_02899_,11.46
_06123_,11.46
_12447_,11.46
_15228_,11.46
net6934,11.46
net9392,11.46
net12312,11.46
net8476,11.445
_00458_,11.44
_01012_,11.44
_01410_,11.44
_01979_,11.44
gpio_control_in_1\[1\].gpio_ana_pol,11.44
soc.core.mgmtsoc_litespimmap_count\[0\],11.44
net3262,11.44
net12405,11.44
net12640,11.44
net12686,11.44
net7255,11.425
_02450_,11.42
_10634_,11.42
_11341_,11.42
net8286,11.42
_08531_,11.405
net3491,11.405
net3955,11.405
net5497,11.405
net7469,11.405
net76,11.4
net283,11.4
net11321,11.4
net4997,11.385
net5612,11.385
_05635_,11.38
_07678_,11.38
_08334_,11.38
_11816_,11.38
_15058_,11.38
_15290_,11.38
soc.core.VexRiscv.CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr\[14\],11.38
_08873_,11.375
_10165_,11.365
_00567_,11.36
_00692_,11.36
_01476_,11.36
_01649_,11.36
_01930_,11.36
_04739_,11.36
_05457_,11.36
_07345_,11.36
_07961_,11.36
_08805_,11.36
_10731_,11.36
_10842_,11.36
_12531_,11.36
soc.core.VexRiscv.CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr\[16\],11.36
soc.core.VexRiscv.CsrPlugin_mtval\[31\],11.36
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[12\]\[25\],11.36
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[14\]\[29\],11.36
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[2\]\[26\],11.36
soc.core.VexRiscv.RegFilePlugin_regFile\[11\]\[12\],11.36
soc.core.la_ien_storage\[7\],11.36
soc.core.mgmtsoc_litespisdrphycore_sr_in\[30\],11.36
soc.core.spi_master_miso_data\[7\],11.36
soc.core.uart_phy_tx_phase\[13\],11.36
net7991,11.36
net9138,11.36
net9944,11.36
net11113,11.36
net11594,11.36
net12099,11.36
net12187,11.36
net7359,11.345
_05888_,11.34
_10275_,11.34
_14924_,11.34
net4716,11.34
net4865,11.335
net7568,11.335
net5309,11.325
net9837,11.325
_01067_,11.32
_01726_,11.32
_04776_,11.32
_05571_,11.32
_06009_,11.32
_06931_,11.32
_07424_,11.32
_09565_,11.32
_10218_,11.32
_10694_,11.32
_13480_,11.32
_13617_,11.32
_14469_,11.32
soc.core.VexRiscv.IBusCachedPlugin_cache._zz_banks_0_port1\[12\],11.32
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[1\]\[25\],11.32
soc.core.VexRiscv.IBusCachedPlugin_cache.ways_0_tags\[1\]\[0\],11.32
soc.core.mgmtsoc_master_rx_fifo_source_payload_data\[11\],11.32
soc.core.uart_phy_tx_phase\[31\],11.32
net3534,11.32
net3701,11.32
net11688,11.32
net12574,11.32
net2663,11.32
net2989,11.305
net8041,11.305
_07456_,11.3
_10608_,11.3
mprj_io_analog_pol[11],11.29
mprj_io_analog_pol[7],11.29
mprj_io_analog_pol[9],11.29
mprj_io_analog_sel[4],11.29
mprj_io_analog_sel[7],11.29
mprj_io_ib_mode_sel[6],11.29
_07290_,11.285
_08643_,11.285
net7208,11.285
_00722_,11.28
_05331_,11.28
_05882_,11.28
_07349_,11.28
_07400_,11.28
_08120_,11.28
_08886_,11.28
_10078_,11.28
_13856_,11.28
_15247_,11.28
soc.core.VexRiscv.CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr\[1\],11.28
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[12\]\[7\],11.28
soc.core.interface11_bank_bus_dat_r\[0\],11.28
soc.core.uart_phy_tx_phase\[18\],11.28
net3076,11.28
net7876,11.28
net8878,11.28
net9595,11.28
net9852,11.28
_06703_,11.26
_06905_,11.26
_08318_,11.26
_11132_,11.26
_13873_,11.26
soc.core.VexRiscv.IBusCachedPlugin_cache.ways_0_tags\[1\]\[12\],11.26
soc.core.mgmtsoc_load_storage\[30\],11.26
net7992,11.26
_08840_,11.245
_09266_,11.245
net4094,11.245
net4951,11.245
net5454,11.245
net5870,11.245
net6070,11.245
net7831,11.245
_03046_,11.24
_05269_,11.24
_05707_,11.24
_06749_,11.24
_06772_,11.24
_06782_,11.24
_06799_,11.24
_06938_,11.24
_07445_,11.24
_07705_,11.24
_08279_,11.24
_09824_,11.24
_13759_,11.24
net5829,11.24
net6142,11.24
net7800,11.24
net11606,11.24
net11672,11.24
net12313,11.24
net12381,11.24
_00035_,11.22
_01764_,11.22
net6877,11.22
net3937,11.205
net9498,11.205
net9967,11.205
_01892_,11.2
_04277_,11.2
_08462_,11.2
_08691_,11.2
_12897_,11.2
_13722_,11.2
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[11\]\[8\],11.2
net6151,11.2
net10431,11.2
net13189,11.2
net9557,11.195
_05606_,11.19
net9952,11.185
_06383_,11.18
_12645_,11.18
_12657_,11.18
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[4\]\[18\],11.18
soc.core.dbg_uart_rx_phase\[2\],11.18
_02452_,11.16
_05287_,11.16
_05365_,11.16
_05833_,11.16
_05990_,11.16
_08776_,11.16
_10288_,11.16
_10595_,11.16
_11007_,11.16
_14408_,11.16
soc.core.mgmtsoc_litespisdrphycore_count\[0\],11.16
net7832,11.16
net8042,11.16
net9600,11.16
net10011,11.16
_01069_,11.14
_02632_,11.14
_05647_,11.14
_13575_,11.14
net5704,11.14
net6884,11.14
net8659,11.14
net3714,11.125
_01482_,11.12
_01794_,11.12
_01854_,11.12
_08184_,11.12
_08255_,11.12
_08694_,11.12
_10966_,11.12
_15050_,11.12
_15116_,11.12
soc.core.VexRiscv.RegFilePlugin_regFile\[14\]\[5\],11.12
net3859,11.12
net6419,11.12
net6557,11.12
net7683,11.12
net8833,11.12
net9124,11.12
net12509,11.12
net12688,11.12
net13171,11.12
_04116_,11.1
_04187_,11.1
_11764_,11.1
_12857_,11.1
_13899_,11.1
gpio_control_in_1\[1\].gpio_ana_en,11.1
net5646,11.1
net6615,11.1
net7679,11.1
net8045,11.1
net8168,11.1
net5594,11.095
net10267,11.09
_08451_,11.085
net6083,11.085
net6691,11.085
net9216,11.085
_03979_,11.08
_05319_,11.08
_05413_,11.08
_05487_,11.08
_05569_,11.08
_05607_,11.08
_05927_,11.08
_08679_,11.08
_10978_,11.08
_11081_,11.08
net6232,11.08
net6331,11.08
net5193,11.065
net6945,11.065
net7001,11.065
net7448,11.065
_00716_,11.06
_01802_,11.06
_06358_,11.06
gpio_control_in_1a\[5\].gpio_ana_pol,11.06
net6000,11.06
net8495,11.06
net8967,11.06
net9001,11.06
net4848,11.045
net6961,11.045
_05916_,11.04
_15102_,11.04
_15115_,11.04
_15190_,11.04
net1895,11.04
net6315,11.04
net10001,11.04
net11337,11.04
net11860,11.04
net12590,11.04
mprj_io_vtrip_sel[6],11.03
net5542,11.025
net8260,11.025
_00724_,11.02
_01417_,11.02
_02257_,11.02
_03323_,11.02
_04642_,11.02
_12729_,11.02
net5161,11.02
net6858,11.02
net7829,11.02
_13509_,11.005
net4538,11.005
net6519,11.005
_00999_,11
_02448_,11
_02816_,11
_04742_,11
_05147_,11
_08704_,11
_13595_,11
_14810_,11
_15085_,11
soc.core.VexRiscv.RegFilePlugin_regFile\[15\]\[8\],11
net6497,11
net9703,11
net2661,11
_12278_,10.985
_00772_,10.98
_02219_,10.98
_04729_,10.98
_05666_,10.98
_13633_,10.98
net5101,10.98
net6602,10.98
net12826,10.98
_03324_,10.96
_11485_,10.96
_09091_,10.945
net4723,10.945
net4750,10.945
net5023,10.945
net7811,10.945
_00168_,10.94
soc.core.VexRiscv.RegFilePlugin_regFile\[7\]\[3\],10.94
net366,10.94
net6123,10.94
net9528,10.94
mprj_io_ib_mode_sel[3],10.93
net3478,10.925
net3919,10.925
_01668_,10.92
_01727_,10.92
_01740_,10.92
_02031_,10.92
_05481_,10.92
_09299_,10.92
_10067_,10.92
_10498_,10.92
_14412_,10.92
_14776_,10.92
_15285_,10.92
soc.core.VexRiscv.lastStagePc\[27\],10.92
net3004,10.92
net3645,10.92
net4099,10.92
net10174,10.92
net11667,10.92
net12948,10.92
net6547,10.915
_05722_,10.91
_00758_,10.9
_01296_,10.9
_03536_,10.9
_06019_,10.9
_06149_,10.9
_06453_,10.9
_07323_,10.9
_07523_,10.9
_07706_,10.9
_09486_,10.9
_09780_,10.9
_15097_,10.9
soc.core.mgmtsoc_master_rx_fifo_source_payload_data\[16\],10.9
net3974,10.9
net4436,10.9
net4474,10.9
net7044,10.9
net7816,10.9
net8085,10.9
net8155,10.9
net10793,10.9
net11714,10.9
_05380_,10.89
_04017_,10.88
_05278_,10.88
_06451_,10.88
_09284_,10.88
_12305_,10.88
_12990_,10.88
net4386,10.88
net8735,10.88
net4999,10.875
net6470,10.865
net6893,10.865
_00969_,10.86
_02054_,10.86
_02682_,10.86
_05381_,10.86
_06844_,10.86
_07737_,10.86
_09442_,10.86
_09445_,10.86
soc.core.VexRiscv.CsrPlugin_selfException_payload_badAddr\[2\],10.86
soc.core.VexRiscv.DebugPlugin_busReadDataReg\[18\],10.86
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[7\]\[20\],10.86
soc.core.VexRiscv.IBusCachedPlugin_cache.ways_0_tags\[1\]\[21\],10.86
soc.core.VexRiscv.RegFilePlugin_regFile\[30\]\[12\],10.86
soc.core.gpioin5_gpioin5_edge_storage,10.86
net5154,10.86
net10334,10.86
_02506_,10.84
_03300_,10.84
_09383_,10.84
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[3\]\[20\],10.84
net11746,10.84
_05134_,10.83
net3687,10.825
net5633,10.825
net6885,10.825
net7367,10.825
net7941,10.825
_00048_,10.82
_00843_,10.82
_01873_,10.82
_06145_,10.82
_07854_,10.82
_08029_,10.82
_08058_,10.82
_09564_,10.82
_10132_,10.82
_10349_,10.82
soc.core.VexRiscv.DebugPlugin_busReadDataReg\[9\],10.82
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[6\]\[20\],10.82
soc.core.uartwishbonebridge_rs232phyrx_state,10.82
net4194,10.82
net5269,10.82
net5982,10.82
net6088,10.82
net6526,10.82
net6559,10.82
net2654,10.82
pll.ringosc.dstage\[10\].id.d1,10.815
_02117_,10.8
_02420_,10.8
_10299_,10.8
_13459_,10.8
_13823_,10.8
soc.core.multiregimpl37_regs0,10.8
net10686,10.8
net7455,10.795
_09868_,10.785
net5725,10.785
net8231,10.785
_00662_,10.78
_03360_,10.78
_05179_,10.78
_05359_,10.78
_05831_,10.78
_06028_,10.78
_06359_,10.78
_07307_,10.78
_07625_,10.78
_08616_,10.78
_09755_,10.78
soc.core.VexRiscv.CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr\[19\],10.78
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[14\]\[11\],10.78
soc.core.VexRiscv.execute_to_memory_INSTRUCTION\[13\],10.78
soc.core.spi_master_cs_storage\[6\],10.78
net5224,10.78
net5232,10.78
net6706,10.78
net7674,10.78
net7812,10.78
net11398,10.78
net12481,10.78
net12956,10.78
_00157_,10.765
_02404_,10.76
_06927_,10.76
soc.core.VexRiscv.RegFilePlugin_regFile\[28\]\[12\],10.76
net5093,10.76
net7312,10.755
net4919,10.745
net6852,10.745
net7604,10.745
net8570,10.745
_05173_,10.74
_06020_,10.74
_06710_,10.74
_10604_,10.74
gpio_control_bidir_1\[0\].gpio_ana_sel,10.74
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[10\]\[13\],10.74
soc.core.uart_phy_rx_phase\[22\],10.74
net5016,10.74
net7178,10.74
net9963,10.74
net10532,10.74
net10781,10.74
net2692,10.74
_05534_,10.73
_09263_,10.72
gpio_control_in_1\[1\].gpio_ana_sel,10.72
gpio_control_in_1\[2\].gpio_ana_sel,10.72
net9532,10.72
_08537_,10.715
net5624,10.705
net6583,10.705
net6875,10.705
net7015,10.705
net7077,10.705
net8341,10.705
net9548,10.705
net9738,10.705
net9913,10.705
_03606_,10.7
_05313_,10.7
_06063_,10.7
_06082_,10.7
_07244_,10.7
_13472_,10.7
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[12\]\[13\],10.7
soc.core.VexRiscv.execute_to_memory_PC\[9\],10.7
soc.core.mgmtsoc_litespisdrphycore_cnt\[7\],10.7
clknet_leaf_807_mgmt_buffers.caravel_clk,10.7
net5125,10.7
net6814,10.7
net11454,10.7
_05651_,10.68
_05757_,10.68
_06458_,10.68
_08192_,10.68
_11597_,10.68
_11711_,10.68
gpio_control_in_1\[4\].gpio_ana_en,10.68
mgmt_buffers.la_data_in_mprj_bar\[92\],10.68
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[15\]\[4\],10.68
net7221,10.68
net8148,10.68
net8166,10.68
net8761,10.68
net11514,10.68
net3635,10.675
net4915,10.665
net7363,10.665
net8027,10.665
net9658,10.665
_03181_,10.66
_03902_,10.66
_04702_,10.66
_05807_,10.66
_05967_,10.66
_05972_,10.66
_05974_,10.66
_07026_,10.66
_10509_,10.66
_13377_,10.66
_13481_,10.66
_15100_,10.66
_15139_,10.66
_15154_,10.66
_15289_,10.66
pll.ringosc.dstage\[10\].id.out,10.66
soc.core.VexRiscv.memory_to_writeBack_REGFILE_WRITE_DATA\[27\],10.66
net121,10.66
net6724,10.66
net6757,10.66
net8805,10.66
net10675,10.66
net12874,10.66
_01779_,10.64
_02509_,10.64
net4406,10.64
net4827,10.64
net5840,10.64
net5936,10.64
net6145,10.64
net7475,10.64
net7964,10.64
net8245,10.64
net10219,10.64
_08205_,10.625
net3493,10.625
net4961,10.625
net5151,10.625
net5503,10.625
net6476,10.625
_02525_,10.62
_05443_,10.62
_05657_,10.62
_05715_,10.62
_08522_,10.615
net6205,10.615
_05431_,10.61
net4806,10.605
net5534,10.605
net6060,10.605
_05430_,10.59
net6754,10.585
_05766_,10.58
_11380_,10.58
_13297_,10.58
_14207_,10.58
_14472_,10.58
_15134_,10.58
net3653,10.58
net3682,10.58
net4862,10.58
net7010,10.58
net9530,10.58
net9714,10.58
net11448,10.58
net12097,10.58
net12321,10.58
net6705,10.575
net5283,10.565
_00204_,10.56
_00839_,10.56
_01638_,10.56
_02710_,10.56
_02818_,10.56
_13004_,10.56
gpio_control_in_1\[2\].gpio_ana_en,10.56
net364,10.56
net6114,10.56
net7183,10.56
net5189,10.555
_00209_,10.54
_01525_,10.54
_02628_,10.54
_05689_,10.54
_09033_,10.54
_13005_,10.54
_14566_,10.54
_15295_,10.54
net7717,10.54
_08385_,10.535
net3694,10.525
net5667,10.525
net8536,10.525
_00780_,10.52
net8499,10.52
net9464,10.515
net7487,10.505
net8956,10.505
_14454_,10.5
net5467,10.485
_03077_,10.48
_11117_,10.48
net6786,10.48
net10075,10.48
_01110_,10.46
_01377_,10.46
_02378_,10.46
_02821_,10.46
_03336_,10.46
_03508_,10.46
_05255_,10.46
_07675_,10.46
_09409_,10.46
_09731_,10.46
_11833_,10.46
_13814_,10.46
net7394,10.46
net8129,10.46
net10146,10.46
net12679,10.46
_00542_,10.44
_02398_,10.44
_05416_,10.44
_06717_,10.44
_07902_,10.44
_11289_,10.44
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[9\]\[28\],10.44
soc.core.VexRiscv.dBusWishbone_DAT_MOSI\[17\],10.44
soc.core.multiregimpl1_regs0,10.44
soc.core.storage_1\[1\]\[3\],10.44
soc.core.uart_phy_tx_phase\[26\],10.44
net4259,10.44
net6407,10.44
net8939,10.44
net9897,10.44
net10184,10.44
net11017,10.44
net12161,10.44
net12174,10.44
net12271,10.44
net12572,10.44
net5838,10.425
net9441,10.425
_01255_,10.42
_07209_,10.42
_07739_,10.42
soc.core.VexRiscv.CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr\[9\],10.42
net4881,10.42
net9351,10.42
net2914,10.415
net4943,10.415
_05799_,10.41
_09063_,10.405
net4850,10.405
_00497_,10.4
_00903_,10.4
_05299_,10.4
_06018_,10.4
_06834_,10.4
_07473_,10.4
_07514_,10.4
_10071_,10.4
_10248_,10.4
_12153_,10.4
_12714_,10.4
_13240_,10.4
_13257_,10.4
_13503_,10.4
soc.core.VexRiscv.CsrPlugin_exceptionPortCtrl_exceptionContext_code\[2\],10.4
soc.core.VexRiscv.DebugPlugin_busReadDataReg\[4\],10.4
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[10\]\[25\],10.4
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[8\]\[22\],10.4
soc.core.VexRiscv.IBusCachedPlugin_cache.ways_0_tags\[1\]\[18\],10.4
soc.core.VexRiscv.RegFilePlugin_regFile\[9\]\[6\],10.4
soc.core.mgmtsoc_master_phyconfig_storage\[14\],10.4
soc.core.mgmtsoc_value\[13\],10.4
soc.core.multiregimpl66_regs1,10.4
soc.core.uart_phy_tx_data\[4\],10.4
clknet_leaf_919_mgmt_buffers.caravel_clk,10.4
net5246,10.4
net7942,10.4
net10016,10.4
net10690,10.4
net10980,10.4
net11218,10.4
net3471,10.385
net8892,10.385
_04111_,10.38
_04735_,10.38
_13526_,10.38
_15128_,10.38
gpio_control_in_2\[5\].gpio_outenb,10.38
net282,10.38
net6298,10.375
net6342,10.375
mprj_io_analog_en[7],10.37
mprj_io_analog_pol[10],10.37
net5751,10.365
net5811,10.365
net6595,10.365
net7125,10.365
net9077,10.365
net10885,10.365
_04115_,10.36
_04150_,10.36
_06084_,10.36
_06129_,10.36
_06452_,10.36
_07860_,10.36
_07892_,10.36
_08829_,10.36
_09439_,10.36
_09759_,10.36
_09811_,10.36
_12635_,10.36
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[15\]\[21\],10.36
soc.core.mgmtsoc_litespimmap_count\[3\],10.36
net7589,10.36
net8613,10.36
net9520,10.36
net12157,10.36
net12386,10.36
_07942_,10.34
_10475_,10.34
net5409,10.325
net7053,10.325
net10555,10.325
_00606_,10.32
_00932_,10.32
_00985_,10.32
_01518_,10.32
_01750_,10.32
_05129_,10.32
_05997_,10.32
_06002_,10.32
_06054_,10.32
_06231_,10.32
_06269_,10.32
_07947_,10.32
_08584_,10.32
_08680_,10.32
_08887_,10.32
_09677_,10.32
_10161_,10.32
_10476_,10.32
_10976_,10.32
_11850_,10.32
_12146_,10.32
_12626_,10.32
_12828_,10.32
_13812_,10.32
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[3\]\[29\],10.32
soc.core.la_ien_storage\[25\],10.32
soc.core.mgmtsoc_litespisdrphycore_sr_in\[1\],10.32
soc.core.uart_phy_rx_phase\[13\],10.32
net5166,10.32
net5830,10.32
net7507,10.32
net9213,10.32
net12652,10.32
_08735_,10.305
_05665_,10.3
_10130_,10.3
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[1\]\[7\],10.3
soc.core.multiregimpl35_regs0,10.3
net6398,10.3
net6029,10.285
net8472,10.285
_01158_,10.28
_05970_,10.28
_07000_,10.28
_08892_,10.28
_10980_,10.28
_12999_,10.28
_13237_,10.28
net5144,10.28
net6055,10.28
net8679,10.28
net10886,10.28
net12036,10.28
_05383_,10.26
_09971_,10.26
net6909,10.26
net2863,10.245
net6014,10.245
net7588,10.245
net7669,10.245
net9057,10.245
_00235_,10.24
_01555_,10.24
_03989_,10.24
_05175_,10.24
_05205_,10.24
_05355_,10.24
_05377_,10.24
_05661_,10.24
_07914_,10.24
_08050_,10.24
_10137_,10.24
_11022_,10.24
_11120_,10.24
_13913_,10.24
_14011_,10.24
_15339_,10.24
gpio_control_in_1\[5\].shift_register\[12\],10.24
soc.core.mgmtsoc_master_phyconfig_storage\[23\],10.24
net3710,10.24
net7450,10.24
net8522,10.24
net10071,10.24
net5665,10.235
_03288_,10.22
_07962_,10.22
net5114,10.22
net5561,10.22
net5622,10.22
net6214,10.22
net6246,10.22
net7670,10.22
net5301,10.205
net7157,10.205
_00992_,10.2
_04672_,10.2
_05157_,10.2
_05183_,10.2
_05841_,10.2
_05890_,10.2
_06119_,10.2
_06174_,10.2
_06863_,10.2
_10513_,10.2
_10711_,10.2
_11655_,10.2
_11758_,10.2
_12629_,10.2
_13369_,10.2
_13794_,10.2
_15008_,10.2
_15111_,10.2
_15150_,10.2
_15165_,10.2
_15259_,10.2
_15319_,10.2
soc.core.VexRiscv.IBusCachedPlugin_cache.ways_0_tags\[0\]\[23\],10.2
soc.core.VexRiscv.execute_to_memory_PC\[30\],10.2
net95,10.2
net4403,10.2
net4907,10.2
net9011,10.2
net11484,10.2
net12387,10.2
net9989,10.195
_01810_,10.18
_01944_,10.18
_03617_,10.18
_13484_,10.18
_13610_,10.18
gpio_control_in_1a\[3\].gpio_ana_en,10.18
net5865,10.18
net7121,10.18
net7341,10.18
net4368,10.165
net5588,10.165
net5705,10.165
net5827,10.165
net6207,10.165
net6617,10.165
net6813,10.165
net7584,10.165
net7734,10.165
net7744,10.165
net8875,10.165
net9207,10.165
_05419_,10.16
_05517_,10.16
_05605_,10.16
_05703_,10.16
_05745_,10.16
_05863_,10.16
_05891_,10.16
_09261_,10.16
_10716_,10.16
_13286_,10.16
clknet_leaf_82_mgmt_buffers.caravel_clk,10.16
clknet_leaf_1190_mgmt_buffers.caravel_clk,10.16
net5837,10.16
net9803,10.16
net10471,10.155
_08739_,10.145
net8185,10.145
_01491_,10.14
_02759_,10.14
net5022,10.14
net9438,10.14
net9500,10.14
net4687,10.125
_04741_,10.12
_05803_,10.12
_05906_,10.12
_11632_,10.12
_15096_,10.12
net4108,10.12
net7693,10.12
net8370,10.12
net8395,10.12
net8733,10.12
net9890,10.12
net11025,10.12
net7554,10.105
_01580_,10.1
_01631_,10.1
_02838_,10.1
_11021_,10.1
_11379_,10.1
_13339_,10.1
soc.core.dbg_uart_tx_phase\[24\],10.1
net5912,10.1
_08536_,10.085
_05617_,10.08
_10996_,10.08
_11670_,10.08
_11822_,10.08
_14985_,10.08
net4829,10.08
net12305,10.08
net6056,10.075
net8367,10.075
net10608,10.07
net4176,10.065
_01484_,10.06
_12386_,10.06
net220,10.06
net9104,10.06
net9519,10.06
net6825,10.045
net8756,10.045
_00206_,10.04
_05900_,10.04
_05794_,10.03
net5367,10.025
net7815,10.025
net8213,10.025
net9383,10.025
_14473_,10.02
net4097,10.02
_08516_,10.005
net4679,10.005
net8270,10.005
_01485_,10
_01508_,10
_09449_,10
_10739_,10
_11090_,10
_11406_,10
net13095,10
soc.core.VexRiscv.RegFilePlugin_regFile\[27\]\[15\],10
soc.core.VexRiscv.execute_to_memory_PC\[22\],10
soc.core.mgmtsoc_master_tx_fifo_source_payload_mask\[0\],10
net4563,10
net6681,10
net10489,9.985
_01154_,9.98
_03546_,9.98
_05353_,9.98
_05587_,9.98
_05677_,9.98
_06705_,9.98
_07294_,9.98
_07838_,9.98
_09475_,9.98
_09746_,9.98
_10353_,9.98
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[13\]\[20\],9.98
soc.core.VexRiscv.IBusCachedPlugin_cache.ways_0_tags\[1\]\[26\],9.98
soc.core.VexRiscv._zz_execute_SRC2\[23\],9.98
soc.core.gpioin5_enable_storage,9.98
soc.core.mgmtsoc_reload_storage\[1\],9.98
soc.core.multiregimpl43_regs0,9.98
soc.core.spi_master_miso_data\[3\],9.98
soc.core.storage_1\[5\]\[3\],9.98
soc.core.uart_rx_pending,9.98
net9504,9.98
net10719,9.98
net11181,9.98
net2679,9.98
_05174_,9.97
net6364,9.965
net6895,9.965
net7431,9.965
soc.core.VexRiscv.IBusCachedPlugin_cache.ways_0_tags\[0\]\[25\],9.96
_08864_,9.955
net9747,9.955
net5407,9.945
net5944,9.945
_02912_,9.94
_05385_,9.94
_07430_,9.94
_07468_,9.94
_09083_,9.94
_11537_,9.94
_11769_,9.94
pll.ringosc.dstage\[2\].id.out,9.94
soc.core.VexRiscv.DebugPlugin_busReadDataReg\[30\],9.94
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[10\]\[29\],9.94
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[11\]\[18\],9.94
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[12\]\[18\],9.94
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[2\]\[22\],9.94
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[7\]\[29\],9.94
soc.core.storage_1\[3\]\[3\],9.94
net3656,9.94
net6690,9.94
net10077,9.94
net11501,9.94
_08511_,9.905
net5891,9.905
net6733,9.905
net8592,9.905
net10091,9.905
_02908_,9.9
_03396_,9.9
_06055_,9.9
_07795_,9.9
_09659_,9.9
_09840_,9.9
_11028_,9.9
gpio_control_in_2\[8\].gpio_ana_sel,9.9
soc.core.VexRiscv.CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr\[11\],9.9
soc.core.VexRiscv.CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr\[24\],9.9
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[12\]\[30\],9.9
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[9\]\[25\],9.9
soc.core.VexRiscv.IBusCachedPlugin_cache.ways_0_tags\[0\]\[22\],9.9
soc.core.VexRiscv.RegFilePlugin_regFile\[3\]\[12\],9.9
net5640,9.9
net6815,9.9
net6967,9.9
net7011,9.9
net9304,9.9
_01396_,9.88
_03081_,9.88
_06679_,9.88
_11376_,9.88
_14007_,9.88
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[0\]\[14\],9.88
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[4\]\[26\],9.88
net4883,9.88
net8525,9.88
net8736,9.88
_08811_,9.865
net4823,9.865
net5437,9.865
net5929,9.865
net6693,9.865
net7791,9.865
_01751_,9.86
_03347_,9.86
_03951_,9.86
_04148_,9.86
_05127_,9.86
_05203_,9.86
_05711_,9.86
_06131_,9.86
_06175_,9.86
_07485_,9.86
_08001_,9.86
_08344_,9.86
_08718_,9.86
_08890_,9.86
_09791_,9.86
_12281_,9.86
soc.core.uart_phy_tx_data_rs232phy_rs232phytx_next_value2\[7\],9.86
net3659,9.86
net3669,9.86
net4656,9.86
net5107,9.86
net5671,9.86
net9227,9.86
net11978,9.86
net12274,9.86
net7548,9.845
_11014_,9.84
soc.core.mgmtsoc_master_tx_fifo_source_payload_len\[2\],9.84
net10297,9.84
net4409,9.825
net4639,9.825
net6442,9.825
_00239_,9.82
_02100_,9.82
_02108_,9.82
_02508_,9.82
_02815_,9.82
_03965_,9.82
_04972_,9.82
_05801_,9.82
_06007_,9.82
_08964_,9.82
_15161_,9.82
net7765,9.82
net12390,9.82
net2683,9.82
net10338,9.81
_08831_,9.8
_11127_,9.8
net4878,9.8
net9155,9.785
_00917_,9.78
_04527_,9.78
_12283_,9.78
_13209_,9.78
_13887_,9.78
_15095_,9.78
soc.core.VexRiscv.execute_to_memory_PC\[24\],9.78
net9204,9.78
_07379_,9.76
net6073,9.76
net6567,9.76
net6905,9.76
net7274,9.76
net8531,9.76
_02107_,9.74
_02310_,9.74
_05519_,9.74
_13473_,9.74
_13529_,9.74
_14599_,9.74
soc.core.mgmtsoc_litespisdrphycore_sr_cnt_litespiphy_next_value\[3\],9.74
net4713,9.74
net8328,9.74
net10138,9.74
_08700_,9.735
net10356,9.735
_02304_,9.72
_13977_,9.72
gpio_control_bidir_1\[1\].gpio_inenb,9.72
gpio_control_in_1\[3\].gpio_ana_pol,9.72
gpio_control_in_1a\[0\].gpio_ana_pol,9.72
soc.core.VexRiscv.RegFilePlugin_regFile\[9\]\[3\],9.72
net6506,9.72
net6558,9.72
net6701,9.72
net11441,9.71
_08456_,9.705
net4387,9.705
net4669,9.705
net4886,9.705
net5021,9.705
net5205,9.705
net5215,9.705
net6126,9.705
net6235,9.705
net6304,9.705
net7275,9.705
net7600,9.705
net8343,9.705
net9035,9.705
net9312,9.705
_05297_,9.7
_05669_,9.7
_05739_,9.7
_05838_,9.7
_06085_,9.7
_15057_,9.7
_15314_,9.7
clknet_leaf_190_mgmt_buffers.caravel_clk,9.7
net10549,9.695
net4906,9.685
net6883,9.685
net7446,9.685
_00755_,9.68
_03252_,9.68
net4601,9.68
net5756,9.68
_05294_,9.67
_11000_,9.67
_10147_,9.665
net5091,9.665
_00565_,9.66
_01899_,9.66
_03967_,9.66
_05994_,9.66
_13104_,9.66
_13515_,9.66
_13518_,9.66
_13640_,9.66
net3693,9.66
net5055,9.66
net9775,9.66
net10244,9.66
net12031,9.66
_08540_,9.645
net4740,9.645
net5931,9.645
net6074,9.645
_02455_,9.64
_14568_,9.64
net4493,9.64
net4590,9.64
net4753,9.64
net5105,9.64
net7066,9.64
net7227,9.64
net2602,9.64
net2634,9.64
_08738_,9.625
net6265,9.625
_05629_,9.62
_05667_,9.62
_12275_,9.62
net10805,9.62
net4853,9.6
net10794,9.6
net12666,9.6
_05346_,9.59
_08164_,9.58
net12308,9.58
gpio_control_in_1a\[4\].gpio_ana_pol,9.575
net5463,9.56
net9771,9.545
_00221_,9.54
_01758_,9.54
_06726_,9.54
_07529_,9.54
_09798_,9.54
_13046_,9.54
pll.ringosc.dstage\[1\].id.d0,9.54
soc.core.VexRiscv.IBusCachedPlugin_cache.lineLoader_address\[16\],9.54
net6634,9.54
net9217,9.54
net12029,9.54
net10347,9.535
net4882,9.525
net5333,9.525
net5763,9.525
net9833,9.525
_00921_,9.52
_02962_,9.52
_05226_,9.52
_05286_,9.52
_09430_,9.52
_09553_,9.52
_10695_,9.52
_13534_,9.52
_15197_,9.52
_15263_,9.52
_15297_,9.52
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[3\]\[23\],9.52
soc.core.VexRiscv.execute_to_memory_INSTRUCTION\[29\],9.52
soc.core.gpioin3_gpioin3_pending,9.52
soc.core.la_ien_storage\[10\],9.52
soc.core.spi_master_control_storage\[2\],9.52
net5535,9.52
net7702,9.52
net8971,9.52
net10012,9.52
net10796,9.52
net10902,9.52
net11475,9.52
net11510,9.52
_07315_,9.505
net6543,9.505
_01274_,9.5
_11116_,9.5
soc.core.la_ien_storage\[20\],9.5
net10775,9.495
net6201,9.485
net8072,9.485
net9811,9.485
_06102_,9.48
_06875_,9.48
_07382_,9.48
_08047_,9.48
_08091_,9.48
_10168_,9.48
_11727_,9.48
_11853_,9.48
_12274_,9.48
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[10\]\[8\],9.48
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[6\]\[25\],9.48
soc.core.VexRiscv.IBusCachedPlugin_cache.ways_0_tags\[0\]\[16\],9.48
soc.core.VexRiscv.IBusCachedPlugin_cache.ways_0_tags\[0\]\[7\],9.48
soc.core.gpioin2_gpioin2_trigger_d,9.48
soc.core.la_ien_storage\[65\],9.48
net3430,9.48
net7741,9.48
net8279,9.48
net11762,9.48
net11939,9.48
_06502_,9.46
_09963_,9.46
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[0\]\[7\],9.46
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[14\]\[12\],9.46
net9368,9.46
_05696_,9.45
_11339_,9.45
_09793_,9.445
net4042,9.445
net5602,9.445
net5983,9.445
net6721,9.445
net6965,9.445
net8021,9.445
net9421,9.445
net11158,9.445
_01488_,9.44
_05181_,9.44
_06255_,9.44
_06650_,9.44
_06741_,9.44
_07793_,9.44
_10215_,9.44
_10216_,9.44
_13053_,9.44
_13306_,9.44
_13402_,9.44
soc.core.VexRiscv.CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr\[31\],9.44
soc.core.VexRiscv.DebugPlugin_busReadDataReg\[8\],9.44
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[1\]\[9\],9.44
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[5\]\[8\],9.44
net3140,9.44
net3558,9.44
net6397,9.44
net9374,9.44
net9581,9.44
net10888,9.44
net11566,9.44
_02833_,9.42
_06056_,9.42
_08685_,9.42
_08763_,9.42
_09300_,9.42
_13140_,9.42
_13304_,9.42
_14954_,9.42
_15065_,9.42
soc.core.interface3_bank_bus_dat_r\[13\],9.42
net10326,9.42
_08740_,9.405
_11031_,9.405
net4776,9.405
net5108,9.405
net5254,9.405
net5256,9.405
net5359,9.405
net7429,9.405
net9297,9.405
_02151_,9.4
_03104_,9.4
_03957_,9.4
_11390_,9.4
_11539_,9.4
_13210_,9.4
_13583_,9.4
_13803_,9.4
_14930_,9.4
_15176_,9.4
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[5\]\[7\],9.4
soc.core.dbg_uart_tx_phase\[7\],9.4
net5702,9.4
net6260,9.4
net7904,9.4
net8744,9.4
net9319,9.4
_08674_,9.38
net9046,9.38
net4053,9.365
net4989,9.365
net7684,9.365
net10534,9.365
_00634_,9.36
_00877_,9.36
_01578_,9.36
_02162_,9.36
_02463_,9.36
_05387_,9.36
_06010_,9.36
_09144_,9.36
_15023_,9.36
_15216_,9.36
soc.core.dbg_uart_count\[5\],9.36
net4916,9.36
net5479,9.36
net5818,9.36
net8127,9.36
net9323,9.36
net11006,9.36
net11783,9.36
net12549,9.36
net12684,9.36
_03335_,9.34
net5794,9.34
net6243,9.325
net7047,9.325
net7883,9.325
_01414_,9.32
_02039_,9.32
_05225_,9.32
_06069_,9.32
_08545_,9.32
_09269_,9.32
_12829_,9.32
net10844,9.32
net5819,9.305
net11152,9.305
_00599_,9.3
_00709_,9.3
_00787_,9.3
_01136_,9.3
_10638_,9.3
gpio_control_bidir_1\[1\].gpio_ib_mode_sel,9.3
net6062,9.3
net6135,9.285
net8776,9.285
_00215_,9.28
_00443_,9.28
_01721_,9.28
_02575_,9.28
_09148_,9.28
net5330,9.28
net9274,9.28
net11639,9.28
net5137,9.275
_02516_,9.26
net9749,9.26
net11456,9.26
_05479_,9.24
_05729_,9.24
_05976_,9.24
_09603_,9.24
net6218,9.24
net11213,9.24
net12506,9.24
_12172_,9.235
net5629,9.225
net7083,9.225
net8660,9.225
net8810,9.225
_01692_,9.22
_06871_,9.22
net4149,9.22
net5742,9.22
net7100,9.22
net7107,9.22
net8081,9.22
net9903,9.22
net8167,9.205
_00411_,9.2
_02340_,9.2
_04782_,9.2
_10599_,9.2
_14406_,9.2
_15113_,9.2
soc.core.VexRiscv.IBusCachedPlugin_cache.decodeStage_mmuRsp_physicalAddress\[12\],9.2
net3486,9.2
net5781,9.2
net5974,9.2
net6431,9.2
net7276,9.2
net8716,9.2
net11547,9.2
_08355_,9.185
net4180,9.185
net4382,9.185
net6261,9.185
net8766,9.185
net8863,9.185
_13897_,9.18
net9255,9.18
net9605,9.18
net11446,9.18
net12678,9.18
_08806_,9.165
net6221,9.165
_05557_,9.16
_05633_,9.16
_06113_,9.16
_12670_,9.16
net7743,9.16
net5868,9.145
net8215,9.145
net9661,9.145
_01199_,9.14
_01225_,9.14
net4501,9.14
net12456,9.14
net12692,9.14
net12876,9.14
net12936,9.14
net12937,9.14
_10445_,9.135
_05785_,9.12
_07452_,9.12
_11343_,9.12
_14616_,9.12
net5013,9.115
net6573,9.105
net7865,9.105
_13523_,9.1
net3470,9.1
net5360,9.1
net6282,9.1
net7534,9.1
net12715,9.1
net13190,9.1
net10215,9.085
_00907_,9.08
_01934_,9.08
_07575_,9.08
_10435_,9.08
_12634_,9.08
soc.core.VexRiscv.externalInterrupt,9.08
soc.core.spi_master_cs_storage\[1\],9.08
net10139,9.08
net10381,9.08
net13162,9.08
_09079_,9.075
_05591_,9.06
_06158_,9.06
_06489_,9.06
_09264_,9.06
_09873_,9.06
_10267_,9.06
_13815_,9.06
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[7\]\[25\],9.06
soc.core.VexRiscv.RegFilePlugin_regFile\[31\]\[6\],9.06
soc.core.spi_master_cs_storage\[3\],9.06
net10579,9.06
net10757,9.06
net11249,9.06
net12100,9.06
net12243,9.06
soc.core.VexRiscv.DebugPlugin_busReadDataReg\[16\],9.05
net7017,9.045
_02390_,9.04
_10597_,9.04
net12467,9.04
_08597_,9.025
net5528,9.025
net5981,9.025
net6897,9.025
net7380,9.025
_05409_,9.02
_06422_,9.02
_06518_,9.02
_06775_,9.02
_07503_,9.02
_07682_,9.02
_10077_,9.02
_10629_,9.02
_14482_,9.02
pll.ringosc.dstage\[4\].id.d0,9.02
soc.core.VexRiscv.DebugPlugin_busReadDataReg\[14\],9.02
soc.core.VexRiscv.execute_to_memory_PC\[3\],9.02
soc.core.uart_phy_rx_phase\[28\],9.02
soc.core.uart_rx_trigger_d,9.02
net9221,9.02
net9506,9.02
net2662,9.02
soc.core.VexRiscv.dBusWishbone_DAT_MOSI\[5\],9
pll.ringosc.dstage\[1\].id.d1,8.99
net2797,8.985
net10325,8.985
_01697_,8.98
_01994_,8.98
_03004_,8.98
_06967_,8.98
_07348_,8.98
_07434_,8.98
_07443_,8.98
_08377_,8.98
_08378_,8.98
_08686_,8.98
_08777_,8.98
_09447_,8.98
_10121_,8.98
_12425_,8.98
_13422_,8.98
_13597_,8.98
_13908_,8.98
_14390_,8.98
soc.core.VexRiscv.CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr\[4\],8.98
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[5\]\[18\],8.98
soc.core.mgmtsoc_scratch_storage\[27\],8.98
net5852,8.98
net9391,8.98
net9817,8.98
net11349,8.98
net11544,8.98
_09027_,8.96
_09766_,8.96
gpio_control_bidir_1\[0\].gpio_ana_en,8.96
gpio_control_in_1\[3\].gpio_ana_en,8.96
net8903,8.96
net10783,8.96
net4869,8.945
net9964,8.945
net10667,8.945
_00604_,8.94
_01125_,8.94
_05347_,8.94
_05941_,8.94
_05954_,8.94
_07562_,8.94
_07816_,8.94
_08458_,8.94
_09648_,8.94
_09978_,8.94
_10488_,8.94
_11849_,8.94
_12675_,8.94
_14872_,8.94
_14880_,8.94
soc.core.VexRiscv.RegFilePlugin_regFile\[4\]\[11\],8.94
soc.core.multiregimpl40_regs0,8.94
net5109,8.94
net6015,8.94
net7360,8.94
net10122,8.94
net12261,8.94
net12303,8.94
net12706,8.94
_02408_,8.92
_05721_,8.92
net5693,8.905
net6513,8.905
net6933,8.905
_00595_,8.9
_00651_,8.9
_00725_,8.9
_03042_,8.9
_05163_,8.9
_05851_,8.9
_05935_,8.9
_07446_,8.9
_08942_,8.9
_10384_,8.9
_13620_,8.9
_15055_,8.9
soc.core.VexRiscv.RegFilePlugin_regFile\[18\]\[6\],8.9
soc.core.dbg_uart_tx_phase\[15\],8.9
soc.core.mgmtsoc_load_storage\[4\],8.9
net5513,8.9
net6192,8.9
net6992,8.9
net7134,8.9
net7300,8.9
net7798,8.9
net8342,8.9
net9231,8.9
net8841,8.895
_01468_,8.89
net8562,8.885
_05442_,8.88
_11786_,8.88
_13290_,8.88
net9820,8.88
_08615_,8.865
net5782,8.865
_00663_,8.86
_01385_,8.86
_05847_,8.86
_05909_,8.86
_05981_,8.86
_07790_,8.86
_09073_,8.86
_09285_,8.86
soc.core.VexRiscv.IBusCachedPlugin_cache.ways_0_tags\[1\]\[4\],8.86
soc.core.dbg_uart_cmd\[2\],8.86
net5900,8.86
net6638,8.86
net6809,8.86
net7763,8.86
net9145,8.86
net10803,8.86
net11254,8.86
net4253,8.855
net6356,8.855
net10407,8.85
_00428_,8.84
_00519_,8.84
_01124_,8.84
_01399_,8.84
_02979_,8.84
_03012_,8.84
_07546_,8.84
net7320,8.84
net7721,8.84
net8518,8.84
net8943,8.84
net9793,8.84
net5562,8.825
net7889,8.825
_02141_,8.82
_05577_,8.82
_08673_,8.82
_10991_,8.82
_14467_,8.82
_14937_,8.82
_15291_,8.82
net47,8.82
net9428,8.82
net9582,8.82
net12568,8.82
_01799_,8.8
soc.core.uart_phy_tx_data_rs232phy_rs232phytx_next_value2\[2\],8.8
net5418,8.8
net5499,8.8
net5576,8.8
net6262,8.8
net6500,8.785
net7627,8.785
_05327_,8.78
_05681_,8.78
_05747_,8.78
_05993_,8.78
_10700_,8.78
_13293_,8.78
net9742,8.78
net4612,8.765
net5046,8.765
net8252,8.765
_00982_,8.76
net7737,8.76
net8471,8.76
_05344_,8.75
_00439_,8.74
_01006_,8.74
_02439_,8.74
_03500_,8.74
_05959_,8.74
_07292_,8.74
_08332_,8.74
_14459_,8.74
net3237,8.74
net5934,8.74
net6299,8.74
net6321,8.74
net7434,8.74
net7922,8.74
net9899,8.74
net11255,8.74
net12316,8.74
net12691,8.74
net12702,8.74
net4509,8.725
net4659,8.725
net7186,8.725
_00656_,8.72
_02148_,8.72
_03071_,8.72
net7166,8.72
_05553_,8.7
_05763_,8.7
net10713,8.7
net12552,8.7
_02875_,8.68
net7705,8.68
net12945,8.68
_05372_,8.67
net5387,8.665
net6160,8.665
net8896,8.665
_03949_,8.66
_11802_,8.66
net8130,8.66
net9521,8.66
net12660,8.66
_02820_,8.64
net5696,8.64
_00579_,8.62
_01615_,8.62
_04113_,8.62
_04620_,8.62
_05061_,8.62
_07295_,8.62
_07583_,8.62
_07614_,8.62
_08773_,8.62
_09841_,8.62
_10368_,8.62
_12859_,8.62
_13381_,8.62
_15168_,8.62
net5416,8.62
net5965,8.62
net10669,8.62
net12382,8.62
_07031_,8.605
net5786,8.605
net8745,8.605
_01176_,8.6
_02416_,8.6
_03205_,8.6
_05301_,8.6
_06048_,8.6
_06088_,8.6
_06684_,8.6
_08407_,8.6
_09405_,8.6
_09458_,8.6
_11768_,8.6
_13362_,8.6
_15224_,8.6
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[14\]\[28\],8.6
soc.core.VexRiscv.dBusWishbone_DAT_MOSI\[12\],8.6
soc.core.mgmtsoc_load_storage\[3\],8.6
soc.core.mgmtsoc_master_rx_fifo_source_payload_data\[8\],8.6
soc.core.mgmtsoc_value_status\[23\],8.6
soc.core.storage_1\[3\]\[7\],8.6
soc.core.uart_phy_tx_data\[1\],8.6
net3264,8.6
net6928,8.6
net7056,8.6
net11309,8.6
net11375,8.6
net12853,8.6
net8037,8.585
net3383,8.565
net10867,8.565
_02704_,8.56
_03511_,8.56
_03626_,8.56
_06554_,8.56
_06682_,8.56
_08769_,8.56
_11079_,8.56
soc.core.VexRiscv.IBusCachedPlugin_cache.ways_0_tags\[1\]\[16\],8.56
soc.core.la_ien_storage\[37\],8.56
soc.core.mgmtsoc_litespisdrphycore_sr_in\[21\],8.56
soc.core.mgmtsoc_litespisdrphycore_sr_in\[5\],8.56
net6855,8.56
net8414,8.56
net9971,8.56
net12213,8.56
net7871,8.545
_08335_,8.54
_14355_,8.54
_14600_,8.54
mgmt_buffers.la_data_in_mprj_bar\[85\],8.54
net6140,8.54
net11675,8.54
mgmt_buffers.la_data_in_mprj\[85\],8.525
net5397,8.525
net5620,8.525
net5717,8.525
net7857,8.525
net7943,8.525
_01787_,8.52
_02406_,8.52
_06320_,8.52
_07313_,8.52
_07432_,8.52
_07769_,8.52
_13232_,8.52
_13588_,8.52
_14228_,8.52
soc.core.VexRiscv.CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr\[20\],8.52
soc.core.VexRiscv.IBusCachedPlugin_cache.ways_0_tags\[0\]\[27\],8.52
soc.core.count\[6\],8.52
net6485,8.52
net7856,8.52
net9289,8.52
net10256,8.52
net11317,8.52
net11526,8.52
_12382_,8.5
gpio_control_in_1\[0\].gpio_ana_en,8.5
net6137,8.485
net8256,8.485
net8883,8.485
net11334,8.485
_00572_,8.48
_00873_,8.48
_05295_,8.48
_05551_,8.48
_05589_,8.48
_10839_,8.48
_11767_,8.48
_11830_,8.48
_11847_,8.48
_12280_,8.48
_14621_,8.48
soc.core.la_ien_storage\[22\],8.48
soc.core.mgmtsoc_litespisdrphycore_sr_in\[4\],8.48
soc.core.mgmtsoc_master_rx_fifo_source_payload_data\[6\],8.48
net3866,8.48
net6524,8.48
net6747,8.48
net8083,8.48
net9483,8.48
_05345_,8.46
_13598_,8.46
mgmt_buffers.la_data_in_mprj_bar\[93\],8.46
net8993,8.46
net6113,8.455
_12883_,8.45
_01789_,8.44
_05792_,8.44
_05817_,8.44
_05905_,8.44
_06083_,8.44
_08546_,8.44
_08607_,8.44
_08819_,8.44
_08847_,8.44
_11135_,8.44
_11797_,8.44
_15007_,8.44
net5192,8.44
net7000,8.44
_07836_,8.42
_12279_,8.42
net4991,8.405
net6093,8.405
net10337,8.405
_01870_,8.4
_02454_,8.4
_03105_,8.4
_05051_,8.4
_14488_,8.4
net3284,8.4
net5918,8.4
net6642,8.4
net7154,8.4
_00745_,8.38
_01524_,8.38
_10070_,8.38
net8411,8.38
net8477,8.38
net5277,8.365
_00576_,8.36
_00627_,8.36
_01762_,8.36
_02109_,8.36
_03372_,8.36
_13239_,8.36
_14476_,8.36
_01703_,8.34
_02511_,8.34
_10567_,8.34
_13608_,8.34
net3793,8.34
net8380,8.34
_09035_,8.325
net7041,8.325
net7463,8.325
_05725_,8.32
_10613_,8.32
_15276_,8.32
gpio_control_in_1a\[5\].gpio_slow_sel,8.32
net5150,8.32
net5953,8.32
net7388,8.32
net12032,8.32
net12687,8.32
net5691,8.305
net5962,8.305
net9019,8.305
_00540_,8.3
_00757_,8.3
gpio_control_in_1a\[4\].gpio_slow_sel,8.3
net6063,8.3
_05320_,8.29
_05398_,8.29
net6587,8.285
_00232_,8.28
_01616_,8.28
_04311_,8.28
_09114_,8.28
_10999_,8.28
_14747_,8.28
net5803,8.28
net6839,8.28
net11390,8.28
net11481,8.28
net5849,8.26
net7374,8.26
net11273,8.26
net12543,8.26
net13169,8.25
_05540_,8.24
_05573_,8.24
net6653,8.24
_08197_,8.225
net8860,8.225
net10145,8.22
_05414_,8.21
net4799,8.205
net6285,8.205
_14943_,8.2
net6492,8.195
net6279,8.185
net6592,8.18
net12327,8.18
net12663,8.18
net6973,8.165
_05399_,8.16
_07376_,8.16
_07817_,8.16
_08692_,8.16
_09301_,8.16
_09823_,8.16
_14761_,8.16
mgmt_buffers.la_data_in_mprj_bar\[78\],8.16
soc.core.VexRiscv.RegFilePlugin_regFile\[27\]\[6\],8.16
net115,8.16
_05162_,8.15
_05460_,8.15
net6907,8.145
net9333,8.145
_01187_,8.14
_03127_,8.14
_06747_,8.14
_08667_,8.14
_09422_,8.14
_09966_,8.14
_13329_,8.14
_13629_,8.14
pll.ringosc.dstage\[10\].id.d2,8.14
soc.core.VexRiscv.CsrPlugin_pipelineLiberator_pcValids_1,8.14
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[2\]\[25\],8.14
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[3\]\[15\],8.14
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[4\]\[14\],8.14
soc.core.VexRiscv.IBusCachedPlugin_cache.ways_0_tags\[1\]\[15\],8.14
soc.core.VexRiscv.execute_to_memory_PC\[10\],8.14
soc.core.dbg_uart_rx_phase\[4\],8.14
soc.core.la_ien_storage\[26\],8.14
soc.core.multiregimpl84_regs0,8.14
net3190,8.14
net7336,8.14
net10945,8.14
net11296,8.14
net5643,8.125
net6041,8.125
net6393,8.125
net6603,8.125
_03939_,8.12
_07908_,8.12
_10521_,8.12
_11129_,8.12
net10610,8.12
_08398_,8.115
net4772,8.115
_12360_,8.11
net3074,8.105
_00224_,8.1
_01064_,8.1
_01878_,8.1
_02324_,8.1
_02436_,8.1
_03348_,8.1
_06047_,8.1
_06192_,8.1
_06839_,8.1
_07410_,8.1
_07511_,8.1
_07714_,8.1
_07851_,8.1
_08059_,8.1
_14485_,8.1
pll.ringosc.dstage\[1\].id.out,8.1
soc.core.VexRiscv.DebugPlugin_busReadDataReg\[29\],8.1
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[0\]\[29\],8.1
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[11\]\[25\],8.1
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[15\]\[20\],8.1
soc.core.VexRiscv.IBusCachedPlugin_cache.ways_0_tags\[0\]\[0\],8.1
soc.core.VexRiscv.RegFilePlugin_regFile\[21\]\[6\],8.1
soc.core.VexRiscv._zz_execute_SRC2\[25\],8.1
soc.core.la_ien_storage\[30\],8.1
soc.core.spi_master_mosi_storage\[6\],8.1
soc.core.user_irq_ena_storage\[0\],8.1
net6365,8.1
net7553,8.1
soc.core.VexRiscv.CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr\[27\],8.08
net5169,8.075
_08532_,8.065
net7273,8.065
net9338,8.065
_05895_,8.06
_05930_,8.06
_05936_,8.06
_06675_,8.06
_07626_,8.06
_07687_,8.06
_07863_,8.06
_07930_,8.06
_08099_,8.06
_09557_,8.06
_10141_,8.06
_10219_,8.06
_11137_,8.06
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[15\]\[23\],8.06
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[15\]\[7\],8.06
soc.core.mgmtsoc_master_cs_storage,8.06
net6289,8.06
net6982,8.06
net8170,8.06
net11388,8.06
net12049,8.06
_09333_,8.04
_11342_,8.04
_13235_,8.04
net13071,8.04
net3105,8.035
net7425,8.025
net7877,8.025
net8201,8.025
net8817,8.025
net8944,8.025
_01311_,8.02
_04286_,8.02
_04495_,8.02
_05333_,8.02
_06094_,8.02
_06108_,8.02
_06135_,8.02
_08782_,8.02
_10292_,8.02
_12409_,8.02
_13178_,8.02
_13366_,8.02
_14728_,8.02
soc.core.VexRiscv.execute_arbitration_isStuck,8.02
soc.core.VexRiscv.execute_to_memory_PC\[11\],8.02
soc.core.mgmtsoc_value_status\[28\],8.02
net3915,8.02
net5341,8.02
net5445,8.02
net5492,8.02
net9358,8.02
net10344,8.02
net10680,8.02
net11565,8.02
net12098,8.02
net12131,8.02
net12418,8.02
_09861_,8
soc.core.VexRiscv.RegFilePlugin_regFile\[18\]\[12\],8
net4138,8
net9291,7.995
_02755_,7.98
_05836_,7.98
_05901_,7.98
_05968_,7.98
_08169_,7.98
_08346_,7.98
_08846_,7.98
_09096_,7.98
_10698_,7.98
_10740_,7.98
_12367_,7.98
_14608_,7.98
_15090_,7.98
soc.core.mgmtsoc_master_phyconfig_storage\[22\],7.98
net3860,7.98
net4240,7.98
_05783_,7.95
net8403,7.945
_04120_,7.94
_05527_,7.94
_08885_,7.94
_10133_,7.94
_11538_,7.94
soc.core.memdat_3\[3\],7.94
net7626,7.94
net8182,7.94
net9724,7.94
net12414,7.94
_00512_,7.92
_02360_,7.92
_04033_,7.92
_10697_,7.92
net4584,7.92
net6134,7.92
net6230,7.92
net6922,7.92
net7340,7.92
net7882,7.92
net8502,7.92
net10616,7.92
net11588,7.92
net5078,7.905
net6887,7.905
_01684_,7.9
_05774_,7.9
_06115_,7.9
_09274_,7.9
_13233_,7.9
_15122_,7.9
net9064,7.9
_00551_,7.88
net4756,7.88
net5611,7.88
net6532,7.88
_00210_,7.86
_05561_,7.86
_05961_,7.86
_06050_,7.86
_12390_,7.86
_14619_,7.86
net13115,7.86
net13133,7.86
clknet_leaf_727_mgmt_buffers.caravel_clk,7.86
net4928,7.86
net12845,7.86
net3580,7.845
net4681,7.845
net5287,7.845
_00894_,7.84
_00955_,7.84
_01007_,7.84
net5295,7.84
net6596,7.84
net8494,7.84
_01882_,7.82
_01959_,7.82
_02811_,7.82
_02905_,7.82
_05200_,7.82
_05224_,7.82
_06104_,7.82
_09088_,7.82
_09587_,7.82
net7701,7.82
net7930,7.82
net10531,7.82
net11685,7.82
net11940,7.82
net12248,7.82
_08717_,7.815
net6148,7.805
net9681,7.805
_00549_,7.8
_13430_,7.8
net50,7.8
net6133,7.8
net7229,7.8
net10740,7.8
net12058,7.785
_05559_,7.78
_08573_,7.78
_10725_,7.78
_13846_,7.78
pll.ringosc.dstage\[9\].id.d1,7.78
net3246,7.765
net5052,7.765
net6099,7.765
net7204,7.765
net49,7.76
net72,7.76
net6245,7.76
net8902,7.76
net12639,7.76
_02430_,7.74
net10501,7.735
net7562,7.725
net2941,7.705
net6087,7.705
_07298_,7.7
_07448_,7.7
_09450_,7.7
_09947_,7.7
_10723_,7.7
_10744_,7.7
_11009_,7.7
soc.core.storage_1\[2\]\[4\],7.7
net10165,7.7
net10712,7.7
_13556_,7.685
_00622_,7.68
_02256_,7.68
_02376_,7.68
_03941_,7.68
_04145_,7.68
_05302_,7.68
_06059_,7.68
_06325_,7.68
_06662_,7.68
_07439_,7.68
_07495_,7.68
_08512_,7.68
_08561_,7.68
_10189_,7.68
_13643_,7.68
pll.ringosc.dstage\[8\].id.d2,7.68
soc.core.mgmtsoc_litespisdrphycore_sr_in\[17\],7.68
soc.core.mgmtsoc_load_storage\[25\],7.68
soc.core.mgmtsoc_scratch_storage\[20\],7.68
net3119,7.68
net3759,7.68
net8145,7.68
net9222,7.68
net9292,7.68
net10433,7.68
net11112,7.68
net11562,7.68
net11761,7.68
_08470_,7.665
net7637,7.665
net7923,7.665
_06774_,7.66
_07366_,7.66
_11010_,7.66
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[8\]\[13\],7.66
soc.core.storage_1\[0\]\[3\],7.66
net9449,7.645
_00167_,7.64
_00996_,7.64
_03616_,7.64
_05924_,7.64
_06060_,7.64
_07350_,7.64
_07371_,7.64
_07519_,7.64
_07772_,7.64
_09494_,7.64
_10274_,7.64
_14757_,7.64
soc.core.VexRiscv.CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr\[5\],7.64
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[13\]\[25\],7.64
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[15\]\[9\],7.64
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[1\]\[14\],7.64
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[1\]\[17\],7.64
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[4\]\[29\],7.64
soc.core.VexRiscv.IBusCachedPlugin_cache.ways_0_tags\[0\]\[21\],7.64
soc.core.VexRiscv.execute_to_memory_PC\[7\],7.64
soc.core.memdat_3\[6\],7.64
soc.core.storage_1\[6\]\[3\],7.64
soc.core.uart_phy_tx_phase\[10\],7.64
net4437,7.64
net8512,7.64
net9542,7.64
net11457,7.64
net12033,7.64
net13195,7.64
_14466_,7.62
_07305_,7.615
_08527_,7.605
net5017,7.605
net5903,7.605
net6085,7.605
net6328,7.605
_02974_,7.6
_05834_,7.6
_05855_,7.6
_05939_,7.6
_06049_,7.6
_06097_,7.6
_06153_,7.6
_06557_,7.6
_06867_,7.6
_07731_,7.6
_07842_,7.6
_07883_,7.6
_08067_,7.6
_10525_,7.6
soc.core.VexRiscv.CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr\[10\],7.6
soc.core.mgmtsoc_master_phyconfig_storage\[13\],7.6
soc.core.storage_1\[2\]\[3\],7.6
net98,7.6
net3529,7.6
net7638,7.6
net9850,7.6
net10261,7.6
net11325,7.6
net11596,7.6
net11750,7.6
net12457,7.6
_03030_,7.58
_15170_,7.58
net13070,7.58
net3965,7.58
net9330,7.58
net6354,7.565
net7139,7.565
net9181,7.565
net10240,7.565
_01029_,7.56
_01745_,7.56
_05283_,7.56
_05307_,7.56
_05914_,7.56
_06021_,7.56
_06071_,7.56
_08604_,7.56
_09268_,7.56
_13912_,7.56
soc.core.VexRiscv.IBusCachedPlugin_cache._zz_banks_0_port1\[13\],7.56
net6702,7.56
net6964,7.56
net10206,7.56
net12196,7.56
net12226,7.56
net2616,7.56
_02434_,7.54
net7602,7.54
net9440,7.53
net4142,7.525
_03454_,7.52
_05291_,7.52
_05885_,7.52
_05952_,7.52
_06126_,7.52
_07320_,7.52
_09279_,7.52
_10436_,7.52
_10860_,7.52
_13880_,7.52
_14879_,7.52
_15042_,7.52
soc.core.dbg_uart_tx_phase\[27\],7.52
net247,7.52
clknet_leaf_393_mgmt_buffers.caravel_clk,7.52
net5436,7.52
net6854,7.52
net8726,7.52
net11069,7.52
net12326,7.52
_10702_,7.5
net8780,7.485
net10551,7.485
_06168_,7.48
_11023_,7.48
_14878_,7.48
soc.core.VexRiscv.lastStagePc\[21\],7.48
net11681,7.48
_00571_,7.46
_00659_,7.46
_01574_,7.46
_01929_,7.46
net5004,7.46
net5541,7.46
net6053,7.46
net7375,7.46
net7428,7.46
net8084,7.46
net9718,7.46
net4715,7.445
net5064,7.445
net7748,7.445
_05748_,7.44
_09435_,7.44
_14130_,7.44
_15064_,7.44
_15148_,7.44
_15164_,7.44
net5666,7.44
_01626_,7.42
_11804_,7.42
net3876,7.42
net5564,7.42
net8349,7.42
net8648,7.42
net9869,7.42
net11975,7.42
_05159_,7.4
_05860_,7.4
_05933_,7.4
_11925_,7.4
net13131,7.4
net13119,7.4
net9589,7.4
net7071,7.385
net10617,7.385
_02586_,7.38
net6453,7.38
net9192,7.38
_01562_,7.36
_02510_,7.36
_08463_,7.36
_12411_,7.36
pll.ringosc.dstage\[2\].id.d2,7.36
net4613,7.36
net4737,7.36
net4872,7.36
net5321,7.36
net6990,7.36
net8255,7.36
net8809,7.36
net10811,7.36
net10819,7.36
net11224,7.36
net11393,7.36
net11408,7.36
net12059,7.36
net12260,7.36
net12489,7.36
net2639,7.36
net2656,7.36
net2678,7.36
net2687,7.36
net7393,7.355
_08722_,7.345
net5001,7.345
net7879,7.345
net7903,7.345
net9855,7.345
pll.ringosc.dstage\[7\].id.d0,7.34
net5451,7.34
net7847,7.34
net10507,7.335
_04988_,7.33
_08533_,7.325
_01031_,7.32
_02446_,7.32
_04337_,7.32
_05441_,7.32
_05547_,7.32
_05717_,7.32
_08403_,7.32
_10447_,7.32
soc.core.mgmtsoc_load_storage\[5\],7.32
net5303,7.315
net4963,7.305
net7825,7.305
_02424_,7.3
pll.ringosc.dstage\[0\].id.d1,7.3
net3861,7.3
net12554,7.3
_11027_,7.29
net9652,7.285
net10008,7.285
_08461_,7.28
_14935_,7.28
soc.core.uart_phy_rx_phase\[23\],7.28
_12995_,7.275
net5139,7.265
net6731,7.265
net10640,7.265
net5191,7.245
_05133_,7.24
_06746_,7.24
_06786_,7.24
_07752_,7.24
_10715_,7.24
pll.ringosc.dstage\[5\].id.d0,7.24
net3698,7.24
_08148_,7.225
net6639,7.225
_02957_,7.22
_08684_,7.22
_08830_,7.22
_09308_,7.22
_11460_,7.22
_13338_,7.22
_15051_,7.22
soc.core.VexRiscv.CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr\[13\],7.22
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[0\]\[9\],7.22
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[15\]\[27\],7.22
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[15\]\[8\],7.22
soc.core.VexRiscv.IBusCachedPlugin_cache.ways_0_tags\[1\]\[19\],7.22
soc.core.VexRiscv.dBusWishbone_CYC,7.22
soc.core.mgmtsoc_scratch_storage\[26\],7.22
soc.core.storage_1\[0\]\[7\],7.22
net5740,7.22
net7282,7.22
net7294,7.22
net9265,7.22
net10709,7.22
net11415,7.22
net11497,7.22
net11640,7.22
net12102,7.22
net12237,7.22
net2658,7.22
net6103,7.205
net8676,7.205
net9614,7.205
_09307_,7.2
soc.core.mgmtsoc_master_rx_fifo_source_payload_data\[30\],7.2
_10163_,7.195
net8621,7.185
net9667,7.185
net11312,7.185
_00196_,7.18
_00621_,7.18
_01829_,7.18
_05188_,7.18
_05389_,7.18
_06070_,7.18
_06351_,7.18
_08564_,7.18
_08715_,7.18
_09987_,7.18
_11477_,7.18
_13278_,7.18
_13621_,7.18
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[3\]\[25\],7.18
soc.core.VexRiscv.RegFilePlugin_regFile\[16\]\[6\],7.18
soc.core.mgmtsoc_scratch_storage\[23\],7.18
soc.core.uart_phy_tx_data_rs232phy_rs232phytx_next_value2\[1\],7.18
net4861,7.18
net8142,7.18
net8775,7.18
net11153,7.18
net12434,7.18
net12445,7.18
soc.core.dbg_uart_rx_data\[2\],7.16
net2999,7.155
net3396,7.145
net3757,7.145
net5484,7.145
net5486,7.145
net6566,7.145
net6860,7.145
net7103,7.145
_02845_,7.14
_06138_,7.14
_06161_,7.14
_10131_,7.14
_10455_,7.14
_10619_,7.14
_15082_,7.14
_15147_,7.14
soc.core.user_irq_ena_storage\[2\],7.14
net5466,7.14
net11367,7.14
_08317_,7.12
_08752_,7.12
soc.core.VexRiscv.BranchPlugin_branchExceptionPort_payload_badAddr\[19\],7.12
net8250,7.12
net4542,7.105
net5389,7.105
net8171,7.105
_05401_,7.1
_05415_,7.1
_05563_,7.1
_05597_,7.1
_05877_,7.1
_06261_,7.1
_08073_,7.1
_08183_,7.1
_10432_,7.1
_10512_,7.1
_10578_,7.1
_10586_,7.1
_11094_,7.1
_11111_,7.1
_14918_,7.1
soc.core.interface3_bank_bus_dat_r\[1\],7.1
net4036,7.1
net5206,7.1
net10025,7.1
net10068,7.1
net10665,7.1
net11603,7.1
net2617,7.1
_08193_,7.08
net5344,7.08
net5578,7.08
_01766_,7.06
_03985_,7.06
_05407_,7.06
_05854_,7.06
_08832_,7.06
_09078_,7.06
_09281_,7.06
_12435_,7.06
_13627_,7.06
_13663_,7.06
soc.core.dbg_uart_rx_phase\[23\],7.06
net69,7.06
net365,7.06
net12393,7.06
net5907,7.055
net9212,7.055
_12881_,7.05
soc.core.dbg_uart_rx_data\[1\],7.04
net5294,7.025
_13859_,7.015
net2788,7.015
_00513_,7
_00547_,7
_01748_,7
_02435_,7
_03596_,7
net5716,7
net7156,7
net7510,7
net10822,7
_08283_,6.985
net5419,6.985
net6975,6.985
net10208,6.985
_07005_,6.98
_08401_,6.98
_10639_,6.98
_12866_,6.98
_13385_,6.98
_15252_,6.98
net6912,6.98
net12350,6.98
net5435,6.975
net5921,6.975
_01630_,6.96
_02252_,6.96
_03408_,6.96
_13852_,6.96
net6174,6.96
net6803,6.96
net7921,6.96
_05889_,6.94
_10975_,6.94
_13504_,6.94
_14858_,6.94
net7091,6.94
_09013_,6.935
net5862,6.935
net5741,6.925
net5757,6.925
net7357,6.925
net8195,6.925
net9209,6.925
net10823,6.925
_01299_,6.92
_01526_,6.92
_01637_,6.92
net7838,6.92
_07333_,6.905
net5145,6.905
_01184_,6.9
net4903,6.9
net5686,6.9
net7068,6.9
net9996,6.9
net10333,6.9
net11631,6.9
net12300,6.9
net6725,6.885
net7131,6.885
net7182,6.885
net7596,6.885
net9688,6.885
_10442_,6.88
_10743_,6.88
net7181,6.88
net9322,6.88
net12712,6.88
_08149_,6.865
_05533_,6.86
_05615_,6.86
_05779_,6.86
_05949_,6.86
_14468_,6.86
net13146,6.86
net6424,6.845
net8946,6.845
_04005_,6.84
_04505_,6.84
_05264_,6.84
_13915_,6.84
net12873,6.84
_03856_,6.83
_05284_,6.83
_00150_,6.825
_00300_,6.825
net9303,6.825
_11386_,6.82
net5916,6.82
net5842,6.815
net7079,6.815
net5441,6.805
pll.ringosc.dstage\[3\].id.d0,6.8
net5699,6.785
_02159_,6.78
_02919_,6.78
_06836_,6.78
_06852_,6.78
_06874_,6.78
_07798_,6.78
_08412_,6.78
_09310_,6.78
_13375_,6.78
soc.core.multiregimpl88_regs0,6.78
net9522,6.78
net10687,6.78
net11754,6.78
net6077,6.775
net5350,6.765
_00546_,6.76
_01086_,6.76
_01277_,6.76
_01791_,6.76
_02774_,6.76
_04177_,6.76
_06087_,6.76
_06551_,6.76
_06677_,6.76
_06806_,6.76
_07414_,6.76
_07463_,6.76
_07550_,6.76
_07913_,6.76
_07994_,6.76
_08027_,6.76
_10993_,6.76
_12646_,6.76
_14486_,6.76
soc.core.VexRiscv.CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr\[6\],6.76
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[2\]\[14\],6.76
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[2\]\[18\],6.76
soc.core.VexRiscv.IBusCachedPlugin_cache.ways_0_tags\[0\]\[15\],6.76
soc.core.dbg_uart_tx_phase\[31\],6.76
soc.core.mgmtsoc_master_rx_fifo_source_payload_data\[2\],6.76
soc.core.multiregimpl39_regs0,6.76
soc.core.uart_rx2,6.76
net3798,6.76
net3867,6.76
net5846,6.76
net5906,6.76
net9337,6.76
net10801,6.76
net11279,6.76
net12556,6.76
net5311,6.745
net7471,6.745
net7655,6.745
net3868,6.735
net9906,6.725
_00594_,6.72
_00794_,6.72
_03384_,6.72
_05171_,6.72
_05285_,6.72
_07427_,6.72
_07440_,6.72
_07831_,6.72
_09325_,6.72
_09720_,6.72
_10747_,6.72
_12380_,6.72
_13325_,6.72
_13379_,6.72
_13773_,6.72
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[14\]\[4\],6.72
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[2\]\[24\],6.72
soc.core.VexRiscv.IBusCachedPlugin_cache.ways_0_tags\[1\]\[17\],6.72
soc.core.VexRiscv.RegFilePlugin_regFile\[19\]\[6\],6.72
soc.core.VexRiscv.decode_to_execute_SRC2_FORCE_ZERO,6.72
soc.core.mgmtsoc_master_phyconfig_storage\[3\],6.72
clknet_leaf_310_mgmt_buffers.caravel_clk,6.72
clknet_leaf_887_mgmt_buffers.caravel_clk,6.72
net5081,6.72
net6849,6.72
net9175,6.72
net10634,6.72
net11493,6.72
net12083,6.72
net12193,6.72
_13052_,6.7
net4821,6.695
net4979,6.685
net6251,6.685
net9350,6.685
net8857,6.68
_14623_,6.66
net9082,6.66
net2799,6.645
net5213,6.645
net5471,6.645
net5970,6.645
net6993,6.645
net8466,6.645
net8820,6.645
net8999,6.645
_03172_,6.64
_05303_,6.64
_05371_,6.64
_05435_,6.64
_05613_,6.64
_05805_,6.64
_06136_,6.64
_06547_,6.64
_08565_,6.64
_12661_,6.64
_13854_,6.64
_13910_,6.64
_14500_,6.64
soc.core.gpioin3_enable_storage,6.64
net263,6.64
net368,6.64
net5875,6.64
net7597,6.64
net8068,6.64
net12216,6.64
net7161,6.635
_06454_,6.62
soc.core.VexRiscv.RegFilePlugin_regFile\[29\]\[3\],6.62
net5056,6.615
_00354_,6.6
_00596_,6.6
_02172_,6.6
_02526_,6.6
_05938_,6.6
_05973_,6.6
_06455_,6.6
_08339_,6.6
_11086_,6.6
_12428_,6.6
_14926_,6.6
soc.core.dbg_uart_tx_phase\[23\],6.6
soc.core.uart_pending_r\[0\],6.6
net73,6.6
net8708,6.6
net9417,6.6
net12319,6.6
_08808_,6.565
net6929,6.565
net9067,6.565
_01128_,6.54
_02282_,6.54
_02433_,6.54
_04165_,6.54
_08402_,6.54
net5768,6.54
net7640,6.54
net8682,6.54
net8762,6.54
net9927,6.54
_03836_,6.53
_01284_,6.52
_05975_,6.52
_06052_,6.52
_10989_,6.52
_12436_,6.52
_14622_,6.52
_15178_,6.52
net11422,6.52
_01522_,6.5
_01732_,6.5
_01971_,6.5
_03953_,6.5
_04433_,6.5
_14934_,6.5
net5656,6.5
net6181,6.5
net6072,6.485
_01205_,6.48
_10369_,6.48
mgmt_buffers.la_data_in_mprj_bar\[80\],6.48
clknet_leaf_950_mgmt_buffers.caravel_clk,6.48
net12837,6.48
net7301,6.465
net8707,6.465
net4733,6.46
net11146,6.455
_04074_,6.44
_05978_,6.44
_07332_,6.44
_08678_,6.44
_11384_,6.44
soc.core.mgmtsoc_litespisdrphycore_sr_cnt_litespiphy_next_value\[7\],6.44
net3588,6.44
net5402,6.44
net6110,6.44
net7571,6.44
net12810,6.44
_13444_,6.435
net10715,6.43
_08208_,6.425
net5939,6.425
net6999,6.425
net7542,6.425
net9634,6.425
_13292_,6.42
net8755,6.42
net8219,6.405
_05695_,6.4
_05751_,6.4
_13172_,6.4
_13317_,6.4
net10418,6.4
net10577,6.4
net11474,6.4
_00488_,6.38
_00879_,6.38
net66,6.38
net124,6.38
net7155,6.38
net5512,6.365
soc.core.uart_phy_rx_phase\[17\],6.36
net9137,6.36
net9264,6.36
net5072,6.345
net8096,6.345
net8043,6.325
_00170_,6.32
_00506_,6.32
_00555_,6.32
_01855_,6.32
_02130_,6.32
_04482_,6.32
_13084_,6.32
pll.ringosc.dstage\[7\].id.out,6.32
soc.core.VexRiscv.DebugPlugin_busReadDataReg\[25\],6.32
soc.core.VexRiscv.lastStagePc\[26\],6.32
net3330,6.32
net9880,6.32
net4921,6.305
net5925,6.305
net6762,6.305
net7453,6.305
net9218,6.305
_02425_,6.3
_03010_,6.3
_03092_,6.3
_04153_,6.3
_04180_,6.3
_05956_,6.3
_06103_,6.3
_06164_,6.3
_06198_,6.3
_06330_,6.3
_06521_,6.3
_07325_,6.3
_13152_,6.3
_13365_,6.3
_13673_,6.3
_14474_,6.3
pll.ringosc.dstage\[2\].id.d0,6.3
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[9\]\[30\],6.3
soc.core.VexRiscv.IBusCachedPlugin_cache.decodeStage_mmuRsp_physicalAddress\[5\],6.3
soc.core.VexRiscv._zz_execute_to_memory_REGFILE_WRITE_DATA\[23\],6.3
soc.core.mgmtsoc_reload_storage\[7\],6.3
soc.core.mgmtsoc_scratch_storage\[18\],6.3
net8856,6.3
net9590,6.3
net9816,6.3
net11145,6.3
net11373,6.3
_05793_,6.29
net5122,6.285
net5957,6.285
net9079,6.285
_09964_,6.28
soc.core.mgmtsoc_load_storage\[22\],6.28
net5195,6.265
net5596,6.265
net8048,6.265
net9376,6.265
_00286_,6.26
_01869_,6.26
_02530_,6.26
_02723_,6.26
_03240_,6.26
_05433_,6.26
_06139_,6.26
_06711_,6.26
_07438_,6.26
_07710_,6.26
_08765_,6.26
_09286_,6.26
_09437_,6.26
_10713_,6.26
_11852_,6.26
_13169_,6.26
_13335_,6.26
_13368_,6.26
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[11\]\[28\],6.26
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[6\]\[24\],6.26
soc.core.VexRiscv.IBusCachedPlugin_cache.ways_0_tags\[0\]\[6\],6.26
soc.core.VexRiscv.dBusWishbone_DAT_MOSI\[7\],6.26
soc.core.VexRiscv.execute_to_memory_PC\[2\],6.26
soc.core.uart_phy_rx_phase\[10\],6.26
net2996,6.26
net3374,6.26
net5075,6.26
net8765,6.26
net8800,6.26
net10207,6.26
net11240,6.26
net2609,6.26
net10310,6.25
_02442_,6.24
_08688_,6.24
_12388_,6.24
soc.core.la_ien_storage\[24\],6.24
net3762,6.225
net4184,6.225
net4529,6.225
net6533,6.225
net12000,6.225
net3740,6.22
net5411,6.22
net5610,6.22
_02259_,6.2
_02973_,6.2
_06402_,6.2
_08117_,6.2
_13383_,6.2
_13668_,6.2
net4607,6.2
net5225,6.2
net5755,6.2
net6460,6.2
net4929,6.185
_03193_,6.18
_04497_,6.18
_05293_,6.18
_05395_,6.18
_05427_,6.18
_06075_,6.18
_06163_,6.18
_06172_,6.18
_06494_,6.18
_07015_,6.18
_08343_,6.18
_08992_,6.18
_11131_,6.18
_12833_,6.18
_13384_,6.18
_13775_,6.18
_14902_,6.18
soc.core.gpioin2_pending_re,6.18
net9911,6.18
net10981,6.18
net12935,6.18
net4833,6.175
net10392,6.165
_01598_,6.16
net6738,6.16
net8791,6.16
net11166,6.155
soc.core.multiregimpl55_regs1,6.145
_05828_,6.14
_05923_,6.14
_06125_,6.14
_07058_,6.14
_14690_,6.14
_15076_,6.14
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[9\]\[13\],6.14
soc.core.VexRiscv.dBusWishbone_DAT_MOSI\[27\],6.14
soc.core.mgmtsoc_litespisdrphycore_sr_in\[18\],6.14
net10052,6.14
net10451,6.14
net11505,6.14
net11979,6.14
net12961,6.14
net5647,6.135
_13324_,6.12
net6275,6.105
net9055,6.105
_00769_,6.08
_01847_,6.08
_02832_,6.08
_02947_,6.08
net9572,6.08
net8375,6.065
_04697_,6.06
_05804_,6.06
_05880_,6.06
_09016_,6.06
_14612_,6.06
_15196_,6.06
net7583,6.06
net11277,6.06
net11291,6.06
net12084,6.06
_00779_,6.04
_00854_,6.04
_00981_,6.04
_01173_,6.04
_03611_,6.04
_07321_,6.04
net3627,6.04
net4785,6.04
net7185,6.04
net8302,6.04
_02493_,6.02
_05886_,6.02
_05903_,6.02
_05945_,6.02
_11598_,6.02
_14922_,6.02
_15056_,6.02
net6125,6.02
net10397,6.015
net5005,6.005
net8223,6.005
net8268,6.005
net12298,6.005
net8017,5.985
_01570_,5.98
_08330_,5.98
_15284_,5.98
net5551,5.98
net5783,5.98
net6459,5.98
net6940,5.98
net7176,5.98
net10245,5.98
net11607,5.98
net11936,5.98
net3771,5.965
net3966,5.965
net4754,5.965
net5134,5.965
net5260,5.965
net5802,5.965
net6143,5.965
net6551,5.965
net6903,5.965
net7133,5.965
net7349,5.965
_00212_,5.96
_01516_,5.96
_02384_,5.96
pll.ringosc.iss.d0,5.96
soc.core.dbg_uart_rx_phase\[13\],5.96
net7486,5.96
net12637,5.96
net4815,5.945
_05459_,5.94
_05595_,5.94
_05603_,5.94
_05693_,5.94
_10487_,5.94
_01172_,5.92
net74,5.92
net5480,5.92
_02428_,5.9
net9393,5.895
mgmt_buffers.la_data_in_mprj\[46\],5.885
net5586,5.865
_01532_,5.86
_02354_,5.86
_02915_,5.86
_05373_,5.86
_07383_,5.86
_10203_,5.86
_12869_,5.86
_13181_,5.86
_14931_,5.86
_15174_,5.86
net13124,5.86
soc.core.VexRiscv.CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr\[3\],5.86
soc.core.VexRiscv.IBusCachedPlugin_cache.decodeStage_mmuRsp_physicalAddress\[23\],5.86
net10176,5.86
net10511,5.86
net8654,5.845
_01877_,5.84
_05784_,5.84
_06006_,5.84
_06068_,5.84
_06098_,5.84
_06117_,5.84
_06470_,5.84
_07316_,5.84
_07375_,5.84
_08018_,5.84
_09122_,5.84
_09561_,5.84
_09797_,5.84
_09965_,5.84
_12799_,5.84
_14921_,5.84
_15084_,5.84
_15108_,5.84
soc.core.VexRiscv.CsrPlugin_trapCause\[3\],5.84
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[0\]\[12\],5.84
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[0\]\[25\],5.84
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[4\]\[23\],5.84
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[7\]\[23\],5.84
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[7\]\[9\],5.84
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[9\]\[29\],5.84
soc.core.VexRiscv.IBusCachedPlugin_cache.ways_0_tags\[0\]\[5\],5.84
soc.core.VexRiscv.RegFilePlugin_regFile\[4\]\[12\],5.84
soc.core.dbg_uart_count\[1\],5.84
soc.core.dbg_uart_rx_phase\[25\],5.84
soc.core.dbg_uart_rx_phase\[8\],5.84
soc.core.mgmtsoc_litespisdrphycore_sr_in\[27\],5.84
soc.core.mgmtsoc_master_rx_fifo_source_payload_data\[12\],5.84
soc.core.mgmtsoc_master_rx_fifo_source_payload_data\[17\],5.84
soc.core.multiregimpl44_regs0,5.84
net5890,5.84
net9531,5.84
net11280,5.84
net11466,5.84
net12159,5.84
net5120,5.825
net7019,5.825
_02955_,5.82
_07966_,5.82
_08672_,5.82
_11661_,5.82
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[6\]\[23\],5.82
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[7\]\[6\],5.82
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[8\]\[18\],5.82
net13138,5.82
net3421,5.805
net6562,5.805
net7347,5.805
_00824_,5.8
_02730_,5.8
_03216_,5.8
_06581_,5.8
_06800_,5.8
_07451_,5.8
_07492_,5.8
_09395_,5.8
_10268_,5.8
_11124_,5.8
_12885_,5.8
_13870_,5.8
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[0\]\[17\],5.8
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[15\]\[31\],5.8
soc.core.VexRiscv.RegFilePlugin_regFile\[1\]\[6\],5.8
soc.core.dbg_uart_rx_phase\[26\],5.8
soc.core.dbg_uart_tx_phase\[10\],5.8
soc.core.mgmtsoc_litespisdrphycore_sr_out\[7\],5.8
net4082,5.8
net5674,5.8
net7810,5.8
net8978,5.8
net9369,5.8
net11201,5.8
net11713,5.8
net11736,5.8
net2627,5.8
net2668,5.8
_10381_,5.78
_12987_,5.78
net5683,5.775
_05434_,5.77
net5040,5.765
net5165,5.765
net5175,5.765
net5429,5.765
net9901,5.765
net6043,5.76
net12135,5.76
_00424_,5.74
_02706_,5.74
_07945_,5.74
_10712_,5.74
_11087_,5.74
_13234_,5.74
net8438,5.725
_02713_,5.72
_05189_,5.72
_05599_,5.72
_05697_,5.72
_05934_,5.72
_05942_,5.72
_07484_,5.72
_08409_,5.72
_10429_,5.72
_13559_,5.72
_13614_,5.72
_13681_,5.72
soc.core.gpioin2_enable_storage,5.72
net3672,5.72
net3797,5.72
net4634,5.72
net7430,5.72
_09984_,5.7
_10234_,5.7
net9465,5.685
_02494_,5.68
_10624_,5.68
_11821_,5.68
_13288_,5.68
_13604_,5.68
_13626_,5.68
soc.core.VexRiscv.RegFilePlugin_regFile\[6\]\[11\],5.68
soc.core.dbg_uart_rx_data\[0\],5.68
net3349,5.68
net3678,5.68
net5300,5.68
net6347,5.68
net12195,5.68
net12954,5.68
net5233,5.675
net6709,5.675
_11734_,5.66
_00434_,5.62
net5759,5.62
net5933,5.62
net6220,5.62
net6613,5.62
net7198,5.62
net8616,5.62
_08768_,5.605
net3924,5.605
net5887,5.605
net6049,5.605
_01356_,5.6
_03039_,5.6
_05406_,5.6
_05768_,5.6
_05922_,5.6
_13258_,5.6
_15278_,5.6
net2994,5.6
net5495,5.6
net13158,5.6
mgmt_buffers.la_data_in_mprj\[81\],5.585
_00959_,5.58
_02920_,5.58
_13907_,5.58
net3192,5.58
_05317_,5.56
_05926_,5.56
_10636_,5.56
_10733_,5.56
_11810_,5.56
_13538_,5.56
_15020_,5.56
net4871,5.56
net5358,5.56
net9431,5.56
net9988,5.56
gpio_control_in_1a\[0\].gpio_ana_en,5.555
net4123,5.545
net4347,5.545
net4900,5.545
net5784,5.545
net5919,5.545
net6382,5.545
net6414,5.545
net6535,5.525
_15233_,5.52
net13102,5.52
net3125,5.52
net4161,5.52
net4617,5.52
net4724,5.52
net5573,5.52
net5744,5.52
net6038,5.52
net6194,5.52
net6876,5.52
net7038,5.52
net7072,5.52
net7088,5.52
net7096,5.52
net7235,5.52
net7470,5.52
net7884,5.52
net8153,5.52
net8324,5.52
net9016,5.52
net9048,5.52
net9693,5.52
net9929,5.52
net9982,5.52
net9986,5.52
net12085,5.52
net12324,5.52
net9360,5.505
_02070_,5.5
_06428_,5.5
_06613_,5.5
soc.core.spimaster_storage\[6\],5.5
net6426,5.5
net8095,5.5
net12955,5.5
net2669,5.5
_10154_,5.485
_10471_,5.48
net13139,5.48
net4722,5.48
net68,5.46
net5394,5.46
net10685,5.46
net12953,5.46
net9238,5.445
_10641_,5.44
net2948,5.435
net11314,5.435
_01480_,5.4
_06227_,5.4
_06393_,5.4
_13373_,5.4
net13097,5.4
net13104,5.4
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[6\]\[8\],5.4
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[7\]\[18\],5.4
soc.core.VexRiscv.IBusCachedPlugin_cache.ways_0_tags\[1\]\[2\],5.4
net10402,5.4
net9189,5.385
_01019_,5.38
_02396_,5.38
_06171_,5.38
_06246_,5.38
_07586_,5.38
_07986_,5.38
_08815_,5.38
_09380_,5.38
_10726_,5.38
_11389_,5.38
_11809_,5.38
_13148_,5.38
_13606_,5.38
_13890_,5.38
_15163_,5.38
gpio_control_in_2\[1\].gpio_outenb,5.38
pll.pll_control.tint\[2\],5.38
pll.ringosc.dstage\[0\].id.d2,5.38
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[9\]\[11\],5.38
soc.core.VexRiscv.IBusCachedPlugin_cache.ways_0_tags\[1\]\[25\],5.38
soc.core.VexRiscv.memory_to_writeBack_REGFILE_WRITE_DATA\[17\],5.38
soc.core.mgmtsoc_litespisdrphycore_sr_in\[10\],5.38
soc.core.mgmtsoc_litespisdrphycore_sr_in\[24\],5.38
soc.core.uart_phy_rx_data\[0\],5.38
net3718,5.38
net7900,5.38
net9602,5.38
net10574,5.38
net12290,5.38
net12499,5.38
net5911,5.365
net10020,5.365
_02147_,5.36
_14185_,5.36
net7409,5.355
net6169,5.345
net6403,5.345
_00161_,5.34
_00541_,5.34
_01071_,5.34
_02260_,5.34
_04574_,5.34
_06194_,5.34
_07411_,5.34
_07865_,5.34
_07967_,5.34
_09042_,5.34
_09322_,5.34
_09708_,5.34
_09747_,5.34
_10138_,5.34
_10187_,5.34
_12878_,5.34
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[14\]\[23\],5.34
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[1\]\[22\],5.34
soc.core.litespi_state\[1\],5.34
soc.core.mgmtsoc_load_storage\[23\],5.34
soc.core.rs232phy_rs232phytx_state,5.34
soc.core.storage_1\[4\]\[3\],5.34
net3324,5.34
net6206,5.34
net6837,5.34
net8188,5.34
net9635,5.34
net6152,5.305
net7228,5.305
net7625,5.305
net5570,5.3
net9385,5.3
net9791,5.3
_10375_,5.285
_07476_,5.28
_15171_,5.28
gpio_control_bidir_1\[0\].gpio_vtrip_sel,5.28
soc.core.VexRiscv.RegFilePlugin_regFile\[2\]\[11\],5.28
net6371,5.28
net3482,5.265
net10102,5.265
_01998_,5.26
_02445_,5.26
_05379_,5.26
_06045_,5.26
_06073_,5.26
_07027_,5.26
_08340_,5.26
_08611_,5.26
_10585_,5.26
_10705_,5.26
_12317_,5.26
_12399_,5.26
_12636_,5.26
_13230_,5.26
_13382_,5.26
_14489_,5.26
soc.core.VexRiscv.DebugPlugin_busReadDataReg\[6\],5.26
soc.core.VexRiscv.RegFilePlugin_regFile\[23\]\[6\],5.26
net4588,5.26
net6906,5.26
net7004,5.26
net8178,5.26
net8912,5.26
net11425,5.26
net12872,5.26
net5514,5.245
_07334_,5.24
net10099,5.24
net5721,5.225
_00353_,5.22
_02945_,5.22
_05848_,5.22
_05892_,5.22
_05931_,5.22
_06165_,5.22
_10155_,5.22
_11036_,5.22
_13246_,5.22
_15063_,5.22
_15146_,5.22
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[9\]\[18\],5.22
soc.core.mgmtsoc_master_tx_fifo_source_payload_len\[5\],5.22
soc.core.mgmtsoc_scratch_storage\[24\],5.22
net3412,5.22
net8492,5.22
net10615,5.22
net10656,5.22
net12338,5.22
net2676,5.22
net8405,5.215
net10460,5.215
gpio_control_bidir_1\[0\].gpio_ana_pol,5.2
gpio_control_bidir_1\[1\].gpio_ana_en,5.2
net13112,5.19
net5966,5.185
net7371,5.185
_02414_,5.16
_06652_,5.16
_08671_,5.16
_13724_,5.16
net6935,5.16
net8307,5.16
_02429_,5.14
_05894_,5.14
_05947_,5.14
_05965_,5.14
_11587_,5.14
_13327_,5.14
_14923_,5.14
_15030_,5.14
pll.itrim\[0\],5.14
clknet_leaf_183_mgmt_buffers.caravel_clk,5.14
net10123,5.14
_02046_,5.12
_02705_,5.12
_02762_,5.12
net5533,5.12
net6349,5.12
_05062_,5.1
_05811_,5.1
_10587_,5.1
_11024_,5.1
_11592_,5.1
_15068_,5.1
net3462,5.095
net4066,5.095
net4551,5.095
net9620,5.095
net4238,5.085
net4923,5.085
net8152,5.085
net9118,5.085
_09776_,5.06
_10696_,5.06
net6329,5.06
net7790,5.06
net10078,5.06
net11206,5.06
net12661,5.06
net7621,5.045
_00249_,5.04
_10979_,5.04
_13238_,5.04
net367,5.04
net6449,5.04
net10151,5.04
net12504,5.04
_11385_,5.025
_03161_,5.02
_10598_,5.02
_11030_,5.02
net5855,5.02
_01244_,5
net8052,4.985
net5687,4.975
net6308,4.975
net5745,4.96
net9047,4.96
_00804_,4.94
_06707_,4.94
_06802_,4.94
_06970_,4.94
_08003_,4.94
_08410_,4.94
_10129_,4.94
_10446_,4.94
_10741_,4.94
_11101_,4.94
_13406_,4.94
_14936_,4.94
net13091,4.94
pll.ringosc.dstage\[10\].id.d0,4.94
soc.core.VexRiscv.CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr\[8\],4.94
soc.core.mgmtsoc_zero_trigger_d,4.94
soc.core.multiregimpl46_regs0,4.94
net70,4.94
net5356,4.94
net8319,4.925
net8797,4.925
_01142_,4.92
_03935_,4.92
_04149_,4.92
_06124_,4.92
_06157_,4.92
_07328_,4.92
_07929_,4.92
_07935_,4.92
_08683_,4.92
_09822_,4.92
_10069_,4.92
_11096_,4.92
_12365_,4.92
soc.core.VexRiscv.DebugPlugin_busReadDataReg\[5\],4.92
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[11\]\[24\],4.92
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[5\]\[14\],4.92
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[8\]\[30\],4.92
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[8\]\[8\],4.92
soc.core.VexRiscv.RegFilePlugin_regFile\[17\]\[12\],4.92
soc.core.VexRiscv.RegFilePlugin_regFile\[29\]\[6\],4.92
soc.core.count\[15\],4.92
soc.core.mgmtsoc_master_tx_fifo_source_payload_len\[3\],4.92
soc.core.mgmtsoc_reload_storage\[3\],4.92
soc.core.mgmtsoc_value_status\[10\],4.92
soc.core.storage_1\[4\]\[4\],4.92
soc.core.uart_phy_rx_phase\[5\],4.92
soc.core.uart_phy_rx_rx_d,4.92
net9259,4.92
_07267_,4.905
_08526_,4.905
net6505,4.905
net7327,4.905
net8244,4.905
net10516,4.905
_09820_,4.9
_14925_,4.9
net5003,4.885
net7236,4.885
net7639,4.885
_00494_,4.88
_01851_,4.88
_03612_,4.88
_05853_,4.88
_05861_,4.88
_05966_,4.88
_06140_,4.88
_06146_,4.88
_06152_,4.88
_07771_,4.88
_08121_,4.88
_08689_,4.88
_10307_,4.88
_10382_,4.88
_12371_,4.88
_13367_,4.88
net13109,4.88
soc.core.VexRiscv.DebugPlugin_busReadDataReg\[10\],4.88
soc.core.VexRiscv.IBusCachedPlugin_cache._zz_banks_0_port1\[11\],4.88
soc.core.VexRiscv.execute_LightShifterPlugin_amplitudeReg\[3\],4.88
net5259,4.88
net9798,4.88
net10782,4.88
net10847,4.88
net11452,4.88
net12447,4.88
net12523,4.88
net10774,4.875
net4411,4.845
net5493,4.845
net5685,4.845
net6330,4.845
net9366,4.845
net9727,4.845
net12214,4.845
net12301,4.845
net4736,4.84
net7196,4.84
_06942_,4.82
_07720_,4.82
_11759_,4.82
_12313_,4.82
net5825,4.82
net7483,4.82
_01166_,4.8
_02441_,4.8
_03160_,4.8
_05521_,4.8
_05862_,4.8
_05986_,4.8
_06089_,4.8
_06116_,4.8
_06141_,4.8
_06162_,4.8
_07126_,4.8
_07458_,4.8
_11122_,4.8
_13374_,4.8
_13547_,4.8
_13568_,4.8
_13855_,4.8
_14916_,4.8
soc.core.VexRiscv.DebugPlugin_busReadDataReg\[26\],4.8
soc.core.mgmtsoc_bus_errors\[25\],4.8
net3739,4.8
net5178,4.8
net6572,4.8
net6620,4.8
net10196,4.8
net12288,4.8
net12369,4.8
net12659,4.8
net2673,4.8
net5050,4.795
net9822,4.785
_12555_,4.78
net8968,4.765
_03947_,4.76
_05869_,4.76
_05980_,4.76
_06390_,4.76
_10605_,4.76
_10841_,4.76
_10988_,4.76
_11005_,4.76
_11018_,4.76
_13592_,4.76
_14929_,4.76
_15120_,4.76
_15133_,4.76
_15191_,4.76
_15317_,4.76
soc.core.interface0_bank_bus_dat_r\[1\],4.76
net6384,4.76
net8357,4.76
net12325,4.76
net5009,4.755
net9895,4.755
net11043,4.74
net6719,4.725
_00587_,4.7
net4583,4.7
net7476,4.7
net9830,4.7
_00842_,4.68
_05955_,4.68
_10738_,4.68
_10880_,4.68
_15024_,4.68
_15160_,4.68
_15226_,4.68
net10015,4.68
net12309,4.68
_00655_,4.66
_02133_,4.66
net3680,4.66
net8864,4.66
mgmt_buffers.la_data_in_mprj\[48\],4.635
mgmt_buffers.la_data_in_mprj\[76\],4.635
net7710,4.635
_08781_,4.625
net4725,4.625
net4852,4.625
net6568,4.625
net9017,4.625
_05858_,4.6
_13615_,4.6
soc.core.VexRiscv._zz_execute_to_memory_REGFILE_WRITE_DATA\[30\],4.6
net6069,4.6
net6264,4.6
net6730,4.6
net7046,4.6
net11189,4.6
net11622,4.6
net4945,4.585
net5155,4.585
net7688,4.585
net7764,4.585
net9203,4.585
_00550_,4.58
_11791_,4.58
net97,4.58
net13170,4.58
_11068_,4.56
_13045_,4.56
net11621,4.56
_14551_,4.54
pll.ringosc.dstage\[9\].id.d0,4.54
net12664,4.54
net5167,4.505
net6348,4.505
net7153,4.505
net10472,4.505
_00227_,4.48
_00791_,4.48
_06329_,4.48
_06965_,4.48
_07471_,4.48
_07695_,4.48
_07835_,4.48
_08115_,4.48
_09303_,4.48
_09529_,4.48
_10418_,4.48
_12663_,4.48
_13295_,4.48
net13100,4.48
net13103,4.48
net116,4.48
_05932_,4.46
_06338_,4.46
_06342_,4.46
_06356_,4.46
_06387_,4.46
_06778_,4.46
_07753_,4.46
_07874_,4.46
_09273_,4.46
_09298_,4.46
_09786_,4.46
_09974_,4.46
_10378_,4.46
_14487_,4.46
_14917_,4.46
_15155_,4.46
net13092,4.46
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[14\]\[9\],4.46
soc.core.VexRiscv.IBusCachedPlugin_cache.decodeStage_hit_valid,4.46
soc.core.VexRiscv.IBusCachedPlugin_cache.ways_0_tags\[0\]\[2\],4.46
soc.core.VexRiscv.RegFilePlugin_regFile\[2\]\[12\],4.46
soc.core.dbg_uart_cmd\[0\],4.46
soc.core.dbg_uart_cmd\[1\],4.46
soc.core.dbg_uart_count\[14\],4.46
soc.core.litespi_state\[2\],4.46
soc.core.memdat_1\[0\],4.46
soc.core.memdat_1\[7\],4.46
soc.core.mgmtsoc_litespisdrphycore_sr_in\[13\],4.46
soc.core.mgmtsoc_master_phyconfig_storage\[19\],4.46
soc.core.uart_phy_tx_data_rs232phy_rs232phytx_next_value2\[4\],4.46
net4500,4.46
net6287,4.46
net6755,4.46
net7579,4.46
net9275,4.46
net10200,4.46
net11488,4.46
net5431,4.445
net6107,4.445
net8197,4.445
_12865_,4.44
_00166_,4.42
_00751_,4.42
_02449_,4.42
_03116_,4.42
_03194_,4.42
_03407_,4.42
_09461_,4.42
_09676_,4.42
_11017_,4.42
_12882_,4.42
_13328_,4.42
soc.core.VexRiscv.DebugPlugin_busReadDataReg\[21\],4.42
soc.core.VexRiscv.IBusCachedPlugin_cache._zz_banks_0_port1\[26\],4.42
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[7\]\[24\],4.42
soc.core.uart_phy_rx_phase\[26\],4.42
net3768,4.42
net4645,4.42
net6415,4.42
net9448,4.42
_09030_,4.385
net5011,4.385
net6621,4.385
net8217,4.385
net5235,4.38
net6277,4.38
_03631_,4.36
_10985_,4.36
_11757_,4.36
_12658_,4.36
_12860_,4.36
net6163,4.36
_03937_,4.34
_04733_,4.34
_05039_,4.34
_05239_,4.34
_05277_,4.34
_06066_,4.34
_06105_,4.34
_06173_,4.34
_08750_,4.34
_09011_,4.34
_09818_,4.34
_12381_,4.34
_12417_,4.34
soc.core.VexRiscv.CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr\[12\],4.34
soc.core.interface16_bank_bus_dat_r\[0\],4.34
soc.core.interface3_bank_bus_dat_r\[17\],4.34
soc.core.uart_phy_rx_phase\[8\],4.34
net8503,4.34
net12420,4.34
net12521,4.34
net12656,4.34
_05787_,4.29
net9331,4.265
_00509_,4.24
_00681_,4.24
_00880_,4.24
_02521_,4.24
_12374_,4.24
net3351,4.24
net5322,4.24
net5505,4.24
net5951,4.24
net6545,4.24
net7605,4.24
net7687,4.24
net7795,4.24
net8040,4.24
net9199,4.24
net9884,4.24
net12352,4.24
_02342_,4.22
_02426_,4.22
_05951_,4.22
_05964_,4.22
_07103_,4.22
_12849_,4.22
_15129_,4.22
pll.ringosc.dstage\[6\].id.d1,4.22
net9277,4.22
net4057,4.205
_01540_,4.2
_02325_,4.2
_02765_,4.2
_12407_,4.2
soc.core.uart_phy_tx_data_rs232phy_rs232phytx_next_value2\[3\],4.2
net3306,4.2
net5481,4.2
net6878,4.2
net7356,4.2
net7642,4.2
net8579,4.2
_09271_,4.165
net7261,4.165
net8692,4.165
net9841,4.165
_02004_,4.14
_03126_,4.14
_08399_,4.14
_10135_,4.14
_10865_,4.14
_12429_,4.14
net5039,4.14
net9514,4.14
net9970,4.14
net10263,4.14
net10703,4.14
net12662,4.14
net3111,4.125
net4835,4.125
pll.ringosc.dstage\[6\].id.d2,4.12
net2921,4.12
net5708,4.12
net6248,4.12
net10808,4.12
net11930,4.12
net12638,4.12
soc.core.mgmtsoc_litespisdrphycore_sr_in\[9\],4.11
_10986_,4.1
net13093,4.1
net13107,4.1
_07195_,4.095
net12864,4.08
net6923,4.065
net10718,4.05
_05321_,4.02
_12420_,4.02
_15107_,4.02
_15142_,4.02
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[14\]\[21\],4.02
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[7\]\[8\],4.02
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[8\]\[29\],4.02
soc.core.mgmtsoc_scratch_storage\[15\],4.02
soc.core.multiregimpl54_regs0,4.02
_02576_,4
_06003_,4
_06406_,4
_07408_,4
_07437_,4
_07821_,4
_08820_,4
_08874_,4
_09071_,4
_09289_,4
_09319_,4
_09470_,4
_13942_,4
net13106,4
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[11\]\[21\],4
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[3\]\[12\],4
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[4\]\[25\],4
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[6\]\[18\],4
soc.core.VexRiscv.IBusCachedPlugin_cache.ways_0_tags\[1\]\[14\],4
soc.core.VexRiscv.RegFilePlugin_regFile\[28\]\[6\],4
soc.core.VexRiscv.execute_to_memory_PC\[21\],4
soc.core.VexRiscv.execute_to_memory_PC\[4\],4
soc.core.dbg_uart_address\[29\],4
soc.core.gpioin0_pending_re,4
soc.core.mgmtsoc_master_rx_fifo_source_payload_data\[5\],4
soc.core.spi_master_mosi_storage\[5\],4
soc.core.storage_1\[7\]\[3\],4
net4352,4
net8247,4
net10317,4
net11483,4
net12025,4
_08917_,3.985
net2859,3.985
net6656,3.985
soc.core.dbg_uart_tx_phase\[29\],3.98
net7969,3.965
net9110,3.965
net4935,3.925
net5187,3.925
net5651,3.925
net5864,3.925
net7682,3.925
net7849,3.925
net5371,3.92
net6850,3.92
_10896_,3.915
_11803_,3.9
_14517_,3.9
net5319,3.9
net5618,3.9
_04285_,3.88
_05369_,3.88
_05421_,3.88
_05844_,3.88
_05879_,3.88
_06142_,3.88
_06143_,3.88
_08348_,3.88
_12410_,3.88
_13180_,3.88
_13428_,3.88
_13906_,3.88
soc.core.VexRiscv.RegFilePlugin_regFile\[26\]\[11\],3.88
net48,3.88
net2963,3.88
net10897,3.88
net12374,3.88
net12378,3.88
net12464,3.88
net12570,3.88
net12648,3.88
_13609_,3.86
net3053,3.805
_02814_,3.78
_03264_,3.78
_13049_,3.78
net5876,3.78
_04962_,3.76
_04963_,3.76
_05881_,3.76
_10727_,3.76
_13909_,3.76
net3398,3.76
net6882,3.76
net9992,3.76
_00605_,3.74
_00729_,3.74
_01515_,3.74
_02334_,3.74
net5926,3.74
_08515_,3.725
net5831,3.705
net7905,3.705
_02458_,3.68
_05937_,3.68
_08498_,3.68
_08816_,3.68
_13067_,3.68
_15237_,3.68
net13134,3.68
net3670,3.68
net5204,3.68
net9622,3.68
net12341,3.68
net12714,3.68
_03498_,3.66
_08316_,3.66
net11553,3.66
net12474,3.66
_14481_,3.645
_01285_,3.64
_05263_,3.64
_10735_,3.64
_14942_,3.64
net13142,3.64
net9905,3.64
net2932,3.585
net7495,3.585
_08209_,3.565
_02564_,3.56
_02969_,3.56
_12649_,3.56
soc.core.VexRiscv.IBusCachedPlugin_cache.decodeStage_mmuRsp_physicalAddress\[21\],3.56
soc.core.VexRiscv.RegFilePlugin_regFile\[14\]\[6\],3.56
soc.core.VexRiscv.RegFilePlugin_regFile\[24\]\[11\],3.56
net67,3.56
net371,3.56
net10695,3.555
_01988_,3.54
_04773_,3.54
_05343_,3.54
_06051_,3.54
_06144_,3.54
_06147_,3.54
_07293_,3.54
_07627_,3.54
_09689_,3.54
_10144_,3.54
_10150_,3.54
_12441_,3.54
_13211_,3.54
_13789_,3.54
_14827_,3.54
pll.ringosc.dstage\[8\].id.d1,3.54
soc.core.VexRiscv.CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr\[28\],3.54
soc.core.VexRiscv.CsrPlugin_exceptionPortCtrl_exceptionContext_code\[1\],3.54
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[10\]\[12\],3.54
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[1\]\[12\],3.54
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[2\]\[12\],3.54
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[3\]\[24\],3.54
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[9\]\[20\],3.54
soc.core.VexRiscv.IBusCachedPlugin_cache.lineLoader_address\[19\],3.54
soc.core.VexRiscv.RegFilePlugin_regFile\[16\]\[11\],3.54
soc.core.VexRiscv.RegFilePlugin_regFile\[22\]\[6\],3.54
soc.core.VexRiscv._zz_CsrPlugin_csrMapping_readDataInit\[9\],3.54
soc.core.dbg_uart_rx_data\[3\],3.54
soc.core.storage_1\[2\]\[7\],3.54
net4086,3.54
net6824,3.54
net9969,3.54
net11701,3.54
net12073,3.54
net12711,3.54
net9489,3.525
_09941_,3.52
_10982_,3.52
_11848_,3.52
_13167_,3.52
_13934_,3.52
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[10\]\[22\],3.52
net5377,3.505
net7851,3.505
net8607,3.505
net10990,3.505
net3681,3.465
net6729,3.465
net5848,3.46
_12444_,3.44
_13508_,3.44
_13853_,3.44
soc.core.uart_phy_tx_phase\[25\],3.44
net9886,3.44
_02249_,3.42
_02498_,3.42
_02568_,3.42
_05397_,3.42
_05405_,3.42
_05429_,3.42
_05839_,3.42
_06099_,3.42
_11392_,3.42
_13680_,3.42
_13821_,3.42
pll.ringosc.iss.ctrl0,3.42
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[11\]\[22\],3.42
net4809,3.42
net10257,3.42
net10704,3.42
net10751,3.42
_08973_,3.4
net4787,3.345
net6004,3.345
_01350_,3.32
_01409_,3.32
_02001_,3.32
_02535_,3.32
_03586_,3.32
net4866,3.32
net5045,3.32
net6740,3.32
net7362,3.32
_00580_,3.3
_04970_,3.3
_06062_,3.3
_08716_,3.3
net11998,3.3
net9481,3.275
net3767,3.245
net4831,3.245
net6437,3.245
net9533,3.245
net5357,3.225
_04109_,3.22
_05979_,3.22
_10631_,3.22
_14493_,3.22
_15223_,3.22
net13114,3.22
pll.ringosc.dstage\[1\].id.d2,3.22
net2969,3.22
net5148,3.22
net7648,3.22
net7908,3.22
net8500,3.22
net9225,3.22
net12558,3.22
_02427_,3.2
_10603_,3.2
pll.ringosc.dstage\[8\].id.d0,3.2
net10101,3.2
net10533,3.2
net10720,3.2
net13105,3.18
net13118,3.18
net10837,3.18
net7135,3.175
net8517,3.175
net9510,3.175
net7853,3.145
mgmt_buffers.la_data_in_mprj\[83\],3.125
_05796_,3.11
_03171_,3.1
_03263_,3.1
_04226_,3.1
_09960_,3.1
_10742_,3.1
soc.core.mgmtsoc_master_phyconfig_storage\[18\],3.1
soc.core.mgmtsoc_value_status\[24\],3.1
soc.core.uart_phy_tx_data\[6\],3.1
net274,3.1
_00162_,3.08
_00392_,3.08
_01747_,3.08
_02380_,3.08
_02412_,3.08
_05876_,3.08
_06101_,3.08
_07642_,3.08
_07721_,3.08
_07740_,3.08
_07895_,3.08
_08060_,3.08
_09436_,3.08
_09487_,3.08
_09669_,3.08
_12848_,3.08
_13376_,3.08
_14855_,3.08
_15343_,3.08
soc.core.VexRiscv.DebugPlugin_busReadDataReg\[22\],3.08
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[3\]\[14\],3.08
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[8\]\[20\],3.08
soc.core.VexRiscv.IBusCachedPlugin_cache.decodeStage_mmuRsp_physicalAddress\[28\],3.08
soc.core.dbg_uart_tx_phase\[16\],3.08
soc.core.interface9_bank_bus_dat_r\[4\],3.08
net13154,3.08
net3405,3.08
net3425,3.08
net6413,3.08
net10403,3.08
net10670,3.08
net10971,3.08
net11057,3.08
net11313,3.08
net12205,3.08
net12443,3.08
net7175,3.065
_14471_,3.06
net4527,3.045
net6267,3.045
net4136,3.005
net7163,3.005
_07121_,2.98
_11006_,2.98
_11756_,2.98
soc.core.uart_tx_fifo_produce\[0\],2.98
net7029,2.98
_01131_,2.96
_02320_,2.96
_02563_,2.96
_02643_,2.96
_02978_,2.96
_04569_,2.96
_05161_,2.96
_05187_,2.96
_05199_,2.96
_05223_,2.96
_05868_,2.96
_05870_,2.96
_05918_,2.96
_05928_,2.96
_06072_,2.96
_09048_,2.96
_13602_,2.96
pll.ringosc.iss.one,2.96
soc.core.mgmtsoc_litespisdrphycore_sr_in\[20\],2.96
net3528,2.96
net8151,2.96
net9467,2.96
net10181,2.96
net10586,2.96
net11392,2.96
net11443,2.96
net12285,2.96
net12449,2.96
net13177,2.96
net5179,2.885
net5695,2.885
net6846,2.885
_01134_,2.86
_01720_,2.86
_03093_,2.86
_04981_,2.86
net6006,2.86
net6136,2.86
net6704,2.86
net7272,2.86
net10493,2.86
_02286_,2.84
_05950_,2.84
_08772_,2.84
_10637_,2.84
_11649_,2.84
net10162,2.84
net4947,2.785
net5568,2.785
net10197,2.785
_00247_,2.76
_02103_,2.76
_02451_,2.76
_03183_,2.76
_05856_,2.76
_05977_,2.76
_08771_,2.76
_10703_,2.76
_12368_,2.76
_12403_,2.76
net13132,2.76
net13130,2.76
net13128,2.76
net13094,2.76
net13098,2.76
net13099,2.76
net13101,2.76
net13122,2.76
net13120,2.76
net13116,2.76
net13136,2.76
net13140,2.76
net13144,2.76
net13148,2.76
net13150,2.76
net13152,2.76
net13156,2.76
net5284,2.76
net6630,2.76
net10752,2.76
net12685,2.74
_01602_,2.72
_05439_,2.72
_05797_,2.72
_09794_,2.715
net4981,2.715
net9566,2.715
gpio_control_in_2\[4\].gpio_outenb,2.7
_05798_,2.67
net4013,2.665
net8360,2.665
net7101,2.66
_01281_,2.64
_01597_,2.64
_10811_,2.64
_11078_,2.64
_15173_,2.64
soc.core.VexRiscv.RegFilePlugin_regFile\[12\]\[6\],2.64
soc.core.VexRiscv.RegFilePlugin_regFile\[3\]\[11\],2.64
net4641,2.64
_00846_,2.62
_02997_,2.62
_05946_,2.62
_05960_,2.62
_06061_,2.62
_06112_,2.62
_06522_,2.62
_06751_,2.62
_08076_,2.62
_08411_,2.62
_09312_,2.62
_09977_,2.62
_10379_,2.62
_12811_,2.62
_13372_,2.62
_13622_,2.62
_15017_,2.62
soc.core.VexRiscv.CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr\[0\],2.62
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[15\]\[25\],2.62
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[3\]\[18\],2.62
soc.core.VexRiscv.IBusCachedPlugin_cache.ways_0_tags\[1\]\[13\],2.62
soc.core.VexRiscv.IBusCachedPlugin_cache.ways_0_tags\[1\]\[7\],2.62
net6689,2.62
net8163,2.62
net10925,2.62
net11419,2.62
net2611,2.62
net5626,2.605
net6141,2.605
net7129,2.605
net7647,2.605
net8346,2.605
net10594,2.605
net5972,2.595
net8146,2.595
net5171,2.585
net7718,2.585
gpio_control_in_2\[3\].gpio_outenb,2.56
net4711,2.545
net6486,2.545
net6199,2.54
net7069,2.54
_02507_,2.5
_04125_,2.5
_04687_,2.5
_05902_,2.5
_05999_,2.5
_09660_,2.5
_10718_,2.5
_11125_,2.5
_11829_,2.5
_12001_,2.5
_12282_,2.5
_12404_,2.5
_12864_,2.5
_13354_,2.5
_13930_,2.5
_14611_,2.5
_14939_,2.5
net3945,2.5
net4321,2.5
net7207,2.5
net8020,2.5
net8963,2.5
net9345,2.5
net10776,2.5
_08194_,2.465
_01494_,2.4
net3679,2.4
net5404,2.4
net5902,2.4
net6357,2.4
net10032,2.4
net10213,2.4
_04677_,2.38
_04692_,2.38
_05878_,2.38
_06114_,2.38
_06166_,2.38
_12887_,2.38
_15037_,2.38
net4846,2.375
net6838,2.375
net9136,2.375
_09077_,2.325
net3811,2.325
net5221,2.325
net5342,2.325
_00228_,2.3
_00816_,2.3
_01733_,2.3
_04155_,2.3
_05820_,2.3
_08181_,2.3
_10494_,2.3
_12836_,2.3
_14479_,2.3
net13088,2.3
net13090,2.3
net13141,2.3
net13147,2.3
net13149,2.3
net13153,2.3
net13157,2.3
net7440,2.3
net8725,2.3
net10419,2.3
_03496_,2.28
_10380_,2.28
net71,2.28
net11756,2.28
net2681,2.28
net2693,2.28
net6523,2.205
net6037,2.2
net6300,2.2
_01026_,2.18
soc.core.VexRiscv.IBusCachedPlugin_cache.ways_0_tags\[1\]\[6\],2.18
soc.core.gpioin2_pending_r,2.18
soc.core.storage_1\[3\]\[4\],2.18
net58,2.18
net101,2.18
net9154,2.18
_00225_,2.16
_01351_,2.16
_03029_,2.16
_03276_,2.16
_05865_,2.16
_05917_,2.16
_05944_,2.16
_05958_,2.16
_06294_,2.16
_06450_,2.16
_06822_,2.16
_06963_,2.16
_07339_,2.16
_07340_,2.16
_10079_,2.16
_12653_,2.16
_12884_,2.16
_13204_,2.16
_13761_,2.16
_14492_,2.16
_15340_,2.16
soc.core.VexRiscv.CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr\[2\],2.16
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[5\]\[23\],2.16
soc.core.VexRiscv.RegFilePlugin_regFile\[27\]\[11\],2.16
soc.core.VexRiscv.RegFilePlugin_regFile\[31\]\[12\],2.16
soc.core.dbg_uart_rx_phase\[28\],2.16
net4701,2.16
net5410,2.16
net6146,2.16
net6569,2.16
net8164,2.16
net9125,2.16
net9420,2.16
net11693,2.16
net12361,2.16
net12535,2.16
net4760,2.145
net4863,2.145
net4890,2.145
net4985,2.145
net5719,2.145
net6158,2.145
net6225,2.145
net6490,2.145
net6549,2.145
net8920,2.145
net9555,2.145
net9601,2.145
net5433,2.125
net6318,2.125
net6654,2.125
net5697,2.085
_01023_,2.04
_05063_,2.04
_05988_,2.04
_06167_,2.04
_08548_,2.04
_10443_,2.04
_10642_,2.04
_11631_,2.04
_11834_,2.04
_13177_,2.04
_13432_,2.04
_13811_,2.04
_14613_,2.04
_14920_,2.04
net13108,2.04
net2866,2.04
net9347,2.04
net11623,2.04
net13163,2.04
_00962_,1.94
net5908,1.94
net6998,1.94
net10868,1.94
_09845_,1.915
net3600,1.865
net4324,1.865
net5128,1.865
net5909,1.865
net9093,1.865
_01367_,1.84
_01656_,1.84
_01821_,1.84
_02368_,1.84
_02400_,1.84
_03591_,1.84
_05849_,1.84
_05872_,1.84
_05919_,1.84
_05940_,1.84
_05963_,1.84
_05991_,1.84
_06013_,1.84
_12454_,1.84
net13086,1.84
net13087,1.84
net13089,1.84
net13129,1.84
net13127,1.84
net13126,1.84
net13125,1.84
net13123,1.84
net13121,1.84
net13117,1.84
net13137,1.84
net13143,1.84
net13151,1.84
net5080,1.84
net8533,1.84
net12024,1.84
net12446,1.84
net12589,1.84
net12657,1.84
_05786_,1.82
net13110,1.82
net13111,1.82
pll.ringosc.dstage\[11\].id.d0,1.82
_10708_,1.72
_11846_,1.72
_12457_,1.72
_12460_,1.72
_14470_,1.72
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[10\]\[20\],1.72
soc.core.VexRiscv.IBusCachedPlugin_cache.lineLoader_flushCounter\[0\],1.72
soc.core.VexRiscv.IBusCachedPlugin_cache.ways_0_tags\[1\]\[23\],1.72
soc.core.VexRiscv.RegFilePlugin_regFile\[13\]\[6\],1.72
soc.core.multiregimpl41_regs0,1.72
_03955_,1.7
_05425_,1.7
_05867_,1.7
_05904_,1.7
_06000_,1.7
_06043_,1.7
_06534_,1.7
_07655_,1.7
_10526_,1.7
_11798_,1.7
_13429_,1.7
_15098_,1.7
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[14\]\[25\],1.7
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[15\]\[13\],1.7
soc.core.VexRiscv.RegFilePlugin_regFile\[16\]\[12\],1.7
net13135,1.7
net13145,1.7
net13155,1.7
net4150,1.7
net5121,1.7
net5676,1.7
net8442,1.7
net8917,1.7
net11301,1.7
net11598,1.7
net12245,1.7
net2680,1.7
net2688,1.7
soc.core.VexRiscv.CsrPlugin_exceptionPortCtrl_exceptionContext_code\[0\],1.6
soc.core.mgmtsoc_master_phyconfig_storage\[5\],1.6
soc.core.mgmtsoc_pending_r,1.6
soc.core.uart_tx2,1.6
net2786,1.575
net3164,1.575
net5007,1.575
net5258,1.575
net5417,1.575
_00505_,1.48
_01345_,1.48
_02931_,1.48
_02971_,1.48
net6155,1.48
net6443,1.48
net4898,1.405
net8918,1.405
_05843_,1.38
_05852_,1.38
_05871_,1.38
_05920_,1.38
_06026_,1.38
_11851_,1.38
_15330_,1.38
net4171,1.38
net4434,1.38
net8266,1.38
net9618,1.38
net10663,1.38
net10679,1.38
net11003,1.38
net11358,1.38
net12401,1.38
_05795_,1.36
_14919_,1.36
soc.core.uart_phy_tx_phase\[9\],1.36
net10268,1.36
soc.core.VexRiscv.CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr\[29\],1.26
soc.core.VexRiscv.IBusCachedPlugin_cache._zz_banks_0_port1\[29\],1.26
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[15\]\[18\],1.26
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[1\]\[29\],1.26
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[2\]\[20\],1.26
soc.core.VexRiscv.IBusCachedPlugin_cache.banks_0\[8\]\[25\],1.26
soc.core.VexRiscv.IBusCachedPlugin_cache.ways_0_tags\[0\]\[13\],1.26
soc.core.dbg_uart_count\[3\],1.26
soc.core.mgmtsoc_litespisdrphycore_sr_in\[15\],1.26
soc.core.mgmtsoc_litespisdrphycore_sr_in\[7\],1.26
soc.core.mgmtsoc_master_phyconfig_storage\[15\],1.26
soc.core.mgmtsoc_mas