Commit Graph

7 Commits

Author SHA1 Message Date
Tim Edwards b8dda9c3b1 (1) Corrected an error from a recent commit where the reset was
fixed by moving from after the managment protect to before it, but
an inversion of the signal was missed, leading to an incorrect
wb_rst_i passed to housekeeping.  (2) Revised the method to load
the serial GPIO data chain from a 2-pin, I2C-like method to a
more straightforward 3-pin method with separate reset, clock, and
load pins.  The load pin propagates through the chaing like the
other two.  Added a bit-bang signal for the load signal as well.
(3) Added an implied buffer after the data output of the GPIO
control block to ensure that the data arrives at the next control
block after the clock, to prevent hold violations.
2021-11-03 23:18:36 -04:00
Tim Edwards 3b89cf0efa Corrected the clock signal into the housekeeping module, which was
incorrectly assigned to the clock on the user side of the managment
protect block, causing it to be undefined when the user area power
supply is down.  The "hkspi_power" testbench which tests using the
housekeeping SPI while the user area power is grounded now works
correctly.
2021-11-03 11:30:39 -04:00
Tim Edwards dd66d1e5ca Renamed the poorly and awkwardly named "sky130_fd_sc_hvl__lsbufhv2lv_1_wrapped"
cell to the simpler (and easier to remember) "xres_buf".
2021-10-31 21:43:09 -04:00
Tim Edwards 3a57940371 Revised the management protect block to include protections against
an unconnected wishbone bus (unconnected inputs).  Added the missing
signals for the user IRQ enables to management protect (which have
to come from the management SoC).
2021-10-27 19:36:43 -04:00
Tim Edwards 745eee1baa Created an "open frame" version of caravan (and revised the one for
caravel, since it had not been updated since a number of changes to
the caravel top level module).
2021-10-25 16:29:12 -04:00
Tim Edwards bc9944ce20 Updated the caravan netlist and implemented the caravan testbench. 2021-10-25 15:08:13 -04:00
Tim Edwards 332f9ec2e7 Seeding with documentation of pinout and verilog RTL (mostly unchanged
from original except to remove blocks that are not supposed to be in
this repository like the processor core and the storage).
2021-10-12 16:31:42 -04:00