8 Commits

Author	SHA1	Message	Date
kareem	e5d9788a43	reharden!: digital_pll ... ~ enable synth buffering to fix fanout ~ add *buf_1* to no synth list ~ add attribute (* keep *) to the oscillator as dont touch for yosys !need to verify that the oscillator remains untouched	2022-10-17 10:56:01 -07:00
kareem	59743f4832	change buf16 to clkbuf16 and reimplement	2022-10-13 06:54:55 -07:00
kareem	0eed96f33f	reharden: digital_pll ... ~ reimplement digital_pll using updated RTL ~ changes in config to generate same PDN ~ change deprecated variables	2022-10-13 06:21:08 -07:00
manarabdelaty	e03fd0ecaf	Update sdf files to have the temp value at the typical corner to avoid having cvc complaint about it	2021-12-16 15:25:08 +02:00
manarabdelaty	a55129af5f	Update sdf file divider	2021-12-14 14:30:00 +02:00
manarabdelaty	966b1f22bb	[DATA] Update digital_pll	2021-12-07 13:19:02 +02:00
manarabdelaty	0067bd5b7c	[DATA] Update caravel_clocking/digital_pll/housekeeping	2021-12-02 21:09:43 +02:00
manarabdelaty	d033d2e62d	[DATA] Add spef/sdf views	2021-11-28 15:28:59 +02:00