Corrected an inadvertant error in caravel_netlists.v that prevents

gate-level simulations from running.  Corrected caravan_netlists.v,
which did not have the same change made yesterday to caravel_netlists.v
for the DLL.

verilog/rtl/caravan_netlists.v

@@ -69,6 +69,8 @@
 	`include "gl/caravan.v"
     `else
 	`include "digital_pll.v"
+	`include "digital_pll_controller.v"
+	`include "ring_osc2x13.v"
 	`include "caravel_clocking.v"
 	`include "user_id_programming.v"
 	`include "clock_div.v"

verilog/rtl/caravel_netlists.v

@@ -48,8 +48,6 @@
 
     `ifdef GL
 	`include "gl/digital_pll.v"
-	`include "gl/digital_pll_controller.v"
-	`include "gl/ring_osc2x13.v"
 	`include "gl/caravel_clocking.v"
 	`include "gl/user_id_programming.v"
 	`include "gl/chip_io.v"