mirror of https://github.com/efabless/caravel.git
delete `digital_pll` openlane and signoff files because it is flattened now
This commit is contained in:
mo-hosni
parent
babd8a93ac
commit
6522edd21e
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@ -1,204 +0,0 @@
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magic
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tech sky130A
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magscale 1 2
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timestamp 1666101175
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<< obsli1 >>
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rect 1104 1071 18860 13617
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<< obsm1 >>
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rect 1104 892 18860 13728
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<< metal2 >>
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rect 1122 14200 1178 15000
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rect 2594 14200 2650 15000
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rect 4066 14200 4122 15000
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rect 5538 14200 5594 15000
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rect 7010 14200 7066 15000
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rect 8482 14200 8538 15000
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rect 9954 14200 10010 15000
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rect 11426 14200 11482 15000
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rect 12898 14200 12954 15000
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rect 14370 14200 14426 15000
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rect 15842 14200 15898 15000
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rect 17314 14200 17370 15000
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rect 18786 14200 18842 15000
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rect 4986 0 5042 800
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rect 14922 0 14978 800
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<< obsm2 >>
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rect 1234 14144 2538 14362
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rect 2706 14144 4010 14362
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rect 4178 14144 5482 14362
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rect 5650 14144 6954 14362
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rect 7122 14144 8426 14362
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rect 8594 14144 9898 14362
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rect 10066 14144 11370 14362
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rect 11538 14144 12842 14362
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rect 13010 14144 14314 14362
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rect 14482 14144 15786 14362
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rect 15954 14144 17258 14362
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rect 17426 14144 18730 14362
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rect 1178 856 18842 14144
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rect 1178 734 4930 856
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rect 5098 734 14866 856
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rect 15034 734 18842 856
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<< metal3 >>
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rect 0 13472 800 13592
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rect 19200 13472 20000 13592
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rect 0 12656 800 12776
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rect 0 11840 800 11960
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rect 0 11024 800 11144
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rect 19200 11024 20000 11144
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rect 0 10208 800 10328
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rect 0 9392 800 9512
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rect 0 8576 800 8696
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rect 19200 8576 20000 8696
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rect 0 7760 800 7880
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rect 0 6944 800 7064
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rect 0 6128 800 6248
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rect 19200 6128 20000 6248
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rect 0 5312 800 5432
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rect 0 4496 800 4616
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rect 0 3680 800 3800
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rect 19200 3680 20000 3800
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rect 0 2864 800 2984
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rect 0 2048 800 2168
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rect 0 1232 800 1352
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rect 19200 1232 20000 1352
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<< obsm3 >>
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rect 880 13392 19120 13633
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rect 800 12856 19200 13392
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rect 880 12576 19200 12856
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rect 800 12040 19200 12576
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rect 880 11760 19200 12040
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rect 800 11224 19200 11760
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rect 880 10944 19120 11224
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rect 800 10408 19200 10944
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rect 880 10128 19200 10408
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rect 800 9592 19200 10128
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rect 880 9312 19200 9592
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rect 800 8776 19200 9312
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rect 880 8496 19120 8776
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rect 800 7960 19200 8496
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rect 880 7680 19200 7960
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rect 800 7144 19200 7680
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rect 880 6864 19200 7144
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rect 800 6328 19200 6864
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rect 880 6048 19120 6328
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rect 800 5512 19200 6048
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rect 880 5232 19200 5512
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rect 800 4696 19200 5232
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rect 880 4416 19200 4696
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rect 800 3880 19200 4416
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rect 880 3600 19120 3880
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rect 800 3064 19200 3600
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rect 880 2784 19200 3064
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rect 800 2248 19200 2784
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rect 880 1968 19200 2248
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rect 800 1432 19200 1968
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rect 880 1152 19120 1432
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rect 800 1055 19200 1152
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<< metal4 >>
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rect 4208 1040 4528 13648
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rect 8208 1040 8528 13648
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rect 12208 1040 12528 13648
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rect 16208 1040 16528 13648
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<< metal5 >>
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rect 1056 12210 18908 12530
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rect 1056 8210 18908 8530
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rect 1056 4210 18908 4530
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<< labels >>
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rlabel metal4 s 8208 1040 8528 13648 6 VGND
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port 1 nsew ground bidirectional
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rlabel metal4 s 16208 1040 16528 13648 6 VGND
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port 1 nsew ground bidirectional
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rlabel metal5 s 1056 8210 18908 8530 6 VGND
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port 1 nsew ground bidirectional
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rlabel metal4 s 4208 1040 4528 13648 6 VPWR
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port 2 nsew power bidirectional
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rlabel metal4 s 12208 1040 12528 13648 6 VPWR
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port 2 nsew power bidirectional
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rlabel metal5 s 1056 4210 18908 4530 6 VPWR
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port 2 nsew power bidirectional
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rlabel metal5 s 1056 12210 18908 12530 6 VPWR
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port 2 nsew power bidirectional
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rlabel metal3 s 0 1232 800 1352 6 clockp[0]
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port 3 nsew signal output
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rlabel metal3 s 0 2048 800 2168 6 clockp[1]
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port 4 nsew signal output
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rlabel metal3 s 0 7760 800 7880 6 dco
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port 5 nsew signal input
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rlabel metal3 s 0 2864 800 2984 6 div[0]
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port 6 nsew signal input
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rlabel metal3 s 0 3680 800 3800 6 div[1]
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port 7 nsew signal input
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rlabel metal3 s 0 4496 800 4616 6 div[2]
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port 8 nsew signal input
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rlabel metal3 s 0 5312 800 5432 6 div[3]
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port 9 nsew signal input
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rlabel metal3 s 0 6128 800 6248 6 div[4]
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port 10 nsew signal input
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rlabel metal3 s 0 6944 800 7064 6 enable
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port 11 nsew signal input
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rlabel metal3 s 0 8576 800 8696 6 ext_trim[0]
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port 12 nsew signal input
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rlabel metal2 s 5538 14200 5594 15000 6 ext_trim[10]
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port 13 nsew signal input
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rlabel metal2 s 7010 14200 7066 15000 6 ext_trim[11]
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port 14 nsew signal input
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rlabel metal2 s 8482 14200 8538 15000 6 ext_trim[12]
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port 15 nsew signal input
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rlabel metal2 s 9954 14200 10010 15000 6 ext_trim[13]
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port 16 nsew signal input
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rlabel metal2 s 11426 14200 11482 15000 6 ext_trim[14]
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port 17 nsew signal input
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rlabel metal2 s 12898 14200 12954 15000 6 ext_trim[15]
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port 18 nsew signal input
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rlabel metal2 s 14370 14200 14426 15000 6 ext_trim[16]
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port 19 nsew signal input
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rlabel metal2 s 15842 14200 15898 15000 6 ext_trim[17]
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port 20 nsew signal input
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rlabel metal2 s 17314 14200 17370 15000 6 ext_trim[18]
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port 21 nsew signal input
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rlabel metal2 s 18786 14200 18842 15000 6 ext_trim[19]
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port 22 nsew signal input
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rlabel metal3 s 0 9392 800 9512 6 ext_trim[1]
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port 23 nsew signal input
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rlabel metal3 s 19200 13472 20000 13592 6 ext_trim[20]
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port 24 nsew signal input
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rlabel metal3 s 19200 11024 20000 11144 6 ext_trim[21]
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port 25 nsew signal input
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rlabel metal3 s 19200 8576 20000 8696 6 ext_trim[22]
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port 26 nsew signal input
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rlabel metal3 s 19200 6128 20000 6248 6 ext_trim[23]
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port 27 nsew signal input
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rlabel metal3 s 19200 3680 20000 3800 6 ext_trim[24]
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port 28 nsew signal input
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rlabel metal3 s 19200 1232 20000 1352 6 ext_trim[25]
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port 29 nsew signal input
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rlabel metal3 s 0 10208 800 10328 6 ext_trim[2]
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port 30 nsew signal input
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rlabel metal3 s 0 11024 800 11144 6 ext_trim[3]
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port 31 nsew signal input
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rlabel metal3 s 0 11840 800 11960 6 ext_trim[4]
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port 32 nsew signal input
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rlabel metal3 s 0 12656 800 12776 6 ext_trim[5]
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port 33 nsew signal input
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rlabel metal3 s 0 13472 800 13592 6 ext_trim[6]
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port 34 nsew signal input
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rlabel metal2 s 1122 14200 1178 15000 6 ext_trim[7]
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port 35 nsew signal input
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rlabel metal2 s 2594 14200 2650 15000 6 ext_trim[8]
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port 36 nsew signal input
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rlabel metal2 s 4066 14200 4122 15000 6 ext_trim[9]
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port 37 nsew signal input
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rlabel metal2 s 14922 0 14978 800 6 osc
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port 38 nsew signal input
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rlabel metal2 s 4986 0 5042 800 6 resetb
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port 39 nsew signal input
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<< properties >>
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string FIXED_BBOX 0 0 20000 15000
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string LEFclass BLOCK
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string LEFview TRUE
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string GDS_END 1263518
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string GDS_FILE ../gds/digital_pll.gds
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string GDS_START 348134
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<< end >>
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@ -1,28 +0,0 @@
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create_clock [get_pins {"ringosc.ibufp01/Y"} ] -name "pll_control_clock" -period 6.6666666666667
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set_propagated_clock [get_clocks {pll_control_clock}]
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set input_delay_value [expr $::env(CLOCK_PERIOD) * $::env(IO_PCT)]
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set output_delay_value [expr $::env(CLOCK_PERIOD) * $::env(IO_PCT)]
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puts "\[INFO\]: Setting output delay to: $output_delay_value"
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puts "\[INFO\]: Setting input delay to: $input_delay_value"
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set_max_fanout $::env(SYNTH_MAX_FANOUT) [current_design]
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set_input_delay $input_delay_value -clock [get_clocks $::env(CLOCK_PORT)] [all_inputs]
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set_output_delay $output_delay_value -clock [get_clocks $::env(CLOCK_PORT)] [all_outputs]
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# TODO set this as parameter
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set_driving_cell -lib_cell $::env(SYNTH_DRIVING_CELL) -pin $::env(SYNTH_DRIVING_CELL_PIN) [all_inputs]
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set cap_load [expr $::env(SYNTH_CAP_LOAD) / 1000.0]
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puts "\[INFO\]: Setting load to: $cap_load"
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set_load $cap_load [all_outputs]
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puts "\[INFO\]: Setting timing derate to: [expr {$::env(SYNTH_TIMING_DERATE) * 10}] %"
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set_timing_derate -early [expr {1-$::env(SYNTH_TIMING_DERATE)}]
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set_timing_derate -late [expr {1+$::env(SYNTH_TIMING_DERATE)}]
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puts "\[INFO\]: Setting clock uncertainity to: $::env(SYNTH_CLOCK_UNCERTAINTY)"
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set_clock_uncertainty $::env(SYNTH_CLOCK_UNCERTAINTY) [get_clocks {pll_control_clock}]
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puts "\[INFO\]: Setting clock transition to: $::env(SYNTH_CLOCK_TRANSITION)"
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set_clock_transition $::env(SYNTH_CLOCK_TRANSITION) [get_clocks {pll_control_clock}]
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@ -1,67 +0,0 @@
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# SPDX-FileCopyrightText: 2020 Efabless Corporation
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#
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# Licensed under the Apache License, Version 2.0 (the "License");
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# you may not use this file except in compliance with the License.
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# You may obtain a copy of the License at
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#
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# http://www.apache.org/licenses/LICENSE-2.0
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#
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# Unless required by applicable law or agreed to in writing, software
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# distributed under the License is distributed on an "AS IS" BASIS,
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# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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# See the License for the specific language governing permissions and
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# limitations under the License.
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# SPDX-License-Identifier: Apache-2.0
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set ::env(DESIGN_NAME) digital_pll
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set ::env(DESIGN_IS_CORE) 1
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set ::env(VERILOG_FILES) $::env(DESIGN_DIR)/../../verilog/rtl/digital_pll.v
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set ::env(CLOCK_PORT) ""
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set ::env(CLOCK_TREE_SYNTH) 0
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# Synthesis
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set ::env(SYNTH_READ_BLACKBOX_LIB) 1
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set ::env(SYNTH_MAX_FANOUT) 7
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set ::env(SYNTH_BUFFERING) 1
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set ::env(SYNTH_SIZING) 0
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set ::env(BASE_SDC_FILE) $::env(DESIGN_DIR)/base.sdc
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set ::env(NO_SYNTH_CELL_LIST) $::env(DESIGN_DIR)/no_synth.list
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## Floorplan
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set ::env(FP_PIN_ORDER_CFG) $::env(DESIGN_DIR)/pin_order.cfg
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set ::env(FP_SIZING) absolute
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set ::env(DIE_AREA) "0 0 100 75"
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set ::env(TOP_MARGIN_MULT) 2
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set ::env(BOTTOM_MARGIN_MULT) 2
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set ::env(DIODE_PADDING) 0
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set ::env(DPL_CELL_PADDING) 2
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set ::env(DRT_CELL_PADDING) 4
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## PDN
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set ::env(FP_PDN_VPITCH) 40
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set ::env(FP_PDN_HPITCH) 40
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set ::env(FP_PDN_HOFFSET) 16.41
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set ::env(FP_PDN_HSPACING) 18.4
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set ::env(FP_PDN_VSPACING) 18.4
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## Placement
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set ::env(PL_RESIZER_DESIGN_OPTIMIZATIONS) 0
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set ::env(PL_RESIZER_TIMING_OPTIMIZATIONS) 0
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set ::env(PL_TARGET_DENSITY) 0.68
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## Routing
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set ::env(GLB_RESIZER_TIMING_OPTIMIZATIONS) 0
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set ::env(GRT_ADJUSTMENT) 0
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## Diode Insertion
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set ::env(DIODE_INSERTION_STRATEGY) "4"
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set ::env(STA_WRITE_LIB) 0
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set ::env(FP_PDN_SKIPTRIM) 1
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@ -1,245 +0,0 @@
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sky130_fd_sc_hd__clkbuf_1
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sky130_fd_sc_hd__clkbuf_16
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sky130_fd_sc_hd__clkbuf_2
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sky130_fd_sc_hd__clkbuf_4
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sky130_fd_sc_hd__clkbuf_8
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sky130_fd_sc_hd__clkdlybuf4s15_1
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sky130_fd_sc_hd__clkdlybuf4s15_2
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sky130_fd_sc_hd__clkdlybuf4s18_1
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sky130_fd_sc_hd__clkdlybuf4s18_2
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sky130_fd_sc_hd__clkdlybuf4s25_1
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sky130_fd_sc_hd__clkdlybuf4s25_2
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sky130_fd_sc_hd__clkdlybuf4s50_1
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sky130_fd_sc_hd__clkdlybuf4s50_2
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sky130_fd_sc_hd__clkinv_1
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sky130_fd_sc_hd__clkinv_16
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sky130_fd_sc_hd__clkinv_2
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sky130_fd_sc_hd__clkinv_4
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sky130_fd_sc_hd__clkinv_8
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sky130_fd_sc_hd__clkinvlp_2
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sky130_fd_sc_hd__clkinvlp_4
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sky130_fd_sc_hd__decap_12
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sky130_fd_sc_hd__decap_3
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sky130_fd_sc_hd__decap_4
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sky130_fd_sc_hd__decap_6
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sky130_fd_sc_hd__decap_8
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sky130_fd_sc_hd__diode_2
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sky130_fd_sc_hd__dlclkp_1
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sky130_fd_sc_hd__dlclkp_2
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sky130_fd_sc_hd__dlclkp_4
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sky130_fd_sc_hd__dlrbn_1
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sky130_fd_sc_hd__dlrbn_2
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sky130_fd_sc_hd__dlrbp_1
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sky130_fd_sc_hd__dlrbp_2
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sky130_fd_sc_hd__dlrtn_1
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sky130_fd_sc_hd__dlrtn_2
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sky130_fd_sc_hd__dlrtn_4
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sky130_fd_sc_hd__dlrtp_1
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sky130_fd_sc_hd__dlrtp_2
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sky130_fd_sc_hd__dlrtp_4
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sky130_fd_sc_hd__dlxbn_1
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sky130_fd_sc_hd__dlxbn_2
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sky130_fd_sc_hd__dlxbp_1
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sky130_fd_sc_hd__dlygate4sd1_1
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sky130_fd_sc_hd__dlygate4sd2_1
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sky130_fd_sc_hd__dlygate4sd3_1
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sky130_fd_sc_hd__dlymetal6s2s_1
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sky130_fd_sc_hd__dlymetal6s4s_1
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sky130_fd_sc_hd__dlymetal6s6s_1
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sky130_fd_sc_hd__edfxbp_1
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sky130_fd_sc_hd__edfxtp_1
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sky130_fd_sc_hd__einvn_0
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sky130_fd_sc_hd__einvn_1
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sky130_fd_sc_hd__einvn_2
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sky130_fd_sc_hd__einvn_4
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sky130_fd_sc_hd__einvn_8
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sky130_fd_sc_hd__einvp_1
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sky130_fd_sc_hd__einvp_2
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sky130_fd_sc_hd__einvp_4
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sky130_fd_sc_hd__einvp_8
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sky130_fd_sc_hd__fah_1
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sky130_fd_sc_hd__fahcin_1
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sky130_fd_sc_hd__fahcon_1
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sky130_fd_sc_hd__ha_1
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sky130_fd_sc_hd__ha_2
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sky130_fd_sc_hd__ha_4
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sky130_fd_sc_hd__macro_sparecell
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sky130_fd_sc_hd__maj3_1
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sky130_fd_sc_hd__maj3_2
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sky130_fd_sc_hd__maj3_4
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sky130_fd_sc_hd__mux2i_1
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sky130_fd_sc_hd__mux2i_2
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sky130_fd_sc_hd__mux2i_4
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sky130_fd_sc_hd__sdfbbn_1
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sky130_fd_sc_hd__sdfbbn_2
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sky130_fd_sc_hd__sdfbbp_1
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sky130_fd_sc_hd__sdfrbp_1
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sky130_fd_sc_hd__sdfrbp_2
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sky130_fd_sc_hd__sdfrtn_1
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sky130_fd_sc_hd__sdfrtp_1
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sky130_fd_sc_hd__sdfrtp_2
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sky130_fd_sc_hd__sdfrtp_4
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sky130_fd_sc_hd__sdfsbp_1
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sky130_fd_sc_hd__sdfsbp_2
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sky130_fd_sc_hd__sdfstp_1
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sky130_fd_sc_hd__sdfstp_2
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sky130_fd_sc_hd__sdfstp_4
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sky130_fd_sc_hd__sdfxbp_1
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sky130_fd_sc_hd__sdfxbp_2
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sky130_fd_sc_hd__sdfxtp_1
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sky130_fd_sc_hd__sdfxtp_2
|
||||
sky130_fd_sc_hd__sdfxtp_4
|
||||
sky130_fd_sc_hd__sdlclkp_1
|
||||
sky130_fd_sc_hd__sdlclkp_2
|
||||
sky130_fd_sc_hd__sdlclkp_4
|
||||
sky130_fd_sc_hd__sedfxbp_1
|
||||
sky130_fd_sc_hd__sedfxbp_2
|
||||
sky130_fd_sc_hd__sedfxtp_1
|
||||
sky130_fd_sc_hd__sedfxtp_2
|
||||
sky130_fd_sc_hd__sedfxtp_4
|
||||
sky130_fd_sc_hd__a2111oi_1
|
||||
sky130_fd_sc_hd__a211o_1
|
||||
sky130_fd_sc_hd__a211oi_1
|
||||
sky130_fd_sc_hd__a2111o_1
|
||||
sky130_fd_sc_hd__a21bo_1
|
||||
sky130_fd_sc_hd__a21boi_1
|
||||
sky130_fd_sc_hd__a21o_1
|
||||
sky130_fd_sc_hd__a21oi_1
|
||||
sky130_fd_sc_hd__a221o_1
|
||||
sky130_fd_sc_hd__a221oi_1
|
||||
sky130_fd_sc_hd__a222oi_1
|
||||
sky130_fd_sc_hd__a22o_1
|
||||
sky130_fd_sc_hd__a22oi_1
|
||||
sky130_fd_sc_hd__a2bb2o_1
|
||||
sky130_fd_sc_hd__a2bb2oi_1
|
||||
sky130_fd_sc_hd__a311o_1
|
||||
sky130_fd_sc_hd__a311oi_1
|
||||
sky130_fd_sc_hd__a2111o_1
|
||||
sky130_fd_sc_hd__a21bo_1
|
||||
sky130_fd_sc_hd__a21boi_1
|
||||
sky130_fd_sc_hd__a21o_1
|
||||
sky130_fd_sc_hd__a21oi_1
|
||||
sky130_fd_sc_hd__a221o_1
|
||||
sky130_fd_sc_hd__a221oi_1
|
||||
sky130_fd_sc_hd__a222oi_1
|
||||
sky130_fd_sc_hd__a22o_1
|
||||
sky130_fd_sc_hd__a22oi_1
|
||||
sky130_fd_sc_hd__a2bb2o_1
|
||||
sky130_fd_sc_hd__a2bb2oi_1
|
||||
sky130_fd_sc_hd__a311o_1
|
||||
sky130_fd_sc_hd__a311oi_1
|
||||
sky130_fd_sc_hd__a31o_1
|
||||
sky130_fd_sc_hd__a31oi_1
|
||||
sky130_fd_sc_hd__a32o_1
|
||||
sky130_fd_sc_hd__a32oi_1
|
||||
sky130_fd_sc_hd__a41o_1
|
||||
sky130_fd_sc_hd__a41oi_1
|
||||
sky130_fd_sc_hd__and2_1
|
||||
sky130_fd_sc_hd__and2b_1
|
||||
sky130_fd_sc_hd__and3_1
|
||||
sky130_fd_sc_hd__and3b_1
|
||||
sky130_fd_sc_hd__and4_1
|
||||
sky130_fd_sc_hd__and4b_1
|
||||
sky130_fd_sc_hd__and4bb_1
|
||||
sky130_fd_sc_hd__dfbbn_1
|
||||
sky130_fd_sc_hd__dfbbp_1
|
||||
sky130_fd_sc_hd__dfrbp_1
|
||||
sky130_fd_sc_hd__dfrtn_1
|
||||
sky130_fd_sc_hd__dfrtp_1
|
||||
sky130_fd_sc_hd__dfsbp_1
|
||||
sky130_fd_sc_hd__dfstp_1
|
||||
sky130_fd_sc_hd__dfxbp_1
|
||||
sky130_fd_sc_hd__dfxtp_1
|
||||
sky130_fd_sc_hd__ebufn_1
|
||||
sky130_fd_sc_hd__inv_1
|
||||
sky130_fd_sc_hd__nand2_1
|
||||
sky130_fd_sc_hd__nand2b_1
|
||||
sky130_fd_sc_hd__nand3_1
|
||||
sky130_fd_sc_hd__nand3b_1
|
||||
sky130_fd_sc_hd__nand4_1
|
||||
sky130_fd_sc_hd__nand4b_1
|
||||
sky130_fd_sc_hd__nand4bb_1
|
||||
sky130_fd_sc_hd__nor2_1
|
||||
sky130_fd_sc_hd__nor2b_1
|
||||
sky130_fd_sc_hd__nor3_1
|
||||
sky130_fd_sc_hd__nor3b_1
|
||||
sky130_fd_sc_hd__nor4_1
|
||||
sky130_fd_sc_hd__nor4b_1
|
||||
sky130_fd_sc_hd__nor4bb_1
|
||||
sky130_fd_sc_hd__o2111a_1
|
||||
sky130_fd_sc_hd__o2111ai_1
|
||||
sky130_fd_sc_hd__o211a_1
|
||||
sky130_fd_sc_hd__o211ai_1
|
||||
sky130_fd_sc_hd__o21a_1
|
||||
sky130_fd_sc_hd__o21ai_1
|
||||
sky130_fd_sc_hd__o21ba_1
|
||||
sky130_fd_sc_hd__o21bai_1
|
||||
sky130_fd_sc_hd__o221a_1
|
||||
sky130_fd_sc_hd__o221ai_1
|
||||
sky130_fd_sc_hd__o22a_1
|
||||
sky130_fd_sc_hd__o22ai_1
|
||||
sky130_fd_sc_hd__o2bb2a_1
|
||||
sky130_fd_sc_hd__o2bb2ai_1
|
||||
sky130_fd_sc_hd__o311a_1
|
||||
sky130_fd_sc_hd__o311ai_1
|
||||
sky130_fd_sc_hd__o31a_1
|
||||
sky130_fd_sc_hd__o31ai_1
|
||||
sky130_fd_sc_hd__o32a_1
|
||||
sky130_fd_sc_hd__o32ai_1
|
||||
sky130_fd_sc_hd__o41a_1
|
||||
sky130_fd_sc_hd__o41ai_1
|
||||
sky130_fd_sc_hd__or2_1
|
||||
sky130_fd_sc_hd__or2b_1
|
||||
sky130_fd_sc_hd__or3_1
|
||||
sky130_fd_sc_hd__or3b_1
|
||||
sky130_fd_sc_hd__or4_1
|
||||
sky130_fd_sc_hd__or4b_1
|
||||
sky130_fd_sc_hd__or4bb_1
|
||||
sky130_fd_sc_hd__xnor2_1
|
||||
sky130_fd_sc_hd__xor2_1
|
||||
|
||||
sky130_fd_sc_hd__buf_1
|
||||
sky130_fd_sc_hd__bufbuf_1
|
||||
sky130_fd_sc_hd__bufinv_1
|
||||
sky130_fd_sc_hd__clkbuf_1
|
||||
sky130_fd_sc_hd__clkdlybuf4s15_1
|
||||
sky130_fd_sc_hd__clkdlybuf4s18_1
|
||||
sky130_fd_sc_hd__clkdlybuf4s25_1
|
||||
sky130_fd_sc_hd__clkdlybuf4s50_1
|
||||
sky130_fd_sc_hd__clkinv_1
|
||||
sky130_fd_sc_hd__dlygate4sd1_1
|
||||
sky130_fd_sc_hd__dlygate4sd2_1
|
||||
sky130_fd_sc_hd__dlygate4sd3_1
|
||||
sky130_fd_sc_hd__dlymetal6s2s_1
|
||||
sky130_fd_sc_hd__dlymetal6s4s_1
|
||||
sky130_fd_sc_hd__dlymetal6s6s_1
|
||||
|
||||
sky130_fd_sc_hd__or2
|
||||
sky130_fd_sc_hd__or2_0
|
||||
sky130_fd_sc_hd__or2_1
|
||||
sky130_fd_sc_hd__or2_2
|
||||
sky130_fd_sc_hd__or2_4
|
||||
sky130_fd_sc_hd__or2b
|
||||
sky130_fd_sc_hd__or2b_1
|
||||
sky130_fd_sc_hd__or2b_2
|
||||
sky130_fd_sc_hd__or2b_4
|
||||
sky130_fd_sc_hd__or3
|
||||
sky130_fd_sc_hd__or3_1
|
||||
sky130_fd_sc_hd__or3_2
|
||||
sky130_fd_sc_hd__or3_4
|
||||
sky130_fd_sc_hd__or3b
|
||||
sky130_fd_sc_hd__or3b_1
|
||||
sky130_fd_sc_hd__or3b_2
|
||||
sky130_fd_sc_hd__or3b_4
|
||||
sky130_fd_sc_hd__or4
|
||||
sky130_fd_sc_hd__or4_1
|
||||
sky130_fd_sc_hd__or4_2
|
||||
sky130_fd_sc_hd__or4_4
|
||||
sky130_fd_sc_hd__or4b
|
||||
sky130_fd_sc_hd__or4b_1
|
||||
sky130_fd_sc_hd__or4b_2
|
||||
sky130_fd_sc_hd__or4b_4
|
||||
sky130_fd_sc_hd__or4bb
|
||||
sky130_fd_sc_hd__or4bb_1
|
||||
sky130_fd_sc_hd__or4bb_2
|
||||
sky130_fd_sc_hd__or4bb_4
|
||||
|
|
@ -1,23 +0,0 @@
|
|||
#N
|
||||
ext_trim\[[7-9]\]
|
||||
ext_trim\[1[0-9]\]
|
||||
|
||||
#E
|
||||
ext_trim\[25\]
|
||||
ext_trim\[24\]
|
||||
ext_trim\[23\]
|
||||
ext_trim\[22\]
|
||||
ext_trim\[21\]
|
||||
ext_trim\[20\]
|
||||
|
||||
#W
|
||||
clockp.*
|
||||
div.*
|
||||
enable
|
||||
dco.*
|
||||
ext_trim\[[0-6]\]
|
||||
|
||||
#S
|
||||
resetb
|
||||
osc
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
|
|
@ -1 +0,0 @@
|
|||
OpenLane e3a5189a1b0fc4290686fcf2ae46cd6d7947cf9f
|
||||
|
|
@ -1 +0,0 @@
|
|||
open_pdks de752ec0ba4da0ecb1fbcd309eeec4993d88f5bc
|
||||
|
|
@ -1,95 +0,0 @@
|
|||
### Digital PLL Signoff SDC
|
||||
### Rev 2
|
||||
### Date: 17/10/2022
|
||||
|
||||
set pll_clk_t 11.76
|
||||
###############################################################################
|
||||
# Timing Constraints
|
||||
###############################################################################
|
||||
create_clock -name pll_control_clock -period $pll_clk_t [get_pins {ringosc.ibufp01/Y}]
|
||||
set_clock_transition 0.1000 [get_clocks {pll_control_clock}]
|
||||
set_clock_uncertainty 0.100 pll_control_clock
|
||||
set_input_delay 1.0000 -add_delay [get_ports {dco}]
|
||||
set_input_delay 1.0000 -add_delay [get_ports {div[0]}]
|
||||
set_input_delay 1.0000 -add_delay [get_ports {div[1]}]
|
||||
set_input_delay 1.0000 -add_delay [get_ports {div[2]}]
|
||||
set_input_delay 1.0000 -add_delay [get_ports {div[3]}]
|
||||
set_input_delay 1.0000 -add_delay [get_ports {div[4]}]
|
||||
set_input_delay 1.0000 -add_delay [get_ports {enable}]
|
||||
set_input_delay 1.0000 -add_delay [get_ports {ext_trim[0]}]
|
||||
set_input_delay 1.0000 -add_delay [get_ports {ext_trim[10]}]
|
||||
set_input_delay 1.0000 -add_delay [get_ports {ext_trim[11]}]
|
||||
set_input_delay 1.0000 -add_delay [get_ports {ext_trim[12]}]
|
||||
set_input_delay 1.0000 -add_delay [get_ports {ext_trim[13]}]
|
||||
set_input_delay 1.0000 -add_delay [get_ports {ext_trim[14]}]
|
||||
set_input_delay 1.0000 -add_delay [get_ports {ext_trim[15]}]
|
||||
set_input_delay 1.0000 -add_delay [get_ports {ext_trim[16]}]
|
||||
set_input_delay 1.0000 -add_delay [get_ports {ext_trim[17]}]
|
||||
set_input_delay 1.0000 -add_delay [get_ports {ext_trim[18]}]
|
||||
set_input_delay 1.0000 -add_delay [get_ports {ext_trim[19]}]
|
||||
set_input_delay 1.0000 -add_delay [get_ports {ext_trim[1]}]
|
||||
set_input_delay 1.0000 -add_delay [get_ports {ext_trim[20]}]
|
||||
set_input_delay 1.0000 -add_delay [get_ports {ext_trim[21]}]
|
||||
set_input_delay 1.0000 -add_delay [get_ports {ext_trim[22]}]
|
||||
set_input_delay 1.0000 -add_delay [get_ports {ext_trim[23]}]
|
||||
set_input_delay 1.0000 -add_delay [get_ports {ext_trim[24]}]
|
||||
set_input_delay 1.0000 -add_delay [get_ports {ext_trim[25]}]
|
||||
set_input_delay 1.0000 -add_delay [get_ports {ext_trim[2]}]
|
||||
set_input_delay 1.0000 -add_delay [get_ports {ext_trim[3]}]
|
||||
set_input_delay 1.0000 -add_delay [get_ports {ext_trim[4]}]
|
||||
set_input_delay 1.0000 -add_delay [get_ports {ext_trim[5]}]
|
||||
set_input_delay 1.0000 -add_delay [get_ports {ext_trim[6]}]
|
||||
set_input_delay 1.0000 -add_delay [get_ports {ext_trim[7]}]
|
||||
set_input_delay 1.0000 -add_delay [get_ports {ext_trim[8]}]
|
||||
set_input_delay 1.0000 -add_delay [get_ports {ext_trim[9]}]
|
||||
set_input_delay 1.0000 -add_delay [get_ports {osc}]
|
||||
set_input_delay 1.0000 -add_delay [get_ports {resetb}]
|
||||
set_output_delay 1.0000 -add_delay [get_ports {clockp[0]}]
|
||||
set_output_delay 1.0000 -add_delay [get_ports {clockp[1]}]
|
||||
|
||||
###############################################################################
|
||||
# Environment
|
||||
###############################################################################
|
||||
set_load -pin_load 0.0334 [get_ports {clockp[1]}]
|
||||
set_load -pin_load 0.0334 [get_ports {clockp[0]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {dco}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {enable}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {osc}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {resetb}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {div[4]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {div[3]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {div[2]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {div[1]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {div[0]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {ext_trim[25]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {ext_trim[24]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {ext_trim[23]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {ext_trim[22]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {ext_trim[21]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {ext_trim[20]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {ext_trim[19]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {ext_trim[18]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {ext_trim[17]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {ext_trim[16]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {ext_trim[15]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {ext_trim[14]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {ext_trim[13]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {ext_trim[12]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {ext_trim[11]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {ext_trim[10]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {ext_trim[9]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {ext_trim[8]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {ext_trim[7]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {ext_trim[6]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {ext_trim[5]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {ext_trim[4]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {ext_trim[3]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {ext_trim[2]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {ext_trim[1]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {ext_trim[0]}]
|
||||
|
||||
###############################################################################
|
||||
# Design Rules
|
||||
###############################################################################
|
||||
set_max_fanout 7.0000 [current_design]
|
||||
set_max_transition 0.75 [current_design]
|
||||
|
|
@ -1,2 +0,0 @@
|
|||
design,design_name,config,flow_status,total_runtime,routed_runtime,(Cell/mm^2)/Core_Util,DIEAREA_mm^2,CellPer_mm^2,OpenDP_Util,Peak_Memory_Usage_MB,cell_count,tritonRoute_violations,Short_violations,MetSpc_violations,OffGrid_violations,MinHole_violations,Other_violations,Magic_violations,antenna_violations,lvs_total_errors,cvc_total_errors,klayout_violations,wire_length,vias,wns,pl_wns,optimized_wns,fastroute_wns,spef_wns,tns,pl_tns,optimized_tns,fastroute_tns,spef_tns,HPWL,routing_layer1_pct,routing_layer2_pct,routing_layer3_pct,routing_layer4_pct,routing_layer5_pct,routing_layer6_pct,wires_count,wire_bits,public_wires_count,public_wire_bits,memories_count,memory_bits,processes_count,cells_pre_abc,AND,DFF,NAND,NOR,OR,XOR,XNOR,MUX,inputs,outputs,level,EndCaps,TapCells,Diodes,Total_Physical_Cells,CoreArea_um^2,power_slowest_internal_uW,power_slowest_switching_uW,power_slowest_leakage_uW,power_typical_internal_uW,power_typical_switching_uW,power_typical_leakage_uW,power_fastest_internal_uW,power_fastest_switching_uW,power_fastest_leakage_uW,critical_path_ns,suggested_clock_period,suggested_clock_frequency,CLOCK_PERIOD,SYNTH_STRATEGY,SYNTH_MAX_FANOUT,FP_CORE_UTIL,FP_ASPECT_RATIO,FP_PDN_VPITCH,FP_PDN_HPITCH,PL_TARGET_DENSITY,GRT_ADJUSTMENT,STD_CELL_LIBRARY,DIODE_INSERTION_STRATEGY
|
||||
/home/kareem_farid/caravel/openlane/digital_pll,digital_pll,22_10_18_06_51,flow completed,0h1m7s0ms,0h0m46s0ms,-2.0,0.0075,-1,67.08,534.82,-1,0,0,0,0,0,0,0,-1,-1,-1,-1,8402,2566,0.0,0.0,-1,0.0,0.0,0.0,0.0,-1,0.0,0.0,6100018.0,0.0,28.69,22.89,0.65,0.0,0.0,580,776,121,305,0,0,0,614,5,3,17,11,297,19,12,27,56,70,13,46,75,0,121,5554.0768,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,10.0,100.0,10.0,AREA 0,7,50,1,40,40,0.68,0,sky130_fd_sc_hd,4
|
||||
|
|
|
@ -1,40 +0,0 @@
|
|||
OpenROAD 4174c3ad802d2ac1d04d387d2c4b883903f6647e
|
||||
This program is licensed under the BSD-3 license. See the LICENSE file for details.
|
||||
Components of this program may be licensed under more restrictive licenses which must be honored.
|
||||
[INFO ODB-0222] Reading LEF file: /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/tmp/merged.min.lef
|
||||
[WARNING ODB-0220] WARNING (LEFPARS-2036): SOURCE statement is obsolete in version 5.6 and later.
|
||||
The LEF parser will ignore this statement.
|
||||
To avoid this warning in the future, remove this statement from the LEF file with version 5.6 or later. See file /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/tmp/merged.min.lef at line 930.
|
||||
|
||||
[INFO ODB-0223] Created 13 technology layers
|
||||
[INFO ODB-0224] Created 25 technology vias
|
||||
[INFO ODB-0225] Created 441 library cells
|
||||
[INFO ODB-0226] Finished LEF file: /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/tmp/merged.min.lef
|
||||
[INFO ODB-0127] Reading DEF file: /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/routing/digital_pll.def
|
||||
[INFO ODB-0128] Design: digital_pll
|
||||
[INFO ODB-0130] Created 39 pins.
|
||||
[INFO ODB-0131] Created 1093 components and 5448 component-terminals.
|
||||
[INFO ODB-0132] Created 2 special nets and 4222 connections.
|
||||
[INFO ODB-0133] Created 371 nets and 1225 connections.
|
||||
[INFO ODB-0134] Finished DEF file: /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/routing/digital_pll.def
|
||||
Using RCX ruleset '/home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.tech/openlane/rules.openrcx.sky130A.min.calibre'...
|
||||
[INFO RCX-0431] Defined process_corner X with ext_model_index 0
|
||||
[INFO RCX-0029] Defined extraction corner X
|
||||
[INFO RCX-0008] extracting parasitics of digital_pll ...
|
||||
[INFO RCX-0435] Reading extraction model file /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.tech/openlane/rules.openrcx.sky130A.min.calibre ...
|
||||
[INFO RCX-0436] RC segment generation digital_pll (max_merge_res 50.0) ...
|
||||
[INFO RCX-0040] Final 1412 rc segments
|
||||
[INFO RCX-0439] Coupling Cap extraction digital_pll ...
|
||||
[INFO RCX-0440] Coupling threshhold is 0.1000 fF, coupling capacitance less than 0.1000 fF will be grounded.
|
||||
[INFO RCX-0043] 2698 wires to be extracted
|
||||
[INFO RCX-0442] 52% completion -- 1411 wires have been extracted
|
||||
[INFO RCX-0442] 100% completion -- 2698 wires have been extracted
|
||||
[INFO RCX-0045] Extract 371 nets, 1783 rsegs, 1783 caps, 2905 ccs
|
||||
[INFO RCX-0015] Finished extracting digital_pll.
|
||||
Writing result to /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/routing/mca/process_corner_min/digital_pll.spef...
|
||||
Setting global connections for newly added cells...
|
||||
[WARNING] Did not save OpenROAD database!
|
||||
Writing extracted parasitics to /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/routing/mca/process_corner_min/digital_pll.spef...
|
||||
[INFO RCX-0016] Writing SPEF ...
|
||||
[INFO RCX-0443] 371 nets finished
|
||||
[INFO RCX-0017] Finished writing SPEF ...
|
||||
File diff suppressed because it is too large
Load Diff
|
|
@ -1,40 +0,0 @@
|
|||
OpenROAD 4174c3ad802d2ac1d04d387d2c4b883903f6647e
|
||||
This program is licensed under the BSD-3 license. See the LICENSE file for details.
|
||||
Components of this program may be licensed under more restrictive licenses which must be honored.
|
||||
[INFO ODB-0222] Reading LEF file: /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/tmp/merged.max.lef
|
||||
[WARNING ODB-0220] WARNING (LEFPARS-2036): SOURCE statement is obsolete in version 5.6 and later.
|
||||
The LEF parser will ignore this statement.
|
||||
To avoid this warning in the future, remove this statement from the LEF file with version 5.6 or later. See file /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/tmp/merged.max.lef at line 930.
|
||||
|
||||
[INFO ODB-0223] Created 13 technology layers
|
||||
[INFO ODB-0224] Created 25 technology vias
|
||||
[INFO ODB-0225] Created 441 library cells
|
||||
[INFO ODB-0226] Finished LEF file: /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/tmp/merged.max.lef
|
||||
[INFO ODB-0127] Reading DEF file: /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/routing/digital_pll.def
|
||||
[INFO ODB-0128] Design: digital_pll
|
||||
[INFO ODB-0130] Created 39 pins.
|
||||
[INFO ODB-0131] Created 1093 components and 5448 component-terminals.
|
||||
[INFO ODB-0132] Created 2 special nets and 4222 connections.
|
||||
[INFO ODB-0133] Created 371 nets and 1225 connections.
|
||||
[INFO ODB-0134] Finished DEF file: /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/routing/digital_pll.def
|
||||
Using RCX ruleset '/home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.tech/openlane/rules.openrcx.sky130A.max.calibre'...
|
||||
[INFO RCX-0431] Defined process_corner X with ext_model_index 0
|
||||
[INFO RCX-0029] Defined extraction corner X
|
||||
[INFO RCX-0008] extracting parasitics of digital_pll ...
|
||||
[INFO RCX-0435] Reading extraction model file /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.tech/openlane/rules.openrcx.sky130A.max.calibre ...
|
||||
[INFO RCX-0436] RC segment generation digital_pll (max_merge_res 50.0) ...
|
||||
[INFO RCX-0040] Final 1821 rc segments
|
||||
[INFO RCX-0439] Coupling Cap extraction digital_pll ...
|
||||
[INFO RCX-0440] Coupling threshhold is 0.1000 fF, coupling capacitance less than 0.1000 fF will be grounded.
|
||||
[INFO RCX-0043] 2698 wires to be extracted
|
||||
[INFO RCX-0442] 52% completion -- 1411 wires have been extracted
|
||||
[INFO RCX-0442] 100% completion -- 2698 wires have been extracted
|
||||
[INFO RCX-0045] Extract 371 nets, 2192 rsegs, 2192 caps, 2962 ccs
|
||||
[INFO RCX-0015] Finished extracting digital_pll.
|
||||
Writing result to /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/routing/mca/process_corner_max/digital_pll.spef...
|
||||
Setting global connections for newly added cells...
|
||||
[WARNING] Did not save OpenROAD database!
|
||||
Writing extracted parasitics to /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/routing/mca/process_corner_max/digital_pll.spef...
|
||||
[INFO RCX-0016] Writing SPEF ...
|
||||
[INFO RCX-0443] 371 nets finished
|
||||
[INFO RCX-0017] Finished writing SPEF ...
|
||||
File diff suppressed because it is too large
Load Diff
|
|
@ -1,40 +0,0 @@
|
|||
OpenROAD 4174c3ad802d2ac1d04d387d2c4b883903f6647e
|
||||
This program is licensed under the BSD-3 license. See the LICENSE file for details.
|
||||
Components of this program may be licensed under more restrictive licenses which must be honored.
|
||||
[INFO ODB-0222] Reading LEF file: /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/tmp/merged.nom.lef
|
||||
[WARNING ODB-0220] WARNING (LEFPARS-2036): SOURCE statement is obsolete in version 5.6 and later.
|
||||
The LEF parser will ignore this statement.
|
||||
To avoid this warning in the future, remove this statement from the LEF file with version 5.6 or later. See file /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/tmp/merged.nom.lef at line 930.
|
||||
|
||||
[INFO ODB-0223] Created 13 technology layers
|
||||
[INFO ODB-0224] Created 25 technology vias
|
||||
[INFO ODB-0225] Created 441 library cells
|
||||
[INFO ODB-0226] Finished LEF file: /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/tmp/merged.nom.lef
|
||||
[INFO ODB-0127] Reading DEF file: /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/routing/digital_pll.def
|
||||
[INFO ODB-0128] Design: digital_pll
|
||||
[INFO ODB-0130] Created 39 pins.
|
||||
[INFO ODB-0131] Created 1093 components and 5448 component-terminals.
|
||||
[INFO ODB-0132] Created 2 special nets and 4222 connections.
|
||||
[INFO ODB-0133] Created 371 nets and 1225 connections.
|
||||
[INFO ODB-0134] Finished DEF file: /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/routing/digital_pll.def
|
||||
Using RCX ruleset '/home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.tech/openlane/rules.openrcx.sky130A.nom.calibre'...
|
||||
[INFO RCX-0431] Defined process_corner X with ext_model_index 0
|
||||
[INFO RCX-0029] Defined extraction corner X
|
||||
[INFO RCX-0008] extracting parasitics of digital_pll ...
|
||||
[INFO RCX-0435] Reading extraction model file /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.tech/openlane/rules.openrcx.sky130A.nom.calibre ...
|
||||
[INFO RCX-0436] RC segment generation digital_pll (max_merge_res 50.0) ...
|
||||
[INFO RCX-0040] Final 1429 rc segments
|
||||
[INFO RCX-0439] Coupling Cap extraction digital_pll ...
|
||||
[INFO RCX-0440] Coupling threshhold is 0.1000 fF, coupling capacitance less than 0.1000 fF will be grounded.
|
||||
[INFO RCX-0043] 2698 wires to be extracted
|
||||
[INFO RCX-0442] 52% completion -- 1411 wires have been extracted
|
||||
[INFO RCX-0442] 100% completion -- 2698 wires have been extracted
|
||||
[INFO RCX-0045] Extract 371 nets, 1800 rsegs, 1800 caps, 2915 ccs
|
||||
[INFO RCX-0015] Finished extracting digital_pll.
|
||||
Writing result to /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/routing/mca/process_corner_nom/digital_pll.spef...
|
||||
Setting global connections for newly added cells...
|
||||
[WARNING] Did not save OpenROAD database!
|
||||
Writing extracted parasitics to /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/routing/mca/process_corner_nom/digital_pll.spef...
|
||||
[INFO RCX-0016] Writing SPEF ...
|
||||
[INFO RCX-0443] 371 nets finished
|
||||
[INFO RCX-0017] Finished writing SPEF ...
|
||||
File diff suppressed because it is too large
Load Diff
|
|
@ -1,5 +0,0 @@
|
|||
|
||||
===========================================================================
|
||||
report_design_area
|
||||
============================================================================
|
||||
Design area 3781 u^2 68% utilization.
|
||||
|
|
@ -1 +0,0 @@
|
|||
SKIPPED!
|
||||
|
|
@ -1,686 +0,0 @@
|
|||
OpenROAD 4174c3ad802d2ac1d04d387d2c4b883903f6647e
|
||||
This program is licensed under the BSD-3 license. See the LICENSE file for details.
|
||||
Components of this program may be licensed under more restrictive licenses which must be honored.
|
||||
Reading /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/routing/digital_pll.odb
|
||||
min_report
|
||||
|
||||
===========================================================================
|
||||
report_checks -path_delay min (Hold)
|
||||
============================================================================
|
||||
Startpoint: _470_ (rising edge-triggered flip-flop clocked by pll_control_clock)
|
||||
Endpoint: _471_ (rising edge-triggered flip-flop clocked by pll_control_clock)
|
||||
Path Group: pll_control_clock
|
||||
Path Type: min
|
||||
|
||||
Fanout Cap Slew Delay Time Description
|
||||
-----------------------------------------------------------------------------
|
||||
0.00 0.00 clock pll_control_clock (rise edge)
|
||||
0.00 0.00 clock source latency
|
||||
0.09 0.00 0.00 ^ ringosc.ibufp01/Y (sky130_fd_sc_hd__clkinv_8)
|
||||
24 0.08 pll_control.clock (net)
|
||||
0.09 0.01 0.01 ^ _470_/CLK (sky130_fd_sc_hd__dfrtp_2)
|
||||
0.04 0.33 0.34 ^ _470_/Q (sky130_fd_sc_hd__dfrtp_2)
|
||||
1 0.00 pll_control.oscbuf[0] (net)
|
||||
0.04 0.00 0.34 ^ _471_/D (sky130_fd_sc_hd__dfrtp_2)
|
||||
0.34 data arrival time
|
||||
|
||||
0.00 0.00 clock pll_control_clock (rise edge)
|
||||
0.00 0.00 clock source latency
|
||||
0.09 0.00 0.00 ^ ringosc.ibufp01/Y (sky130_fd_sc_hd__clkinv_8)
|
||||
24 0.08 pll_control.clock (net)
|
||||
0.09 0.01 0.01 ^ _471_/CLK (sky130_fd_sc_hd__dfrtp_2)
|
||||
0.25 0.26 clock uncertainty
|
||||
0.00 0.26 clock reconvergence pessimism
|
||||
-0.03 0.23 library hold time
|
||||
0.23 data required time
|
||||
-----------------------------------------------------------------------------
|
||||
0.23 data required time
|
||||
-0.34 data arrival time
|
||||
-----------------------------------------------------------------------------
|
||||
0.11 slack (MET)
|
||||
|
||||
|
||||
Startpoint: _471_ (rising edge-triggered flip-flop clocked by pll_control_clock)
|
||||
Endpoint: _472_ (rising edge-triggered flip-flop clocked by pll_control_clock)
|
||||
Path Group: pll_control_clock
|
||||
Path Type: min
|
||||
|
||||
Fanout Cap Slew Delay Time Description
|
||||
-----------------------------------------------------------------------------
|
||||
0.00 0.00 clock pll_control_clock (rise edge)
|
||||
0.00 0.00 clock source latency
|
||||
0.09 0.00 0.00 ^ ringosc.ibufp01/Y (sky130_fd_sc_hd__clkinv_8)
|
||||
24 0.08 pll_control.clock (net)
|
||||
0.09 0.01 0.01 ^ _471_/CLK (sky130_fd_sc_hd__dfrtp_2)
|
||||
0.09 0.38 0.39 ^ _471_/Q (sky130_fd_sc_hd__dfrtp_2)
|
||||
2 0.02 pll_control.oscbuf[1] (net)
|
||||
0.09 0.00 0.39 ^ _472_/D (sky130_fd_sc_hd__dfrtp_2)
|
||||
0.39 data arrival time
|
||||
|
||||
0.00 0.00 clock pll_control_clock (rise edge)
|
||||
0.00 0.00 clock source latency
|
||||
0.09 0.00 0.00 ^ ringosc.ibufp01/Y (sky130_fd_sc_hd__clkinv_8)
|
||||
24 0.08 pll_control.clock (net)
|
||||
0.09 0.01 0.01 ^ _472_/CLK (sky130_fd_sc_hd__dfrtp_2)
|
||||
0.25 0.26 clock uncertainty
|
||||
0.00 0.26 clock reconvergence pessimism
|
||||
-0.04 0.22 library hold time
|
||||
0.22 data required time
|
||||
-----------------------------------------------------------------------------
|
||||
0.22 data required time
|
||||
-0.39 data arrival time
|
||||
-----------------------------------------------------------------------------
|
||||
0.17 slack (MET)
|
||||
|
||||
|
||||
Startpoint: _455_ (rising edge-triggered flip-flop clocked by pll_control_clock)
|
||||
Endpoint: _455_ (rising edge-triggered flip-flop clocked by pll_control_clock)
|
||||
Path Group: pll_control_clock
|
||||
Path Type: min
|
||||
|
||||
Fanout Cap Slew Delay Time Description
|
||||
-----------------------------------------------------------------------------
|
||||
0.00 0.00 clock pll_control_clock (rise edge)
|
||||
0.00 0.00 clock source latency
|
||||
0.09 0.00 0.00 ^ ringosc.ibufp01/Y (sky130_fd_sc_hd__clkinv_8)
|
||||
24 0.08 pll_control.clock (net)
|
||||
0.09 0.01 0.01 ^ _455_/CLK (sky130_fd_sc_hd__dfrtp_2)
|
||||
0.06 0.35 0.36 ^ _455_/Q (sky130_fd_sc_hd__dfrtp_2)
|
||||
3 0.01 pll_control.prep[0] (net)
|
||||
0.06 0.00 0.36 ^ _347_/A_N (sky130_fd_sc_hd__nand2b_2)
|
||||
0.04 0.11 0.46 ^ _347_/Y (sky130_fd_sc_hd__nand2b_2)
|
||||
1 0.00 _023_ (net)
|
||||
0.04 0.00 0.46 ^ _455_/D (sky130_fd_sc_hd__dfrtp_2)
|
||||
0.46 data arrival time
|
||||
|
||||
0.00 0.00 clock pll_control_clock (rise edge)
|
||||
0.00 0.00 clock source latency
|
||||
0.09 0.00 0.00 ^ ringosc.ibufp01/Y (sky130_fd_sc_hd__clkinv_8)
|
||||
24 0.08 pll_control.clock (net)
|
||||
0.09 0.01 0.01 ^ _455_/CLK (sky130_fd_sc_hd__dfrtp_2)
|
||||
0.25 0.26 clock uncertainty
|
||||
0.00 0.26 clock reconvergence pessimism
|
||||
-0.03 0.23 library hold time
|
||||
0.23 data required time
|
||||
-----------------------------------------------------------------------------
|
||||
0.23 data required time
|
||||
-0.46 data arrival time
|
||||
-----------------------------------------------------------------------------
|
||||
0.23 slack (MET)
|
||||
|
||||
|
||||
Startpoint: _463_ (rising edge-triggered flip-flop clocked by pll_control_clock)
|
||||
Endpoint: _463_ (rising edge-triggered flip-flop clocked by pll_control_clock)
|
||||
Path Group: pll_control_clock
|
||||
Path Type: min
|
||||
|
||||
Fanout Cap Slew Delay Time Description
|
||||
-----------------------------------------------------------------------------
|
||||
0.00 0.00 clock pll_control_clock (rise edge)
|
||||
0.00 0.00 clock source latency
|
||||
0.09 0.00 0.00 ^ ringosc.ibufp01/Y (sky130_fd_sc_hd__clkinv_8)
|
||||
24 0.08 pll_control.clock (net)
|
||||
0.09 0.01 0.01 ^ _463_/CLK (sky130_fd_sc_hd__dfrtp_2)
|
||||
0.11 0.40 0.40 ^ _463_/Q (sky130_fd_sc_hd__dfrtp_2)
|
||||
4 0.02 pll_control.tval[0] (net)
|
||||
0.11 0.00 0.40 ^ _329_/A1 (sky130_fd_sc_hd__o21a_2)
|
||||
0.03 0.13 0.53 ^ _329_/X (sky130_fd_sc_hd__o21a_2)
|
||||
1 0.00 _031_ (net)
|
||||
0.03 0.00 0.53 ^ _463_/D (sky130_fd_sc_hd__dfrtp_2)
|
||||
0.53 data arrival time
|
||||
|
||||
0.00 0.00 clock pll_control_clock (rise edge)
|
||||
0.00 0.00 clock source latency
|
||||
0.09 0.00 0.00 ^ ringosc.ibufp01/Y (sky130_fd_sc_hd__clkinv_8)
|
||||
24 0.08 pll_control.clock (net)
|
||||
0.09 0.01 0.01 ^ _463_/CLK (sky130_fd_sc_hd__dfrtp_2)
|
||||
0.25 0.26 clock uncertainty
|
||||
0.00 0.26 clock reconvergence pessimism
|
||||
-0.03 0.23 library hold time
|
||||
0.23 data required time
|
||||
-----------------------------------------------------------------------------
|
||||
0.23 data required time
|
||||
-0.53 data arrival time
|
||||
-----------------------------------------------------------------------------
|
||||
0.30 slack (MET)
|
||||
|
||||
|
||||
Startpoint: _455_ (rising edge-triggered flip-flop clocked by pll_control_clock)
|
||||
Endpoint: _456_ (rising edge-triggered flip-flop clocked by pll_control_clock)
|
||||
Path Group: pll_control_clock
|
||||
Path Type: min
|
||||
|
||||
Fanout Cap Slew Delay Time Description
|
||||
-----------------------------------------------------------------------------
|
||||
0.00 0.00 clock pll_control_clock (rise edge)
|
||||
0.00 0.00 clock source latency
|
||||
0.09 0.00 0.00 ^ ringosc.ibufp01/Y (sky130_fd_sc_hd__clkinv_8)
|
||||
24 0.08 pll_control.clock (net)
|
||||
0.09 0.01 0.01 ^ _455_/CLK (sky130_fd_sc_hd__dfrtp_2)
|
||||
0.06 0.35 0.36 ^ _455_/Q (sky130_fd_sc_hd__dfrtp_2)
|
||||
3 0.01 pll_control.prep[0] (net)
|
||||
0.06 0.00 0.36 ^ _345_/A0 (sky130_fd_sc_hd__mux2_2)
|
||||
0.03 0.13 0.49 ^ _345_/X (sky130_fd_sc_hd__mux2_2)
|
||||
1 0.00 _156_ (net)
|
||||
0.03 0.00 0.49 ^ _346_/A (sky130_fd_sc_hd__buf_2)
|
||||
0.03 0.08 0.57 ^ _346_/X (sky130_fd_sc_hd__buf_2)
|
||||
1 0.00 _024_ (net)
|
||||
0.03 0.00 0.57 ^ _456_/D (sky130_fd_sc_hd__dfrtp_2)
|
||||
0.57 data arrival time
|
||||
|
||||
0.00 0.00 clock pll_control_clock (rise edge)
|
||||
0.00 0.00 clock source latency
|
||||
0.09 0.00 0.00 ^ ringosc.ibufp01/Y (sky130_fd_sc_hd__clkinv_8)
|
||||
24 0.08 pll_control.clock (net)
|
||||
0.09 0.01 0.01 ^ _456_/CLK (sky130_fd_sc_hd__dfrtp_2)
|
||||
0.25 0.26 clock uncertainty
|
||||
0.00 0.26 clock reconvergence pessimism
|
||||
-0.02 0.23 library hold time
|
||||
0.23 data required time
|
||||
-----------------------------------------------------------------------------
|
||||
0.23 data required time
|
||||
-0.57 data arrival time
|
||||
-----------------------------------------------------------------------------
|
||||
0.34 slack (MET)
|
||||
|
||||
|
||||
min_report_end
|
||||
max_report
|
||||
|
||||
===========================================================================
|
||||
report_checks -path_delay max (Setup)
|
||||
============================================================================
|
||||
Startpoint: _459_ (rising edge-triggered flip-flop clocked by pll_control_clock)
|
||||
Endpoint: _467_ (rising edge-triggered flip-flop clocked by pll_control_clock)
|
||||
Path Group: pll_control_clock
|
||||
Path Type: max
|
||||
|
||||
Fanout Cap Slew Delay Time Description
|
||||
-----------------------------------------------------------------------------
|
||||
0.00 0.00 clock pll_control_clock (rise edge)
|
||||
0.00 0.00 clock source latency
|
||||
0.09 0.00 0.00 ^ ringosc.ibufp01/Y (sky130_fd_sc_hd__clkinv_8)
|
||||
24 0.08 pll_control.clock (net)
|
||||
0.09 0.01 0.01 ^ _459_/CLK (sky130_fd_sc_hd__dfrtp_2)
|
||||
0.11 0.51 0.51 v _459_/Q (sky130_fd_sc_hd__dfrtp_2)
|
||||
6 0.03 pll_control.count0[1] (net)
|
||||
0.11 0.00 0.51 v _233_/A (sky130_fd_sc_hd__xor2_2)
|
||||
0.10 0.24 0.76 v _233_/X (sky130_fd_sc_hd__xor2_2)
|
||||
3 0.02 _057_ (net)
|
||||
0.10 0.00 0.76 v _236_/A2 (sky130_fd_sc_hd__a211o_2)
|
||||
0.07 0.40 1.16 v _236_/X (sky130_fd_sc_hd__a211o_2)
|
||||
3 0.01 _060_ (net)
|
||||
0.07 0.00 1.16 v _240_/B (sky130_fd_sc_hd__and3_2)
|
||||
0.05 0.23 1.39 v _240_/X (sky130_fd_sc_hd__and3_2)
|
||||
2 0.01 _064_ (net)
|
||||
0.05 0.00 1.39 v _249_/A2 (sky130_fd_sc_hd__o32a_2)
|
||||
0.07 0.40 1.79 v _249_/X (sky130_fd_sc_hd__o32a_2)
|
||||
3 0.01 _073_ (net)
|
||||
0.07 0.00 1.79 v _260_/B1 (sky130_fd_sc_hd__o2111a_2)
|
||||
0.04 0.17 1.96 v _260_/X (sky130_fd_sc_hd__o2111a_2)
|
||||
1 0.00 _084_ (net)
|
||||
0.04 0.00 1.96 v _271_/A1 (sky130_fd_sc_hd__o31a_2)
|
||||
0.11 0.44 2.39 v _271_/X (sky130_fd_sc_hd__o31a_2)
|
||||
6 0.03 _095_ (net)
|
||||
0.11 0.00 2.39 v _285_/A (sky130_fd_sc_hd__and3_2)
|
||||
0.03 0.20 2.59 v _285_/X (sky130_fd_sc_hd__and3_2)
|
||||
1 0.00 _109_ (net)
|
||||
0.03 0.00 2.59 v _291_/A_N (sky130_fd_sc_hd__and3b_2)
|
||||
0.08 0.26 2.86 ^ _291_/X (sky130_fd_sc_hd__and3b_2)
|
||||
3 0.01 _115_ (net)
|
||||
0.08 0.00 2.86 ^ _292_/B1 (sky130_fd_sc_hd__o31a_2)
|
||||
0.05 0.16 3.01 ^ _292_/X (sky130_fd_sc_hd__o31a_2)
|
||||
2 0.01 _116_ (net)
|
||||
0.05 0.00 3.01 ^ _293_/A (sky130_fd_sc_hd__buf_2)
|
||||
0.15 0.20 3.21 ^ _293_/X (sky130_fd_sc_hd__buf_2)
|
||||
7 0.03 _117_ (net)
|
||||
0.15 0.00 3.21 ^ _317_/S (sky130_fd_sc_hd__mux2_2)
|
||||
0.05 0.36 3.57 v _317_/X (sky130_fd_sc_hd__mux2_2)
|
||||
1 0.00 _139_ (net)
|
||||
0.05 0.00 3.57 v _318_/A (sky130_fd_sc_hd__buf_2)
|
||||
0.02 0.12 3.69 v _318_/X (sky130_fd_sc_hd__buf_2)
|
||||
1 0.00 _035_ (net)
|
||||
0.02 0.00 3.69 v _467_/D (sky130_fd_sc_hd__dfrtp_2)
|
||||
3.69 data arrival time
|
||||
|
||||
6.67 6.67 clock pll_control_clock (rise edge)
|
||||
0.00 6.67 clock source latency
|
||||
0.09 0.00 6.67 ^ ringosc.ibufp01/Y (sky130_fd_sc_hd__clkinv_8)
|
||||
24 0.08 pll_control.clock (net)
|
||||
0.09 0.01 6.67 ^ _467_/CLK (sky130_fd_sc_hd__dfrtp_2)
|
||||
-0.25 6.42 clock uncertainty
|
||||
0.00 6.42 clock reconvergence pessimism
|
||||
-0.10 6.33 library setup time
|
||||
6.33 data required time
|
||||
-----------------------------------------------------------------------------
|
||||
6.33 data required time
|
||||
-3.69 data arrival time
|
||||
-----------------------------------------------------------------------------
|
||||
2.64 slack (MET)
|
||||
|
||||
|
||||
Startpoint: _459_ (rising edge-triggered flip-flop clocked by pll_control_clock)
|
||||
Endpoint: _468_ (rising edge-triggered flip-flop clocked by pll_control_clock)
|
||||
Path Group: pll_control_clock
|
||||
Path Type: max
|
||||
|
||||
Fanout Cap Slew Delay Time Description
|
||||
-----------------------------------------------------------------------------
|
||||
0.00 0.00 clock pll_control_clock (rise edge)
|
||||
0.00 0.00 clock source latency
|
||||
0.09 0.00 0.00 ^ ringosc.ibufp01/Y (sky130_fd_sc_hd__clkinv_8)
|
||||
24 0.08 pll_control.clock (net)
|
||||
0.09 0.01 0.01 ^ _459_/CLK (sky130_fd_sc_hd__dfrtp_2)
|
||||
0.11 0.51 0.51 v _459_/Q (sky130_fd_sc_hd__dfrtp_2)
|
||||
6 0.03 pll_control.count0[1] (net)
|
||||
0.11 0.00 0.51 v _233_/A (sky130_fd_sc_hd__xor2_2)
|
||||
0.10 0.24 0.76 v _233_/X (sky130_fd_sc_hd__xor2_2)
|
||||
3 0.02 _057_ (net)
|
||||
0.10 0.00 0.76 v _236_/A2 (sky130_fd_sc_hd__a211o_2)
|
||||
0.07 0.40 1.16 v _236_/X (sky130_fd_sc_hd__a211o_2)
|
||||
3 0.01 _060_ (net)
|
||||
0.07 0.00 1.16 v _240_/B (sky130_fd_sc_hd__and3_2)
|
||||
0.05 0.23 1.39 v _240_/X (sky130_fd_sc_hd__and3_2)
|
||||
2 0.01 _064_ (net)
|
||||
0.05 0.00 1.39 v _249_/A2 (sky130_fd_sc_hd__o32a_2)
|
||||
0.07 0.40 1.79 v _249_/X (sky130_fd_sc_hd__o32a_2)
|
||||
3 0.01 _073_ (net)
|
||||
0.07 0.00 1.79 v _260_/B1 (sky130_fd_sc_hd__o2111a_2)
|
||||
0.04 0.17 1.96 v _260_/X (sky130_fd_sc_hd__o2111a_2)
|
||||
1 0.00 _084_ (net)
|
||||
0.04 0.00 1.96 v _271_/A1 (sky130_fd_sc_hd__o31a_2)
|
||||
0.11 0.44 2.39 v _271_/X (sky130_fd_sc_hd__o31a_2)
|
||||
6 0.03 _095_ (net)
|
||||
0.11 0.00 2.39 v _285_/A (sky130_fd_sc_hd__and3_2)
|
||||
0.03 0.20 2.59 v _285_/X (sky130_fd_sc_hd__and3_2)
|
||||
1 0.00 _109_ (net)
|
||||
0.03 0.00 2.59 v _291_/A_N (sky130_fd_sc_hd__and3b_2)
|
||||
0.08 0.26 2.86 ^ _291_/X (sky130_fd_sc_hd__and3b_2)
|
||||
3 0.01 _115_ (net)
|
||||
0.08 0.00 2.86 ^ _292_/B1 (sky130_fd_sc_hd__o31a_2)
|
||||
0.05 0.16 3.01 ^ _292_/X (sky130_fd_sc_hd__o31a_2)
|
||||
2 0.01 _116_ (net)
|
||||
0.05 0.00 3.01 ^ _293_/A (sky130_fd_sc_hd__buf_2)
|
||||
0.15 0.20 3.21 ^ _293_/X (sky130_fd_sc_hd__buf_2)
|
||||
7 0.03 _117_ (net)
|
||||
0.15 0.00 3.21 ^ _314_/S (sky130_fd_sc_hd__mux2_2)
|
||||
0.05 0.36 3.57 v _314_/X (sky130_fd_sc_hd__mux2_2)
|
||||
1 0.00 _137_ (net)
|
||||
0.05 0.00 3.57 v _315_/A (sky130_fd_sc_hd__buf_2)
|
||||
0.02 0.12 3.69 v _315_/X (sky130_fd_sc_hd__buf_2)
|
||||
1 0.00 _036_ (net)
|
||||
0.02 0.00 3.69 v _468_/D (sky130_fd_sc_hd__dfrtp_2)
|
||||
3.69 data arrival time
|
||||
|
||||
6.67 6.67 clock pll_control_clock (rise edge)
|
||||
0.00 6.67 clock source latency
|
||||
0.09 0.00 6.67 ^ ringosc.ibufp01/Y (sky130_fd_sc_hd__clkinv_8)
|
||||
24 0.08 pll_control.clock (net)
|
||||
0.09 0.01 6.67 ^ _468_/CLK (sky130_fd_sc_hd__dfrtp_2)
|
||||
-0.25 6.42 clock uncertainty
|
||||
0.00 6.42 clock reconvergence pessimism
|
||||
-0.09 6.33 library setup time
|
||||
6.33 data required time
|
||||
-----------------------------------------------------------------------------
|
||||
6.33 data required time
|
||||
-3.69 data arrival time
|
||||
-----------------------------------------------------------------------------
|
||||
2.64 slack (MET)
|
||||
|
||||
|
||||
Startpoint: _459_ (rising edge-triggered flip-flop clocked by pll_control_clock)
|
||||
Endpoint: _464_ (rising edge-triggered flip-flop clocked by pll_control_clock)
|
||||
Path Group: pll_control_clock
|
||||
Path Type: max
|
||||
|
||||
Fanout Cap Slew Delay Time Description
|
||||
-----------------------------------------------------------------------------
|
||||
0.00 0.00 clock pll_control_clock (rise edge)
|
||||
0.00 0.00 clock source latency
|
||||
0.09 0.00 0.00 ^ ringosc.ibufp01/Y (sky130_fd_sc_hd__clkinv_8)
|
||||
24 0.08 pll_control.clock (net)
|
||||
0.09 0.01 0.01 ^ _459_/CLK (sky130_fd_sc_hd__dfrtp_2)
|
||||
0.11 0.51 0.51 v _459_/Q (sky130_fd_sc_hd__dfrtp_2)
|
||||
6 0.03 pll_control.count0[1] (net)
|
||||
0.11 0.00 0.51 v _233_/A (sky130_fd_sc_hd__xor2_2)
|
||||
0.10 0.24 0.76 v _233_/X (sky130_fd_sc_hd__xor2_2)
|
||||
3 0.02 _057_ (net)
|
||||
0.10 0.00 0.76 v _236_/A2 (sky130_fd_sc_hd__a211o_2)
|
||||
0.07 0.40 1.16 v _236_/X (sky130_fd_sc_hd__a211o_2)
|
||||
3 0.01 _060_ (net)
|
||||
0.07 0.00 1.16 v _240_/B (sky130_fd_sc_hd__and3_2)
|
||||
0.05 0.23 1.39 v _240_/X (sky130_fd_sc_hd__and3_2)
|
||||
2 0.01 _064_ (net)
|
||||
0.05 0.00 1.39 v _249_/A2 (sky130_fd_sc_hd__o32a_2)
|
||||
0.07 0.40 1.79 v _249_/X (sky130_fd_sc_hd__o32a_2)
|
||||
3 0.01 _073_ (net)
|
||||
0.07 0.00 1.79 v _260_/B1 (sky130_fd_sc_hd__o2111a_2)
|
||||
0.04 0.17 1.96 v _260_/X (sky130_fd_sc_hd__o2111a_2)
|
||||
1 0.00 _084_ (net)
|
||||
0.04 0.00 1.96 v _271_/A1 (sky130_fd_sc_hd__o31a_2)
|
||||
0.11 0.44 2.39 v _271_/X (sky130_fd_sc_hd__o31a_2)
|
||||
6 0.03 _095_ (net)
|
||||
0.11 0.00 2.39 v _285_/A (sky130_fd_sc_hd__and3_2)
|
||||
0.03 0.20 2.59 v _285_/X (sky130_fd_sc_hd__and3_2)
|
||||
1 0.00 _109_ (net)
|
||||
0.03 0.00 2.59 v _291_/A_N (sky130_fd_sc_hd__and3b_2)
|
||||
0.08 0.26 2.86 ^ _291_/X (sky130_fd_sc_hd__and3b_2)
|
||||
3 0.01 _115_ (net)
|
||||
0.08 0.00 2.86 ^ _292_/B1 (sky130_fd_sc_hd__o31a_2)
|
||||
0.05 0.16 3.01 ^ _292_/X (sky130_fd_sc_hd__o31a_2)
|
||||
2 0.01 _116_ (net)
|
||||
0.05 0.00 3.01 ^ _293_/A (sky130_fd_sc_hd__buf_2)
|
||||
0.15 0.20 3.21 ^ _293_/X (sky130_fd_sc_hd__buf_2)
|
||||
7 0.03 _117_ (net)
|
||||
0.15 0.00 3.21 ^ _326_/S (sky130_fd_sc_hd__mux2_2)
|
||||
0.04 0.36 3.57 v _326_/X (sky130_fd_sc_hd__mux2_2)
|
||||
1 0.00 _145_ (net)
|
||||
0.04 0.00 3.57 v _327_/A (sky130_fd_sc_hd__buf_2)
|
||||
0.02 0.12 3.69 v _327_/X (sky130_fd_sc_hd__buf_2)
|
||||
1 0.00 _032_ (net)
|
||||
0.02 0.00 3.69 v _464_/D (sky130_fd_sc_hd__dfrtp_2)
|
||||
3.69 data arrival time
|
||||
|
||||
6.67 6.67 clock pll_control_clock (rise edge)
|
||||
0.00 6.67 clock source latency
|
||||
0.09 0.00 6.67 ^ ringosc.ibufp01/Y (sky130_fd_sc_hd__clkinv_8)
|
||||
24 0.08 pll_control.clock (net)
|
||||
0.09 0.00 6.67 ^ _464_/CLK (sky130_fd_sc_hd__dfrtp_2)
|
||||
-0.25 6.42 clock uncertainty
|
||||
0.00 6.42 clock reconvergence pessimism
|
||||
-0.09 6.33 library setup time
|
||||
6.33 data required time
|
||||
-----------------------------------------------------------------------------
|
||||
6.33 data required time
|
||||
-3.69 data arrival time
|
||||
-----------------------------------------------------------------------------
|
||||
2.64 slack (MET)
|
||||
|
||||
|
||||
Startpoint: _459_ (rising edge-triggered flip-flop clocked by pll_control_clock)
|
||||
Endpoint: _469_ (rising edge-triggered flip-flop clocked by pll_control_clock)
|
||||
Path Group: pll_control_clock
|
||||
Path Type: max
|
||||
|
||||
Fanout Cap Slew Delay Time Description
|
||||
-----------------------------------------------------------------------------
|
||||
0.00 0.00 clock pll_control_clock (rise edge)
|
||||
0.00 0.00 clock source latency
|
||||
0.09 0.00 0.00 ^ ringosc.ibufp01/Y (sky130_fd_sc_hd__clkinv_8)
|
||||
24 0.08 pll_control.clock (net)
|
||||
0.09 0.01 0.01 ^ _459_/CLK (sky130_fd_sc_hd__dfrtp_2)
|
||||
0.11 0.51 0.51 v _459_/Q (sky130_fd_sc_hd__dfrtp_2)
|
||||
6 0.03 pll_control.count0[1] (net)
|
||||
0.11 0.00 0.51 v _233_/A (sky130_fd_sc_hd__xor2_2)
|
||||
0.10 0.24 0.76 v _233_/X (sky130_fd_sc_hd__xor2_2)
|
||||
3 0.02 _057_ (net)
|
||||
0.10 0.00 0.76 v _236_/A2 (sky130_fd_sc_hd__a211o_2)
|
||||
0.07 0.40 1.16 v _236_/X (sky130_fd_sc_hd__a211o_2)
|
||||
3 0.01 _060_ (net)
|
||||
0.07 0.00 1.16 v _240_/B (sky130_fd_sc_hd__and3_2)
|
||||
0.05 0.23 1.39 v _240_/X (sky130_fd_sc_hd__and3_2)
|
||||
2 0.01 _064_ (net)
|
||||
0.05 0.00 1.39 v _249_/A2 (sky130_fd_sc_hd__o32a_2)
|
||||
0.07 0.40 1.79 v _249_/X (sky130_fd_sc_hd__o32a_2)
|
||||
3 0.01 _073_ (net)
|
||||
0.07 0.00 1.79 v _260_/B1 (sky130_fd_sc_hd__o2111a_2)
|
||||
0.04 0.17 1.96 v _260_/X (sky130_fd_sc_hd__o2111a_2)
|
||||
1 0.00 _084_ (net)
|
||||
0.04 0.00 1.96 v _271_/A1 (sky130_fd_sc_hd__o31a_2)
|
||||
0.11 0.44 2.39 v _271_/X (sky130_fd_sc_hd__o31a_2)
|
||||
6 0.03 _095_ (net)
|
||||
0.11 0.00 2.39 v _304_/A1 (sky130_fd_sc_hd__a21o_2)
|
||||
0.07 0.27 2.66 v _304_/X (sky130_fd_sc_hd__a21o_2)
|
||||
3 0.02 _128_ (net)
|
||||
0.07 0.00 2.66 v _305_/A3 (sky130_fd_sc_hd__a32o_2)
|
||||
0.07 0.33 2.99 v _305_/X (sky130_fd_sc_hd__a32o_2)
|
||||
3 0.02 _129_ (net)
|
||||
0.07 0.00 2.99 v _307_/A3 (sky130_fd_sc_hd__a32o_2)
|
||||
0.06 0.31 3.30 v _307_/X (sky130_fd_sc_hd__a32o_2)
|
||||
2 0.01 _131_ (net)
|
||||
0.06 0.00 3.30 v _309_/A (sky130_fd_sc_hd__and2_2)
|
||||
0.04 0.18 3.47 v _309_/X (sky130_fd_sc_hd__and2_2)
|
||||
1 0.00 _133_ (net)
|
||||
0.04 0.00 3.47 v _311_/B1 (sky130_fd_sc_hd__o22a_2)
|
||||
0.04 0.20 3.67 v _311_/X (sky130_fd_sc_hd__o22a_2)
|
||||
1 0.00 _037_ (net)
|
||||
0.04 0.00 3.67 v _469_/D (sky130_fd_sc_hd__dfrtp_2)
|
||||
3.67 data arrival time
|
||||
|
||||
6.67 6.67 clock pll_control_clock (rise edge)
|
||||
0.00 6.67 clock source latency
|
||||
0.09 0.00 6.67 ^ ringosc.ibufp01/Y (sky130_fd_sc_hd__clkinv_8)
|
||||
24 0.08 pll_control.clock (net)
|
||||
0.09 0.01 6.67 ^ _469_/CLK (sky130_fd_sc_hd__dfrtp_2)
|
||||
-0.25 6.42 clock uncertainty
|
||||
0.00 6.42 clock reconvergence pessimism
|
||||
-0.10 6.32 library setup time
|
||||
6.32 data required time
|
||||
-----------------------------------------------------------------------------
|
||||
6.32 data required time
|
||||
-3.67 data arrival time
|
||||
-----------------------------------------------------------------------------
|
||||
2.65 slack (MET)
|
||||
|
||||
|
||||
Startpoint: _459_ (rising edge-triggered flip-flop clocked by pll_control_clock)
|
||||
Endpoint: _465_ (rising edge-triggered flip-flop clocked by pll_control_clock)
|
||||
Path Group: pll_control_clock
|
||||
Path Type: max
|
||||
|
||||
Fanout Cap Slew Delay Time Description
|
||||
-----------------------------------------------------------------------------
|
||||
0.00 0.00 clock pll_control_clock (rise edge)
|
||||
0.00 0.00 clock source latency
|
||||
0.09 0.00 0.00 ^ ringosc.ibufp01/Y (sky130_fd_sc_hd__clkinv_8)
|
||||
24 0.08 pll_control.clock (net)
|
||||
0.09 0.01 0.01 ^ _459_/CLK (sky130_fd_sc_hd__dfrtp_2)
|
||||
0.11 0.51 0.51 v _459_/Q (sky130_fd_sc_hd__dfrtp_2)
|
||||
6 0.03 pll_control.count0[1] (net)
|
||||
0.11 0.00 0.51 v _233_/A (sky130_fd_sc_hd__xor2_2)
|
||||
0.10 0.24 0.76 v _233_/X (sky130_fd_sc_hd__xor2_2)
|
||||
3 0.02 _057_ (net)
|
||||
0.10 0.00 0.76 v _236_/A2 (sky130_fd_sc_hd__a211o_2)
|
||||
0.07 0.40 1.16 v _236_/X (sky130_fd_sc_hd__a211o_2)
|
||||
3 0.01 _060_ (net)
|
||||
0.07 0.00 1.16 v _240_/B (sky130_fd_sc_hd__and3_2)
|
||||
0.05 0.23 1.39 v _240_/X (sky130_fd_sc_hd__and3_2)
|
||||
2 0.01 _064_ (net)
|
||||
0.05 0.00 1.39 v _249_/A2 (sky130_fd_sc_hd__o32a_2)
|
||||
0.07 0.40 1.79 v _249_/X (sky130_fd_sc_hd__o32a_2)
|
||||
3 0.01 _073_ (net)
|
||||
0.07 0.00 1.79 v _260_/B1 (sky130_fd_sc_hd__o2111a_2)
|
||||
0.04 0.17 1.96 v _260_/X (sky130_fd_sc_hd__o2111a_2)
|
||||
1 0.00 _084_ (net)
|
||||
0.04 0.00 1.96 v _271_/A1 (sky130_fd_sc_hd__o31a_2)
|
||||
0.11 0.44 2.39 v _271_/X (sky130_fd_sc_hd__o31a_2)
|
||||
6 0.03 _095_ (net)
|
||||
0.11 0.00 2.39 v _285_/A (sky130_fd_sc_hd__and3_2)
|
||||
0.03 0.20 2.59 v _285_/X (sky130_fd_sc_hd__and3_2)
|
||||
1 0.00 _109_ (net)
|
||||
0.03 0.00 2.59 v _291_/A_N (sky130_fd_sc_hd__and3b_2)
|
||||
0.08 0.26 2.86 ^ _291_/X (sky130_fd_sc_hd__and3b_2)
|
||||
3 0.01 _115_ (net)
|
||||
0.08 0.00 2.86 ^ _292_/B1 (sky130_fd_sc_hd__o31a_2)
|
||||
0.05 0.16 3.01 ^ _292_/X (sky130_fd_sc_hd__o31a_2)
|
||||
2 0.01 _116_ (net)
|
||||
0.05 0.00 3.01 ^ _293_/A (sky130_fd_sc_hd__buf_2)
|
||||
0.15 0.20 3.21 ^ _293_/X (sky130_fd_sc_hd__buf_2)
|
||||
7 0.03 _117_ (net)
|
||||
0.15 0.00 3.21 ^ _323_/A1_N (sky130_fd_sc_hd__o2bb2a_2)
|
||||
0.05 0.24 3.45 v _323_/X (sky130_fd_sc_hd__o2bb2a_2)
|
||||
1 0.00 _033_ (net)
|
||||
0.05 0.00 3.45 v _465_/D (sky130_fd_sc_hd__dfrtp_2)
|
||||
3.45 data arrival time
|
||||
|
||||
6.67 6.67 clock pll_control_clock (rise edge)
|
||||
0.00 6.67 clock source latency
|
||||
0.09 0.00 6.67 ^ ringosc.ibufp01/Y (sky130_fd_sc_hd__clkinv_8)
|
||||
24 0.08 pll_control.clock (net)
|
||||
0.09 0.01 6.67 ^ _465_/CLK (sky130_fd_sc_hd__dfrtp_2)
|
||||
-0.25 6.42 clock uncertainty
|
||||
0.00 6.42 clock reconvergence pessimism
|
||||
-0.10 6.32 library setup time
|
||||
6.32 data required time
|
||||
-----------------------------------------------------------------------------
|
||||
6.32 data required time
|
||||
-3.45 data arrival time
|
||||
-----------------------------------------------------------------------------
|
||||
2.87 slack (MET)
|
||||
|
||||
|
||||
max_report_end
|
||||
check_report
|
||||
|
||||
===========================================================================
|
||||
report_checks -unconstrained
|
||||
============================================================================
|
||||
Startpoint: _459_ (rising edge-triggered flip-flop clocked by pll_control_clock)
|
||||
Endpoint: _467_ (rising edge-triggered flip-flop clocked by pll_control_clock)
|
||||
Path Group: pll_control_clock
|
||||
Path Type: max
|
||||
|
||||
Fanout Cap Slew Delay Time Description
|
||||
-----------------------------------------------------------------------------
|
||||
0.00 0.00 clock pll_control_clock (rise edge)
|
||||
0.00 0.00 clock source latency
|
||||
0.09 0.00 0.00 ^ ringosc.ibufp01/Y (sky130_fd_sc_hd__clkinv_8)
|
||||
24 0.08 pll_control.clock (net)
|
||||
0.09 0.01 0.01 ^ _459_/CLK (sky130_fd_sc_hd__dfrtp_2)
|
||||
0.11 0.51 0.51 v _459_/Q (sky130_fd_sc_hd__dfrtp_2)
|
||||
6 0.03 pll_control.count0[1] (net)
|
||||
0.11 0.00 0.51 v _233_/A (sky130_fd_sc_hd__xor2_2)
|
||||
0.10 0.24 0.76 v _233_/X (sky130_fd_sc_hd__xor2_2)
|
||||
3 0.02 _057_ (net)
|
||||
0.10 0.00 0.76 v _236_/A2 (sky130_fd_sc_hd__a211o_2)
|
||||
0.07 0.40 1.16 v _236_/X (sky130_fd_sc_hd__a211o_2)
|
||||
3 0.01 _060_ (net)
|
||||
0.07 0.00 1.16 v _240_/B (sky130_fd_sc_hd__and3_2)
|
||||
0.05 0.23 1.39 v _240_/X (sky130_fd_sc_hd__and3_2)
|
||||
2 0.01 _064_ (net)
|
||||
0.05 0.00 1.39 v _249_/A2 (sky130_fd_sc_hd__o32a_2)
|
||||
0.07 0.40 1.79 v _249_/X (sky130_fd_sc_hd__o32a_2)
|
||||
3 0.01 _073_ (net)
|
||||
0.07 0.00 1.79 v _260_/B1 (sky130_fd_sc_hd__o2111a_2)
|
||||
0.04 0.17 1.96 v _260_/X (sky130_fd_sc_hd__o2111a_2)
|
||||
1 0.00 _084_ (net)
|
||||
0.04 0.00 1.96 v _271_/A1 (sky130_fd_sc_hd__o31a_2)
|
||||
0.11 0.44 2.39 v _271_/X (sky130_fd_sc_hd__o31a_2)
|
||||
6 0.03 _095_ (net)
|
||||
0.11 0.00 2.39 v _285_/A (sky130_fd_sc_hd__and3_2)
|
||||
0.03 0.20 2.59 v _285_/X (sky130_fd_sc_hd__and3_2)
|
||||
1 0.00 _109_ (net)
|
||||
0.03 0.00 2.59 v _291_/A_N (sky130_fd_sc_hd__and3b_2)
|
||||
0.08 0.26 2.86 ^ _291_/X (sky130_fd_sc_hd__and3b_2)
|
||||
3 0.01 _115_ (net)
|
||||
0.08 0.00 2.86 ^ _292_/B1 (sky130_fd_sc_hd__o31a_2)
|
||||
0.05 0.16 3.01 ^ _292_/X (sky130_fd_sc_hd__o31a_2)
|
||||
2 0.01 _116_ (net)
|
||||
0.05 0.00 3.01 ^ _293_/A (sky130_fd_sc_hd__buf_2)
|
||||
0.15 0.20 3.21 ^ _293_/X (sky130_fd_sc_hd__buf_2)
|
||||
7 0.03 _117_ (net)
|
||||
0.15 0.00 3.21 ^ _317_/S (sky130_fd_sc_hd__mux2_2)
|
||||
0.05 0.36 3.57 v _317_/X (sky130_fd_sc_hd__mux2_2)
|
||||
1 0.00 _139_ (net)
|
||||
0.05 0.00 3.57 v _318_/A (sky130_fd_sc_hd__buf_2)
|
||||
0.02 0.12 3.69 v _318_/X (sky130_fd_sc_hd__buf_2)
|
||||
1 0.00 _035_ (net)
|
||||
0.02 0.00 3.69 v _467_/D (sky130_fd_sc_hd__dfrtp_2)
|
||||
3.69 data arrival time
|
||||
|
||||
6.67 6.67 clock pll_control_clock (rise edge)
|
||||
0.00 6.67 clock source latency
|
||||
0.09 0.00 6.67 ^ ringosc.ibufp01/Y (sky130_fd_sc_hd__clkinv_8)
|
||||
24 0.08 pll_control.clock (net)
|
||||
0.09 0.01 6.67 ^ _467_/CLK (sky130_fd_sc_hd__dfrtp_2)
|
||||
-0.25 6.42 clock uncertainty
|
||||
0.00 6.42 clock reconvergence pessimism
|
||||
-0.10 6.33 library setup time
|
||||
6.33 data required time
|
||||
-----------------------------------------------------------------------------
|
||||
6.33 data required time
|
||||
-3.69 data arrival time
|
||||
-----------------------------------------------------------------------------
|
||||
2.64 slack (MET)
|
||||
|
||||
|
||||
|
||||
===========================================================================
|
||||
report_checks --slack_max -0.01
|
||||
============================================================================
|
||||
No paths found.
|
||||
check_report_end
|
||||
check_slew
|
||||
|
||||
===========================================================================
|
||||
report_check_types -max_slew -max_cap -max_fanout -violators
|
||||
============================================================================
|
||||
max fanout
|
||||
|
||||
Pin Limit Fanout Slack
|
||||
---------------------------------------------------------
|
||||
ringosc.ibufp01/Y 7 24 -17 (VIOLATED)
|
||||
dco 7 14 -7 (VIOLATED)
|
||||
_390_/X 7 14 -7 (VIOLATED)
|
||||
div[3] 7 8 (VIOLATED)
|
||||
_426_/X 7 8 (VIOLATED)
|
||||
|
||||
|
||||
===========================================================================
|
||||
max slew violation count 0
|
||||
max fanout violation count 5
|
||||
max cap violation count 0
|
||||
============================================================================
|
||||
check_slew_end
|
||||
tns_report
|
||||
|
||||
===========================================================================
|
||||
report_tns
|
||||
============================================================================
|
||||
tns 0.00
|
||||
tns_report_end
|
||||
wns_report
|
||||
|
||||
===========================================================================
|
||||
report_wns
|
||||
============================================================================
|
||||
wns 0.00
|
||||
wns_report_end
|
||||
worst_slack
|
||||
|
||||
===========================================================================
|
||||
report_worst_slack -max (Setup)
|
||||
============================================================================
|
||||
worst slack 2.64
|
||||
|
||||
===========================================================================
|
||||
report_worst_slack -min (Hold)
|
||||
============================================================================
|
||||
worst slack 0.11
|
||||
worst_slack_end
|
||||
power_report
|
||||
|
||||
===========================================================================
|
||||
report_power
|
||||
============================================================================
|
||||
Group Internal Switching Leakage Total
|
||||
Power Power Power Power (Watts)
|
||||
----------------------------------------------------------------
|
||||
Sequential 1.50e-04 1.79e-05 1.84e-10 1.68e-04 27.9%
|
||||
Combinational 1.88e-04 2.46e-04 1.88e-09 4.34e-04 72.1%
|
||||
Macro 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%
|
||||
Pad 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%
|
||||
----------------------------------------------------------------
|
||||
Total 3.38e-04 2.63e-04 2.06e-09 6.01e-04 100.0%
|
||||
56.2% 43.8% 0.0%
|
||||
power_report_end
|
||||
area_report
|
||||
|
||||
===========================================================================
|
||||
report_design_area
|
||||
============================================================================
|
||||
Design area 3781 u^2 68% utilization.
|
||||
area_report_end
|
||||
Setting global connections for newly added cells...
|
||||
[WARNING] Did not save OpenROAD database!
|
||||
Writing SDF to /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/routing/mca/process_corner_nom/digital_pll.sdf...
|
||||
|
|
@ -1,343 +0,0 @@
|
|||
|
||||
===========================================================================
|
||||
report_checks -path_delay max (Setup)
|
||||
============================================================================
|
||||
Startpoint: _459_ (rising edge-triggered flip-flop clocked by pll_control_clock)
|
||||
Endpoint: _467_ (rising edge-triggered flip-flop clocked by pll_control_clock)
|
||||
Path Group: pll_control_clock
|
||||
Path Type: max
|
||||
|
||||
Fanout Cap Slew Delay Time Description
|
||||
-----------------------------------------------------------------------------
|
||||
0.00 0.00 clock pll_control_clock (rise edge)
|
||||
0.00 0.00 clock source latency
|
||||
0.09 0.00 0.00 ^ ringosc.ibufp01/Y (sky130_fd_sc_hd__clkinv_8)
|
||||
24 0.08 pll_control.clock (net)
|
||||
0.09 0.01 0.01 ^ _459_/CLK (sky130_fd_sc_hd__dfrtp_2)
|
||||
0.11 0.51 0.51 v _459_/Q (sky130_fd_sc_hd__dfrtp_2)
|
||||
6 0.03 pll_control.count0[1] (net)
|
||||
0.11 0.00 0.51 v _233_/A (sky130_fd_sc_hd__xor2_2)
|
||||
0.10 0.24 0.76 v _233_/X (sky130_fd_sc_hd__xor2_2)
|
||||
3 0.02 _057_ (net)
|
||||
0.10 0.00 0.76 v _236_/A2 (sky130_fd_sc_hd__a211o_2)
|
||||
0.07 0.40 1.16 v _236_/X (sky130_fd_sc_hd__a211o_2)
|
||||
3 0.01 _060_ (net)
|
||||
0.07 0.00 1.16 v _240_/B (sky130_fd_sc_hd__and3_2)
|
||||
0.05 0.23 1.39 v _240_/X (sky130_fd_sc_hd__and3_2)
|
||||
2 0.01 _064_ (net)
|
||||
0.05 0.00 1.39 v _249_/A2 (sky130_fd_sc_hd__o32a_2)
|
||||
0.07 0.40 1.79 v _249_/X (sky130_fd_sc_hd__o32a_2)
|
||||
3 0.01 _073_ (net)
|
||||
0.07 0.00 1.79 v _260_/B1 (sky130_fd_sc_hd__o2111a_2)
|
||||
0.04 0.17 1.96 v _260_/X (sky130_fd_sc_hd__o2111a_2)
|
||||
1 0.00 _084_ (net)
|
||||
0.04 0.00 1.96 v _271_/A1 (sky130_fd_sc_hd__o31a_2)
|
||||
0.11 0.44 2.39 v _271_/X (sky130_fd_sc_hd__o31a_2)
|
||||
6 0.03 _095_ (net)
|
||||
0.11 0.00 2.39 v _285_/A (sky130_fd_sc_hd__and3_2)
|
||||
0.03 0.20 2.59 v _285_/X (sky130_fd_sc_hd__and3_2)
|
||||
1 0.00 _109_ (net)
|
||||
0.03 0.00 2.59 v _291_/A_N (sky130_fd_sc_hd__and3b_2)
|
||||
0.08 0.26 2.86 ^ _291_/X (sky130_fd_sc_hd__and3b_2)
|
||||
3 0.01 _115_ (net)
|
||||
0.08 0.00 2.86 ^ _292_/B1 (sky130_fd_sc_hd__o31a_2)
|
||||
0.05 0.16 3.01 ^ _292_/X (sky130_fd_sc_hd__o31a_2)
|
||||
2 0.01 _116_ (net)
|
||||
0.05 0.00 3.01 ^ _293_/A (sky130_fd_sc_hd__buf_2)
|
||||
0.15 0.20 3.21 ^ _293_/X (sky130_fd_sc_hd__buf_2)
|
||||
7 0.03 _117_ (net)
|
||||
0.15 0.00 3.21 ^ _317_/S (sky130_fd_sc_hd__mux2_2)
|
||||
0.05 0.36 3.57 v _317_/X (sky130_fd_sc_hd__mux2_2)
|
||||
1 0.00 _139_ (net)
|
||||
0.05 0.00 3.57 v _318_/A (sky130_fd_sc_hd__buf_2)
|
||||
0.02 0.12 3.69 v _318_/X (sky130_fd_sc_hd__buf_2)
|
||||
1 0.00 _035_ (net)
|
||||
0.02 0.00 3.69 v _467_/D (sky130_fd_sc_hd__dfrtp_2)
|
||||
3.69 data arrival time
|
||||
|
||||
6.67 6.67 clock pll_control_clock (rise edge)
|
||||
0.00 6.67 clock source latency
|
||||
0.09 0.00 6.67 ^ ringosc.ibufp01/Y (sky130_fd_sc_hd__clkinv_8)
|
||||
24 0.08 pll_control.clock (net)
|
||||
0.09 0.01 6.67 ^ _467_/CLK (sky130_fd_sc_hd__dfrtp_2)
|
||||
-0.25 6.42 clock uncertainty
|
||||
0.00 6.42 clock reconvergence pessimism
|
||||
-0.10 6.33 library setup time
|
||||
6.33 data required time
|
||||
-----------------------------------------------------------------------------
|
||||
6.33 data required time
|
||||
-3.69 data arrival time
|
||||
-----------------------------------------------------------------------------
|
||||
2.64 slack (MET)
|
||||
|
||||
|
||||
Startpoint: _459_ (rising edge-triggered flip-flop clocked by pll_control_clock)
|
||||
Endpoint: _468_ (rising edge-triggered flip-flop clocked by pll_control_clock)
|
||||
Path Group: pll_control_clock
|
||||
Path Type: max
|
||||
|
||||
Fanout Cap Slew Delay Time Description
|
||||
-----------------------------------------------------------------------------
|
||||
0.00 0.00 clock pll_control_clock (rise edge)
|
||||
0.00 0.00 clock source latency
|
||||
0.09 0.00 0.00 ^ ringosc.ibufp01/Y (sky130_fd_sc_hd__clkinv_8)
|
||||
24 0.08 pll_control.clock (net)
|
||||
0.09 0.01 0.01 ^ _459_/CLK (sky130_fd_sc_hd__dfrtp_2)
|
||||
0.11 0.51 0.51 v _459_/Q (sky130_fd_sc_hd__dfrtp_2)
|
||||
6 0.03 pll_control.count0[1] (net)
|
||||
0.11 0.00 0.51 v _233_/A (sky130_fd_sc_hd__xor2_2)
|
||||
0.10 0.24 0.76 v _233_/X (sky130_fd_sc_hd__xor2_2)
|
||||
3 0.02 _057_ (net)
|
||||
0.10 0.00 0.76 v _236_/A2 (sky130_fd_sc_hd__a211o_2)
|
||||
0.07 0.40 1.16 v _236_/X (sky130_fd_sc_hd__a211o_2)
|
||||
3 0.01 _060_ (net)
|
||||
0.07 0.00 1.16 v _240_/B (sky130_fd_sc_hd__and3_2)
|
||||
0.05 0.23 1.39 v _240_/X (sky130_fd_sc_hd__and3_2)
|
||||
2 0.01 _064_ (net)
|
||||
0.05 0.00 1.39 v _249_/A2 (sky130_fd_sc_hd__o32a_2)
|
||||
0.07 0.40 1.79 v _249_/X (sky130_fd_sc_hd__o32a_2)
|
||||
3 0.01 _073_ (net)
|
||||
0.07 0.00 1.79 v _260_/B1 (sky130_fd_sc_hd__o2111a_2)
|
||||
0.04 0.17 1.96 v _260_/X (sky130_fd_sc_hd__o2111a_2)
|
||||
1 0.00 _084_ (net)
|
||||
0.04 0.00 1.96 v _271_/A1 (sky130_fd_sc_hd__o31a_2)
|
||||
0.11 0.44 2.39 v _271_/X (sky130_fd_sc_hd__o31a_2)
|
||||
6 0.03 _095_ (net)
|
||||
0.11 0.00 2.39 v _285_/A (sky130_fd_sc_hd__and3_2)
|
||||
0.03 0.20 2.59 v _285_/X (sky130_fd_sc_hd__and3_2)
|
||||
1 0.00 _109_ (net)
|
||||
0.03 0.00 2.59 v _291_/A_N (sky130_fd_sc_hd__and3b_2)
|
||||
0.08 0.26 2.86 ^ _291_/X (sky130_fd_sc_hd__and3b_2)
|
||||
3 0.01 _115_ (net)
|
||||
0.08 0.00 2.86 ^ _292_/B1 (sky130_fd_sc_hd__o31a_2)
|
||||
0.05 0.16 3.01 ^ _292_/X (sky130_fd_sc_hd__o31a_2)
|
||||
2 0.01 _116_ (net)
|
||||
0.05 0.00 3.01 ^ _293_/A (sky130_fd_sc_hd__buf_2)
|
||||
0.15 0.20 3.21 ^ _293_/X (sky130_fd_sc_hd__buf_2)
|
||||
7 0.03 _117_ (net)
|
||||
0.15 0.00 3.21 ^ _314_/S (sky130_fd_sc_hd__mux2_2)
|
||||
0.05 0.36 3.57 v _314_/X (sky130_fd_sc_hd__mux2_2)
|
||||
1 0.00 _137_ (net)
|
||||
0.05 0.00 3.57 v _315_/A (sky130_fd_sc_hd__buf_2)
|
||||
0.02 0.12 3.69 v _315_/X (sky130_fd_sc_hd__buf_2)
|
||||
1 0.00 _036_ (net)
|
||||
0.02 0.00 3.69 v _468_/D (sky130_fd_sc_hd__dfrtp_2)
|
||||
3.69 data arrival time
|
||||
|
||||
6.67 6.67 clock pll_control_clock (rise edge)
|
||||
0.00 6.67 clock source latency
|
||||
0.09 0.00 6.67 ^ ringosc.ibufp01/Y (sky130_fd_sc_hd__clkinv_8)
|
||||
24 0.08 pll_control.clock (net)
|
||||
0.09 0.01 6.67 ^ _468_/CLK (sky130_fd_sc_hd__dfrtp_2)
|
||||
-0.25 6.42 clock uncertainty
|
||||
0.00 6.42 clock reconvergence pessimism
|
||||
-0.09 6.33 library setup time
|
||||
6.33 data required time
|
||||
-----------------------------------------------------------------------------
|
||||
6.33 data required time
|
||||
-3.69 data arrival time
|
||||
-----------------------------------------------------------------------------
|
||||
2.64 slack (MET)
|
||||
|
||||
|
||||
Startpoint: _459_ (rising edge-triggered flip-flop clocked by pll_control_clock)
|
||||
Endpoint: _464_ (rising edge-triggered flip-flop clocked by pll_control_clock)
|
||||
Path Group: pll_control_clock
|
||||
Path Type: max
|
||||
|
||||
Fanout Cap Slew Delay Time Description
|
||||
-----------------------------------------------------------------------------
|
||||
0.00 0.00 clock pll_control_clock (rise edge)
|
||||
0.00 0.00 clock source latency
|
||||
0.09 0.00 0.00 ^ ringosc.ibufp01/Y (sky130_fd_sc_hd__clkinv_8)
|
||||
24 0.08 pll_control.clock (net)
|
||||
0.09 0.01 0.01 ^ _459_/CLK (sky130_fd_sc_hd__dfrtp_2)
|
||||
0.11 0.51 0.51 v _459_/Q (sky130_fd_sc_hd__dfrtp_2)
|
||||
6 0.03 pll_control.count0[1] (net)
|
||||
0.11 0.00 0.51 v _233_/A (sky130_fd_sc_hd__xor2_2)
|
||||
0.10 0.24 0.76 v _233_/X (sky130_fd_sc_hd__xor2_2)
|
||||
3 0.02 _057_ (net)
|
||||
0.10 0.00 0.76 v _236_/A2 (sky130_fd_sc_hd__a211o_2)
|
||||
0.07 0.40 1.16 v _236_/X (sky130_fd_sc_hd__a211o_2)
|
||||
3 0.01 _060_ (net)
|
||||
0.07 0.00 1.16 v _240_/B (sky130_fd_sc_hd__and3_2)
|
||||
0.05 0.23 1.39 v _240_/X (sky130_fd_sc_hd__and3_2)
|
||||
2 0.01 _064_ (net)
|
||||
0.05 0.00 1.39 v _249_/A2 (sky130_fd_sc_hd__o32a_2)
|
||||
0.07 0.40 1.79 v _249_/X (sky130_fd_sc_hd__o32a_2)
|
||||
3 0.01 _073_ (net)
|
||||
0.07 0.00 1.79 v _260_/B1 (sky130_fd_sc_hd__o2111a_2)
|
||||
0.04 0.17 1.96 v _260_/X (sky130_fd_sc_hd__o2111a_2)
|
||||
1 0.00 _084_ (net)
|
||||
0.04 0.00 1.96 v _271_/A1 (sky130_fd_sc_hd__o31a_2)
|
||||
0.11 0.44 2.39 v _271_/X (sky130_fd_sc_hd__o31a_2)
|
||||
6 0.03 _095_ (net)
|
||||
0.11 0.00 2.39 v _285_/A (sky130_fd_sc_hd__and3_2)
|
||||
0.03 0.20 2.59 v _285_/X (sky130_fd_sc_hd__and3_2)
|
||||
1 0.00 _109_ (net)
|
||||
0.03 0.00 2.59 v _291_/A_N (sky130_fd_sc_hd__and3b_2)
|
||||
0.08 0.26 2.86 ^ _291_/X (sky130_fd_sc_hd__and3b_2)
|
||||
3 0.01 _115_ (net)
|
||||
0.08 0.00 2.86 ^ _292_/B1 (sky130_fd_sc_hd__o31a_2)
|
||||
0.05 0.16 3.01 ^ _292_/X (sky130_fd_sc_hd__o31a_2)
|
||||
2 0.01 _116_ (net)
|
||||
0.05 0.00 3.01 ^ _293_/A (sky130_fd_sc_hd__buf_2)
|
||||
0.15 0.20 3.21 ^ _293_/X (sky130_fd_sc_hd__buf_2)
|
||||
7 0.03 _117_ (net)
|
||||
0.15 0.00 3.21 ^ _326_/S (sky130_fd_sc_hd__mux2_2)
|
||||
0.04 0.36 3.57 v _326_/X (sky130_fd_sc_hd__mux2_2)
|
||||
1 0.00 _145_ (net)
|
||||
0.04 0.00 3.57 v _327_/A (sky130_fd_sc_hd__buf_2)
|
||||
0.02 0.12 3.69 v _327_/X (sky130_fd_sc_hd__buf_2)
|
||||
1 0.00 _032_ (net)
|
||||
0.02 0.00 3.69 v _464_/D (sky130_fd_sc_hd__dfrtp_2)
|
||||
3.69 data arrival time
|
||||
|
||||
6.67 6.67 clock pll_control_clock (rise edge)
|
||||
0.00 6.67 clock source latency
|
||||
0.09 0.00 6.67 ^ ringosc.ibufp01/Y (sky130_fd_sc_hd__clkinv_8)
|
||||
24 0.08 pll_control.clock (net)
|
||||
0.09 0.00 6.67 ^ _464_/CLK (sky130_fd_sc_hd__dfrtp_2)
|
||||
-0.25 6.42 clock uncertainty
|
||||
0.00 6.42 clock reconvergence pessimism
|
||||
-0.09 6.33 library setup time
|
||||
6.33 data required time
|
||||
-----------------------------------------------------------------------------
|
||||
6.33 data required time
|
||||
-3.69 data arrival time
|
||||
-----------------------------------------------------------------------------
|
||||
2.64 slack (MET)
|
||||
|
||||
|
||||
Startpoint: _459_ (rising edge-triggered flip-flop clocked by pll_control_clock)
|
||||
Endpoint: _469_ (rising edge-triggered flip-flop clocked by pll_control_clock)
|
||||
Path Group: pll_control_clock
|
||||
Path Type: max
|
||||
|
||||
Fanout Cap Slew Delay Time Description
|
||||
-----------------------------------------------------------------------------
|
||||
0.00 0.00 clock pll_control_clock (rise edge)
|
||||
0.00 0.00 clock source latency
|
||||
0.09 0.00 0.00 ^ ringosc.ibufp01/Y (sky130_fd_sc_hd__clkinv_8)
|
||||
24 0.08 pll_control.clock (net)
|
||||
0.09 0.01 0.01 ^ _459_/CLK (sky130_fd_sc_hd__dfrtp_2)
|
||||
0.11 0.51 0.51 v _459_/Q (sky130_fd_sc_hd__dfrtp_2)
|
||||
6 0.03 pll_control.count0[1] (net)
|
||||
0.11 0.00 0.51 v _233_/A (sky130_fd_sc_hd__xor2_2)
|
||||
0.10 0.24 0.76 v _233_/X (sky130_fd_sc_hd__xor2_2)
|
||||
3 0.02 _057_ (net)
|
||||
0.10 0.00 0.76 v _236_/A2 (sky130_fd_sc_hd__a211o_2)
|
||||
0.07 0.40 1.16 v _236_/X (sky130_fd_sc_hd__a211o_2)
|
||||
3 0.01 _060_ (net)
|
||||
0.07 0.00 1.16 v _240_/B (sky130_fd_sc_hd__and3_2)
|
||||
0.05 0.23 1.39 v _240_/X (sky130_fd_sc_hd__and3_2)
|
||||
2 0.01 _064_ (net)
|
||||
0.05 0.00 1.39 v _249_/A2 (sky130_fd_sc_hd__o32a_2)
|
||||
0.07 0.40 1.79 v _249_/X (sky130_fd_sc_hd__o32a_2)
|
||||
3 0.01 _073_ (net)
|
||||
0.07 0.00 1.79 v _260_/B1 (sky130_fd_sc_hd__o2111a_2)
|
||||
0.04 0.17 1.96 v _260_/X (sky130_fd_sc_hd__o2111a_2)
|
||||
1 0.00 _084_ (net)
|
||||
0.04 0.00 1.96 v _271_/A1 (sky130_fd_sc_hd__o31a_2)
|
||||
0.11 0.44 2.39 v _271_/X (sky130_fd_sc_hd__o31a_2)
|
||||
6 0.03 _095_ (net)
|
||||
0.11 0.00 2.39 v _304_/A1 (sky130_fd_sc_hd__a21o_2)
|
||||
0.07 0.27 2.66 v _304_/X (sky130_fd_sc_hd__a21o_2)
|
||||
3 0.02 _128_ (net)
|
||||
0.07 0.00 2.66 v _305_/A3 (sky130_fd_sc_hd__a32o_2)
|
||||
0.07 0.33 2.99 v _305_/X (sky130_fd_sc_hd__a32o_2)
|
||||
3 0.02 _129_ (net)
|
||||
0.07 0.00 2.99 v _307_/A3 (sky130_fd_sc_hd__a32o_2)
|
||||
0.06 0.31 3.30 v _307_/X (sky130_fd_sc_hd__a32o_2)
|
||||
2 0.01 _131_ (net)
|
||||
0.06 0.00 3.30 v _309_/A (sky130_fd_sc_hd__and2_2)
|
||||
0.04 0.18 3.47 v _309_/X (sky130_fd_sc_hd__and2_2)
|
||||
1 0.00 _133_ (net)
|
||||
0.04 0.00 3.47 v _311_/B1 (sky130_fd_sc_hd__o22a_2)
|
||||
0.04 0.20 3.67 v _311_/X (sky130_fd_sc_hd__o22a_2)
|
||||
1 0.00 _037_ (net)
|
||||
0.04 0.00 3.67 v _469_/D (sky130_fd_sc_hd__dfrtp_2)
|
||||
3.67 data arrival time
|
||||
|
||||
6.67 6.67 clock pll_control_clock (rise edge)
|
||||
0.00 6.67 clock source latency
|
||||
0.09 0.00 6.67 ^ ringosc.ibufp01/Y (sky130_fd_sc_hd__clkinv_8)
|
||||
24 0.08 pll_control.clock (net)
|
||||
0.09 0.01 6.67 ^ _469_/CLK (sky130_fd_sc_hd__dfrtp_2)
|
||||
-0.25 6.42 clock uncertainty
|
||||
0.00 6.42 clock reconvergence pessimism
|
||||
-0.10 6.32 library setup time
|
||||
6.32 data required time
|
||||
-----------------------------------------------------------------------------
|
||||
6.32 data required time
|
||||
-3.67 data arrival time
|
||||
-----------------------------------------------------------------------------
|
||||
2.65 slack (MET)
|
||||
|
||||
|
||||
Startpoint: _459_ (rising edge-triggered flip-flop clocked by pll_control_clock)
|
||||
Endpoint: _465_ (rising edge-triggered flip-flop clocked by pll_control_clock)
|
||||
Path Group: pll_control_clock
|
||||
Path Type: max
|
||||
|
||||
Fanout Cap Slew Delay Time Description
|
||||
-----------------------------------------------------------------------------
|
||||
0.00 0.00 clock pll_control_clock (rise edge)
|
||||
0.00 0.00 clock source latency
|
||||
0.09 0.00 0.00 ^ ringosc.ibufp01/Y (sky130_fd_sc_hd__clkinv_8)
|
||||
24 0.08 pll_control.clock (net)
|
||||
0.09 0.01 0.01 ^ _459_/CLK (sky130_fd_sc_hd__dfrtp_2)
|
||||
0.11 0.51 0.51 v _459_/Q (sky130_fd_sc_hd__dfrtp_2)
|
||||
6 0.03 pll_control.count0[1] (net)
|
||||
0.11 0.00 0.51 v _233_/A (sky130_fd_sc_hd__xor2_2)
|
||||
0.10 0.24 0.76 v _233_/X (sky130_fd_sc_hd__xor2_2)
|
||||
3 0.02 _057_ (net)
|
||||
0.10 0.00 0.76 v _236_/A2 (sky130_fd_sc_hd__a211o_2)
|
||||
0.07 0.40 1.16 v _236_/X (sky130_fd_sc_hd__a211o_2)
|
||||
3 0.01 _060_ (net)
|
||||
0.07 0.00 1.16 v _240_/B (sky130_fd_sc_hd__and3_2)
|
||||
0.05 0.23 1.39 v _240_/X (sky130_fd_sc_hd__and3_2)
|
||||
2 0.01 _064_ (net)
|
||||
0.05 0.00 1.39 v _249_/A2 (sky130_fd_sc_hd__o32a_2)
|
||||
0.07 0.40 1.79 v _249_/X (sky130_fd_sc_hd__o32a_2)
|
||||
3 0.01 _073_ (net)
|
||||
0.07 0.00 1.79 v _260_/B1 (sky130_fd_sc_hd__o2111a_2)
|
||||
0.04 0.17 1.96 v _260_/X (sky130_fd_sc_hd__o2111a_2)
|
||||
1 0.00 _084_ (net)
|
||||
0.04 0.00 1.96 v _271_/A1 (sky130_fd_sc_hd__o31a_2)
|
||||
0.11 0.44 2.39 v _271_/X (sky130_fd_sc_hd__o31a_2)
|
||||
6 0.03 _095_ (net)
|
||||
0.11 0.00 2.39 v _285_/A (sky130_fd_sc_hd__and3_2)
|
||||
0.03 0.20 2.59 v _285_/X (sky130_fd_sc_hd__and3_2)
|
||||
1 0.00 _109_ (net)
|
||||
0.03 0.00 2.59 v _291_/A_N (sky130_fd_sc_hd__and3b_2)
|
||||
0.08 0.26 2.86 ^ _291_/X (sky130_fd_sc_hd__and3b_2)
|
||||
3 0.01 _115_ (net)
|
||||
0.08 0.00 2.86 ^ _292_/B1 (sky130_fd_sc_hd__o31a_2)
|
||||
0.05 0.16 3.01 ^ _292_/X (sky130_fd_sc_hd__o31a_2)
|
||||
2 0.01 _116_ (net)
|
||||
0.05 0.00 3.01 ^ _293_/A (sky130_fd_sc_hd__buf_2)
|
||||
0.15 0.20 3.21 ^ _293_/X (sky130_fd_sc_hd__buf_2)
|
||||
7 0.03 _117_ (net)
|
||||
0.15 0.00 3.21 ^ _323_/A1_N (sky130_fd_sc_hd__o2bb2a_2)
|
||||
0.05 0.24 3.45 v _323_/X (sky130_fd_sc_hd__o2bb2a_2)
|
||||
1 0.00 _033_ (net)
|
||||
0.05 0.00 3.45 v _465_/D (sky130_fd_sc_hd__dfrtp_2)
|
||||
3.45 data arrival time
|
||||
|
||||
6.67 6.67 clock pll_control_clock (rise edge)
|
||||
0.00 6.67 clock source latency
|
||||
0.09 0.00 6.67 ^ ringosc.ibufp01/Y (sky130_fd_sc_hd__clkinv_8)
|
||||
24 0.08 pll_control.clock (net)
|
||||
0.09 0.01 6.67 ^ _465_/CLK (sky130_fd_sc_hd__dfrtp_2)
|
||||
-0.25 6.42 clock uncertainty
|
||||
0.00 6.42 clock reconvergence pessimism
|
||||
-0.10 6.32 library setup time
|
||||
6.32 data required time
|
||||
-----------------------------------------------------------------------------
|
||||
6.32 data required time
|
||||
-3.45 data arrival time
|
||||
-----------------------------------------------------------------------------
|
||||
2.87 slack (MET)
|
||||
|
||||
|
||||
|
|
@ -1,181 +0,0 @@
|
|||
|
||||
===========================================================================
|
||||
report_checks -path_delay min (Hold)
|
||||
============================================================================
|
||||
Startpoint: _470_ (rising edge-triggered flip-flop clocked by pll_control_clock)
|
||||
Endpoint: _471_ (rising edge-triggered flip-flop clocked by pll_control_clock)
|
||||
Path Group: pll_control_clock
|
||||
Path Type: min
|
||||
|
||||
Fanout Cap Slew Delay Time Description
|
||||
-----------------------------------------------------------------------------
|
||||
0.00 0.00 clock pll_control_clock (rise edge)
|
||||
0.00 0.00 clock source latency
|
||||
0.09 0.00 0.00 ^ ringosc.ibufp01/Y (sky130_fd_sc_hd__clkinv_8)
|
||||
24 0.08 pll_control.clock (net)
|
||||
0.09 0.01 0.01 ^ _470_/CLK (sky130_fd_sc_hd__dfrtp_2)
|
||||
0.04 0.33 0.34 ^ _470_/Q (sky130_fd_sc_hd__dfrtp_2)
|
||||
1 0.00 pll_control.oscbuf[0] (net)
|
||||
0.04 0.00 0.34 ^ _471_/D (sky130_fd_sc_hd__dfrtp_2)
|
||||
0.34 data arrival time
|
||||
|
||||
0.00 0.00 clock pll_control_clock (rise edge)
|
||||
0.00 0.00 clock source latency
|
||||
0.09 0.00 0.00 ^ ringosc.ibufp01/Y (sky130_fd_sc_hd__clkinv_8)
|
||||
24 0.08 pll_control.clock (net)
|
||||
0.09 0.01 0.01 ^ _471_/CLK (sky130_fd_sc_hd__dfrtp_2)
|
||||
0.25 0.26 clock uncertainty
|
||||
0.00 0.26 clock reconvergence pessimism
|
||||
-0.03 0.23 library hold time
|
||||
0.23 data required time
|
||||
-----------------------------------------------------------------------------
|
||||
0.23 data required time
|
||||
-0.34 data arrival time
|
||||
-----------------------------------------------------------------------------
|
||||
0.11 slack (MET)
|
||||
|
||||
|
||||
Startpoint: _471_ (rising edge-triggered flip-flop clocked by pll_control_clock)
|
||||
Endpoint: _472_ (rising edge-triggered flip-flop clocked by pll_control_clock)
|
||||
Path Group: pll_control_clock
|
||||
Path Type: min
|
||||
|
||||
Fanout Cap Slew Delay Time Description
|
||||
-----------------------------------------------------------------------------
|
||||
0.00 0.00 clock pll_control_clock (rise edge)
|
||||
0.00 0.00 clock source latency
|
||||
0.09 0.00 0.00 ^ ringosc.ibufp01/Y (sky130_fd_sc_hd__clkinv_8)
|
||||
24 0.08 pll_control.clock (net)
|
||||
0.09 0.01 0.01 ^ _471_/CLK (sky130_fd_sc_hd__dfrtp_2)
|
||||
0.09 0.38 0.39 ^ _471_/Q (sky130_fd_sc_hd__dfrtp_2)
|
||||
2 0.02 pll_control.oscbuf[1] (net)
|
||||
0.09 0.00 0.39 ^ _472_/D (sky130_fd_sc_hd__dfrtp_2)
|
||||
0.39 data arrival time
|
||||
|
||||
0.00 0.00 clock pll_control_clock (rise edge)
|
||||
0.00 0.00 clock source latency
|
||||
0.09 0.00 0.00 ^ ringosc.ibufp01/Y (sky130_fd_sc_hd__clkinv_8)
|
||||
24 0.08 pll_control.clock (net)
|
||||
0.09 0.01 0.01 ^ _472_/CLK (sky130_fd_sc_hd__dfrtp_2)
|
||||
0.25 0.26 clock uncertainty
|
||||
0.00 0.26 clock reconvergence pessimism
|
||||
-0.04 0.22 library hold time
|
||||
0.22 data required time
|
||||
-----------------------------------------------------------------------------
|
||||
0.22 data required time
|
||||
-0.39 data arrival time
|
||||
-----------------------------------------------------------------------------
|
||||
0.17 slack (MET)
|
||||
|
||||
|
||||
Startpoint: _455_ (rising edge-triggered flip-flop clocked by pll_control_clock)
|
||||
Endpoint: _455_ (rising edge-triggered flip-flop clocked by pll_control_clock)
|
||||
Path Group: pll_control_clock
|
||||
Path Type: min
|
||||
|
||||
Fanout Cap Slew Delay Time Description
|
||||
-----------------------------------------------------------------------------
|
||||
0.00 0.00 clock pll_control_clock (rise edge)
|
||||
0.00 0.00 clock source latency
|
||||
0.09 0.00 0.00 ^ ringosc.ibufp01/Y (sky130_fd_sc_hd__clkinv_8)
|
||||
24 0.08 pll_control.clock (net)
|
||||
0.09 0.01 0.01 ^ _455_/CLK (sky130_fd_sc_hd__dfrtp_2)
|
||||
0.06 0.35 0.36 ^ _455_/Q (sky130_fd_sc_hd__dfrtp_2)
|
||||
3 0.01 pll_control.prep[0] (net)
|
||||
0.06 0.00 0.36 ^ _347_/A_N (sky130_fd_sc_hd__nand2b_2)
|
||||
0.04 0.11 0.46 ^ _347_/Y (sky130_fd_sc_hd__nand2b_2)
|
||||
1 0.00 _023_ (net)
|
||||
0.04 0.00 0.46 ^ _455_/D (sky130_fd_sc_hd__dfrtp_2)
|
||||
0.46 data arrival time
|
||||
|
||||
0.00 0.00 clock pll_control_clock (rise edge)
|
||||
0.00 0.00 clock source latency
|
||||
0.09 0.00 0.00 ^ ringosc.ibufp01/Y (sky130_fd_sc_hd__clkinv_8)
|
||||
24 0.08 pll_control.clock (net)
|
||||
0.09 0.01 0.01 ^ _455_/CLK (sky130_fd_sc_hd__dfrtp_2)
|
||||
0.25 0.26 clock uncertainty
|
||||
0.00 0.26 clock reconvergence pessimism
|
||||
-0.03 0.23 library hold time
|
||||
0.23 data required time
|
||||
-----------------------------------------------------------------------------
|
||||
0.23 data required time
|
||||
-0.46 data arrival time
|
||||
-----------------------------------------------------------------------------
|
||||
0.23 slack (MET)
|
||||
|
||||
|
||||
Startpoint: _463_ (rising edge-triggered flip-flop clocked by pll_control_clock)
|
||||
Endpoint: _463_ (rising edge-triggered flip-flop clocked by pll_control_clock)
|
||||
Path Group: pll_control_clock
|
||||
Path Type: min
|
||||
|
||||
Fanout Cap Slew Delay Time Description
|
||||
-----------------------------------------------------------------------------
|
||||
0.00 0.00 clock pll_control_clock (rise edge)
|
||||
0.00 0.00 clock source latency
|
||||
0.09 0.00 0.00 ^ ringosc.ibufp01/Y (sky130_fd_sc_hd__clkinv_8)
|
||||
24 0.08 pll_control.clock (net)
|
||||
0.09 0.01 0.01 ^ _463_/CLK (sky130_fd_sc_hd__dfrtp_2)
|
||||
0.11 0.40 0.40 ^ _463_/Q (sky130_fd_sc_hd__dfrtp_2)
|
||||
4 0.02 pll_control.tval[0] (net)
|
||||
0.11 0.00 0.40 ^ _329_/A1 (sky130_fd_sc_hd__o21a_2)
|
||||
0.03 0.13 0.53 ^ _329_/X (sky130_fd_sc_hd__o21a_2)
|
||||
1 0.00 _031_ (net)
|
||||
0.03 0.00 0.53 ^ _463_/D (sky130_fd_sc_hd__dfrtp_2)
|
||||
0.53 data arrival time
|
||||
|
||||
0.00 0.00 clock pll_control_clock (rise edge)
|
||||
0.00 0.00 clock source latency
|
||||
0.09 0.00 0.00 ^ ringosc.ibufp01/Y (sky130_fd_sc_hd__clkinv_8)
|
||||
24 0.08 pll_control.clock (net)
|
||||
0.09 0.01 0.01 ^ _463_/CLK (sky130_fd_sc_hd__dfrtp_2)
|
||||
0.25 0.26 clock uncertainty
|
||||
0.00 0.26 clock reconvergence pessimism
|
||||
-0.03 0.23 library hold time
|
||||
0.23 data required time
|
||||
-----------------------------------------------------------------------------
|
||||
0.23 data required time
|
||||
-0.53 data arrival time
|
||||
-----------------------------------------------------------------------------
|
||||
0.30 slack (MET)
|
||||
|
||||
|
||||
Startpoint: _455_ (rising edge-triggered flip-flop clocked by pll_control_clock)
|
||||
Endpoint: _456_ (rising edge-triggered flip-flop clocked by pll_control_clock)
|
||||
Path Group: pll_control_clock
|
||||
Path Type: min
|
||||
|
||||
Fanout Cap Slew Delay Time Description
|
||||
-----------------------------------------------------------------------------
|
||||
0.00 0.00 clock pll_control_clock (rise edge)
|
||||
0.00 0.00 clock source latency
|
||||
0.09 0.00 0.00 ^ ringosc.ibufp01/Y (sky130_fd_sc_hd__clkinv_8)
|
||||
24 0.08 pll_control.clock (net)
|
||||
0.09 0.01 0.01 ^ _455_/CLK (sky130_fd_sc_hd__dfrtp_2)
|
||||
0.06 0.35 0.36 ^ _455_/Q (sky130_fd_sc_hd__dfrtp_2)
|
||||
3 0.01 pll_control.prep[0] (net)
|
||||
0.06 0.00 0.36 ^ _345_/A0 (sky130_fd_sc_hd__mux2_2)
|
||||
0.03 0.13 0.49 ^ _345_/X (sky130_fd_sc_hd__mux2_2)
|
||||
1 0.00 _156_ (net)
|
||||
0.03 0.00 0.49 ^ _346_/A (sky130_fd_sc_hd__buf_2)
|
||||
0.03 0.08 0.57 ^ _346_/X (sky130_fd_sc_hd__buf_2)
|
||||
1 0.00 _024_ (net)
|
||||
0.03 0.00 0.57 ^ _456_/D (sky130_fd_sc_hd__dfrtp_2)
|
||||
0.57 data arrival time
|
||||
|
||||
0.00 0.00 clock pll_control_clock (rise edge)
|
||||
0.00 0.00 clock source latency
|
||||
0.09 0.00 0.00 ^ ringosc.ibufp01/Y (sky130_fd_sc_hd__clkinv_8)
|
||||
24 0.08 pll_control.clock (net)
|
||||
0.09 0.01 0.01 ^ _456_/CLK (sky130_fd_sc_hd__dfrtp_2)
|
||||
0.25 0.26 clock uncertainty
|
||||
0.00 0.26 clock reconvergence pessimism
|
||||
-0.02 0.23 library hold time
|
||||
0.23 data required time
|
||||
-----------------------------------------------------------------------------
|
||||
0.23 data required time
|
||||
-0.57 data arrival time
|
||||
-----------------------------------------------------------------------------
|
||||
0.34 slack (MET)
|
||||
|
||||
|
||||
|
|
@ -1,14 +0,0 @@
|
|||
|
||||
===========================================================================
|
||||
report_power
|
||||
============================================================================
|
||||
Group Internal Switching Leakage Total
|
||||
Power Power Power Power (Watts)
|
||||
----------------------------------------------------------------
|
||||
Sequential 1.50e-04 1.79e-05 1.84e-10 1.68e-04 27.9%
|
||||
Combinational 1.88e-04 2.46e-04 1.88e-09 4.34e-04 72.1%
|
||||
Macro 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%
|
||||
Pad 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%
|
||||
----------------------------------------------------------------
|
||||
Total 3.38e-04 2.63e-04 2.06e-09 6.01e-04 100.0%
|
||||
56.2% 43.8% 0.0%
|
||||
|
|
@ -1,78 +0,0 @@
|
|||
|
||||
===========================================================================
|
||||
report_checks -unconstrained
|
||||
============================================================================
|
||||
Startpoint: _459_ (rising edge-triggered flip-flop clocked by pll_control_clock)
|
||||
Endpoint: _467_ (rising edge-triggered flip-flop clocked by pll_control_clock)
|
||||
Path Group: pll_control_clock
|
||||
Path Type: max
|
||||
|
||||
Fanout Cap Slew Delay Time Description
|
||||
-----------------------------------------------------------------------------
|
||||
0.00 0.00 clock pll_control_clock (rise edge)
|
||||
0.00 0.00 clock source latency
|
||||
0.09 0.00 0.00 ^ ringosc.ibufp01/Y (sky130_fd_sc_hd__clkinv_8)
|
||||
24 0.08 pll_control.clock (net)
|
||||
0.09 0.01 0.01 ^ _459_/CLK (sky130_fd_sc_hd__dfrtp_2)
|
||||
0.11 0.51 0.51 v _459_/Q (sky130_fd_sc_hd__dfrtp_2)
|
||||
6 0.03 pll_control.count0[1] (net)
|
||||
0.11 0.00 0.51 v _233_/A (sky130_fd_sc_hd__xor2_2)
|
||||
0.10 0.24 0.76 v _233_/X (sky130_fd_sc_hd__xor2_2)
|
||||
3 0.02 _057_ (net)
|
||||
0.10 0.00 0.76 v _236_/A2 (sky130_fd_sc_hd__a211o_2)
|
||||
0.07 0.40 1.16 v _236_/X (sky130_fd_sc_hd__a211o_2)
|
||||
3 0.01 _060_ (net)
|
||||
0.07 0.00 1.16 v _240_/B (sky130_fd_sc_hd__and3_2)
|
||||
0.05 0.23 1.39 v _240_/X (sky130_fd_sc_hd__and3_2)
|
||||
2 0.01 _064_ (net)
|
||||
0.05 0.00 1.39 v _249_/A2 (sky130_fd_sc_hd__o32a_2)
|
||||
0.07 0.40 1.79 v _249_/X (sky130_fd_sc_hd__o32a_2)
|
||||
3 0.01 _073_ (net)
|
||||
0.07 0.00 1.79 v _260_/B1 (sky130_fd_sc_hd__o2111a_2)
|
||||
0.04 0.17 1.96 v _260_/X (sky130_fd_sc_hd__o2111a_2)
|
||||
1 0.00 _084_ (net)
|
||||
0.04 0.00 1.96 v _271_/A1 (sky130_fd_sc_hd__o31a_2)
|
||||
0.11 0.44 2.39 v _271_/X (sky130_fd_sc_hd__o31a_2)
|
||||
6 0.03 _095_ (net)
|
||||
0.11 0.00 2.39 v _285_/A (sky130_fd_sc_hd__and3_2)
|
||||
0.03 0.20 2.59 v _285_/X (sky130_fd_sc_hd__and3_2)
|
||||
1 0.00 _109_ (net)
|
||||
0.03 0.00 2.59 v _291_/A_N (sky130_fd_sc_hd__and3b_2)
|
||||
0.08 0.26 2.86 ^ _291_/X (sky130_fd_sc_hd__and3b_2)
|
||||
3 0.01 _115_ (net)
|
||||
0.08 0.00 2.86 ^ _292_/B1 (sky130_fd_sc_hd__o31a_2)
|
||||
0.05 0.16 3.01 ^ _292_/X (sky130_fd_sc_hd__o31a_2)
|
||||
2 0.01 _116_ (net)
|
||||
0.05 0.00 3.01 ^ _293_/A (sky130_fd_sc_hd__buf_2)
|
||||
0.15 0.20 3.21 ^ _293_/X (sky130_fd_sc_hd__buf_2)
|
||||
7 0.03 _117_ (net)
|
||||
0.15 0.00 3.21 ^ _317_/S (sky130_fd_sc_hd__mux2_2)
|
||||
0.05 0.36 3.57 v _317_/X (sky130_fd_sc_hd__mux2_2)
|
||||
1 0.00 _139_ (net)
|
||||
0.05 0.00 3.57 v _318_/A (sky130_fd_sc_hd__buf_2)
|
||||
0.02 0.12 3.69 v _318_/X (sky130_fd_sc_hd__buf_2)
|
||||
1 0.00 _035_ (net)
|
||||
0.02 0.00 3.69 v _467_/D (sky130_fd_sc_hd__dfrtp_2)
|
||||
3.69 data arrival time
|
||||
|
||||
6.67 6.67 clock pll_control_clock (rise edge)
|
||||
0.00 6.67 clock source latency
|
||||
0.09 0.00 6.67 ^ ringosc.ibufp01/Y (sky130_fd_sc_hd__clkinv_8)
|
||||
24 0.08 pll_control.clock (net)
|
||||
0.09 0.01 6.67 ^ _467_/CLK (sky130_fd_sc_hd__dfrtp_2)
|
||||
-0.25 6.42 clock uncertainty
|
||||
0.00 6.42 clock reconvergence pessimism
|
||||
-0.10 6.33 library setup time
|
||||
6.33 data required time
|
||||
-----------------------------------------------------------------------------
|
||||
6.33 data required time
|
||||
-3.69 data arrival time
|
||||
-----------------------------------------------------------------------------
|
||||
2.64 slack (MET)
|
||||
|
||||
|
||||
|
||||
===========================================================================
|
||||
report_checks --slack_max -0.01
|
||||
============================================================================
|
||||
No paths found.
|
||||
|
|
@ -1,20 +0,0 @@
|
|||
|
||||
===========================================================================
|
||||
report_check_types -max_slew -max_cap -max_fanout -violators
|
||||
============================================================================
|
||||
max fanout
|
||||
|
||||
Pin Limit Fanout Slack
|
||||
---------------------------------------------------------
|
||||
ringosc.ibufp01/Y 7 24 -17 (VIOLATED)
|
||||
dco 7 14 -7 (VIOLATED)
|
||||
_390_/X 7 14 -7 (VIOLATED)
|
||||
div[3] 7 8 (VIOLATED)
|
||||
_426_/X 7 8 (VIOLATED)
|
||||
|
||||
|
||||
===========================================================================
|
||||
max slew violation count 0
|
||||
max fanout violation count 5
|
||||
max cap violation count 0
|
||||
============================================================================
|
||||
|
|
@ -1,5 +0,0 @@
|
|||
|
||||
===========================================================================
|
||||
report_tns
|
||||
============================================================================
|
||||
tns 0.00
|
||||
|
|
@ -1,5 +0,0 @@
|
|||
|
||||
===========================================================================
|
||||
report_wns
|
||||
============================================================================
|
||||
wns 0.00
|
||||
|
|
@ -1,10 +0,0 @@
|
|||
|
||||
===========================================================================
|
||||
report_worst_slack -max (Setup)
|
||||
============================================================================
|
||||
worst slack 2.64
|
||||
|
||||
===========================================================================
|
||||
report_worst_slack -min (Hold)
|
||||
============================================================================
|
||||
worst slack 0.11
|
||||
|
|
@ -1,38 +0,0 @@
|
|||
OpenROAD 4174c3ad802d2ac1d04d387d2c4b883903f6647e
|
||||
This program is licensed under the BSD-3 license. See the LICENSE file for details.
|
||||
Components of this program may be licensed under more restrictive licenses which must be honored.
|
||||
[INFO ODB-0222] Reading LEF file: /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/tmp/merged.nom.lef
|
||||
[WARNING ODB-0220] WARNING (LEFPARS-2036): SOURCE statement is obsolete in version 5.6 and later.
|
||||
The LEF parser will ignore this statement.
|
||||
To avoid this warning in the future, remove this statement from the LEF file with version 5.6 or later. See file /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/tmp/merged.nom.lef at line 930.
|
||||
|
||||
[INFO ODB-0223] Created 13 technology layers
|
||||
[INFO ODB-0224] Created 25 technology vias
|
||||
[INFO ODB-0225] Created 441 library cells
|
||||
[INFO ODB-0226] Finished LEF file: /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/tmp/merged.nom.lef
|
||||
[INFO ODB-0127] Reading DEF file: /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/routing/digital_pll.def
|
||||
[INFO ODB-0128] Design: digital_pll
|
||||
[INFO ODB-0130] Created 39 pins.
|
||||
[INFO ODB-0131] Created 1093 components and 5448 component-terminals.
|
||||
[INFO ODB-0132] Created 2 special nets and 4222 connections.
|
||||
[INFO ODB-0133] Created 371 nets and 1225 connections.
|
||||
[INFO ODB-0134] Finished DEF file: /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/routing/digital_pll.def
|
||||
[INFO]: Setting RC values...
|
||||
[INFO PSM-0002] Output voltage file is specified as: /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/reports/signoff/22-irdrop.rpt.
|
||||
[WARNING PSM-0016] Voltage pad location (VSRC) file not specified, defaulting pad location to checkerboard pattern on core area.
|
||||
[WARNING PSM-0017] X direction bump pitch is not specified, defaulting to 140um.
|
||||
[WARNING PSM-0018] Y direction bump pitch is not specified, defaulting to 140um.
|
||||
[WARNING PSM-0019] Voltage on net VPWR is not explicitly set.
|
||||
[WARNING PSM-0022] Using voltage 1.800V for VDD network.
|
||||
[WARNING PSM-0063] Specified bump pitches of 140.000 and 140.000 are less than core width of 88.780 or core height of 62.560. Changing bump location to the center of the die at (49.910, 36.720).
|
||||
[WARNING PSM-0065] VSRC location not specified, using default checkerboard pattern with one VDD every size bumps in x-direction and one in two bumps in the y-direction
|
||||
[INFO PSM-0076] Setting metal node density to be standard cell height times 5.
|
||||
[WARNING PSM-0030] VSRC location at (49.910um, 36.720um) and size 10.000um, is not located on an existing power stripe node. Moving to closest node at (61.840um, 21.850um).
|
||||
[INFO PSM-0031] Number of PDN nodes on net VPWR = 292.
|
||||
[INFO PSM-0064] Number of voltage sources = 1.
|
||||
[INFO PSM-0040] All PDN stripes on net VPWR are connected.
|
||||
########## IR report #################
|
||||
Worstcase voltage: 1.80e+00 V
|
||||
Average IR drop : 1.10e-09 V
|
||||
Worstcase IR drop: 1.69e-09 V
|
||||
######################################
|
||||
|
|
@ -1,624 +0,0 @@
|
|||
Instance name, X location, Y location, Voltage
|
||||
FILLER_22_109, 61.84, 68, 1.8
|
||||
FILLER_22_117, 61.84, 68, 1.8
|
||||
_410_, 61.84, 68, 1.8
|
||||
ringosc.dstage\[3\].id.delaybuf1, 61.84, 68, 1.8
|
||||
ANTENNA__383__A2, 61.84, 62.56, 1.8
|
||||
FILLER_20_120, 61.84, 62.56, 1.8
|
||||
FILLER_21_125, 61.84, 62.56, 1.8
|
||||
FILLER_22_127, 61.84, 62.56, 1.8
|
||||
_380_, 61.84, 62.56, 1.8
|
||||
ringosc.dstage\[2\].id.delayen1, 61.84, 62.56, 1.8
|
||||
ringosc.dstage\[2\].id.delayenb1, 61.84, 62.56, 1.8
|
||||
ringosc.dstage\[3\].id.delayenb1, 61.84, 62.56, 1.8
|
||||
FILLER_19_108, 61.84, 57.12, 1.8
|
||||
FILLER_19_127, 61.84, 57.12, 1.8
|
||||
_365_, 61.84, 57.12, 1.8
|
||||
_368_, 61.84, 57.12, 1.8
|
||||
_370_, 61.84, 57.12, 1.8
|
||||
_383_, 61.84, 57.12, 1.8
|
||||
_399_, 61.84, 57.12, 1.8
|
||||
_403_, 61.84, 57.12, 1.8
|
||||
ANTENNA__396__A2, 61.84, 51.68, 1.8
|
||||
FILLER_17_113, 61.84, 51.68, 1.8
|
||||
_300_, 61.84, 51.68, 1.8
|
||||
_355_, 61.84, 51.68, 1.8
|
||||
_367_, 61.84, 51.68, 1.8
|
||||
_371_, 61.84, 51.68, 1.8
|
||||
_400_, 61.84, 51.68, 1.8
|
||||
_402_, 61.84, 51.68, 1.8
|
||||
FILLER_14_109, 61.84, 46.24, 1.8
|
||||
FILLER_16_127, 61.84, 46.24, 1.8
|
||||
_229_, 61.84, 46.24, 1.8
|
||||
_280_, 61.84, 46.24, 1.8
|
||||
_281_, 61.84, 46.24, 1.8
|
||||
_282_, 61.84, 46.24, 1.8
|
||||
_361_, 61.84, 46.24, 1.8
|
||||
_398_, 61.84, 46.24, 1.8
|
||||
_401_, 61.84, 46.24, 1.8
|
||||
ANTENNA__379__A, 61.84, 40.8, 1.8
|
||||
ANTENNA__421__B1, 61.84, 40.8, 1.8
|
||||
FILLER_13_123, 61.84, 40.8, 1.8
|
||||
FILLER_14_124, 61.84, 40.8, 1.8
|
||||
_291_, 61.84, 40.8, 1.8
|
||||
_292_, 61.84, 40.8, 1.8
|
||||
_294_, 61.84, 40.8, 1.8
|
||||
_306_, 61.84, 40.8, 1.8
|
||||
_320_, 61.84, 40.8, 1.8
|
||||
_379_, 61.84, 40.8, 1.8
|
||||
FILLER_11_123, 61.84, 35.36, 1.8
|
||||
FILLER_12_133, 61.84, 35.36, 1.8
|
||||
_307_, 61.84, 35.36, 1.8
|
||||
_313_, 61.84, 35.36, 1.8
|
||||
_319_, 61.84, 35.36, 1.8
|
||||
FILLER_9_123, 61.84, 29.92, 1.8
|
||||
_314_, 61.84, 29.92, 1.8
|
||||
_315_, 61.84, 29.92, 1.8
|
||||
_323_, 61.84, 29.92, 1.8
|
||||
_329_, 61.84, 29.92, 1.8
|
||||
FILLER_7_108, 61.84, 24.48, 1.8
|
||||
FILLER_8_126, 61.84, 24.48, 1.8
|
||||
_390_, 61.84, 24.48, 1.8
|
||||
_465_, 61.84, 24.48, 1.8
|
||||
_468_, 61.84, 24.48, 1.8
|
||||
FILLER_5_134, 61.84, 19.04, 1.8
|
||||
FILLER_6_130, 61.84, 19.04, 1.8
|
||||
_435_, 61.84, 19.04, 1.8
|
||||
_437_, 61.84, 19.04, 1.8
|
||||
_440_, 61.84, 19.04, 1.8
|
||||
_444_, 61.84, 19.04, 1.8
|
||||
_461_, 61.84, 19.04, 1.8
|
||||
FILLER_2_112, 61.84, 13.6, 1.8
|
||||
FILLER_3_127, 61.84, 13.6, 1.8
|
||||
_338_, 61.84, 13.6, 1.8
|
||||
_432_, 61.84, 13.6, 1.8
|
||||
_433_, 61.84, 13.6, 1.8
|
||||
_460_, 61.84, 13.6, 1.8
|
||||
FILLER_0_113, 61.84, 8.16, 1.8
|
||||
FILLER_0_134, 61.84, 8.16, 1.8
|
||||
_339_, 61.84, 8.16, 1.8
|
||||
_459_, 61.84, 8.16, 1.8
|
||||
ANTENNA__378__A2, 21.84, 68, 1.8
|
||||
ringosc.dstage\[6\].id.delayen0, 21.84, 68, 1.8
|
||||
ANTENNA__364__A2, 21.84, 62.56, 1.8
|
||||
_375_, 21.84, 62.56, 1.8
|
||||
ringosc.dstage\[6\].id.delayenb1, 21.84, 62.56, 1.8
|
||||
ringosc.dstage\[7\].id.delaybuf0, 21.84, 62.56, 1.8
|
||||
FILLER_20_37, 21.84, 57.12, 1.8
|
||||
FILLER_20_47, 21.84, 57.12, 1.8
|
||||
_364_, 21.84, 57.12, 1.8
|
||||
ringosc.dstage\[4\].id.delayen0, 21.84, 57.12, 1.8
|
||||
ringosc.dstage\[4\].id.delayenb0, 21.84, 57.12, 1.8
|
||||
ringosc.dstage\[4\].id.delayint0, 21.84, 57.12, 1.8
|
||||
ringosc.dstage\[6\].id.delayen1, 21.84, 57.12, 1.8
|
||||
FILLER_17_44, 21.84, 51.68, 1.8
|
||||
ringosc.dstage\[1\].id.delayen1, 21.84, 51.68, 1.8
|
||||
ringosc.dstage\[1\].id.delayenb1, 21.84, 51.68, 1.8
|
||||
ringosc.dstage\[2\].id.delaybuf0, 21.84, 51.68, 1.8
|
||||
ringosc.dstage\[4\].id.delayen1, 21.84, 51.68, 1.8
|
||||
FILLER_15_36, 21.84, 46.24, 1.8
|
||||
FILLER_15_44, 21.84, 46.24, 1.8
|
||||
_352_, 21.84, 46.24, 1.8
|
||||
_384_, 21.84, 46.24, 1.8
|
||||
ringosc.dstage\[0\].id.delaybuf1, 21.84, 46.24, 1.8
|
||||
ringosc.dstage\[0\].id.delayen0, 21.84, 46.24, 1.8
|
||||
ringosc.dstage\[1\].id.delaybuf1, 21.84, 46.24, 1.8
|
||||
ANTENNA_ringosc.dstage\[0\].id.delaybuf0_A, 21.84, 40.8, 1.8
|
||||
FILLER_12_29, 21.84, 40.8, 1.8
|
||||
FILLER_13_47, 21.84, 40.8, 1.8
|
||||
FILLER_14_44, 21.84, 40.8, 1.8
|
||||
_351_, 21.84, 40.8, 1.8
|
||||
ringosc.dstage\[0\].id.delayenb1, 21.84, 40.8, 1.8
|
||||
ringosc.dstage\[1\].id.delaybuf0, 21.84, 40.8, 1.8
|
||||
ANTENNA__270__A1, 21.84, 35.36, 1.8
|
||||
ANTENNA__350__A, 21.84, 35.36, 1.8
|
||||
FILLER_10_29, 21.84, 35.36, 1.8
|
||||
FILLER_11_30, 21.84, 35.36, 1.8
|
||||
FILLER_11_45, 21.84, 35.36, 1.8
|
||||
_268_, 21.84, 35.36, 1.8
|
||||
ringosc.dstage\[0\].id.delaybuf0, 21.84, 35.36, 1.8
|
||||
ringosc.dstage\[0\].id.delayen1, 21.84, 35.36, 1.8
|
||||
ringosc.dstage\[0\].id.delayint0, 21.84, 35.36, 1.8
|
||||
_240_, 21.84, 29.92, 1.8
|
||||
_242_, 21.84, 29.92, 1.8
|
||||
_265_, 21.84, 29.92, 1.8
|
||||
_270_, 21.84, 29.92, 1.8
|
||||
ANTENNA__425__B, 21.84, 24.48, 1.8
|
||||
_237_, 21.84, 24.48, 1.8
|
||||
_239_, 21.84, 24.48, 1.8
|
||||
_241_, 21.84, 24.48, 1.8
|
||||
_263_, 21.84, 24.48, 1.8
|
||||
_264_, 21.84, 24.48, 1.8
|
||||
_425_, 21.84, 24.48, 1.8
|
||||
_219_, 21.84, 19.04, 1.8
|
||||
_238_, 21.84, 19.04, 1.8
|
||||
_247_, 21.84, 19.04, 1.8
|
||||
_248_, 21.84, 19.04, 1.8
|
||||
_453_, 21.84, 19.04, 1.8
|
||||
ANTENNA__252__A, 21.84, 13.6, 1.8
|
||||
ANTENNA__257__A_N, 21.84, 13.6, 1.8
|
||||
FILLER_3_47, 21.84, 13.6, 1.8
|
||||
_221_, 21.84, 13.6, 1.8
|
||||
_236_, 21.84, 13.6, 1.8
|
||||
_245_, 21.84, 13.6, 1.8
|
||||
FILLER_0_39, 21.84, 8.16, 1.8
|
||||
FILLER_1_45, 21.84, 8.16, 1.8
|
||||
FILLER_2_38, 21.84, 8.16, 1.8
|
||||
_226_, 21.84, 8.16, 1.8
|
||||
_232_, 21.84, 8.16, 1.8
|
||||
_450_, 21.84, 8.16, 1.8
|
||||
PHY_44, 5.52, 68, 1.8
|
||||
ANTENNA__410__A1, 94.3, 68, 1.8
|
||||
FILLER_22_186, 94.3, 68, 1.8
|
||||
PHY_45, 94.3, 68, 1.8
|
||||
ringosc.dstage\[5\].id.delaybuf1, 13.68, 68, 1.8
|
||||
ringosc.dstage\[5\].id.delayint0, 13.68, 68, 1.8
|
||||
ANTENNA__410__A2, 35.173, 68, 1.8
|
||||
_378_, 35.173, 68, 1.8
|
||||
ringosc.dstage\[7\].id.delayen1, 48.506, 68, 1.8
|
||||
ringosc.dstage\[7\].id.delayint0, 48.506, 68, 1.8
|
||||
ringosc.dstage\[2\].id.delayen0, 72.66, 68, 1.8
|
||||
ringosc.dstage\[2\].id.delayint0, 83.48, 68, 1.8
|
||||
FILLER_21_3, 5.52, 62.56, 1.8
|
||||
FILLER_22_3, 5.52, 62.56, 1.8
|
||||
PHY_40, 5.52, 62.56, 1.8
|
||||
PHY_42, 5.52, 62.56, 1.8
|
||||
ringosc.dstage\[5\].id.delayenb1, 5.52, 62.56, 1.8
|
||||
ANTENNA__399__A2, 94.3, 62.56, 1.8
|
||||
PHY_41, 94.3, 62.56, 1.8
|
||||
PHY_43, 94.3, 62.56, 1.8
|
||||
ringosc.dstage\[8\].id.delaybuf1, 94.3, 62.56, 1.8
|
||||
FILLER_20_14, 13.68, 62.56, 1.8
|
||||
FILLER_21_17, 13.68, 62.56, 1.8
|
||||
FILLER_22_20, 13.68, 62.56, 1.8
|
||||
ringosc.dstage\[6\].id.delayenb0, 13.68, 62.56, 1.8
|
||||
ringosc.dstage\[6\].id.delayint0, 13.68, 62.56, 1.8
|
||||
ANTENNA__387__B1, 35.173, 62.56, 1.8
|
||||
FILLER_21_57, 35.173, 62.56, 1.8
|
||||
FILLER_22_76, 35.173, 62.56, 1.8
|
||||
ringosc.dstage\[3\].id.delayen0, 35.173, 62.56, 1.8
|
||||
ringosc.dstage\[3\].id.delayenb0, 35.173, 62.56, 1.8
|
||||
ringosc.dstage\[4\].id.delaybuf0, 35.173, 62.56, 1.8
|
||||
ringosc.dstage\[4\].id.delaybuf1, 35.173, 62.56, 1.8
|
||||
ringosc.dstage\[6\].id.delaybuf1, 35.173, 62.56, 1.8
|
||||
ringosc.dstage\[7\].id.delayenb0, 35.173, 62.56, 1.8
|
||||
ANTENNA__380__A2, 48.506, 62.56, 1.8
|
||||
FILLER_21_100, 48.506, 62.56, 1.8
|
||||
FILLER_22_99, 48.506, 62.56, 1.8
|
||||
_417_, 48.506, 62.56, 1.8
|
||||
ringosc.dstage\[3\].id.delayen1, 48.506, 62.56, 1.8
|
||||
ringosc.dstage\[3\].id.delayint0, 48.506, 62.56, 1.8
|
||||
ringosc.dstage\[7\].id.delaybuf1, 48.506, 62.56, 1.8
|
||||
ringosc.dstage\[7\].id.delayenb1, 48.506, 62.56, 1.8
|
||||
FILLER_22_154, 72.66, 62.56, 1.8
|
||||
ringosc.dstage\[2\].id.delaybuf1, 72.66, 62.56, 1.8
|
||||
ringosc.dstage\[2\].id.delayenb0, 72.66, 62.56, 1.8
|
||||
ringosc.dstage\[3\].id.delaybuf0, 72.66, 62.56, 1.8
|
||||
ringosc.dstage\[8\].id.delaybuf0, 72.66, 62.56, 1.8
|
||||
ringosc.dstage\[8\].id.delayenb0, 72.66, 62.56, 1.8
|
||||
FILLER_20_160, 83.48, 62.56, 1.8
|
||||
FILLER_21_169, 83.48, 62.56, 1.8
|
||||
_419_, 83.48, 62.56, 1.8
|
||||
ringosc.dstage\[8\].id.delayen0, 83.48, 62.56, 1.8
|
||||
ringosc.dstage\[8\].id.delayenb1, 83.48, 62.56, 1.8
|
||||
ringosc.dstage\[8\].id.delayint0, 83.48, 62.56, 1.8
|
||||
ringosc.dstage\[9\].id.delaybuf0, 83.48, 62.56, 1.8
|
||||
FILLER_19_3, 5.52, 57.12, 1.8
|
||||
FILLER_20_3, 5.52, 57.12, 1.8
|
||||
PHY_36, 5.52, 57.12, 1.8
|
||||
PHY_38, 5.52, 57.12, 1.8
|
||||
ringosc.dstage\[5\].id.delayen0, 5.52, 57.12, 1.8
|
||||
ringosc.dstage\[5\].id.delayen1, 5.52, 57.12, 1.8
|
||||
FILLER_18_186, 94.3, 57.12, 1.8
|
||||
PHY_37, 94.3, 57.12, 1.8
|
||||
PHY_39, 94.3, 57.12, 1.8
|
||||
ringosc.dstage\[10\].id.delaybuf1, 94.3, 57.12, 1.8
|
||||
ANTENNA__375__A2, 13.68, 57.12, 1.8
|
||||
FILLER_19_14, 13.68, 57.12, 1.8
|
||||
_369_, 13.68, 57.12, 1.8
|
||||
ringosc.dstage\[5\].id.delaybuf0, 13.68, 57.12, 1.8
|
||||
ringosc.dstage\[6\].id.delaybuf0, 13.68, 57.12, 1.8
|
||||
ANTENNA__392__A1, 35.173, 57.12, 1.8
|
||||
ANTENNA__392__A2, 35.173, 57.12, 1.8
|
||||
_377_, 35.173, 57.12, 1.8
|
||||
_387_, 35.173, 57.12, 1.8
|
||||
_392_, 35.173, 57.12, 1.8
|
||||
ringosc.dstage\[4\].id.delayenb1, 35.173, 57.12, 1.8
|
||||
ringosc.dstage\[7\].id.delayen0, 35.173, 57.12, 1.8
|
||||
ANTENNA__417__B1, 48.506, 57.12, 1.8
|
||||
FILLER_19_82, 48.506, 57.12, 1.8
|
||||
FILLER_20_95, 48.506, 57.12, 1.8
|
||||
_359_, 48.506, 57.12, 1.8
|
||||
_372_, 48.506, 57.12, 1.8
|
||||
_411_, 48.506, 57.12, 1.8
|
||||
_414_, 48.506, 57.12, 1.8
|
||||
FILLER_19_145, 72.66, 57.12, 1.8
|
||||
_404_, 72.66, 57.12, 1.8
|
||||
_408_, 72.66, 57.12, 1.8
|
||||
_409_, 72.66, 57.12, 1.8
|
||||
ANTENNA__404__A1, 83.48, 57.12, 1.8
|
||||
FILLER_18_158, 83.48, 57.12, 1.8
|
||||
ringosc.dstage\[8\].id.delayen1, 83.48, 57.12, 1.8
|
||||
ringosc.dstage\[9\].id.delaybuf1, 83.48, 57.12, 1.8
|
||||
ringosc.dstage\[9\].id.delayenb0, 83.48, 57.12, 1.8
|
||||
ringosc.dstage\[9\].id.delayenb1, 83.48, 57.12, 1.8
|
||||
FILLER_17_3, 5.52, 51.68, 1.8
|
||||
PHY_32, 5.52, 51.68, 1.8
|
||||
PHY_34, 5.52, 51.68, 1.8
|
||||
_373_, 5.52, 51.68, 1.8
|
||||
ringosc.dstage\[5\].id.delayenb0, 5.52, 51.68, 1.8
|
||||
FILLER_16_187, 94.3, 51.68, 1.8
|
||||
PHY_33, 94.3, 51.68, 1.8
|
||||
PHY_35, 94.3, 51.68, 1.8
|
||||
ringosc.dstage\[10\].id.delaybuf0, 94.3, 51.68, 1.8
|
||||
ANTENNA__358__A, 13.68, 51.68, 1.8
|
||||
ANTENNA__369__A2, 13.68, 51.68, 1.8
|
||||
ANTENNA__373__A2, 13.68, 51.68, 1.8
|
||||
FILLER_17_18, 13.68, 51.68, 1.8
|
||||
_360_, 13.68, 51.68, 1.8
|
||||
ringosc.dstage\[1\].id.delayint0, 13.68, 51.68, 1.8
|
||||
ANTENNA__389__A2, 35.173, 51.68, 1.8
|
||||
FILLER_17_57, 35.173, 51.68, 1.8
|
||||
FILLER_17_71, 35.173, 51.68, 1.8
|
||||
FILLER_18_72, 35.173, 51.68, 1.8
|
||||
_358_, 35.173, 51.68, 1.8
|
||||
_388_, 35.173, 51.68, 1.8
|
||||
_389_, 35.173, 51.68, 1.8
|
||||
_391_, 35.173, 51.68, 1.8
|
||||
_413_, 35.173, 51.68, 1.8
|
||||
ANTENNA__411__A2, 48.506, 51.68, 1.8
|
||||
FILLER_16_81, 48.506, 51.68, 1.8
|
||||
FILLER_17_82, 48.506, 51.68, 1.8
|
||||
FILLER_17_99, 48.506, 51.68, 1.8
|
||||
_354_, 48.506, 51.68, 1.8
|
||||
_356_, 48.506, 51.68, 1.8
|
||||
_357_, 48.506, 51.68, 1.8
|
||||
_382_, 48.506, 51.68, 1.8
|
||||
_386_, 48.506, 51.68, 1.8
|
||||
_394_, 48.506, 51.68, 1.8
|
||||
_396_, 48.506, 51.68, 1.8
|
||||
ANTENNA__361__B, 72.66, 51.68, 1.8
|
||||
FILLER_17_138, 72.66, 51.68, 1.8
|
||||
FILLER_17_149, 72.66, 51.68, 1.8
|
||||
_363_, 72.66, 51.68, 1.8
|
||||
_397_, 72.66, 51.68, 1.8
|
||||
_407_, 72.66, 51.68, 1.8
|
||||
_421_, 72.66, 51.68, 1.8
|
||||
FILLER_16_166, 83.48, 51.68, 1.8
|
||||
FILLER_17_161, 83.48, 51.68, 1.8
|
||||
FILLER_17_169, 83.48, 51.68, 1.8
|
||||
_381_, 83.48, 51.68, 1.8
|
||||
ringosc.dstage\[10\].id.delayen1, 83.48, 51.68, 1.8
|
||||
ringosc.dstage\[9\].id.delayen0, 83.48, 51.68, 1.8
|
||||
ringosc.dstage\[9\].id.delayen1, 83.48, 51.68, 1.8
|
||||
ringosc.dstage\[9\].id.delayint0, 83.48, 51.68, 1.8
|
||||
ANTENNA__360__A2, 5.52, 46.24, 1.8
|
||||
FILLER_15_3, 5.52, 46.24, 1.8
|
||||
FILLER_16_3, 5.52, 46.24, 1.8
|
||||
PHY_28, 5.52, 46.24, 1.8
|
||||
PHY_30, 5.52, 46.24, 1.8
|
||||
FILLER_14_187, 94.3, 46.24, 1.8
|
||||
FILLER_15_186, 94.3, 46.24, 1.8
|
||||
PHY_29, 94.3, 46.24, 1.8
|
||||
PHY_31, 94.3, 46.24, 1.8
|
||||
FILLER_14_17, 13.68, 46.24, 1.8
|
||||
FILLER_15_13, 13.68, 46.24, 1.8
|
||||
ringosc.dstage\[1\].id.delayen0, 13.68, 46.24, 1.8
|
||||
ringosc.dstage\[1\].id.delayenb0, 13.68, 46.24, 1.8
|
||||
ringosc.ibufp10, 13.68, 46.24, 1.8
|
||||
FILLER_14_56, 35.173, 46.24, 1.8
|
||||
FILLER_16_68, 35.173, 46.24, 1.8
|
||||
_298_, 35.173, 46.24, 1.8
|
||||
_348_, 35.173, 46.24, 1.8
|
||||
_374_, 35.173, 46.24, 1.8
|
||||
_385_, 35.173, 46.24, 1.8
|
||||
_412_, 35.173, 46.24, 1.8
|
||||
ANTENNA__374__B1, 48.506, 46.24, 1.8
|
||||
FILLER_14_85, 48.506, 46.24, 1.8
|
||||
FILLER_15_102, 48.506, 46.24, 1.8
|
||||
_303_, 48.506, 46.24, 1.8
|
||||
_353_, 48.506, 46.24, 1.8
|
||||
_366_, 48.506, 46.24, 1.8
|
||||
_395_, 48.506, 46.24, 1.8
|
||||
_415_, 48.506, 46.24, 1.8
|
||||
_416_, 48.506, 46.24, 1.8
|
||||
FILLER_14_137, 72.66, 46.24, 1.8
|
||||
FILLER_15_139, 72.66, 46.24, 1.8
|
||||
_276_, 72.66, 46.24, 1.8
|
||||
_405_, 72.66, 46.24, 1.8
|
||||
_406_, 72.66, 46.24, 1.8
|
||||
_418_, 72.66, 46.24, 1.8
|
||||
_420_, 72.66, 46.24, 1.8
|
||||
ANTENNA__424__A2, 83.48, 46.24, 1.8
|
||||
FILLER_14_164, 83.48, 46.24, 1.8
|
||||
FILLER_15_161, 83.48, 46.24, 1.8
|
||||
_422_, 83.48, 46.24, 1.8
|
||||
ringosc.dstage\[10\].id.delayen0, 83.48, 46.24, 1.8
|
||||
ringosc.dstage\[10\].id.delayenb0, 83.48, 46.24, 1.8
|
||||
ringosc.dstage\[10\].id.delayenb1, 83.48, 46.24, 1.8
|
||||
ringosc.dstage\[10\].id.delayint0, 83.48, 46.24, 1.8
|
||||
ANTENNA__243__A, 5.52, 40.8, 1.8
|
||||
FILLER_13_3, 5.52, 40.8, 1.8
|
||||
PHY_24, 5.52, 40.8, 1.8
|
||||
PHY_26, 5.52, 40.8, 1.8
|
||||
ringosc.ibufp11, 5.52, 40.8, 1.8
|
||||
ANTENNA__423__A2, 94.3, 40.8, 1.8
|
||||
PHY_25, 94.3, 40.8, 1.8
|
||||
PHY_27, 94.3, 40.8, 1.8
|
||||
ANTENNA__384__A_N, 13.68, 40.8, 1.8
|
||||
FILLER_13_9, 13.68, 40.8, 1.8
|
||||
ringosc.dstage\[0\].id.delayenb0, 13.68, 40.8, 1.8
|
||||
ANTENNA__348__A, 35.173, 40.8, 1.8
|
||||
ANTENNA__349__A, 35.173, 40.8, 1.8
|
||||
FILLER_13_62, 35.173, 40.8, 1.8
|
||||
FILLER_14_77, 35.173, 40.8, 1.8
|
||||
_277_, 35.173, 40.8, 1.8
|
||||
_279_, 35.173, 40.8, 1.8
|
||||
_283_, 35.173, 40.8, 1.8
|
||||
_301_, 35.173, 40.8, 1.8
|
||||
_302_, 35.173, 40.8, 1.8
|
||||
_349_, 35.173, 40.8, 1.8
|
||||
_350_, 35.173, 40.8, 1.8
|
||||
ANTENNA__419__A2, 48.506, 40.8, 1.8
|
||||
FILLER_13_102, 48.506, 40.8, 1.8
|
||||
FILLER_13_81, 48.506, 40.8, 1.8
|
||||
FILLER_14_97, 48.506, 40.8, 1.8
|
||||
_278_, 48.506, 40.8, 1.8
|
||||
_304_, 48.506, 40.8, 1.8
|
||||
_376_, 48.506, 40.8, 1.8
|
||||
_393_, 48.506, 40.8, 1.8
|
||||
ANTENNA__363__A2, 72.66, 40.8, 1.8
|
||||
ANTENNA__404__A2, 72.66, 40.8, 1.8
|
||||
_299_, 72.66, 40.8, 1.8
|
||||
_362_, 72.66, 40.8, 1.8
|
||||
_423_, 72.66, 40.8, 1.8
|
||||
_424_, 72.66, 40.8, 1.8
|
||||
FILLER_12_159, 83.48, 40.8, 1.8
|
||||
FILLER_13_177, 83.48, 40.8, 1.8
|
||||
_275_, 83.48, 40.8, 1.8
|
||||
ringosc.dstage\[11\].id.delaybuf0, 83.48, 40.8, 1.8
|
||||
ringosc.dstage\[11\].id.delayen0, 83.48, 40.8, 1.8
|
||||
ringosc.dstage\[11\].id.delayen1, 83.48, 40.8, 1.8
|
||||
ANTENNA__267__A1, 5.52, 35.36, 1.8
|
||||
PHY_20, 5.52, 35.36, 1.8
|
||||
PHY_22, 5.52, 35.36, 1.8
|
||||
_267_, 5.52, 35.36, 1.8
|
||||
clockp_buffer_1, 5.52, 35.36, 1.8
|
||||
FILLER_10_186, 94.3, 35.36, 1.8
|
||||
FILLER_11_186, 94.3, 35.36, 1.8
|
||||
PHY_21, 94.3, 35.36, 1.8
|
||||
PHY_23, 94.3, 35.36, 1.8
|
||||
ringosc.dstage\[11\].id.delaybuf1, 94.3, 35.36, 1.8
|
||||
FILLER_12_24, 13.68, 35.36, 1.8
|
||||
_260_, 13.68, 35.36, 1.8
|
||||
_290_, 13.68, 35.36, 1.8
|
||||
ANTENNA__447__A, 35.173, 35.36, 1.8
|
||||
FILLER_11_50, 35.173, 35.36, 1.8
|
||||
FILLER_11_62, 35.173, 35.36, 1.8
|
||||
_261_, 35.173, 35.36, 1.8
|
||||
_272_, 35.173, 35.36, 1.8
|
||||
_305_, 35.173, 35.36, 1.8
|
||||
_322_, 35.173, 35.36, 1.8
|
||||
_447_, 35.173, 35.36, 1.8
|
||||
FILLER_10_79, 48.506, 35.36, 1.8
|
||||
FILLER_11_106, 48.506, 35.36, 1.8
|
||||
FILLER_11_81, 48.506, 35.36, 1.8
|
||||
FILLER_12_107, 48.506, 35.36, 1.8
|
||||
_273_, 48.506, 35.36, 1.8
|
||||
_274_, 48.506, 35.36, 1.8
|
||||
_285_, 48.506, 35.36, 1.8
|
||||
_295_, 48.506, 35.36, 1.8
|
||||
_296_, 48.506, 35.36, 1.8
|
||||
_316_, 48.506, 35.36, 1.8
|
||||
FILLER_10_136, 72.66, 35.36, 1.8
|
||||
FILLER_11_143, 72.66, 35.36, 1.8
|
||||
_228_, 72.66, 35.36, 1.8
|
||||
_293_, 72.66, 35.36, 1.8
|
||||
_308_, 72.66, 35.36, 1.8
|
||||
_310_, 72.66, 35.36, 1.8
|
||||
_321_, 72.66, 35.36, 1.8
|
||||
FILLER_10_163, 83.48, 35.36, 1.8
|
||||
FILLER_11_160, 83.48, 35.36, 1.8
|
||||
ringosc.dstage\[11\].id.delayenb0, 83.48, 35.36, 1.8
|
||||
ringosc.dstage\[11\].id.delayenb1, 83.48, 35.36, 1.8
|
||||
ringosc.dstage\[11\].id.delayint0, 83.48, 35.36, 1.8
|
||||
ringosc.iss.delayenb1, 83.48, 35.36, 1.8
|
||||
ANTENNA__260__A1, 5.52, 29.92, 1.8
|
||||
ANTENNA__266__A, 5.52, 29.92, 1.8
|
||||
PHY_16, 5.52, 29.92, 1.8
|
||||
PHY_18, 5.52, 29.92, 1.8
|
||||
ANTENNA__422__A2, 94.3, 29.92, 1.8
|
||||
PHY_17, 94.3, 29.92, 1.8
|
||||
PHY_19, 94.3, 29.92, 1.8
|
||||
ringosc.iss.delaybuf0, 94.3, 29.92, 1.8
|
||||
_243_, 13.68, 29.92, 1.8
|
||||
_249_, 13.68, 29.92, 1.8
|
||||
_266_, 13.68, 29.92, 1.8
|
||||
_271_, 13.68, 29.92, 1.8
|
||||
_289_, 13.68, 29.92, 1.8
|
||||
FILLER_8_61, 35.173, 29.92, 1.8
|
||||
FILLER_9_63, 35.173, 29.92, 1.8
|
||||
_222_, 35.173, 29.92, 1.8
|
||||
_262_, 35.173, 29.92, 1.8
|
||||
_269_, 35.173, 29.92, 1.8
|
||||
_325_, 35.173, 29.92, 1.8
|
||||
_326_, 35.173, 29.92, 1.8
|
||||
_327_, 35.173, 29.92, 1.8
|
||||
FILLER_10_99, 48.506, 29.92, 1.8
|
||||
FILLER_8_81, 48.506, 29.92, 1.8
|
||||
FILLER_8_85, 48.506, 29.92, 1.8
|
||||
FILLER_9_107, 48.506, 29.92, 1.8
|
||||
_284_, 48.506, 29.92, 1.8
|
||||
_297_, 48.506, 29.92, 1.8
|
||||
_312_, 48.506, 29.92, 1.8
|
||||
_317_, 48.506, 29.92, 1.8
|
||||
_318_, 48.506, 29.92, 1.8
|
||||
FILLER_8_135, 72.66, 29.92, 1.8
|
||||
FILLER_9_145, 72.66, 29.92, 1.8
|
||||
_309_, 72.66, 29.92, 1.8
|
||||
_311_, 72.66, 29.92, 1.8
|
||||
_328_, 72.66, 29.92, 1.8
|
||||
_441_, 72.66, 29.92, 1.8
|
||||
ANTENNA__422__A1, 83.48, 29.92, 1.8
|
||||
ringosc.iss.ctrlen0, 83.48, 29.92, 1.8
|
||||
ringosc.iss.delayen1, 83.48, 29.92, 1.8
|
||||
ringosc.iss.delayenb0, 83.48, 29.92, 1.8
|
||||
ANTENNA_ringosc.ibufp00_A, 5.52, 24.48, 1.8
|
||||
PHY_12, 5.52, 24.48, 1.8
|
||||
PHY_14, 5.52, 24.48, 1.8
|
||||
_250_, 5.52, 24.48, 1.8
|
||||
ringosc.ibufp01, 5.52, 24.48, 1.8
|
||||
FILLER_6_186, 94.3, 24.48, 1.8
|
||||
FILLER_7_186, 94.3, 24.48, 1.8
|
||||
PHY_13, 94.3, 24.48, 1.8
|
||||
PHY_15, 94.3, 24.48, 1.8
|
||||
ringosc.iss.const1, 94.3, 24.48, 1.8
|
||||
ANTENNA__289__A1, 13.68, 24.48, 1.8
|
||||
FILLER_8_24, 13.68, 24.48, 1.8
|
||||
_244_, 13.68, 24.48, 1.8
|
||||
ringosc.ibufp00, 13.68, 24.48, 1.8
|
||||
ANTENNA__258__A, 35.173, 24.48, 1.8
|
||||
_217_, 35.173, 24.48, 1.8
|
||||
_218_, 35.173, 24.48, 1.8
|
||||
_324_, 35.173, 24.48, 1.8
|
||||
_464_, 35.173, 24.48, 1.8
|
||||
_477_, 35.173, 24.48, 1.8
|
||||
FILLER_6_85, 48.506, 24.48, 1.8
|
||||
_439_, 48.506, 24.48, 1.8
|
||||
_467_, 48.506, 24.48, 1.8
|
||||
FILLER_8_147, 72.66, 24.48, 1.8
|
||||
_429_, 72.66, 24.48, 1.8
|
||||
_463_, 72.66, 24.48, 1.8
|
||||
_466_, 72.66, 24.48, 1.8
|
||||
ANTENNA__409__B1, 83.48, 24.48, 1.8
|
||||
ANTENNA__419__A1, 83.48, 24.48, 1.8
|
||||
ANTENNA__427__A, 83.48, 24.48, 1.8
|
||||
FILLER_6_169, 83.48, 24.48, 1.8
|
||||
FILLER_7_162, 83.48, 24.48, 1.8
|
||||
FILLER_7_172, 83.48, 24.48, 1.8
|
||||
FILLER_7_179, 83.48, 24.48, 1.8
|
||||
ringosc.iss.delayen0, 83.48, 24.48, 1.8
|
||||
ringosc.iss.delayint0, 83.48, 24.48, 1.8
|
||||
FILLER_6_3, 5.52, 19.04, 1.8
|
||||
PHY_10, 5.52, 19.04, 1.8
|
||||
PHY_8, 5.52, 19.04, 1.8
|
||||
_258_, 5.52, 19.04, 1.8
|
||||
_259_, 5.52, 19.04, 1.8
|
||||
ANTENNA__428__A, 94.3, 19.04, 1.8
|
||||
PHY_11, 94.3, 19.04, 1.8
|
||||
PHY_9, 94.3, 19.04, 1.8
|
||||
_428_, 94.3, 19.04, 1.8
|
||||
ANTENNA__425__A, 13.68, 19.04, 1.8
|
||||
_220_, 13.68, 19.04, 1.8
|
||||
_288_, 13.68, 19.04, 1.8
|
||||
_476_, 13.68, 19.04, 1.8
|
||||
FILLER_5_53, 35.173, 19.04, 1.8
|
||||
_231_, 35.173, 19.04, 1.8
|
||||
_454_, 35.173, 19.04, 1.8
|
||||
_475_, 35.173, 19.04, 1.8
|
||||
FILLER_5_106, 48.506, 19.04, 1.8
|
||||
FILLER_6_100, 48.506, 19.04, 1.8
|
||||
_331_, 48.506, 19.04, 1.8
|
||||
_332_, 48.506, 19.04, 1.8
|
||||
_336_, 48.506, 19.04, 1.8
|
||||
_426_, 48.506, 19.04, 1.8
|
||||
_434_, 48.506, 19.04, 1.8
|
||||
_442_, 48.506, 19.04, 1.8
|
||||
FILLER_4_135, 72.66, 19.04, 1.8
|
||||
_445_, 72.66, 19.04, 1.8
|
||||
_446_, 72.66, 19.04, 1.8
|
||||
_469_, 72.66, 19.04, 1.8
|
||||
_472_, 72.66, 19.04, 1.8
|
||||
_216_, 83.48, 19.04, 1.8
|
||||
_347_, 83.48, 19.04, 1.8
|
||||
_427_, 83.48, 19.04, 1.8
|
||||
ringosc.iss.reseten0, 83.48, 19.04, 1.8
|
||||
FILLER_3_3, 5.52, 13.6, 1.8
|
||||
FILLER_4_3, 5.52, 13.6, 1.8
|
||||
PHY_4, 5.52, 13.6, 1.8
|
||||
PHY_6, 5.52, 13.6, 1.8
|
||||
_252_, 5.52, 13.6, 1.8
|
||||
_253_, 5.52, 13.6, 1.8
|
||||
FILLER_2_187, 94.3, 13.6, 1.8
|
||||
FILLER_3_187, 94.3, 13.6, 1.8
|
||||
PHY_5, 94.3, 13.6, 1.8
|
||||
PHY_7, 94.3, 13.6, 1.8
|
||||
ANTENNA__244__A, 13.68, 13.6, 1.8
|
||||
FILLER_4_25, 13.68, 13.6, 1.8
|
||||
_251_, 13.68, 13.6, 1.8
|
||||
_256_, 13.68, 13.6, 1.8
|
||||
_257_, 13.68, 13.6, 1.8
|
||||
FILLER_3_64, 35.173, 13.6, 1.8
|
||||
FILLER_4_74, 35.173, 13.6, 1.8
|
||||
_234_, 35.173, 13.6, 1.8
|
||||
_246_, 35.173, 13.6, 1.8
|
||||
_436_, 35.173, 13.6, 1.8
|
||||
_443_, 35.173, 13.6, 1.8
|
||||
_452_, 35.173, 13.6, 1.8
|
||||
_462_, 35.173, 13.6, 1.8
|
||||
_474_, 35.173, 13.6, 1.8
|
||||
FILLER_2_79, 48.506, 13.6, 1.8
|
||||
FILLER_2_92, 48.506, 13.6, 1.8
|
||||
FILLER_3_95, 48.506, 13.6, 1.8
|
||||
_333_, 48.506, 13.6, 1.8
|
||||
_334_, 48.506, 13.6, 1.8
|
||||
_335_, 48.506, 13.6, 1.8
|
||||
_431_, 48.506, 13.6, 1.8
|
||||
FILLER_4_147, 72.66, 13.6, 1.8
|
||||
_430_, 72.66, 13.6, 1.8
|
||||
_438_, 72.66, 13.6, 1.8
|
||||
_455_, 72.66, 13.6, 1.8
|
||||
_457_, 72.66, 13.6, 1.8
|
||||
FILLER_3_169, 83.48, 13.6, 1.8
|
||||
FILLER_4_173, 83.48, 13.6, 1.8
|
||||
_286_, 83.48, 13.6, 1.8
|
||||
_345_, 83.48, 13.6, 1.8
|
||||
_346_, 83.48, 13.6, 1.8
|
||||
FILLER_1_3, 5.52, 8.16, 1.8
|
||||
PHY_0, 5.52, 8.16, 1.8
|
||||
PHY_2, 5.52, 8.16, 1.8
|
||||
_227_, 5.52, 8.16, 1.8
|
||||
_254_, 5.52, 8.16, 1.8
|
||||
clockp_buffer_0, 5.52, 8.16, 1.8
|
||||
FILLER_1_186, 94.3, 8.16, 1.8
|
||||
PHY_1, 94.3, 8.16, 1.8
|
||||
PHY_3, 94.3, 8.16, 1.8
|
||||
_215_, 94.3, 8.16, 1.8
|
||||
FILLER_0_24, 13.68, 8.16, 1.8
|
||||
FILLER_1_20, 13.68, 8.16, 1.8
|
||||
_255_, 13.68, 8.16, 1.8
|
||||
_287_, 13.68, 8.16, 1.8
|
||||
_473_, 13.68, 8.16, 1.8
|
||||
ANTENNA__287__B1, 35.173, 8.16, 1.8
|
||||
FILLER_0_60, 35.173, 8.16, 1.8
|
||||
FILLER_0_72, 35.173, 8.16, 1.8
|
||||
_223_, 35.173, 8.16, 1.8
|
||||
_224_, 35.173, 8.16, 1.8
|
||||
_230_, 35.173, 8.16, 1.8
|
||||
_233_, 35.173, 8.16, 1.8
|
||||
_235_, 35.173, 8.16, 1.8
|
||||
_451_, 35.173, 8.16, 1.8
|
||||
_458_, 35.173, 8.16, 1.8
|
||||
FILLER_0_94, 48.506, 8.16, 1.8
|
||||
FILLER_1_99, 48.506, 8.16, 1.8
|
||||
_225_, 48.506, 8.16, 1.8
|
||||
_330_, 48.506, 8.16, 1.8
|
||||
_337_, 48.506, 8.16, 1.8
|
||||
_340_, 48.506, 8.16, 1.8
|
||||
_341_, 48.506, 8.16, 1.8
|
||||
_342_, 48.506, 8.16, 1.8
|
||||
ANTENNA__470__D, 72.66, 8.16, 1.8
|
||||
FILLER_0_141, 72.66, 8.16, 1.8
|
||||
_456_, 72.66, 8.16, 1.8
|
||||
_470_, 72.66, 8.16, 1.8
|
||||
_471_, 72.66, 8.16, 1.8
|
||||
FILLER_0_175, 83.48, 8.16, 1.8
|
||||
FILLER_1_165, 83.48, 8.16, 1.8
|
||||
FILLER_1_169, 83.48, 8.16, 1.8
|
||||
FILLER_2_173, 83.48, 8.16, 1.8
|
||||
_214_, 83.48, 8.16, 1.8
|
||||
_343_, 83.48, 8.16, 1.8
|
||||
_344_, 83.48, 8.16, 1.8
|
||||
_448_, 83.48, 8.16, 1.8
|
||||
_449_, 83.48, 8.16, 1.8
|
||||
|
||||
|
|
@ -1,75 +0,0 @@
|
|||
|
||||
Magic 8.3 revision 324 - Compiled on Thu Sep 15 11:38:02 UTC 2022.
|
||||
Starting magic under Tcl interpreter
|
||||
Using the terminal as the console.
|
||||
Using NULL graphics device.
|
||||
Processing system .magicrc file
|
||||
Sourcing design .magicrc for technology sky130A ...
|
||||
2 Magic internal units = 1 Lambda
|
||||
Input style sky130(vendor): scaleFactor=2, multiplier=2
|
||||
The following types are not handled by extraction and will be treated as non-electrical types:
|
||||
ubm
|
||||
Scaled tech values by 2 / 1 to match internal grid scaling
|
||||
Loading sky130A Device Generator Menu ...
|
||||
Using technology "sky130A", version 1.0.341-2-gde752ec
|
||||
Warning: Calma reading is not undoable! I hope that's OK.
|
||||
Library written using GDS-II Release 3.0
|
||||
Library name: digital_pll
|
||||
Reading "sky130_fd_sc_hd__fill_1".
|
||||
Reading "sky130_fd_sc_hd__fill_2".
|
||||
Reading "sky130_fd_sc_hd__decap_4".
|
||||
Reading "sky130_fd_sc_hd__decap_3".
|
||||
Reading "sky130_fd_sc_hd__nand2_2".
|
||||
Reading "sky130_fd_sc_hd__o21ai_2".
|
||||
Reading "sky130_fd_sc_hd__clkbuf_16".
|
||||
Reading "sky130_fd_sc_hd__tapvpwrvgnd_1".
|
||||
Reading "sky130_fd_sc_hd__mux2_2".
|
||||
Reading "sky130_fd_sc_hd__dfrtp_2".
|
||||
Reading "sky130_fd_sc_hd__nor2_2".
|
||||
Reading "sky130_fd_sc_hd__buf_2".
|
||||
Reading "sky130_fd_sc_hd__diode_2".
|
||||
Reading "sky130_fd_sc_hd__inv_2".
|
||||
Reading "sky130_fd_sc_hd__xor2_2".
|
||||
Reading "sky130_fd_sc_hd__decap_6".
|
||||
Reading "sky130_fd_sc_hd__nand3_2".
|
||||
Reading "sky130_fd_sc_hd__xnor2_2".
|
||||
Reading "sky130_fd_sc_hd__a21boi_2".
|
||||
Reading "sky130_ef_sc_hd__decap_12".
|
||||
Reading "sky130_fd_sc_hd__nand3b_2".
|
||||
Reading "sky130_fd_sc_hd__and2_2".
|
||||
Reading "sky130_fd_sc_hd__a21oi_2".
|
||||
Reading "sky130_fd_sc_hd__and3_2".
|
||||
Reading "sky130_fd_sc_hd__nand2b_2".
|
||||
Reading "sky130_fd_sc_hd__a211o_2".
|
||||
Reading "sky130_fd_sc_hd__decap_8".
|
||||
Reading "sky130_fd_sc_hd__and4b_2".
|
||||
Reading "sky130_fd_sc_hd__o21a_2".
|
||||
Reading "sky130_fd_sc_hd__o211a_2".
|
||||
Reading "sky130_fd_sc_hd__a21o_2".
|
||||
Reading "sky130_fd_sc_hd__einvp_1".
|
||||
Reading "sky130_fd_sc_hd__clkinv_2".
|
||||
Reading "sky130_fd_sc_hd__clkinv_8".
|
||||
Reading "sky130_fd_sc_hd__conb_1".
|
||||
Reading "sky130_fd_sc_hd__clkinv_1".
|
||||
Reading "sky130_fd_sc_hd__o32a_2".
|
||||
Reading "sky130_fd_sc_hd__a31o_2".
|
||||
Reading "sky130_fd_sc_hd__einvp_2".
|
||||
Reading "sky130_fd_sc_hd__clkbuf_1".
|
||||
Reading "sky130_fd_sc_hd__o31a_2".
|
||||
Reading "sky130_fd_sc_hd__o22a_2".
|
||||
Reading "sky130_fd_sc_hd__or2_2".
|
||||
Reading "sky130_fd_sc_hd__einvn_8".
|
||||
Reading "sky130_fd_sc_hd__o2111a_2".
|
||||
Reading "sky130_fd_sc_hd__o2bb2a_2".
|
||||
Reading "sky130_fd_sc_hd__einvn_4".
|
||||
Reading "sky130_fd_sc_hd__o21ba_2".
|
||||
Reading "sky130_fd_sc_hd__nand4b_2".
|
||||
Reading "sky130_fd_sc_hd__clkbuf_2".
|
||||
Reading "sky130_fd_sc_hd__a32o_2".
|
||||
Reading "sky130_fd_sc_hd__and3b_2".
|
||||
Reading "sky130_fd_sc_hd__nand4_2".
|
||||
Reading "sky130_fd_sc_hd__a22o_2".
|
||||
Reading "sky130_fd_sc_hd__and2b_2".
|
||||
Reading "sky130_fd_sc_hd__o221a_2".
|
||||
Reading "digital_pll".
|
||||
[INFO]: Wrote /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/tmp/signoff/gds_ptrs.mag including GDS pointers.
|
||||
|
|
@ -1,115 +0,0 @@
|
|||
|
||||
Magic 8.3 revision 324 - Compiled on Thu Sep 15 11:38:02 UTC 2022.
|
||||
Starting magic under Tcl interpreter
|
||||
Using the terminal as the console.
|
||||
Using NULL graphics device.
|
||||
Processing system .magicrc file
|
||||
Sourcing design .magicrc for technology sky130A ...
|
||||
2 Magic internal units = 1 Lambda
|
||||
Input style sky130(vendor): scaleFactor=2, multiplier=2
|
||||
The following types are not handled by extraction and will be treated as non-electrical types:
|
||||
ubm
|
||||
Scaled tech values by 2 / 1 to match internal grid scaling
|
||||
Loading sky130A Device Generator Menu ...
|
||||
Using technology "sky130A", version 1.0.341-2-gde752ec
|
||||
Reading LEF data from file /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/techlef/sky130_fd_sc_hd__nom.tlef.
|
||||
This action cannot be undone.
|
||||
LEF read, Line 78 (Message): Unknown keyword "ANTENNAMODEL" in LEF file; ignoring.
|
||||
LEF read, Line 79 (Message): Unknown keyword "ANTENNADIFFSIDEAREARATIO" in LEF file; ignoring.
|
||||
LEF read, Line 112 (Message): Unknown keyword "MINENCLOSEDAREA" in LEF file; ignoring.
|
||||
LEF read, Line 114 (Message): Unknown keyword "ANTENNAMODEL" in LEF file; ignoring.
|
||||
LEF read, Line 115 (Message): Unknown keyword "ANTENNADIFFSIDEAREARATIO" in LEF file; ignoring.
|
||||
LEF read, Line 121 (Message): Unknown keyword "MAXIMUMDENSITY" in LEF file; ignoring.
|
||||
LEF read, Line 122 (Message): Unknown keyword "DENSITYCHECKWINDOW" in LEF file; ignoring.
|
||||
LEF read, Line 123 (Message): Unknown keyword "DENSITYCHECKSTEP" in LEF file; ignoring.
|
||||
LEF read, Line 156 (Message): Unknown keyword "MINENCLOSEDAREA" in LEF file; ignoring.
|
||||
LEF read, Line 164 (Message): Unknown keyword "ANTENNAMODEL" in LEF file; ignoring.
|
||||
LEF read, Line 165 (Message): Unknown keyword "ANTENNADIFFSIDEAREARATIO" in LEF file; ignoring.
|
||||
LEF read, Line 167 (Message): Unknown keyword "MAXIMUMDENSITY" in LEF file; ignoring.
|
||||
LEF read, Line 168 (Message): Unknown keyword "DENSITYCHECKWINDOW" in LEF file; ignoring.
|
||||
LEF read, Line 169 (Message): Unknown keyword "DENSITYCHECKSTEP" in LEF file; ignoring.
|
||||
LEF read, Line 206 (Message): Unknown keyword "ANTENNAMODEL" in LEF file; ignoring.
|
||||
LEF read, Line 207 (Message): Unknown keyword "ANTENNADIFFSIDEAREARATIO" in LEF file; ignoring.
|
||||
LEF read, Line 209 (Message): Unknown keyword "MAXIMUMDENSITY" in LEF file; ignoring.
|
||||
LEF read, Line 210 (Message): Unknown keyword "DENSITYCHECKWINDOW" in LEF file; ignoring.
|
||||
LEF read, Line 211 (Message): Unknown keyword "DENSITYCHECKSTEP" in LEF file; ignoring.
|
||||
LEF read, Line 248 (Message): Unknown keyword "ANTENNAMODEL" in LEF file; ignoring.
|
||||
LEF read, Line 249 (Message): Unknown keyword "ANTENNADIFFSIDEAREARATIO" in LEF file; ignoring.
|
||||
LEF read, Line 251 (Message): Unknown keyword "MAXIMUMDENSITY" in LEF file; ignoring.
|
||||
LEF read, Line 252 (Message): Unknown keyword "DENSITYCHECKWINDOW" in LEF file; ignoring.
|
||||
LEF read, Line 253 (Message): Unknown keyword "DENSITYCHECKSTEP" in LEF file; ignoring.
|
||||
LEF read, Line 290 (Message): Unknown keyword "ANTENNAMODEL" in LEF file; ignoring.
|
||||
LEF read, Line 291 (Message): Unknown keyword "ANTENNADIFFSIDEAREARATIO" in LEF file; ignoring.
|
||||
LEF read: Processed 797 lines.
|
||||
Reading DEF data from file /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/routing/digital_pll.def.
|
||||
This action cannot be undone.
|
||||
Processed 4 vias total.
|
||||
Processed 1093 subcell instances total.
|
||||
Processed 39 pins total.
|
||||
Processed 2 special nets total.
|
||||
Processed 371 nets total.
|
||||
DEF read: Processed 7531 lines.
|
||||
Root cell box:
|
||||
width x height ( llx, lly ), ( urx, ury ) area (units^2)
|
||||
|
||||
microns: 100.000 x 75.000 ( 0.000, 0.000), ( 100.000, 75.000) 7500.000
|
||||
lambda: 10000.00 x 7500.00 ( 0.00, 0.00 ), ( 10000.00, 7500.00) 75000000.00
|
||||
internal: 20000 x 15000 ( 0, 0 ), ( 20000, 15000) 300000000
|
||||
Generating output for cell sky130_fd_sc_hd__fill_1
|
||||
Generating output for cell sky130_fd_sc_hd__fill_2
|
||||
Generating output for cell sky130_fd_sc_hd__decap_4
|
||||
Generating output for cell sky130_fd_sc_hd__decap_3
|
||||
Generating output for cell sky130_fd_sc_hd__nand2_2
|
||||
Generating output for cell sky130_fd_sc_hd__o21ai_2
|
||||
Generating output for cell sky130_fd_sc_hd__clkbuf_16
|
||||
Generating output for cell sky130_fd_sc_hd__tapvpwrvgnd_1
|
||||
Generating output for cell sky130_fd_sc_hd__mux2_2
|
||||
Generating output for cell sky130_fd_sc_hd__dfrtp_2
|
||||
Generating output for cell sky130_fd_sc_hd__nor2_2
|
||||
Generating output for cell sky130_fd_sc_hd__buf_2
|
||||
Generating output for cell sky130_fd_sc_hd__diode_2
|
||||
Generating output for cell sky130_fd_sc_hd__inv_2
|
||||
Generating output for cell sky130_fd_sc_hd__xor2_2
|
||||
Generating output for cell sky130_fd_sc_hd__decap_6
|
||||
Generating output for cell sky130_fd_sc_hd__nand3_2
|
||||
Generating output for cell sky130_fd_sc_hd__xnor2_2
|
||||
Generating output for cell sky130_fd_sc_hd__a21boi_2
|
||||
Generating output for cell sky130_ef_sc_hd__decap_12
|
||||
Generating output for cell sky130_fd_sc_hd__nand3b_2
|
||||
Generating output for cell sky130_fd_sc_hd__and2_2
|
||||
Generating output for cell sky130_fd_sc_hd__a21oi_2
|
||||
Generating output for cell sky130_fd_sc_hd__and3_2
|
||||
Generating output for cell sky130_fd_sc_hd__nand2b_2
|
||||
Generating output for cell sky130_fd_sc_hd__a211o_2
|
||||
Generating output for cell sky130_fd_sc_hd__decap_8
|
||||
Generating output for cell sky130_fd_sc_hd__and4b_2
|
||||
Generating output for cell sky130_fd_sc_hd__o21a_2
|
||||
Generating output for cell sky130_fd_sc_hd__o211a_2
|
||||
Generating output for cell sky130_fd_sc_hd__a21o_2
|
||||
Generating output for cell sky130_fd_sc_hd__einvp_1
|
||||
Generating output for cell sky130_fd_sc_hd__clkinv_2
|
||||
Generating output for cell sky130_fd_sc_hd__clkinv_8
|
||||
Generating output for cell sky130_fd_sc_hd__conb_1
|
||||
Generating output for cell sky130_fd_sc_hd__clkinv_1
|
||||
Generating output for cell sky130_fd_sc_hd__o32a_2
|
||||
Generating output for cell sky130_fd_sc_hd__a31o_2
|
||||
Generating output for cell sky130_fd_sc_hd__einvp_2
|
||||
Generating output for cell sky130_fd_sc_hd__clkbuf_1
|
||||
Generating output for cell sky130_fd_sc_hd__o31a_2
|
||||
Generating output for cell sky130_fd_sc_hd__o22a_2
|
||||
Generating output for cell sky130_fd_sc_hd__or2_2
|
||||
Generating output for cell sky130_fd_sc_hd__einvn_8
|
||||
Generating output for cell sky130_fd_sc_hd__o2111a_2
|
||||
Generating output for cell sky130_fd_sc_hd__o2bb2a_2
|
||||
Generating output for cell sky130_fd_sc_hd__einvn_4
|
||||
Generating output for cell sky130_fd_sc_hd__o21ba_2
|
||||
Generating output for cell sky130_fd_sc_hd__nand4b_2
|
||||
Generating output for cell sky130_fd_sc_hd__clkbuf_2
|
||||
Generating output for cell sky130_fd_sc_hd__a32o_2
|
||||
Generating output for cell sky130_fd_sc_hd__and3b_2
|
||||
Generating output for cell sky130_fd_sc_hd__nand4_2
|
||||
Generating output for cell sky130_fd_sc_hd__a22o_2
|
||||
Generating output for cell sky130_fd_sc_hd__and2b_2
|
||||
Generating output for cell sky130_fd_sc_hd__o221a_2
|
||||
Generating output for cell digital_pll
|
||||
[INFO]: GDS Write Complete
|
||||
|
|
@ -1,219 +0,0 @@
|
|||
|
||||
Magic 8.3 revision 324 - Compiled on Thu Sep 15 11:38:02 UTC 2022.
|
||||
Starting magic under Tcl interpreter
|
||||
Using the terminal as the console.
|
||||
Using NULL graphics device.
|
||||
Processing system .magicrc file
|
||||
Sourcing design .magicrc for technology sky130A ...
|
||||
2 Magic internal units = 1 Lambda
|
||||
Input style sky130(vendor): scaleFactor=2, multiplier=2
|
||||
The following types are not handled by extraction and will be treated as non-electrical types:
|
||||
ubm
|
||||
Scaled tech values by 2 / 1 to match internal grid scaling
|
||||
Loading sky130A Device Generator Menu ...
|
||||
Using technology "sky130A", version 1.0.341-2-gde752ec
|
||||
Reading LEF data from file /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/techlef/sky130_fd_sc_hd__nom.tlef.
|
||||
This action cannot be undone.
|
||||
LEF read, Line 78 (Message): Unknown keyword "ANTENNAMODEL" in LEF file; ignoring.
|
||||
LEF read, Line 79 (Message): Unknown keyword "ANTENNADIFFSIDEAREARATIO" in LEF file; ignoring.
|
||||
LEF read, Line 112 (Message): Unknown keyword "MINENCLOSEDAREA" in LEF file; ignoring.
|
||||
LEF read, Line 114 (Message): Unknown keyword "ANTENNAMODEL" in LEF file; ignoring.
|
||||
LEF read, Line 115 (Message): Unknown keyword "ANTENNADIFFSIDEAREARATIO" in LEF file; ignoring.
|
||||
LEF read, Line 121 (Message): Unknown keyword "MAXIMUMDENSITY" in LEF file; ignoring.
|
||||
LEF read, Line 122 (Message): Unknown keyword "DENSITYCHECKWINDOW" in LEF file; ignoring.
|
||||
LEF read, Line 123 (Message): Unknown keyword "DENSITYCHECKSTEP" in LEF file; ignoring.
|
||||
LEF read, Line 156 (Message): Unknown keyword "MINENCLOSEDAREA" in LEF file; ignoring.
|
||||
LEF read, Line 164 (Message): Unknown keyword "ANTENNAMODEL" in LEF file; ignoring.
|
||||
LEF read, Line 165 (Message): Unknown keyword "ANTENNADIFFSIDEAREARATIO" in LEF file; ignoring.
|
||||
LEF read, Line 167 (Message): Unknown keyword "MAXIMUMDENSITY" in LEF file; ignoring.
|
||||
LEF read, Line 168 (Message): Unknown keyword "DENSITYCHECKWINDOW" in LEF file; ignoring.
|
||||
LEF read, Line 169 (Message): Unknown keyword "DENSITYCHECKSTEP" in LEF file; ignoring.
|
||||
LEF read, Line 206 (Message): Unknown keyword "ANTENNAMODEL" in LEF file; ignoring.
|
||||
LEF read, Line 207 (Message): Unknown keyword "ANTENNADIFFSIDEAREARATIO" in LEF file; ignoring.
|
||||
LEF read, Line 209 (Message): Unknown keyword "MAXIMUMDENSITY" in LEF file; ignoring.
|
||||
LEF read, Line 210 (Message): Unknown keyword "DENSITYCHECKWINDOW" in LEF file; ignoring.
|
||||
LEF read, Line 211 (Message): Unknown keyword "DENSITYCHECKSTEP" in LEF file; ignoring.
|
||||
LEF read, Line 248 (Message): Unknown keyword "ANTENNAMODEL" in LEF file; ignoring.
|
||||
LEF read, Line 249 (Message): Unknown keyword "ANTENNADIFFSIDEAREARATIO" in LEF file; ignoring.
|
||||
LEF read, Line 251 (Message): Unknown keyword "MAXIMUMDENSITY" in LEF file; ignoring.
|
||||
LEF read, Line 252 (Message): Unknown keyword "DENSITYCHECKWINDOW" in LEF file; ignoring.
|
||||
LEF read, Line 253 (Message): Unknown keyword "DENSITYCHECKSTEP" in LEF file; ignoring.
|
||||
LEF read, Line 290 (Message): Unknown keyword "ANTENNAMODEL" in LEF file; ignoring.
|
||||
LEF read, Line 291 (Message): Unknown keyword "ANTENNADIFFSIDEAREARATIO" in LEF file; ignoring.
|
||||
LEF read: Processed 797 lines.
|
||||
digital_pll: 10000 rects
|
||||
digital_pll: 20000 rects
|
||||
[INFO]: Writing abstract LEF
|
||||
Generating LEF output /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/signoff/digital_pll.lef for cell digital_pll:
|
||||
Diagnostic: Write LEF header for cell digital_pll
|
||||
Diagnostic: Writing LEF output for cell digital_pll
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__einvp_1" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/signoff/sky130_fd_sc_hd__einvp_1.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__einvp_1.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__clkinv_1" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/signoff/sky130_fd_sc_hd__clkinv_1.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__clkinv_1.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__einvn_4" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/signoff/sky130_fd_sc_hd__einvn_4.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__einvn_4.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__einvn_8" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/signoff/sky130_fd_sc_hd__einvn_8.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__einvn_8.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__einvp_2" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/signoff/sky130_fd_sc_hd__einvp_2.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__einvp_2.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__clkbuf_1" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/signoff/sky130_fd_sc_hd__clkbuf_1.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__clkbuf_1.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__or2_2" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/signoff/sky130_fd_sc_hd__or2_2.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__or2_2.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__conb_1" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/signoff/sky130_fd_sc_hd__conb_1.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__conb_1.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__clkinv_8" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/signoff/sky130_fd_sc_hd__clkinv_8.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__clkinv_8.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__clkinv_2" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/signoff/sky130_fd_sc_hd__clkinv_2.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__clkinv_2.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__clkbuf_2" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/signoff/sky130_fd_sc_hd__clkbuf_2.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__clkbuf_2.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__clkbuf_16" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/signoff/sky130_fd_sc_hd__clkbuf_16.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__clkbuf_16.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__dfrtp_2" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/signoff/sky130_fd_sc_hd__dfrtp_2.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__dfrtp_2.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__nor2_2" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/signoff/sky130_fd_sc_hd__nor2_2.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__nor2_2.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__buf_2" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/signoff/sky130_fd_sc_hd__buf_2.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__buf_2.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__nand2_2" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/signoff/sky130_fd_sc_hd__nand2_2.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__nand2_2.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__a22o_2" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/signoff/sky130_fd_sc_hd__a22o_2.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__a22o_2.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__a21o_2" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/signoff/sky130_fd_sc_hd__a21o_2.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__a21o_2.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__a32o_2" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/signoff/sky130_fd_sc_hd__a32o_2.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__a32o_2.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__nand3_2" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/signoff/sky130_fd_sc_hd__nand3_2.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__nand3_2.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__o31a_2" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/signoff/sky130_fd_sc_hd__o31a_2.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__o31a_2.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__o21ai_2" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/signoff/sky130_fd_sc_hd__o21ai_2.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__o21ai_2.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__o2111a_2" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/signoff/sky130_fd_sc_hd__o2111a_2.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__o2111a_2.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__o211a_2" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/signoff/sky130_fd_sc_hd__o211a_2.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__o211a_2.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__o22a_2" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/signoff/sky130_fd_sc_hd__o22a_2.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__o22a_2.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__o221a_2" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/signoff/sky130_fd_sc_hd__o221a_2.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__o221a_2.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__and3_2" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/signoff/sky130_fd_sc_hd__and3_2.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__and3_2.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__nand3b_2" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/signoff/sky130_fd_sc_hd__nand3b_2.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__nand3b_2.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__nand2b_2" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/signoff/sky130_fd_sc_hd__nand2b_2.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__nand2b_2.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__and2_2" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/signoff/sky130_fd_sc_hd__and2_2.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__and2_2.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__and3b_2" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/signoff/sky130_fd_sc_hd__and3b_2.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__and3b_2.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__a211o_2" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/signoff/sky130_fd_sc_hd__a211o_2.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__a211o_2.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__o21a_2" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/signoff/sky130_fd_sc_hd__o21a_2.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__o21a_2.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__a21oi_2" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/signoff/sky130_fd_sc_hd__a21oi_2.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__a21oi_2.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__inv_2" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/signoff/sky130_fd_sc_hd__inv_2.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__inv_2.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__and2b_2" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/signoff/sky130_fd_sc_hd__and2b_2.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__and2b_2.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__mux2_2" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/signoff/sky130_fd_sc_hd__mux2_2.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__mux2_2.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__a21boi_2" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/signoff/sky130_fd_sc_hd__a21boi_2.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__a21boi_2.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__xnor2_2" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/signoff/sky130_fd_sc_hd__xnor2_2.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__xnor2_2.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__xor2_2" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/signoff/sky130_fd_sc_hd__xor2_2.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__xor2_2.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__o2bb2a_2" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/signoff/sky130_fd_sc_hd__o2bb2a_2.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__o2bb2a_2.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__nand4b_2" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/signoff/sky130_fd_sc_hd__nand4b_2.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__nand4b_2.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__and4b_2" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/signoff/sky130_fd_sc_hd__and4b_2.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__and4b_2.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__nand4_2" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/signoff/sky130_fd_sc_hd__nand4_2.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__nand4_2.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__o21ba_2" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/signoff/sky130_fd_sc_hd__o21ba_2.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__o21ba_2.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__a31o_2" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/signoff/sky130_fd_sc_hd__a31o_2.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__a31o_2.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__o32a_2" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/signoff/sky130_fd_sc_hd__o32a_2.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__o32a_2.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__tapvpwrvgnd_1" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/signoff/sky130_fd_sc_hd__tapvpwrvgnd_1.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__tapvpwrvgnd_1.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__decap_3" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/signoff/sky130_fd_sc_hd__decap_3.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__decap_3.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__decap_4" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/signoff/sky130_fd_sc_hd__decap_4.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__decap_4.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__fill_2" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/signoff/sky130_fd_sc_hd__fill_2.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__fill_2.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__fill_1" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/signoff/sky130_fd_sc_hd__fill_1.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__fill_1.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__decap_8" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/signoff/sky130_fd_sc_hd__decap_8.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__decap_8.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__decap_6" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/signoff/sky130_fd_sc_hd__decap_6.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__decap_6.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_ef_sc_hd__decap_12" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/signoff/sky130_ef_sc_hd__decap_12.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_ef_sc_hd__decap_12.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__diode_2" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/signoff/sky130_fd_sc_hd__diode_2.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__diode_2.mag.
|
||||
The discovered version will be used.
|
||||
Diagnostic: Scale value is 0.005000
|
||||
[INFO]: LEF Write Complete
|
||||
|
|
@ -1,18 +0,0 @@
|
|||
|
||||
Magic 8.3 revision 324 - Compiled on Thu Sep 15 11:38:02 UTC 2022.
|
||||
Starting magic under Tcl interpreter
|
||||
Using the terminal as the console.
|
||||
Using NULL graphics device.
|
||||
Processing system .magicrc file
|
||||
Sourcing design .magicrc for technology sky130A ...
|
||||
2 Magic internal units = 1 Lambda
|
||||
Input style sky130(vendor): scaleFactor=2, multiplier=2
|
||||
The following types are not handled by extraction and will be treated as non-electrical types:
|
||||
ubm
|
||||
Scaled tech values by 2 / 1 to match internal grid scaling
|
||||
Loading sky130A Device Generator Menu ...
|
||||
Using technology "sky130A", version 1.0.341-2-gde752ec
|
||||
Reading LEF data from file /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/signoff/digital_pll.lef.
|
||||
This action cannot be undone.
|
||||
LEF read: Processed 399 lines.
|
||||
[INFO]: DONE GENERATING MAGLEF VIEW
|
||||
|
|
@ -1,17 +0,0 @@
|
|||
|
||||
Input: /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/routing/digital_pll.def
|
||||
Output: /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/signoff/digital_pll.klayout.gds
|
||||
Design: digital_pll
|
||||
Technology File: /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.tech/klayout/tech/sky130A.lyt
|
||||
GDS File List: ['/home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/gds/sky130_fd_sc_hd.gds']
|
||||
LEF File: /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/tmp/merged.nom.lef
|
||||
|
||||
[INFO] Clearing cells...
|
||||
[INFO] Merging GDS files...
|
||||
/home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/gds/sky130_fd_sc_hd.gds
|
||||
[INFO] Copying toplevel cell 'digital_pll'
|
||||
WARNING: no fill config file specified
|
||||
[INFO] Checking for missing GDS...
|
||||
[INFO] All LEF cells have matching GDS cells
|
||||
[INFO] Writing out GDS '/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/signoff/digital_pll.klayout.gds'
|
||||
[INFO] Done.
|
||||
|
|
@ -1,820 +0,0 @@
|
|||
First Layout: /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/signoff/digital_pll.gds
|
||||
Second Layout: /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/signoff/digital_pll.klayout.gds
|
||||
Design Name: digital_pll
|
||||
Output GDS will be: /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/reports/signoff/digital_pll.xor.xml
|
||||
Reading /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/signoff/digital_pll.gds ..
|
||||
Reading /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/signoff/digital_pll.klayout.gds ..
|
||||
--- Running XOR for 10/0 ---
|
||||
"input" in: xor.drc:38
|
||||
Polygons (raw): 0 (flat) 0 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 349.00M
|
||||
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|
||||
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|
||||
Elapsed: 0.000s Memory: 349.00M
|
||||
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|
||||
Polygons (raw): 192 (flat) 4 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 349.00M
|
||||
XOR differences: 192
|
||||
"output" in: xor.drc:40
|
||||
Polygons (raw): 192 (flat) 4 (hierarchical)
|
||||
Elapsed: 0.010s Memory: 349.00M
|
||||
--- Running XOR for 11/0 ---
|
||||
"input" in: xor.drc:38
|
||||
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|
||||
Elapsed: 0.000s Memory: 349.00M
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
Polygons (raw): 58 (flat) 6 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 349.00M
|
||||
XOR differences: 58
|
||||
"output" in: xor.drc:40
|
||||
Polygons (raw): 58 (flat) 6 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 349.00M
|
||||
--- Running XOR for 11/1 ---
|
||||
"input" in: xor.drc:38
|
||||
Polygons (raw): 0 (flat) 0 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 349.00M
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
Polygons (raw): 0 (flat) 0 (hierarchical)
|
||||
Elapsed: 0.010s Memory: 349.00M
|
||||
XOR differences: 0
|
||||
"output" in: xor.drc:40
|
||||
Polygons (raw): 0 (flat) 0 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 349.00M
|
||||
--- Running XOR for 11/2 ---
|
||||
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|
||||
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|
||||
Elapsed: 0.000s Memory: 349.00M
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
Polygons (raw): 4 (flat) 4 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 349.00M
|
||||
XOR differences: 4
|
||||
"output" in: xor.drc:40
|
||||
Polygons (raw): 4 (flat) 4 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 349.00M
|
||||
--- Running XOR for 12/0 ---
|
||||
"input" in: xor.drc:38
|
||||
Polygons (raw): 0 (flat) 0 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 349.00M
|
||||
"input" in: xor.drc:38
|
||||
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|
||||
Elapsed: 0.000s Memory: 349.00M
|
||||
"^" in: xor.drc:38
|
||||
Polygons (raw): 6 (flat) 1 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 349.00M
|
||||
XOR differences: 6
|
||||
"output" in: xor.drc:40
|
||||
Polygons (raw): 6 (flat) 1 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 349.00M
|
||||
--- Running XOR for 122/16 ---
|
||||
"input" in: xor.drc:38
|
||||
Polygons (raw): 1020 (flat) 56 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 349.00M
|
||||
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|
||||
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|
||||
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|
||||
"^" in: xor.drc:38
|
||||
Polygons (raw): 0 (flat) 0 (hierarchical)
|
||||
Elapsed: 0.010s Memory: 349.00M
|
||||
XOR differences: 0
|
||||
"output" in: xor.drc:40
|
||||
Polygons (raw): 0 (flat) 0 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 349.00M
|
||||
--- Running XOR for 13/0 ---
|
||||
"input" in: xor.drc:38
|
||||
Polygons (raw): 0 (flat) 0 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 349.00M
|
||||
"input" in: xor.drc:38
|
||||
Polygons (raw): 9 (flat) 4 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 349.00M
|
||||
"^" in: xor.drc:38
|
||||
Polygons (raw): 9 (flat) 4 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 349.00M
|
||||
XOR differences: 9
|
||||
"output" in: xor.drc:40
|
||||
Polygons (raw): 9 (flat) 4 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 349.00M
|
||||
--- Running XOR for 13/1 ---
|
||||
"input" in: xor.drc:38
|
||||
Polygons (raw): 0 (flat) 0 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 349.00M
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
Polygons (raw): 0 (flat) 0 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 349.00M
|
||||
XOR differences: 0
|
||||
"output" in: xor.drc:40
|
||||
Polygons (raw): 0 (flat) 0 (hierarchical)
|
||||
Elapsed: 0.010s Memory: 349.00M
|
||||
--- Running XOR for 13/2 ---
|
||||
"input" in: xor.drc:38
|
||||
Polygons (raw): 0 (flat) 0 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 349.00M
|
||||
"input" in: xor.drc:38
|
||||
Polygons (raw): 3 (flat) 3 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 349.00M
|
||||
"^" in: xor.drc:38
|
||||
Polygons (raw): 3 (flat) 3 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 349.00M
|
||||
XOR differences: 3
|
||||
"output" in: xor.drc:40
|
||||
Polygons (raw): 3 (flat) 3 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 349.00M
|
||||
--- Running XOR for 14/0 ---
|
||||
"input" in: xor.drc:38
|
||||
Polygons (raw): 0 (flat) 0 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 349.00M
|
||||
"input" in: xor.drc:38
|
||||
Polygons (raw): 1 (flat) 1 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 349.00M
|
||||
"^" in: xor.drc:38
|
||||
Polygons (raw): 1 (flat) 1 (hierarchical)
|
||||
Elapsed: 0.010s Memory: 349.00M
|
||||
XOR differences: 1
|
||||
"output" in: xor.drc:40
|
||||
Polygons (raw): 1 (flat) 1 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 349.00M
|
||||
--- Running XOR for 235/4 ---
|
||||
"input" in: xor.drc:38
|
||||
Polygons (raw): 1 (flat) 1 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 349.00M
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
Polygons (raw): 1 (flat) 1 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 349.00M
|
||||
XOR differences: 1
|
||||
"output" in: xor.drc:40
|
||||
Polygons (raw): 1 (flat) 1 (hierarchical)
|
||||
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|
||||
--- Running XOR for 236/0 ---
|
||||
"input" in: xor.drc:38
|
||||
Polygons (raw): 625 (flat) 53 (hierarchical)
|
||||
Elapsed: 0.010s Memory: 349.00M
|
||||
"input" in: xor.drc:38
|
||||
Polygons (raw): 625 (flat) 53 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 349.00M
|
||||
"^" in: xor.drc:38
|
||||
Polygons (raw): 0 (flat) 0 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 349.00M
|
||||
XOR differences: 0
|
||||
"output" in: xor.drc:40
|
||||
Polygons (raw): 0 (flat) 0 (hierarchical)
|
||||
Elapsed: 0.010s Memory: 349.00M
|
||||
--- Running XOR for 3/0 ---
|
||||
"input" in: xor.drc:38
|
||||
Polygons (raw): 0 (flat) 0 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 349.00M
|
||||
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|
||||
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|
||||
Elapsed: 0.000s Memory: 349.00M
|
||||
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|
||||
Polygons (raw): 1198 (flat) 1 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 349.00M
|
||||
XOR differences: 1198
|
||||
"output" in: xor.drc:40
|
||||
Polygons (raw): 1198 (flat) 1 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 349.00M
|
||||
--- Running XOR for 4/0 ---
|
||||
"input" in: xor.drc:38
|
||||
Polygons (raw): 0 (flat) 0 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 349.00M
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
Polygons (raw): 1198 (flat) 1 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 349.00M
|
||||
XOR differences: 1198
|
||||
"output" in: xor.drc:40
|
||||
Polygons (raw): 1198 (flat) 1 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 349.00M
|
||||
--- Running XOR for 5/0 ---
|
||||
"input" in: xor.drc:38
|
||||
Polygons (raw): 0 (flat) 0 (hierarchical)
|
||||
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|
||||
"input" in: xor.drc:38
|
||||
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|
||||
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|
||||
"^" in: xor.drc:38
|
||||
Polygons (raw): 4495 (flat) 1990 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 349.00M
|
||||
XOR differences: 4495
|
||||
"output" in: xor.drc:40
|
||||
Polygons (raw): 4495 (flat) 1990 (hierarchical)
|
||||
Elapsed: 0.010s Memory: 349.00M
|
||||
--- Running XOR for 6/0 ---
|
||||
"input" in: xor.drc:38
|
||||
Polygons (raw): 0 (flat) 0 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 349.00M
|
||||
"input" in: xor.drc:38
|
||||
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|
||||
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|
||||
"^" in: xor.drc:38
|
||||
Polygons (raw): 1502 (flat) 6 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 349.00M
|
||||
XOR differences: 1502
|
||||
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|
||||
Polygons (raw): 1502 (flat) 6 (hierarchical)
|
||||
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|
||||
--- Running XOR for 64/16 ---
|
||||
"input" in: xor.drc:38
|
||||
Polygons (raw): 1020 (flat) 56 (hierarchical)
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
"^" in: xor.drc:38
|
||||
Polygons (raw): 0 (flat) 0 (hierarchical)
|
||||
Elapsed: 0.010s Memory: 350.00M
|
||||
XOR differences: 0
|
||||
"output" in: xor.drc:40
|
||||
Polygons (raw): 0 (flat) 0 (hierarchical)
|
||||
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|
||||
--- Running XOR for 64/20 ---
|
||||
"input" in: xor.drc:38
|
||||
Polygons (raw): 1093 (flat) 56 (hierarchical)
|
||||
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|
||||
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|
||||
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|
||||
Elapsed: 0.000s Memory: 350.00M
|
||||
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|
||||
Polygons (raw): 0 (flat) 0 (hierarchical)
|
||||
Elapsed: 0.010s Memory: 350.00M
|
||||
XOR differences: 0
|
||||
"output" in: xor.drc:40
|
||||
Polygons (raw): 0 (flat) 0 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 350.00M
|
||||
--- Running XOR for 64/5 ---
|
||||
"input" in: xor.drc:38
|
||||
Polygons (raw): 0 (flat) 0 (hierarchical)
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
Polygons (raw): 0 (flat) 0 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 350.00M
|
||||
XOR differences: 0
|
||||
"output" in: xor.drc:40
|
||||
Polygons (raw): 0 (flat) 0 (hierarchical)
|
||||
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|
||||
--- Running XOR for 64/59 ---
|
||||
"input" in: xor.drc:38
|
||||
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|
||||
Elapsed: 0.000s Memory: 350.00M
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
Polygons (raw): 0 (flat) 0 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 350.00M
|
||||
XOR differences: 0
|
||||
"output" in: xor.drc:40
|
||||
Polygons (raw): 0 (flat) 0 (hierarchical)
|
||||
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|
||||
--- Running XOR for 65/20 ---
|
||||
"input" in: xor.drc:38
|
||||
Polygons (raw): 1581 (flat) 149 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 350.00M
|
||||
"input" in: xor.drc:38
|
||||
Polygons (raw): 1581 (flat) 149 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 350.00M
|
||||
"^" in: xor.drc:38
|
||||
Polygons (raw): 0 (flat) 0 (hierarchical)
|
||||
Elapsed: 0.010s Memory: 351.00M
|
||||
XOR differences: 0
|
||||
"output" in: xor.drc:40
|
||||
Polygons (raw): 0 (flat) 0 (hierarchical)
|
||||
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|
||||
--- Running XOR for 65/44 ---
|
||||
"input" in: xor.drc:38
|
||||
Polygons (raw): 150 (flat) 2 (hierarchical)
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
Polygons (raw): 0 (flat) 0 (hierarchical)
|
||||
Elapsed: 0.010s Memory: 351.00M
|
||||
XOR differences: 0
|
||||
"output" in: xor.drc:40
|
||||
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|
||||
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|
||||
--- Running XOR for 66/15 ---
|
||||
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|
||||
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|
||||
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|
||||
"input" in: xor.drc:38
|
||||
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|
||||
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|
||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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||||
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|
||||
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|
||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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||||
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||||
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|
||||
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|
||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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||||
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|
||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
Elapsed: 0.050s Memory: 354.00M
|
||||
XOR differences: 1198
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
Elapsed: 0.030s Memory: 354.00M
|
||||
XOR differences: 1112
|
||||
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|
||||
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|
||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
Elapsed: 0.000s Memory: 354.00M
|
||||
XOR differences: 1502
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
Elapsed: 0.000s Memory: 354.00M
|
||||
XOR differences: 0
|
||||
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|
||||
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|
||||
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|
||||
--- Running XOR for 69/16 ---
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
Polygons (raw): 15 (flat) 15 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 354.00M
|
||||
XOR differences: 15
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
Elapsed: 0.000s Memory: 354.00M
|
||||
XOR differences: 2381
|
||||
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|
||||
Polygons (raw): 2381 (flat) 2381 (hierarchical)
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
Elapsed: 0.000s Memory: 354.00M
|
||||
XOR differences: 298
|
||||
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|
||||
Polygons (raw): 298 (flat) 298 (hierarchical)
|
||||
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|
||||
--- Running XOR for 7/0 ---
|
||||
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|
||||
Polygons (raw): 0 (flat) 0 (hierarchical)
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
Polygons (raw): 2450 (flat) 990 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 354.00M
|
||||
XOR differences: 2450
|
||||
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|
||||
Polygons (raw): 2450 (flat) 990 (hierarchical)
|
||||
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|
||||
--- Running XOR for 7/1 ---
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
--- Running XOR for 7/2 ---
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
Elapsed: 0.010s Memory: 354.00M
|
||||
XOR differences: 15
|
||||
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|
||||
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|
||||
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|
||||
--- Running XOR for 70/16 ---
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
XOR differences: 22
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
XOR differences: 366
|
||||
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|
||||
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|
||||
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|
||||
--- Running XOR for 70/44 ---
|
||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
XOR differences: 192
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
Elapsed: 0.010s Memory: 354.00M
|
||||
XOR differences: 4
|
||||
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|
||||
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|
||||
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|
||||
--- Running XOR for 71/20 ---
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
Elapsed: 0.000s Memory: 354.00M
|
||||
XOR differences: 4
|
||||
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|
||||
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|
||||
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|
||||
--- Running XOR for 71/44 ---
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
Elapsed: 0.000s Memory: 354.00M
|
||||
XOR differences: 6
|
||||
"output" in: xor.drc:40
|
||||
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|
||||
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|
||||
--- Running XOR for 72/16 ---
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
Elapsed: 0.000s Memory: 354.00M
|
||||
XOR differences: 3
|
||||
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|
||||
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|
||||
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|
||||
--- Running XOR for 72/20 ---
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
XOR differences: 3
|
||||
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|
||||
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|
||||
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|
||||
--- Running XOR for 78/44 ---
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
Elapsed: 0.010s Memory: 354.00M
|
||||
XOR differences: 0
|
||||
"output" in: xor.drc:40
|
||||
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|
||||
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|
||||
--- Running XOR for 8/0 ---
|
||||
"input" in: xor.drc:38
|
||||
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|
||||
Elapsed: 0.000s Memory: 354.00M
|
||||
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|
||||
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|
||||
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|
||||
"^" in: xor.drc:38
|
||||
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|
||||
Elapsed: 0.000s Memory: 354.00M
|
||||
XOR differences: 298
|
||||
"output" in: xor.drc:40
|
||||
Polygons (raw): 298 (flat) 5 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 354.00M
|
||||
--- Running XOR for 81/23 ---
|
||||
"input" in: xor.drc:38
|
||||
Polygons (raw): 56 (flat) 1 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 354.00M
|
||||
"input" in: xor.drc:38
|
||||
Polygons (raw): 56 (flat) 1 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 354.00M
|
||||
"^" in: xor.drc:38
|
||||
Polygons (raw): 0 (flat) 0 (hierarchical)
|
||||
Elapsed: 0.010s Memory: 354.00M
|
||||
XOR differences: 0
|
||||
"output" in: xor.drc:40
|
||||
Polygons (raw): 0 (flat) 0 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 354.00M
|
||||
--- Running XOR for 81/4 ---
|
||||
"input" in: xor.drc:38
|
||||
Polygons (raw): 1093 (flat) 56 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 354.00M
|
||||
"input" in: xor.drc:38
|
||||
Polygons (raw): 1093 (flat) 56 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 354.00M
|
||||
"^" in: xor.drc:38
|
||||
Polygons (raw): 0 (flat) 0 (hierarchical)
|
||||
Elapsed: 0.010s Memory: 355.00M
|
||||
XOR differences: 0
|
||||
"output" in: xor.drc:40
|
||||
Polygons (raw): 0 (flat) 0 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 355.00M
|
||||
--- Running XOR for 83/44 ---
|
||||
"input" in: xor.drc:38
|
||||
Polygons (raw): 0 (flat) 0 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 355.00M
|
||||
"input" in: xor.drc:38
|
||||
Polygons (raw): 0 (flat) 0 (hierarchical)
|
||||
Elapsed: 0.010s Memory: 355.00M
|
||||
"^" in: xor.drc:38
|
||||
Polygons (raw): 0 (flat) 0 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 355.00M
|
||||
XOR differences: 0
|
||||
"output" in: xor.drc:40
|
||||
Polygons (raw): 0 (flat) 0 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 355.00M
|
||||
--- Running XOR for 9/0 ---
|
||||
"input" in: xor.drc:38
|
||||
Polygons (raw): 0 (flat) 0 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 355.00M
|
||||
"input" in: xor.drc:38
|
||||
Polygons (raw): 323 (flat) 124 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 355.00M
|
||||
"^" in: xor.drc:38
|
||||
Polygons (raw): 323 (flat) 124 (hierarchical)
|
||||
Elapsed: 0.010s Memory: 355.00M
|
||||
XOR differences: 323
|
||||
"output" in: xor.drc:40
|
||||
Polygons (raw): 323 (flat) 124 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 355.00M
|
||||
--- Running XOR for 9/1 ---
|
||||
"input" in: xor.drc:38
|
||||
Polygons (raw): 0 (flat) 0 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 355.00M
|
||||
"input" in: xor.drc:38
|
||||
Polygons (raw): 0 (flat) 0 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 355.00M
|
||||
"^" in: xor.drc:38
|
||||
Polygons (raw): 0 (flat) 0 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 355.00M
|
||||
XOR differences: 0
|
||||
"output" in: xor.drc:40
|
||||
Polygons (raw): 0 (flat) 0 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 355.00M
|
||||
--- Running XOR for 9/2 ---
|
||||
"input" in: xor.drc:38
|
||||
Polygons (raw): 0 (flat) 0 (hierarchical)
|
||||
Elapsed: 0.010s Memory: 355.00M
|
||||
"input" in: xor.drc:38
|
||||
Polygons (raw): 22 (flat) 22 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 355.00M
|
||||
"^" in: xor.drc:38
|
||||
Polygons (raw): 22 (flat) 22 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 355.00M
|
||||
XOR differences: 22
|
||||
"output" in: xor.drc:40
|
||||
Polygons (raw): 22 (flat) 22 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 355.00M
|
||||
--- Running XOR for 93/44 ---
|
||||
"input" in: xor.drc:38
|
||||
Polygons (raw): 1168 (flat) 57 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 355.00M
|
||||
"input" in: xor.drc:38
|
||||
Polygons (raw): 1168 (flat) 57 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 355.00M
|
||||
"^" in: xor.drc:38
|
||||
Polygons (raw): 0 (flat) 0 (hierarchical)
|
||||
Elapsed: 0.020s Memory: 355.00M
|
||||
XOR differences: 0
|
||||
"output" in: xor.drc:40
|
||||
Polygons (raw): 0 (flat) 0 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 355.00M
|
||||
--- Running XOR for 94/20 ---
|
||||
"input" in: xor.drc:38
|
||||
Polygons (raw): 1168 (flat) 57 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 355.00M
|
||||
"input" in: xor.drc:38
|
||||
Polygons (raw): 1168 (flat) 57 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 355.00M
|
||||
"^" in: xor.drc:38
|
||||
Polygons (raw): 0 (flat) 0 (hierarchical)
|
||||
Elapsed: 0.010s Memory: 355.00M
|
||||
XOR differences: 0
|
||||
"output" in: xor.drc:40
|
||||
Polygons (raw): 0 (flat) 0 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 355.00M
|
||||
--- Running XOR for 95/20 ---
|
||||
"input" in: xor.drc:38
|
||||
Polygons (raw): 601 (flat) 56 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 355.00M
|
||||
"input" in: xor.drc:38
|
||||
Polygons (raw): 601 (flat) 56 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 355.00M
|
||||
"^" in: xor.drc:38
|
||||
Polygons (raw): 0 (flat) 0 (hierarchical)
|
||||
Elapsed: 0.010s Memory: 355.00M
|
||||
XOR differences: 0
|
||||
"output" in: xor.drc:40
|
||||
Polygons (raw): 0 (flat) 0 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 355.00M
|
||||
Writing report database: /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/reports/signoff/digital_pll.xor.xml ..
|
||||
Total elapsed: 0.890s Memory: 355.00M
|
||||
|
|
@ -1 +0,0 @@
|
|||
Total XOR differences = 18953
|
||||
|
|
@ -1,112 +0,0 @@
|
|||
|
||||
Magic 8.3 revision 324 - Compiled on Thu Sep 15 11:38:02 UTC 2022.
|
||||
Starting magic under Tcl interpreter
|
||||
Using the terminal as the console.
|
||||
Using NULL graphics device.
|
||||
Processing system .magicrc file
|
||||
Sourcing design .magicrc for technology sky130A ...
|
||||
2 Magic internal units = 1 Lambda
|
||||
Input style sky130(vendor): scaleFactor=2, multiplier=2
|
||||
The following types are not handled by extraction and will be treated as non-electrical types:
|
||||
ubm
|
||||
Scaled tech values by 2 / 1 to match internal grid scaling
|
||||
Loading sky130A Device Generator Menu ...
|
||||
Using technology "sky130A", version 1.0.341-2-gde752ec
|
||||
Reading LEF data from file /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/techlef/sky130_fd_sc_hd__nom.tlef.
|
||||
This action cannot be undone.
|
||||
LEF read, Line 78 (Message): Unknown keyword "ANTENNAMODEL" in LEF file; ignoring.
|
||||
LEF read, Line 79 (Message): Unknown keyword "ANTENNADIFFSIDEAREARATIO" in LEF file; ignoring.
|
||||
LEF read, Line 112 (Message): Unknown keyword "MINENCLOSEDAREA" in LEF file; ignoring.
|
||||
LEF read, Line 114 (Message): Unknown keyword "ANTENNAMODEL" in LEF file; ignoring.
|
||||
LEF read, Line 115 (Message): Unknown keyword "ANTENNADIFFSIDEAREARATIO" in LEF file; ignoring.
|
||||
LEF read, Line 121 (Message): Unknown keyword "MAXIMUMDENSITY" in LEF file; ignoring.
|
||||
LEF read, Line 122 (Message): Unknown keyword "DENSITYCHECKWINDOW" in LEF file; ignoring.
|
||||
LEF read, Line 123 (Message): Unknown keyword "DENSITYCHECKSTEP" in LEF file; ignoring.
|
||||
LEF read, Line 156 (Message): Unknown keyword "MINENCLOSEDAREA" in LEF file; ignoring.
|
||||
LEF read, Line 164 (Message): Unknown keyword "ANTENNAMODEL" in LEF file; ignoring.
|
||||
LEF read, Line 165 (Message): Unknown keyword "ANTENNADIFFSIDEAREARATIO" in LEF file; ignoring.
|
||||
LEF read, Line 167 (Message): Unknown keyword "MAXIMUMDENSITY" in LEF file; ignoring.
|
||||
LEF read, Line 168 (Message): Unknown keyword "DENSITYCHECKWINDOW" in LEF file; ignoring.
|
||||
LEF read, Line 169 (Message): Unknown keyword "DENSITYCHECKSTEP" in LEF file; ignoring.
|
||||
LEF read, Line 206 (Message): Unknown keyword "ANTENNAMODEL" in LEF file; ignoring.
|
||||
LEF read, Line 207 (Message): Unknown keyword "ANTENNADIFFSIDEAREARATIO" in LEF file; ignoring.
|
||||
LEF read, Line 209 (Message): Unknown keyword "MAXIMUMDENSITY" in LEF file; ignoring.
|
||||
LEF read, Line 210 (Message): Unknown keyword "DENSITYCHECKWINDOW" in LEF file; ignoring.
|
||||
LEF read, Line 211 (Message): Unknown keyword "DENSITYCHECKSTEP" in LEF file; ignoring.
|
||||
LEF read, Line 248 (Message): Unknown keyword "ANTENNAMODEL" in LEF file; ignoring.
|
||||
LEF read, Line 249 (Message): Unknown keyword "ANTENNADIFFSIDEAREARATIO" in LEF file; ignoring.
|
||||
LEF read, Line 251 (Message): Unknown keyword "MAXIMUMDENSITY" in LEF file; ignoring.
|
||||
LEF read, Line 252 (Message): Unknown keyword "DENSITYCHECKWINDOW" in LEF file; ignoring.
|
||||
LEF read, Line 253 (Message): Unknown keyword "DENSITYCHECKSTEP" in LEF file; ignoring.
|
||||
LEF read, Line 290 (Message): Unknown keyword "ANTENNAMODEL" in LEF file; ignoring.
|
||||
LEF read, Line 291 (Message): Unknown keyword "ANTENNADIFFSIDEAREARATIO" in LEF file; ignoring.
|
||||
LEF read: Processed 797 lines.
|
||||
Reading DEF data from file /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/routing/digital_pll.def.
|
||||
This action cannot be undone.
|
||||
Processed 4 vias total.
|
||||
Processed 1093 subcell instances total.
|
||||
Processed 39 pins total.
|
||||
Processed 2 special nets total.
|
||||
Processed 371 nets total.
|
||||
DEF read: Processed 7531 lines.
|
||||
Processing digital_pll
|
||||
Extracting sky130_fd_sc_hd__fill_1 into sky130_fd_sc_hd__fill_1.ext:
|
||||
Extracting sky130_fd_sc_hd__fill_2 into sky130_fd_sc_hd__fill_2.ext:
|
||||
Extracting sky130_fd_sc_hd__decap_4 into sky130_fd_sc_hd__decap_4.ext:
|
||||
Extracting sky130_fd_sc_hd__decap_3 into sky130_fd_sc_hd__decap_3.ext:
|
||||
Extracting sky130_fd_sc_hd__nand2_2 into sky130_fd_sc_hd__nand2_2.ext:
|
||||
Extracting sky130_fd_sc_hd__o21ai_2 into sky130_fd_sc_hd__o21ai_2.ext:
|
||||
Extracting sky130_fd_sc_hd__clkbuf_16 into sky130_fd_sc_hd__clkbuf_16.ext:
|
||||
Extracting sky130_fd_sc_hd__tapvpwrvgnd_1 into sky130_fd_sc_hd__tapvpwrvgnd_1.ext:
|
||||
Extracting sky130_fd_sc_hd__mux2_2 into sky130_fd_sc_hd__mux2_2.ext:
|
||||
Extracting sky130_fd_sc_hd__dfrtp_2 into sky130_fd_sc_hd__dfrtp_2.ext:
|
||||
Extracting sky130_fd_sc_hd__nor2_2 into sky130_fd_sc_hd__nor2_2.ext:
|
||||
Extracting sky130_fd_sc_hd__buf_2 into sky130_fd_sc_hd__buf_2.ext:
|
||||
Extracting sky130_fd_sc_hd__diode_2 into sky130_fd_sc_hd__diode_2.ext:
|
||||
Extracting sky130_fd_sc_hd__inv_2 into sky130_fd_sc_hd__inv_2.ext:
|
||||
Extracting sky130_fd_sc_hd__xor2_2 into sky130_fd_sc_hd__xor2_2.ext:
|
||||
Extracting sky130_fd_sc_hd__decap_6 into sky130_fd_sc_hd__decap_6.ext:
|
||||
Extracting sky130_fd_sc_hd__nand3_2 into sky130_fd_sc_hd__nand3_2.ext:
|
||||
Extracting sky130_fd_sc_hd__xnor2_2 into sky130_fd_sc_hd__xnor2_2.ext:
|
||||
Extracting sky130_fd_sc_hd__a21boi_2 into sky130_fd_sc_hd__a21boi_2.ext:
|
||||
Extracting sky130_ef_sc_hd__decap_12 into sky130_ef_sc_hd__decap_12.ext:
|
||||
Extracting sky130_fd_sc_hd__nand3b_2 into sky130_fd_sc_hd__nand3b_2.ext:
|
||||
Extracting sky130_fd_sc_hd__and2_2 into sky130_fd_sc_hd__and2_2.ext:
|
||||
Extracting sky130_fd_sc_hd__a21oi_2 into sky130_fd_sc_hd__a21oi_2.ext:
|
||||
Extracting sky130_fd_sc_hd__and3_2 into sky130_fd_sc_hd__and3_2.ext:
|
||||
Extracting sky130_fd_sc_hd__nand2b_2 into sky130_fd_sc_hd__nand2b_2.ext:
|
||||
Extracting sky130_fd_sc_hd__a211o_2 into sky130_fd_sc_hd__a211o_2.ext:
|
||||
Extracting sky130_fd_sc_hd__decap_8 into sky130_fd_sc_hd__decap_8.ext:
|
||||
Extracting sky130_fd_sc_hd__and4b_2 into sky130_fd_sc_hd__and4b_2.ext:
|
||||
Extracting sky130_fd_sc_hd__o21a_2 into sky130_fd_sc_hd__o21a_2.ext:
|
||||
Extracting sky130_fd_sc_hd__o211a_2 into sky130_fd_sc_hd__o211a_2.ext:
|
||||
Extracting sky130_fd_sc_hd__a21o_2 into sky130_fd_sc_hd__a21o_2.ext:
|
||||
Extracting sky130_fd_sc_hd__einvp_1 into sky130_fd_sc_hd__einvp_1.ext:
|
||||
Extracting sky130_fd_sc_hd__clkinv_2 into sky130_fd_sc_hd__clkinv_2.ext:
|
||||
Extracting sky130_fd_sc_hd__clkinv_8 into sky130_fd_sc_hd__clkinv_8.ext:
|
||||
Extracting sky130_fd_sc_hd__conb_1 into sky130_fd_sc_hd__conb_1.ext:
|
||||
Extracting sky130_fd_sc_hd__clkinv_1 into sky130_fd_sc_hd__clkinv_1.ext:
|
||||
Extracting sky130_fd_sc_hd__o32a_2 into sky130_fd_sc_hd__o32a_2.ext:
|
||||
Extracting sky130_fd_sc_hd__a31o_2 into sky130_fd_sc_hd__a31o_2.ext:
|
||||
Extracting sky130_fd_sc_hd__einvp_2 into sky130_fd_sc_hd__einvp_2.ext:
|
||||
Extracting sky130_fd_sc_hd__clkbuf_1 into sky130_fd_sc_hd__clkbuf_1.ext:
|
||||
Extracting sky130_fd_sc_hd__o31a_2 into sky130_fd_sc_hd__o31a_2.ext:
|
||||
Extracting sky130_fd_sc_hd__o22a_2 into sky130_fd_sc_hd__o22a_2.ext:
|
||||
Extracting sky130_fd_sc_hd__or2_2 into sky130_fd_sc_hd__or2_2.ext:
|
||||
Extracting sky130_fd_sc_hd__einvn_8 into sky130_fd_sc_hd__einvn_8.ext:
|
||||
Extracting sky130_fd_sc_hd__o2111a_2 into sky130_fd_sc_hd__o2111a_2.ext:
|
||||
Extracting sky130_fd_sc_hd__o2bb2a_2 into sky130_fd_sc_hd__o2bb2a_2.ext:
|
||||
Extracting sky130_fd_sc_hd__einvn_4 into sky130_fd_sc_hd__einvn_4.ext:
|
||||
Extracting sky130_fd_sc_hd__o21ba_2 into sky130_fd_sc_hd__o21ba_2.ext:
|
||||
Extracting sky130_fd_sc_hd__nand4b_2 into sky130_fd_sc_hd__nand4b_2.ext:
|
||||
Extracting sky130_fd_sc_hd__clkbuf_2 into sky130_fd_sc_hd__clkbuf_2.ext:
|
||||
Extracting sky130_fd_sc_hd__a32o_2 into sky130_fd_sc_hd__a32o_2.ext:
|
||||
Extracting sky130_fd_sc_hd__and3b_2 into sky130_fd_sc_hd__and3b_2.ext:
|
||||
Extracting sky130_fd_sc_hd__nand4_2 into sky130_fd_sc_hd__nand4_2.ext:
|
||||
Extracting sky130_fd_sc_hd__a22o_2 into sky130_fd_sc_hd__a22o_2.ext:
|
||||
Extracting sky130_fd_sc_hd__and2b_2 into sky130_fd_sc_hd__and2b_2.ext:
|
||||
Extracting sky130_fd_sc_hd__o221a_2 into sky130_fd_sc_hd__o221a_2.ext:
|
||||
Extracting digital_pll into digital_pll.ext:
|
||||
digital_pll: 34 errors
|
||||
Total of 34 errors (check feedback entries).
|
||||
exttospice finished.
|
||||
|
|
@ -1,25 +0,0 @@
|
|||
OpenROAD 4174c3ad802d2ac1d04d387d2c4b883903f6647e
|
||||
This program is licensed under the BSD-3 license. See the LICENSE file for details.
|
||||
Components of this program may be licensed under more restrictive licenses which must be honored.
|
||||
[INFO ODB-0222] Reading LEF file: /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/tmp/merged.nom.lef
|
||||
[WARNING ODB-0220] WARNING (LEFPARS-2036): SOURCE statement is obsolete in version 5.6 and later.
|
||||
The LEF parser will ignore this statement.
|
||||
To avoid this warning in the future, remove this statement from the LEF file with version 5.6 or later. See file /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/tmp/merged.nom.lef at line 930.
|
||||
|
||||
[INFO ODB-0223] Created 13 technology layers
|
||||
[INFO ODB-0224] Created 25 technology vias
|
||||
[INFO ODB-0225] Created 441 library cells
|
||||
[INFO ODB-0226] Finished LEF file: /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/tmp/merged.nom.lef
|
||||
[INFO ODB-0127] Reading DEF file: /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/routing/digital_pll.def
|
||||
[INFO ODB-0128] Design: digital_pll
|
||||
[INFO ODB-0130] Created 39 pins.
|
||||
[INFO ODB-0131] Created 1093 components and 5448 component-terminals.
|
||||
[INFO ODB-0132] Created 2 special nets and 4222 connections.
|
||||
[INFO ODB-0133] Created 371 nets and 1225 connections.
|
||||
[INFO ODB-0134] Finished DEF file: /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/routing/digital_pll.def
|
||||
Top-level design name: digital_pll
|
||||
Found default power net 'VPWR'
|
||||
Found default ground net 'VGND'
|
||||
Found 1 power ports.
|
||||
Found 1 ground ports.
|
||||
Modified power connections of 1093/1093 cells.
|
||||
|
|
@ -1,8 +0,0 @@
|
|||
OpenROAD 4174c3ad802d2ac1d04d387d2c4b883903f6647e
|
||||
This program is licensed under the BSD-3 license. See the LICENSE file for details.
|
||||
Components of this program may be licensed under more restrictive licenses which must be honored.
|
||||
Reading /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/routing/digital_pll.odb
|
||||
Setting global connections for newly added cells...
|
||||
[WARNING] Did not save OpenROAD database!
|
||||
Writing netlist to /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/tmp/signoff/26-digital_pll.nl.v...
|
||||
Writing powered netlist to /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/tmp/signoff/26-digital_pll.pnl.v...
|
||||
|
|
@ -1,3 +0,0 @@
|
|||
LVS reports no net, device, pin, or property mismatches.
|
||||
|
||||
Total errors = 0
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
|
|
@ -1,373 +0,0 @@
|
|||
Netgen 1.5.234 compiled on Sun Oct 9 10:24:01 UTC 2022
|
||||
Warning: netgen command 'format' use fully-qualified name '::netgen::format'
|
||||
Warning: netgen command 'global' use fully-qualified name '::netgen::global'
|
||||
Generating JSON file result
|
||||
Reading netlist file /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/signoff/digital_pll.spice
|
||||
Reading netlist file /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/tmp/signoff/26-digital_pll.pnl.v
|
||||
Warning: A case-insensitive file has been read and so the verilog file must be treated case-insensitive to match.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__xnor2_2.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__buf_2.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__mux2_2.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__inv_2.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__nand2b_2.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__and2_2.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__xor2_2.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__a211o_2.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__nor2_2.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__nand2_2.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__and3_2.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__a21oi_2.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__o32a_2.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__nand3b_2.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__a21o_2.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__o2111a_2.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__a31o_2.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__o21ba_2.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__o211a_2.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__o31a_2.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__nand4_2.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__and4b_2.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__o21ai_2.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__nand4b_2.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__and3b_2.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__a32o_2.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__o22a_2.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__o2bb2a_2.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__o21a_2.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__a21boi_2.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__nand3_2.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__and2b_2.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__a22o_2.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__o221a_2.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__dfrtp_2.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__clkbuf_16.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__clkbuf_2.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__clkbuf_1.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__einvp_2.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__einvn_8.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__einvn_4.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__clkinv_1.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__clkinv_2.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__clkinv_8.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__conb_1.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__or2_2.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__einvp_1.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__decap_3.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__tapvpwrvgnd_1.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__diode_2.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__fill_1.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__decap_4.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__fill_2.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__decap_6.
|
||||
Creating placeholder cell definition for module sky130_ef_sc_hd__decap_12.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__decap_8.
|
||||
Reading setup file /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.tech/netgen/sky130A_setup.tcl
|
||||
Comparison output logged to file /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/logs/signoff/29-digital_pll.lef.log
|
||||
Logging to file "/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/logs/signoff/29-digital_pll.lef.log" enabled
|
||||
Circuit sky130_fd_sc_hd__fill_2 contains no devices.
|
||||
Circuit sky130_fd_sc_hd__a211o_2 contains no devices.
|
||||
Circuit sky130_fd_sc_hd__decap_4 contains no devices.
|
||||
Circuit sky130_fd_sc_hd__fill_1 contains no devices.
|
||||
Circuit sky130_fd_sc_hd__xnor2_2 contains no devices.
|
||||
Circuit sky130_fd_sc_hd__nor2_2 contains no devices.
|
||||
Circuit sky130_fd_sc_hd__clkinv_1 contains no devices.
|
||||
Circuit sky130_fd_sc_hd__o21ai_2 contains no devices.
|
||||
Circuit sky130_fd_sc_hd__buf_2 contains no devices.
|
||||
Circuit sky130_fd_sc_hd__einvp_2 contains no devices.
|
||||
Circuit sky130_fd_sc_hd__o21a_2 contains no devices.
|
||||
Circuit sky130_fd_sc_hd__decap_3 contains no devices.
|
||||
Circuit sky130_fd_sc_hd__diode_2 contains no devices.
|
||||
Circuit sky130_fd_sc_hd__einvn_8 contains no devices.
|
||||
Circuit sky130_fd_sc_hd__tapvpwrvgnd_1 contains no devices.
|
||||
Circuit sky130_fd_sc_hd__o2111a_2 contains no devices.
|
||||
Circuit sky130_fd_sc_hd__inv_2 contains no devices.
|
||||
Circuit sky130_fd_sc_hd__mux2_2 contains no devices.
|
||||
Circuit sky130_fd_sc_hd__nand2_2 contains no devices.
|
||||
Circuit sky130_fd_sc_hd__a21o_2 contains no devices.
|
||||
Circuit sky130_fd_sc_hd__einvn_4 contains no devices.
|
||||
Circuit sky130_fd_sc_hd__o31a_2 contains no devices.
|
||||
Circuit sky130_fd_sc_hd__o211a_2 contains no devices.
|
||||
Circuit sky130_fd_sc_hd__decap_6 contains no devices.
|
||||
Circuit sky130_fd_sc_hd__and2_2 contains no devices.
|
||||
Circuit sky130_fd_sc_hd__clkbuf_2 contains no devices.
|
||||
Circuit sky130_fd_sc_hd__and3b_2 contains no devices.
|
||||
Circuit sky130_fd_sc_hd__o22a_2 contains no devices.
|
||||
Circuit sky130_fd_sc_hd__nand3b_2 contains no devices.
|
||||
Circuit sky130_fd_sc_hd__clkbuf_1 contains no devices.
|
||||
Circuit sky130_fd_sc_hd__nand4b_2 contains no devices.
|
||||
Circuit sky130_fd_sc_hd__a22o_2 contains no devices.
|
||||
Circuit sky130_fd_sc_hd__nand3_2 contains no devices.
|
||||
Circuit sky130_fd_sc_hd__xor2_2 contains no devices.
|
||||
Circuit sky130_fd_sc_hd__nand2b_2 contains no devices.
|
||||
Circuit sky130_fd_sc_hd__a21boi_2 contains no devices.
|
||||
Circuit sky130_fd_sc_hd__a32o_2 contains no devices.
|
||||
Circuit sky130_fd_sc_hd__dfrtp_2 contains no devices.
|
||||
Circuit sky130_fd_sc_hd__o2bb2a_2 contains no devices.
|
||||
Circuit sky130_fd_sc_hd__einvp_1 contains no devices.
|
||||
Circuit sky130_ef_sc_hd__decap_12 contains no devices.
|
||||
Circuit sky130_fd_sc_hd__a21oi_2 contains no devices.
|
||||
Circuit sky130_fd_sc_hd__and4b_2 contains no devices.
|
||||
Circuit sky130_fd_sc_hd__o221a_2 contains no devices.
|
||||
Circuit sky130_fd_sc_hd__and3_2 contains no devices.
|
||||
Circuit sky130_fd_sc_hd__and2b_2 contains no devices.
|
||||
Circuit sky130_fd_sc_hd__o21ba_2 contains no devices.
|
||||
Circuit sky130_fd_sc_hd__o32a_2 contains no devices.
|
||||
Circuit sky130_fd_sc_hd__clkbuf_16 contains no devices.
|
||||
Circuit sky130_fd_sc_hd__decap_8 contains no devices.
|
||||
Circuit sky130_fd_sc_hd__a31o_2 contains no devices.
|
||||
Circuit sky130_fd_sc_hd__clkinv_2 contains no devices.
|
||||
Circuit sky130_fd_sc_hd__clkinv_8 contains no devices.
|
||||
Circuit sky130_fd_sc_hd__conb_1 contains no devices.
|
||||
Circuit sky130_fd_sc_hd__or2_2 contains no devices.
|
||||
Circuit sky130_fd_sc_hd__nand4_2 contains no devices.
|
||||
|
||||
Contents of circuit 1: Circuit: 'digital_pll'
|
||||
Circuit digital_pll contains 1093 device instances.
|
||||
Class: sky130_fd_sc_hd__a31o_2 instances: 1
|
||||
Class: sky130_fd_sc_hd__a21o_2 instances: 14
|
||||
Class: sky130_fd_sc_hd__clkbuf_16 instances: 2
|
||||
Class: sky130_fd_sc_hd__nand4_2 instances: 1
|
||||
Class: sky130_fd_sc_hd__buf_2 instances: 32
|
||||
Class: sky130_fd_sc_hd__and3b_2 instances: 2
|
||||
Class: sky130_fd_sc_hd__xor2_2 instances: 4
|
||||
Class: sky130_ef_sc_hd__decap_12 instances: 3
|
||||
Class: sky130_fd_sc_hd__dfrtp_2 instances: 23
|
||||
Class: sky130_fd_sc_hd__inv_2 instances: 13
|
||||
Class: sky130_fd_sc_hd__clkbuf_1 instances: 13
|
||||
Class: sky130_fd_sc_hd__clkbuf_2 instances: 12
|
||||
Class: sky130_fd_sc_hd__nand3_2 instances: 3
|
||||
Class: sky130_fd_sc_hd__o21ba_2 instances: 1
|
||||
Class: sky130_fd_sc_hd__conb_1 instances: 1
|
||||
Class: sky130_fd_sc_hd__and2b_2 instances: 1
|
||||
Class: sky130_fd_sc_hd__a21boi_2 instances: 1
|
||||
Class: sky130_fd_sc_hd__nand4b_2 instances: 1
|
||||
Class: sky130_fd_sc_hd__clkinv_1 instances: 13
|
||||
Class: sky130_fd_sc_hd__clkinv_2 instances: 2
|
||||
Class: sky130_fd_sc_hd__clkinv_8 instances: 2
|
||||
Class: sky130_fd_sc_hd__and3_2 instances: 6
|
||||
Class: sky130_fd_sc_hd__decap_3 instances: 105
|
||||
Class: sky130_fd_sc_hd__decap_4 instances: 85
|
||||
Class: sky130_fd_sc_hd__decap_6 instances: 7
|
||||
Class: sky130_fd_sc_hd__decap_8 instances: 6
|
||||
Class: sky130_fd_sc_hd__or2_2 instances: 1
|
||||
Class: sky130_fd_sc_hd__einvp_1 instances: 1
|
||||
Class: sky130_fd_sc_hd__einvp_2 instances: 26
|
||||
Class: sky130_fd_sc_hd__nand2_2 instances: 20
|
||||
Class: sky130_fd_sc_hd__nand3b_2 instances: 2
|
||||
Class: sky130_fd_sc_hd__mux2_2 instances: 11
|
||||
Class: sky130_fd_sc_hd__and2_2 instances: 14
|
||||
Class: sky130_fd_sc_hd__o32a_2 instances: 1
|
||||
Class: sky130_fd_sc_hd__o22a_2 instances: 4
|
||||
Class: sky130_fd_sc_hd__xnor2_2 instances: 11
|
||||
Class: sky130_fd_sc_hd__o221a_2 instances: 1
|
||||
Class: sky130_fd_sc_hd__o211a_2 instances: 7
|
||||
Class: sky130_fd_sc_hd__nand2b_2 instances: 7
|
||||
Class: sky130_fd_sc_hd__diode_2 instances: 56
|
||||
Class: sky130_fd_sc_hd__a211o_2 instances: 3
|
||||
Class: sky130_fd_sc_hd__o2111a_2 instances: 2
|
||||
Class: sky130_fd_sc_hd__a32o_2 instances: 6
|
||||
Class: sky130_fd_sc_hd__a22o_2 instances: 7
|
||||
Class: sky130_fd_sc_hd__o31a_2 instances: 4
|
||||
Class: sky130_fd_sc_hd__o2bb2a_2 instances: 1
|
||||
Class: sky130_fd_sc_hd__o21a_2 instances: 5
|
||||
Class: sky130_fd_sc_hd__einvn_4 instances: 13
|
||||
Class: sky130_fd_sc_hd__einvn_8 instances: 13
|
||||
Class: sky130_fd_sc_hd__and4b_2 instances: 2
|
||||
Class: sky130_fd_sc_hd__tapvpwrvgnd_1 instances: 75
|
||||
Class: sky130_fd_sc_hd__o21ai_2 instances: 6
|
||||
Class: sky130_fd_sc_hd__a21oi_2 instances: 5
|
||||
Class: sky130_fd_sc_hd__fill_1 instances: 150
|
||||
Class: sky130_fd_sc_hd__fill_2 instances: 243
|
||||
Class: sky130_fd_sc_hd__nor2_2 instances: 42
|
||||
Circuit contains 374 nets.
|
||||
Contents of circuit 2: Circuit: 'digital_pll'
|
||||
Circuit digital_pll contains 1093 device instances.
|
||||
Class: sky130_fd_sc_hd__a31o_2 instances: 1
|
||||
Class: sky130_fd_sc_hd__a21o_2 instances: 14
|
||||
Class: sky130_fd_sc_hd__clkbuf_16 instances: 2
|
||||
Class: sky130_fd_sc_hd__nand4_2 instances: 1
|
||||
Class: sky130_fd_sc_hd__buf_2 instances: 32
|
||||
Class: sky130_fd_sc_hd__and3b_2 instances: 2
|
||||
Class: sky130_fd_sc_hd__xor2_2 instances: 4
|
||||
Class: sky130_ef_sc_hd__decap_12 instances: 3
|
||||
Class: sky130_fd_sc_hd__dfrtp_2 instances: 23
|
||||
Class: sky130_fd_sc_hd__inv_2 instances: 13
|
||||
Class: sky130_fd_sc_hd__clkbuf_1 instances: 13
|
||||
Class: sky130_fd_sc_hd__clkbuf_2 instances: 12
|
||||
Class: sky130_fd_sc_hd__nand3_2 instances: 3
|
||||
Class: sky130_fd_sc_hd__o21ba_2 instances: 1
|
||||
Class: sky130_fd_sc_hd__conb_1 instances: 1
|
||||
Class: sky130_fd_sc_hd__and2b_2 instances: 1
|
||||
Class: sky130_fd_sc_hd__a21boi_2 instances: 1
|
||||
Class: sky130_fd_sc_hd__nand4b_2 instances: 1
|
||||
Class: sky130_fd_sc_hd__clkinv_1 instances: 13
|
||||
Class: sky130_fd_sc_hd__clkinv_2 instances: 2
|
||||
Class: sky130_fd_sc_hd__clkinv_8 instances: 2
|
||||
Class: sky130_fd_sc_hd__and3_2 instances: 6
|
||||
Class: sky130_fd_sc_hd__decap_3 instances: 105
|
||||
Class: sky130_fd_sc_hd__decap_4 instances: 85
|
||||
Class: sky130_fd_sc_hd__decap_6 instances: 7
|
||||
Class: sky130_fd_sc_hd__decap_8 instances: 6
|
||||
Class: sky130_fd_sc_hd__or2_2 instances: 1
|
||||
Class: sky130_fd_sc_hd__einvp_1 instances: 1
|
||||
Class: sky130_fd_sc_hd__einvp_2 instances: 26
|
||||
Class: sky130_fd_sc_hd__nand2_2 instances: 20
|
||||
Class: sky130_fd_sc_hd__nand3b_2 instances: 2
|
||||
Class: sky130_fd_sc_hd__mux2_2 instances: 11
|
||||
Class: sky130_fd_sc_hd__and2_2 instances: 14
|
||||
Class: sky130_fd_sc_hd__o32a_2 instances: 1
|
||||
Class: sky130_fd_sc_hd__o22a_2 instances: 4
|
||||
Class: sky130_fd_sc_hd__xnor2_2 instances: 11
|
||||
Class: sky130_fd_sc_hd__o221a_2 instances: 1
|
||||
Class: sky130_fd_sc_hd__o211a_2 instances: 7
|
||||
Class: sky130_fd_sc_hd__nand2b_2 instances: 7
|
||||
Class: sky130_fd_sc_hd__diode_2 instances: 56
|
||||
Class: sky130_fd_sc_hd__a211o_2 instances: 3
|
||||
Class: sky130_fd_sc_hd__o2111a_2 instances: 2
|
||||
Class: sky130_fd_sc_hd__a32o_2 instances: 6
|
||||
Class: sky130_fd_sc_hd__a22o_2 instances: 7
|
||||
Class: sky130_fd_sc_hd__o31a_2 instances: 4
|
||||
Class: sky130_fd_sc_hd__o2bb2a_2 instances: 1
|
||||
Class: sky130_fd_sc_hd__o21a_2 instances: 5
|
||||
Class: sky130_fd_sc_hd__einvn_4 instances: 13
|
||||
Class: sky130_fd_sc_hd__einvn_8 instances: 13
|
||||
Class: sky130_fd_sc_hd__and4b_2 instances: 2
|
||||
Class: sky130_fd_sc_hd__tapvpwrvgnd_1 instances: 75
|
||||
Class: sky130_fd_sc_hd__o21ai_2 instances: 6
|
||||
Class: sky130_fd_sc_hd__a21oi_2 instances: 5
|
||||
Class: sky130_fd_sc_hd__fill_1 instances: 150
|
||||
Class: sky130_fd_sc_hd__fill_2 instances: 243
|
||||
Class: sky130_fd_sc_hd__nor2_2 instances: 42
|
||||
Circuit contains 374 nets.
|
||||
|
||||
Circuit was modified by parallel/series device merging.
|
||||
New circuit summary:
|
||||
|
||||
Contents of circuit 1: Circuit: 'digital_pll'
|
||||
Circuit digital_pll contains 408 device instances.
|
||||
Class: sky130_fd_sc_hd__a31o_2 instances: 1
|
||||
Class: sky130_fd_sc_hd__a21o_2 instances: 14
|
||||
Class: sky130_fd_sc_hd__clkbuf_16 instances: 2
|
||||
Class: sky130_fd_sc_hd__nand4_2 instances: 1
|
||||
Class: sky130_fd_sc_hd__buf_2 instances: 32
|
||||
Class: sky130_fd_sc_hd__and3b_2 instances: 2
|
||||
Class: sky130_fd_sc_hd__xor2_2 instances: 4
|
||||
Class: sky130_ef_sc_hd__decap_12 instances: 1
|
||||
Class: sky130_fd_sc_hd__dfrtp_2 instances: 23
|
||||
Class: sky130_fd_sc_hd__inv_2 instances: 13
|
||||
Class: sky130_fd_sc_hd__clkbuf_1 instances: 13
|
||||
Class: sky130_fd_sc_hd__clkbuf_2 instances: 12
|
||||
Class: sky130_fd_sc_hd__nand3_2 instances: 3
|
||||
Class: sky130_fd_sc_hd__o21ba_2 instances: 1
|
||||
Class: sky130_fd_sc_hd__conb_1 instances: 1
|
||||
Class: sky130_fd_sc_hd__and2b_2 instances: 1
|
||||
Class: sky130_fd_sc_hd__a21boi_2 instances: 1
|
||||
Class: sky130_fd_sc_hd__nand4b_2 instances: 1
|
||||
Class: sky130_fd_sc_hd__clkinv_1 instances: 13
|
||||
Class: sky130_fd_sc_hd__clkinv_2 instances: 2
|
||||
Class: sky130_fd_sc_hd__clkinv_8 instances: 2
|
||||
Class: sky130_fd_sc_hd__and3_2 instances: 6
|
||||
Class: sky130_fd_sc_hd__decap_3 instances: 1
|
||||
Class: sky130_fd_sc_hd__decap_4 instances: 1
|
||||
Class: sky130_fd_sc_hd__decap_6 instances: 1
|
||||
Class: sky130_fd_sc_hd__decap_8 instances: 1
|
||||
Class: sky130_fd_sc_hd__or2_2 instances: 1
|
||||
Class: sky130_fd_sc_hd__einvp_1 instances: 1
|
||||
Class: sky130_fd_sc_hd__einvp_2 instances: 26
|
||||
Class: sky130_fd_sc_hd__nand2_2 instances: 20
|
||||
Class: sky130_fd_sc_hd__nand3b_2 instances: 2
|
||||
Class: sky130_fd_sc_hd__mux2_2 instances: 11
|
||||
Class: sky130_fd_sc_hd__and2_2 instances: 14
|
||||
Class: sky130_fd_sc_hd__o32a_2 instances: 1
|
||||
Class: sky130_fd_sc_hd__o22a_2 instances: 4
|
||||
Class: sky130_fd_sc_hd__xnor2_2 instances: 11
|
||||
Class: sky130_fd_sc_hd__o221a_2 instances: 1
|
||||
Class: sky130_fd_sc_hd__o211a_2 instances: 7
|
||||
Class: sky130_fd_sc_hd__nand2b_2 instances: 7
|
||||
Class: sky130_fd_sc_hd__diode_2 instances: 37
|
||||
Class: sky130_fd_sc_hd__a211o_2 instances: 3
|
||||
Class: sky130_fd_sc_hd__o2111a_2 instances: 2
|
||||
Class: sky130_fd_sc_hd__a32o_2 instances: 6
|
||||
Class: sky130_fd_sc_hd__a22o_2 instances: 7
|
||||
Class: sky130_fd_sc_hd__o31a_2 instances: 4
|
||||
Class: sky130_fd_sc_hd__o2bb2a_2 instances: 1
|
||||
Class: sky130_fd_sc_hd__o21a_2 instances: 5
|
||||
Class: sky130_fd_sc_hd__einvn_4 instances: 13
|
||||
Class: sky130_fd_sc_hd__einvn_8 instances: 13
|
||||
Class: sky130_fd_sc_hd__and4b_2 instances: 2
|
||||
Class: sky130_fd_sc_hd__tapvpwrvgnd_1 instances: 1
|
||||
Class: sky130_fd_sc_hd__o21ai_2 instances: 6
|
||||
Class: sky130_fd_sc_hd__a21oi_2 instances: 5
|
||||
Class: sky130_fd_sc_hd__fill_1 instances: 1
|
||||
Class: sky130_fd_sc_hd__fill_2 instances: 1
|
||||
Class: sky130_fd_sc_hd__nor2_2 instances: 42
|
||||
Circuit contains 374 nets.
|
||||
Contents of circuit 2: Circuit: 'digital_pll'
|
||||
Circuit digital_pll contains 408 device instances.
|
||||
Class: sky130_fd_sc_hd__a31o_2 instances: 1
|
||||
Class: sky130_fd_sc_hd__a21o_2 instances: 14
|
||||
Class: sky130_fd_sc_hd__clkbuf_16 instances: 2
|
||||
Class: sky130_fd_sc_hd__nand4_2 instances: 1
|
||||
Class: sky130_fd_sc_hd__buf_2 instances: 32
|
||||
Class: sky130_fd_sc_hd__and3b_2 instances: 2
|
||||
Class: sky130_fd_sc_hd__xor2_2 instances: 4
|
||||
Class: sky130_ef_sc_hd__decap_12 instances: 1
|
||||
Class: sky130_fd_sc_hd__dfrtp_2 instances: 23
|
||||
Class: sky130_fd_sc_hd__inv_2 instances: 13
|
||||
Class: sky130_fd_sc_hd__clkbuf_1 instances: 13
|
||||
Class: sky130_fd_sc_hd__clkbuf_2 instances: 12
|
||||
Class: sky130_fd_sc_hd__nand3_2 instances: 3
|
||||
Class: sky130_fd_sc_hd__o21ba_2 instances: 1
|
||||
Class: sky130_fd_sc_hd__conb_1 instances: 1
|
||||
Class: sky130_fd_sc_hd__and2b_2 instances: 1
|
||||
Class: sky130_fd_sc_hd__a21boi_2 instances: 1
|
||||
Class: sky130_fd_sc_hd__nand4b_2 instances: 1
|
||||
Class: sky130_fd_sc_hd__clkinv_1 instances: 13
|
||||
Class: sky130_fd_sc_hd__clkinv_2 instances: 2
|
||||
Class: sky130_fd_sc_hd__clkinv_8 instances: 2
|
||||
Class: sky130_fd_sc_hd__and3_2 instances: 6
|
||||
Class: sky130_fd_sc_hd__decap_3 instances: 1
|
||||
Class: sky130_fd_sc_hd__decap_4 instances: 1
|
||||
Class: sky130_fd_sc_hd__decap_6 instances: 1
|
||||
Class: sky130_fd_sc_hd__decap_8 instances: 1
|
||||
Class: sky130_fd_sc_hd__or2_2 instances: 1
|
||||
Class: sky130_fd_sc_hd__einvp_1 instances: 1
|
||||
Class: sky130_fd_sc_hd__einvp_2 instances: 26
|
||||
Class: sky130_fd_sc_hd__nand2_2 instances: 20
|
||||
Class: sky130_fd_sc_hd__nand3b_2 instances: 2
|
||||
Class: sky130_fd_sc_hd__mux2_2 instances: 11
|
||||
Class: sky130_fd_sc_hd__and2_2 instances: 14
|
||||
Class: sky130_fd_sc_hd__o32a_2 instances: 1
|
||||
Class: sky130_fd_sc_hd__o22a_2 instances: 4
|
||||
Class: sky130_fd_sc_hd__xnor2_2 instances: 11
|
||||
Class: sky130_fd_sc_hd__o221a_2 instances: 1
|
||||
Class: sky130_fd_sc_hd__o211a_2 instances: 7
|
||||
Class: sky130_fd_sc_hd__nand2b_2 instances: 7
|
||||
Class: sky130_fd_sc_hd__diode_2 instances: 37
|
||||
Class: sky130_fd_sc_hd__a211o_2 instances: 3
|
||||
Class: sky130_fd_sc_hd__o2111a_2 instances: 2
|
||||
Class: sky130_fd_sc_hd__a32o_2 instances: 6
|
||||
Class: sky130_fd_sc_hd__a22o_2 instances: 7
|
||||
Class: sky130_fd_sc_hd__o31a_2 instances: 4
|
||||
Class: sky130_fd_sc_hd__o2bb2a_2 instances: 1
|
||||
Class: sky130_fd_sc_hd__o21a_2 instances: 5
|
||||
Class: sky130_fd_sc_hd__einvn_4 instances: 13
|
||||
Class: sky130_fd_sc_hd__einvn_8 instances: 13
|
||||
Class: sky130_fd_sc_hd__and4b_2 instances: 2
|
||||
Class: sky130_fd_sc_hd__tapvpwrvgnd_1 instances: 1
|
||||
Class: sky130_fd_sc_hd__o21ai_2 instances: 6
|
||||
Class: sky130_fd_sc_hd__a21oi_2 instances: 5
|
||||
Class: sky130_fd_sc_hd__fill_1 instances: 1
|
||||
Class: sky130_fd_sc_hd__fill_2 instances: 1
|
||||
Class: sky130_fd_sc_hd__nor2_2 instances: 42
|
||||
Circuit contains 374 nets.
|
||||
|
||||
Circuit 1 contains 408 devices, Circuit 2 contains 408 devices.
|
||||
Circuit 1 contains 374 nets, Circuit 2 contains 374 nets.
|
||||
|
||||
|
||||
Final result:
|
||||
Circuits match uniquely.
|
||||
.
|
||||
Logging to file "/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/logs/signoff/29-digital_pll.lef.log" disabled
|
||||
LVS Done.
|
||||
|
|
@ -1,84 +0,0 @@
|
|||
|
||||
Magic 8.3 revision 324 - Compiled on Thu Sep 15 11:38:02 UTC 2022.
|
||||
Starting magic under Tcl interpreter
|
||||
Using the terminal as the console.
|
||||
Using NULL graphics device.
|
||||
Processing system .magicrc file
|
||||
Sourcing design .magicrc for technology sky130A ...
|
||||
2 Magic internal units = 1 Lambda
|
||||
Input style sky130(vendor): scaleFactor=2, multiplier=2
|
||||
The following types are not handled by extraction and will be treated as non-electrical types:
|
||||
ubm
|
||||
Scaled tech values by 2 / 1 to match internal grid scaling
|
||||
Loading sky130A Device Generator Menu ...
|
||||
Using technology "sky130A", version 1.0.341-2-gde752ec
|
||||
Warning: Calma reading is not undoable! I hope that's OK.
|
||||
Library written using GDS-II Release 3.0
|
||||
Library name: digital_pll
|
||||
Reading "sky130_fd_sc_hd__fill_1".
|
||||
Reading "sky130_fd_sc_hd__fill_2".
|
||||
Reading "sky130_fd_sc_hd__decap_4".
|
||||
Reading "sky130_fd_sc_hd__decap_3".
|
||||
Reading "sky130_fd_sc_hd__nand2_2".
|
||||
Reading "sky130_fd_sc_hd__o21ai_2".
|
||||
Reading "sky130_fd_sc_hd__clkbuf_16".
|
||||
Reading "sky130_fd_sc_hd__tapvpwrvgnd_1".
|
||||
Reading "sky130_fd_sc_hd__mux2_2".
|
||||
Reading "sky130_fd_sc_hd__dfrtp_2".
|
||||
Reading "sky130_fd_sc_hd__nor2_2".
|
||||
Reading "sky130_fd_sc_hd__buf_2".
|
||||
Reading "sky130_fd_sc_hd__diode_2".
|
||||
Reading "sky130_fd_sc_hd__inv_2".
|
||||
Reading "sky130_fd_sc_hd__xor2_2".
|
||||
Reading "sky130_fd_sc_hd__decap_6".
|
||||
Reading "sky130_fd_sc_hd__nand3_2".
|
||||
Reading "sky130_fd_sc_hd__xnor2_2".
|
||||
Reading "sky130_fd_sc_hd__a21boi_2".
|
||||
Reading "sky130_ef_sc_hd__decap_12".
|
||||
Reading "sky130_fd_sc_hd__nand3b_2".
|
||||
Reading "sky130_fd_sc_hd__and2_2".
|
||||
Reading "sky130_fd_sc_hd__a21oi_2".
|
||||
Reading "sky130_fd_sc_hd__and3_2".
|
||||
Reading "sky130_fd_sc_hd__nand2b_2".
|
||||
Reading "sky130_fd_sc_hd__a211o_2".
|
||||
Reading "sky130_fd_sc_hd__decap_8".
|
||||
Reading "sky130_fd_sc_hd__and4b_2".
|
||||
Reading "sky130_fd_sc_hd__o21a_2".
|
||||
Reading "sky130_fd_sc_hd__o211a_2".
|
||||
Reading "sky130_fd_sc_hd__a21o_2".
|
||||
Reading "sky130_fd_sc_hd__einvp_1".
|
||||
Reading "sky130_fd_sc_hd__clkinv_2".
|
||||
Reading "sky130_fd_sc_hd__clkinv_8".
|
||||
Reading "sky130_fd_sc_hd__conb_1".
|
||||
Reading "sky130_fd_sc_hd__clkinv_1".
|
||||
Reading "sky130_fd_sc_hd__o32a_2".
|
||||
Reading "sky130_fd_sc_hd__a31o_2".
|
||||
Reading "sky130_fd_sc_hd__einvp_2".
|
||||
Reading "sky130_fd_sc_hd__clkbuf_1".
|
||||
Reading "sky130_fd_sc_hd__o31a_2".
|
||||
Reading "sky130_fd_sc_hd__o22a_2".
|
||||
Reading "sky130_fd_sc_hd__or2_2".
|
||||
Reading "sky130_fd_sc_hd__einvn_8".
|
||||
Reading "sky130_fd_sc_hd__o2111a_2".
|
||||
Reading "sky130_fd_sc_hd__o2bb2a_2".
|
||||
Reading "sky130_fd_sc_hd__einvn_4".
|
||||
Reading "sky130_fd_sc_hd__o21ba_2".
|
||||
Reading "sky130_fd_sc_hd__nand4b_2".
|
||||
Reading "sky130_fd_sc_hd__clkbuf_2".
|
||||
Reading "sky130_fd_sc_hd__a32o_2".
|
||||
Reading "sky130_fd_sc_hd__and3b_2".
|
||||
Reading "sky130_fd_sc_hd__nand4_2".
|
||||
Reading "sky130_fd_sc_hd__a22o_2".
|
||||
Reading "sky130_fd_sc_hd__and2b_2".
|
||||
Reading "sky130_fd_sc_hd__o221a_2".
|
||||
Reading "digital_pll".
|
||||
[INFO]: Loading digital_pll
|
||||
|
||||
DRC style is now "drc(full)"
|
||||
Loading DRC CIF style.
|
||||
No errors found.
|
||||
[INFO]: COUNT: 0
|
||||
[INFO]: Should be divided by 3 or 4
|
||||
[INFO]: DRC Checking DONE (/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/reports/signoff/drc.rpt)
|
||||
[INFO]: Saving mag view with DRC errors (/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/signoff/digital_pll.drc.mag)
|
||||
[INFO]: Saved
|
||||
|
|
@ -1,6 +0,0 @@
|
|||
OpenROAD 4174c3ad802d2ac1d04d387d2c4b883903f6647e
|
||||
This program is licensed under the BSD-3 license. See the LICENSE file for details.
|
||||
Components of this program may be licensed under more restrictive licenses which must be honored.
|
||||
Reading /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/routing/digital_pll.odb
|
||||
[INFO ANT-0002] Found 0 net violations.
|
||||
[INFO ANT-0001] Found 0 pin violations.
|
||||
|
|
@ -1,54 +0,0 @@
|
|||
CVC: Circuit Validation Check Version 1.1.0
|
||||
CVC: Log output to /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/reports/signoff/digital_pll.rpt
|
||||
CVC: Error output to /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/reports/signoff/digital_pll.rpt.error.gz
|
||||
CVC: Debug output to /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/reports/signoff/digital_pll.rpt.debug.gz
|
||||
CVC: Start: Tue Oct 18 13:53:04 2022
|
||||
|
||||
Using the following parameters for CVC (Circuit Validation Check) from /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.tech/openlane/cvc/cvcrc
|
||||
CVC_TOP = 'digital_pll'
|
||||
CVC_NETLIST = '/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/tmp/signoff/digital_pll.cdl'
|
||||
CVC_MODE = 'digital_pll'
|
||||
CVC_MODEL_FILE = '/home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.tech/openlane/cvc/models'
|
||||
CVC_POWER_FILE = '/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/tmp/signoff/digital_pll.power'
|
||||
CVC_FUSE_FILE = ''
|
||||
CVC_REPORT_FILE = '/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/reports/signoff/digital_pll.rpt'
|
||||
CVC_REPORT_TITLE = 'CVC $CVC_TOP'
|
||||
CVC_CIRCUIT_ERROR_LIMIT = '100'
|
||||
CVC_SEARCH_LIMIT = '100'
|
||||
CVC_LEAK_LIMIT = '0.0002'
|
||||
CVC_SOI = 'false'
|
||||
CVC_SCRC = 'false'
|
||||
CVC_VTH_GATES = 'false'
|
||||
CVC_MIN_VTH_GATES = 'false'
|
||||
CVC_IGNORE_VTH_FLOATING = 'false'
|
||||
CVC_IGNORE_NO_LEAK_FLOATING = 'false'
|
||||
CVC_LEAK_OVERVOLTAGE = 'true'
|
||||
CVC_LOGIC_DIODES = 'false'
|
||||
CVC_ANALOG_GATES = 'true'
|
||||
CVC_BACKUP_RESULTS = 'false'
|
||||
CVC_MOS_DIODE_ERROR_THRESHOLD = '0'
|
||||
CVC_SHORT_ERROR_THRESHOLD = '0'
|
||||
CVC_BIAS_ERROR_THRESHOLD = '0'
|
||||
CVC_FORWARD_ERROR_THRESHOLD = '0'
|
||||
CVC_FLOATING_ERROR_THRESHOLD = '0'
|
||||
CVC_GATE_ERROR_THRESHOLD = '0'
|
||||
CVC_LEAK?_ERROR_THRESHOLD = '0'
|
||||
CVC_EXPECTED_ERROR_THRESHOLD = '0'
|
||||
CVC_OVERVOLTAGE_ERROR_THRESHOLD = '0'
|
||||
CVC_PARALLEL_CIRCUIT_PORT_LIMIT = '0'
|
||||
CVC_CELL_ERROR_LIMIT_FILE = ''
|
||||
CVC_CELL_CHECKSUM_FILE = ''
|
||||
CVC_LARGE_CIRCUIT_SIZE = '10000000'
|
||||
CVC_NET_CHECK_FILE = ''
|
||||
CVC_MODEL_CHECK_FILE = ''
|
||||
End of parameters
|
||||
|
||||
CVC: Reading device model settings...
|
||||
CVC: Reading power settings...
|
||||
CVC: Parsing netlist /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/tmp/signoff/digital_pll.cdl
|
||||
|
||||
Cdl fixed data size 35716
|
||||
Usage CDL: Time: 0 Memory: 7292 I/O: 8 Swap: 0
|
||||
CVC: Counting and linking...
|
||||
Fatal error:could not find subcircuit: XFILLER_8_114(sky130_ef_sc_hd__decap_12) in digital_pll
|
||||
|
||||
|
|
@ -1,744 +0,0 @@
|
|||
# Run configs
|
||||
set ::env(PDK_ROOT) {/home/kareem_farid/caravel/deps/openlane-new/pdk}
|
||||
set ::env(BASE_SDC_FILE) {/home/kareem_farid/caravel/openlane/digital_pll/base.sdc}
|
||||
set ::env(BOTTOM_MARGIN_MULT) {2}
|
||||
set ::env(CARRY_SELECT_ADDER_MAP) {/home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.tech/openlane/sky130_fd_sc_hd/csa_map.v}
|
||||
set ::env(CELLS_LEF) {/home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/lef/sky130_ef_sc_hd.lef /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/lef/sky130_fd_sc_hd.lef}
|
||||
set ::env(CELLS_LEF_OPT) {/home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/lef/sky130_ef_sc_hd.lef /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/lef/sky130_fd_sc_hd.lef}
|
||||
set ::env(CELL_CLK_PORT) {CLK}
|
||||
set ::env(CELL_PAD_EXCLUDE) {sky130_fd_sc_hd__tap* sky130_fd_sc_hd__decap* sky130_ef_sc_hd__decap* sky130_fd_sc_hd__fill*}
|
||||
set ::env(CHECK_ASSIGN_STATEMENTS) {0}
|
||||
set ::env(CHECK_UNMAPPED_CELLS) {1}
|
||||
set ::env(CLK_BUFFER) {sky130_fd_sc_hd__clkbuf_4}
|
||||
set ::env(CLK_BUFFER_INPUT) {A}
|
||||
set ::env(CLK_BUFFER_OUTPUT) {X}
|
||||
set ::env(CLOCK_BUFFER_FANOUT) {16}
|
||||
set ::env(CLOCK_PERIOD) {10.0}
|
||||
set ::env(CLOCK_PORT) {}
|
||||
set ::env(CLOCK_TREE_SYNTH) {0}
|
||||
set ::env(CLOCK_WIRE_RC_LAYER) {met5}
|
||||
set ::env(CONFIGS) {general.tcl checkers.tcl synthesis.tcl floorplan.tcl cts.tcl placement.tcl routing.tcl extraction.tcl}
|
||||
set ::env(CTS_CLK_BUFFER_LIST) {sky130_fd_sc_hd__clkbuf_8 sky130_fd_sc_hd__clkbuf_4 sky130_fd_sc_hd__clkbuf_2}
|
||||
set ::env(CTS_CLK_MAX_WIRE_LENGTH) {0}
|
||||
set ::env(CTS_DISABLE_POST_PROCESSING) {0}
|
||||
set ::env(CTS_DISTANCE_BETWEEN_BUFFERS) {0}
|
||||
set ::env(CTS_MAX_CAP) {1.53169}
|
||||
set ::env(CTS_REPORT_TIMING) {1}
|
||||
set ::env(CTS_ROOT_BUFFER) {sky130_fd_sc_hd__clkbuf_16}
|
||||
set ::env(CTS_SINK_CLUSTERING_MAX_DIAMETER) {50}
|
||||
set ::env(CTS_SINK_CLUSTERING_SIZE) {25}
|
||||
set ::env(CTS_SQR_CAP) {0.258e-3}
|
||||
set ::env(CTS_SQR_RES) {0.125}
|
||||
set ::env(CTS_TARGET_SKEW) {200}
|
||||
set ::env(CTS_TECH_DIR) {N/A}
|
||||
set ::env(CTS_TOLERANCE) {100}
|
||||
set ::env(CVC_SCRIPTS_DIR) {/home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.tech/openlane/cvc}
|
||||
set ::env(DATA_WIRE_RC_LAYER) {met2}
|
||||
set ::env(DECAP_CELL) {sky130_ef_sc_hd__decap_12 sky130_fd_sc_hd__decap_8 sky130_fd_sc_hd__decap_6 sky130_fd_sc_hd__decap_4 sky130_fd_sc_hd__decap_3}
|
||||
set ::env(DEFAULT_MAX_TRAN) {0.75}
|
||||
set ::env(DEF_UNITS_PER_MICRON) {1000}
|
||||
set ::env(DESIGN_CONFIG) {/home/kareem_farid/caravel/openlane/digital_pll/config.tcl}
|
||||
set ::env(DESIGN_IS_CORE) {1}
|
||||
set ::env(DESIGN_NAME) {digital_pll}
|
||||
set ::env(DETAILED_ROUTER) {tritonroute}
|
||||
set ::env(DIE_AREA) {0 0 100 75}
|
||||
set ::env(DIODE_CELL) {sky130_fd_sc_hd__diode_2}
|
||||
set ::env(DIODE_CELL_PIN) {DIODE}
|
||||
set ::env(DIODE_INSERTION_STRATEGY) {4}
|
||||
set ::env(DIODE_PADDING) {0}
|
||||
set ::env(DPL_CELL_PADDING) {2}
|
||||
set ::env(DRC_EXCLUDE_CELL_LIST) {/home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.tech/openlane/sky130_fd_sc_hd/drc_exclude.cells}
|
||||
set ::env(DRC_EXCLUDE_CELL_LIST_OPT) {/home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.tech/openlane/sky130_fd_sc_hd/drc_exclude.cells}
|
||||
set ::env(DRT_CELL_PADDING) {4}
|
||||
set ::env(DRT_OPT_ITERS) {64}
|
||||
set ::env(ECO_ENABLE) {0}
|
||||
set ::env(ECO_FINISH) {0}
|
||||
set ::env(ECO_ITER) {0}
|
||||
set ::env(ECO_SKIP_PIN) {1}
|
||||
set ::env(FAKEDIODE_CELL) {sky130_ef_sc_hd__fakediode_2}
|
||||
set ::env(FILL_CELL) {sky130_fd_sc_hd__fill*}
|
||||
set ::env(FILL_INSERTION) {1}
|
||||
set ::env(FP_ASPECT_RATIO) {1}
|
||||
set ::env(FP_CORE_UTIL) {50}
|
||||
set ::env(FP_ENDCAP_CELL) {sky130_fd_sc_hd__decap_3}
|
||||
set ::env(FP_IO_HEXTEND) {-1}
|
||||
set ::env(FP_IO_HLAYER) {met3}
|
||||
set ::env(FP_IO_HLENGTH) {4}
|
||||
set ::env(FP_IO_HTHICKNESS_MULT) {2}
|
||||
set ::env(FP_IO_MIN_DISTANCE) {3}
|
||||
set ::env(FP_IO_MODE) {1}
|
||||
set ::env(FP_IO_UNMATCHED_ERROR) {1}
|
||||
set ::env(FP_IO_VEXTEND) {-1}
|
||||
set ::env(FP_IO_VLAYER) {met2}
|
||||
set ::env(FP_IO_VLENGTH) {4}
|
||||
set ::env(FP_IO_VTHICKNESS_MULT) {2}
|
||||
set ::env(FP_PDN_AUTO_ADJUST) {1}
|
||||
set ::env(FP_PDN_CHECK_NODES) {1}
|
||||
set ::env(FP_PDN_CORE_RING) {0}
|
||||
set ::env(FP_PDN_CORE_RING_HOFFSET) {6}
|
||||
set ::env(FP_PDN_CORE_RING_HSPACING) {1.7}
|
||||
set ::env(FP_PDN_CORE_RING_HWIDTH) {1.6}
|
||||
set ::env(FP_PDN_CORE_RING_VOFFSET) {6}
|
||||
set ::env(FP_PDN_CORE_RING_VSPACING) {1.7}
|
||||
set ::env(FP_PDN_CORE_RING_VWIDTH) {1.6}
|
||||
set ::env(FP_PDN_ENABLE_GLOBAL_CONNECTIONS) {1}
|
||||
set ::env(FP_PDN_ENABLE_MACROS_GRID) {1}
|
||||
set ::env(FP_PDN_ENABLE_RAILS) {1}
|
||||
set ::env(FP_PDN_HOFFSET) {16.41}
|
||||
set ::env(FP_PDN_HORIZONTAL_HALO) {10}
|
||||
set ::env(FP_PDN_HPITCH) {40}
|
||||
set ::env(FP_PDN_HSPACING) {18.4}
|
||||
set ::env(FP_PDN_HWIDTH) {1.6}
|
||||
set ::env(FP_PDN_IRDROP) {1}
|
||||
set ::env(FP_PDN_LOWER_LAYER) {met4}
|
||||
set ::env(FP_PDN_RAILS_LAYER) {met1}
|
||||
set ::env(FP_PDN_RAIL_OFFSET) {0}
|
||||
set ::env(FP_PDN_RAIL_WIDTH) {0.48}
|
||||
set ::env(FP_PDN_SKIPTRIM) {1}
|
||||
set ::env(FP_PDN_UPPER_LAYER) {met5}
|
||||
set ::env(FP_PDN_VERTICAL_HALO) {10}
|
||||
set ::env(FP_PDN_VOFFSET) {16.32}
|
||||
set ::env(FP_PDN_VPITCH) {40}
|
||||
set ::env(FP_PDN_VSPACING) {18.4}
|
||||
set ::env(FP_PDN_VWIDTH) {1.6}
|
||||
set ::env(FP_PIN_ORDER_CFG) {/home/kareem_farid/caravel/openlane/digital_pll/pin_order.cfg}
|
||||
set ::env(FP_SIZING) {absolute}
|
||||
set ::env(FP_TAPCELL_DIST) {13}
|
||||
set ::env(FP_TAP_HORIZONTAL_HALO) {10}
|
||||
set ::env(FP_TAP_VERTICAL_HALO) {10}
|
||||
set ::env(FP_WELLTAP_CELL) {sky130_fd_sc_hd__tapvpwrvgnd_1}
|
||||
set ::env(FULL_ADDER_MAP) {/home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.tech/openlane/sky130_fd_sc_hd/fa_map.v}
|
||||
set ::env(GDS_FILES) {/home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/gds/sky130_fd_sc_hd.gds}
|
||||
set ::env(GDS_FILES_OPT) {/home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/gds/sky130_fd_sc_hd.gds}
|
||||
set ::env(GENERATE_FINAL_SUMMARY_REPORT) {1}
|
||||
set ::env(GLB_CFG_FILE) {/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/config.tcl}
|
||||
set ::env(GLB_OPTIMIZE_MIRRORING) {1}
|
||||
set ::env(GLB_RESIZER_ALLOW_SETUP_VIOS) {0}
|
||||
set ::env(GLB_RESIZER_HOLD_MAX_BUFFER_PERCENT) {50}
|
||||
set ::env(GLB_RESIZER_HOLD_SLACK_MARGIN) {0.05}
|
||||
set ::env(GLB_RESIZER_MAX_CAP_MARGIN) {10}
|
||||
set ::env(GLB_RESIZER_MAX_SLEW_MARGIN) {10}
|
||||
set ::env(GLB_RESIZER_MAX_WIRE_LENGTH) {0}
|
||||
set ::env(GLB_RESIZER_SETUP_MAX_BUFFER_PERCENT) {50}
|
||||
set ::env(GLB_RESIZER_SETUP_SLACK_MARGIN) {0.025}
|
||||
set ::env(GLB_RESIZER_TIMING_OPTIMIZATIONS) {0}
|
||||
set ::env(GLOBAL_ROUTER) {fastroute}
|
||||
set ::env(GND_PIN) {VGND}
|
||||
set ::env(GPIO_PADS_LEF) { /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_io/lef/sky130_fd_io.lef /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_io/lef/sky130_ef_io.lef }
|
||||
set ::env(GPIO_PADS_LEF_CORE_SIDE) { /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.tech/openlane/custom_cells/lef/sky130_fd_io_core.lef /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.tech/openlane/custom_cells/lef/sky130_ef_io_core.lef }
|
||||
set ::env(GPIO_PADS_VERILOG) {/home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/verilog/sky130_fd_io/sky130_ef_io.v}
|
||||
set ::env(GPL_CELL_PADDING) {0}
|
||||
set ::env(GRT_ADJUSTMENT) {0}
|
||||
set ::env(GRT_ALLOW_CONGESTION) {0}
|
||||
set ::env(GRT_ANT_ITERS) {3}
|
||||
set ::env(GRT_ESTIMATE_PARASITICS) {1}
|
||||
set ::env(GRT_LAYER_ADJUSTMENTS) {0.99,0,0,0,0,0}
|
||||
set ::env(GRT_MACRO_EXTENSION) {0}
|
||||
set ::env(GRT_MAX_DIODE_INS_ITERS) {1}
|
||||
set ::env(GRT_OVERFLOW_ITERS) {50}
|
||||
set ::env(IO_PCT) {0.2}
|
||||
set ::env(KLAYOUT_DRC_KLAYOUT_GDS) {0}
|
||||
set ::env(KLAYOUT_DRC_TECH_SCRIPT) {/home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.tech/klayout/drc/sky130A_mr.drc}
|
||||
set ::env(KLAYOUT_PROPERTIES) {/home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.tech/klayout/tech/sky130A.lyp}
|
||||
set ::env(KLAYOUT_TECH) {/home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.tech/klayout/tech/sky130A.lyt}
|
||||
set ::env(KLAYOUT_XOR_GDS) {1}
|
||||
set ::env(KLAYOUT_XOR_XML) {1}
|
||||
set ::env(LEC_ENABLE) {0}
|
||||
set ::env(LEFT_MARGIN_MULT) {12}
|
||||
set ::env(LIB_FASTEST) {/home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/lib/sky130_fd_sc_hd__ff_n40C_1v95.lib}
|
||||
set ::env(LIB_SLOWEST) {/home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/lib/sky130_fd_sc_hd__ss_100C_1v60.lib}
|
||||
set ::env(LIB_SLOWEST_OPT) {/home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/lib/sky130_fd_sc_hd__ss_100C_1v60.lib}
|
||||
set ::env(LIB_SYNTH) {/home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/lib/sky130_fd_sc_hd__tt_025C_1v80.lib}
|
||||
set ::env(LIB_TYPICAL) {/home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/lib/sky130_fd_sc_hd__tt_025C_1v80.lib}
|
||||
set ::env(LOGS_DIR) {/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/logs}
|
||||
set ::env(LVS_CONNECT_BY_LABEL) {0}
|
||||
set ::env(LVS_INSERT_POWER_PINS) {1}
|
||||
set ::env(MACRO_BLOCKAGES_LAYER) {li1 met1 met2 met3 met4}
|
||||
set ::env(MAGIC_CONVERT_DRC_TO_RDB) {1}
|
||||
set ::env(MAGIC_DISABLE_HIER_GDS) {1}
|
||||
set ::env(MAGIC_DRC_USE_GDS) {1}
|
||||
set ::env(MAGIC_EXT_USE_GDS) {0}
|
||||
set ::env(MAGIC_GENERATE_GDS) {1}
|
||||
set ::env(MAGIC_GENERATE_LEF) {1}
|
||||
set ::env(MAGIC_GENERATE_MAGLEF) {1}
|
||||
set ::env(MAGIC_INCLUDE_GDS_POINTERS) {0}
|
||||
set ::env(MAGIC_MAGICRC) {/home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.tech/magic/sky130A.magicrc}
|
||||
set ::env(MAGIC_PAD) {0}
|
||||
set ::env(MAGIC_TECH_FILE) {/home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.tech/magic/sky130A.tech}
|
||||
set ::env(MAGIC_WRITE_FULL_LEF) {0}
|
||||
set ::env(MAGIC_ZEROIZE_ORIGIN) {0}
|
||||
set ::env(NETGEN_SETUP_FILE) {/home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.tech/netgen/sky130A_setup.tcl}
|
||||
set ::env(NO_SYNTH_CELL_LIST) {/home/kareem_farid/caravel/openlane/digital_pll/no_synth.list}
|
||||
set ::env(OPENLANE_VERBOSE) {1}
|
||||
set ::env(PDKPATH) {/home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A}
|
||||
set ::env(PDN_CFG) {/openlane/scripts/openroad/common/pdn_cfg.tcl}
|
||||
set ::env(PLACE_SITE) {unithd}
|
||||
set ::env(PLACE_SITE_HEIGHT) {2.720}
|
||||
set ::env(PLACE_SITE_WIDTH) {0.460}
|
||||
set ::env(PL_BASIC_PLACEMENT) {0}
|
||||
set ::env(PL_ESTIMATE_PARASITICS) {1}
|
||||
set ::env(PL_LIB) {/home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/lib/sky130_fd_sc_hd__tt_025C_1v80.lib}
|
||||
set ::env(PL_MACRO_CHANNEL) {0 0}
|
||||
set ::env(PL_MACRO_HALO) {0 0}
|
||||
set ::env(PL_MAX_DISPLACEMENT_X) {500}
|
||||
set ::env(PL_MAX_DISPLACEMENT_Y) {100}
|
||||
set ::env(PL_OPTIMIZE_MIRRORING) {1}
|
||||
set ::env(PL_RANDOM_GLB_PLACEMENT) {0}
|
||||
set ::env(PL_RANDOM_INITIAL_PLACEMENT) {0}
|
||||
set ::env(PL_RESIZER_ALLOW_SETUP_VIOS) {0}
|
||||
set ::env(PL_RESIZER_BUFFER_INPUT_PORTS) {1}
|
||||
set ::env(PL_RESIZER_BUFFER_OUTPUT_PORTS) {1}
|
||||
set ::env(PL_RESIZER_DESIGN_OPTIMIZATIONS) {0}
|
||||
set ::env(PL_RESIZER_HOLD_MAX_BUFFER_PERCENT) {50}
|
||||
set ::env(PL_RESIZER_HOLD_SLACK_MARGIN) {0.1}
|
||||
set ::env(PL_RESIZER_MAX_CAP_MARGIN) {20}
|
||||
set ::env(PL_RESIZER_MAX_SLEW_MARGIN) {20}
|
||||
set ::env(PL_RESIZER_MAX_WIRE_LENGTH) {0}
|
||||
set ::env(PL_RESIZER_REPAIR_DESIGN) {1}
|
||||
set ::env(PL_RESIZER_REPAIR_TIE_FANOUT) {1}
|
||||
set ::env(PL_RESIZER_SETUP_MAX_BUFFER_PERCENT) {50}
|
||||
set ::env(PL_RESIZER_SETUP_SLACK_MARGIN) {0.05}
|
||||
set ::env(PL_RESIZER_TIE_SEPERATION) {0}
|
||||
set ::env(PL_RESIZER_TIMING_OPTIMIZATIONS) {0}
|
||||
set ::env(PL_ROUTABILITY_DRIVEN) {1}
|
||||
set ::env(PL_SKIP_INITIAL_PLACEMENT) {0}
|
||||
set ::env(PL_TARGET_DENSITY) {0.68}
|
||||
set ::env(PL_TIME_DRIVEN) {1}
|
||||
set ::env(PRIMARY_SIGNOFF_TOOL) {magic}
|
||||
set ::env(PROCESS) {130}
|
||||
set ::env(QUIT_ON_HOLD_VIOLATIONS) {1}
|
||||
set ::env(QUIT_ON_ILLEGAL_OVERLAPS) {1}
|
||||
set ::env(QUIT_ON_LVS_ERROR) {1}
|
||||
set ::env(QUIT_ON_MAGIC_DRC) {1}
|
||||
set ::env(QUIT_ON_SETUP_VIOLATIONS) {1}
|
||||
set ::env(QUIT_ON_TIMING_VIOLATIONS) {1}
|
||||
set ::env(QUIT_ON_TR_DRC) {1}
|
||||
set ::env(RCX_CC_MODEL) {10}
|
||||
set ::env(RCX_CONTEXT_DEPTH) {5}
|
||||
set ::env(RCX_CORNER_COUNT) {1}
|
||||
set ::env(RCX_COUPLING_THRESHOLD) {0.1}
|
||||
set ::env(RCX_MAX_RESISTANCE) {50}
|
||||
set ::env(RCX_MERGE_VIA_WIRE_RES) {1}
|
||||
set ::env(RCX_RULES) {/home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.tech/openlane/rules.openrcx.sky130A.nom.calibre}
|
||||
set ::env(RCX_RULES_MAX) {/home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.tech/openlane/rules.openrcx.sky130A.max.calibre}
|
||||
set ::env(RCX_RULES_MIN) {/home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.tech/openlane/rules.openrcx.sky130A.min.calibre}
|
||||
set ::env(REPORTS_DIR) {/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/reports}
|
||||
set ::env(RESULTS_DIR) {/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results}
|
||||
set ::env(RE_BUFFER_CELL) {sky130_fd_sc_hd__buf_4}
|
||||
set ::env(RIGHT_MARGIN_MULT) {12}
|
||||
set ::env(RIPPLE_CARRY_ADDER_MAP) {/home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.tech/openlane/sky130_fd_sc_hd/rca_map.v}
|
||||
set ::env(ROOT_CLK_BUFFER) {sky130_fd_sc_hd__clkbuf_16}
|
||||
set ::env(ROUTING_CORES) {2}
|
||||
set ::env(RSZ_DONT_TOUCH_RX) {$^}
|
||||
set ::env(RSZ_USE_OLD_REMOVER) {0}
|
||||
set ::env(RT_MAX_LAYER) {met5}
|
||||
set ::env(RT_MIN_LAYER) {met1}
|
||||
set ::env(RUN_CVC) {1}
|
||||
set ::env(RUN_DIR) {/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51}
|
||||
set ::env(RUN_DRT) {1}
|
||||
set ::env(RUN_IRDROP_REPORT) {1}
|
||||
set ::env(RUN_KLAYOUT) {1}
|
||||
set ::env(RUN_KLAYOUT_DRC) {0}
|
||||
set ::env(RUN_KLAYOUT_XOR) {1}
|
||||
set ::env(RUN_LVS) {1}
|
||||
set ::env(RUN_MAGIC) {1}
|
||||
set ::env(RUN_MAGIC_DRC) {1}
|
||||
set ::env(RUN_SPEF_EXTRACTION) {1}
|
||||
set ::env(RUN_TAG) {22_10_18_06_51}
|
||||
set ::env(SPEF_EXTRACTOR) {openrcx}
|
||||
set ::env(START_TIME) {2022.10.18_13.51.57}
|
||||
set ::env(STA_REPORT_POWER) {1}
|
||||
set ::env(STA_WRITE_LIB) {0}
|
||||
set ::env(STD_CELL_GROUND_PINS) {VGND VNB}
|
||||
set ::env(STD_CELL_LIBRARY) {sky130_fd_sc_hd}
|
||||
set ::env(STD_CELL_LIBRARY_CDL) {/home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/cdl/sky130_fd_sc_hd.cdl}
|
||||
set ::env(STD_CELL_LIBRARY_OPT) {sky130_fd_sc_hd}
|
||||
set ::env(STD_CELL_LIBRARY_OPT_CDL) {/home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/cdl/sky130_fd_sc_hd.cdl}
|
||||
set ::env(STD_CELL_POWER_PINS) {VPWR VPB}
|
||||
set ::env(SYNTH_ADDER_TYPE) {YOSYS}
|
||||
set ::env(SYNTH_BIN) {yosys}
|
||||
set ::env(SYNTH_BUFFERING) {1}
|
||||
set ::env(SYNTH_CAP_LOAD) {33.442}
|
||||
set ::env(SYNTH_CLOCK_TRANSITION) {0.15}
|
||||
set ::env(SYNTH_CLOCK_UNCERTAINTY) {0.25}
|
||||
set ::env(SYNTH_DRIVING_CELL) {sky130_fd_sc_hd__inv_2}
|
||||
set ::env(SYNTH_DRIVING_CELL_PIN) {Y}
|
||||
set ::env(SYNTH_ELABORATE_ONLY) {0}
|
||||
set ::env(SYNTH_EXTRA_MAPPING_FILE) {}
|
||||
set ::env(SYNTH_FLAT_TOP) {0}
|
||||
set ::env(SYNTH_LATCH_MAP) {/home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.tech/openlane/sky130_fd_sc_hd/latch_map.v}
|
||||
set ::env(SYNTH_MAX_FANOUT) {7}
|
||||
set ::env(SYNTH_MIN_BUF_PORT) {sky130_fd_sc_hd__buf_2 A X}
|
||||
set ::env(SYNTH_MUX4_MAP) {/home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.tech/openlane/sky130_fd_sc_hd/mux4_map.v}
|
||||
set ::env(SYNTH_MUX_MAP) {/home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.tech/openlane/sky130_fd_sc_hd/mux2_map.v}
|
||||
set ::env(SYNTH_NO_FLAT) {0}
|
||||
set ::env(SYNTH_READ_BLACKBOX_LIB) {1}
|
||||
set ::env(SYNTH_SCRIPT) {/openlane/scripts/yosys/synth.tcl}
|
||||
set ::env(SYNTH_SHARE_RESOURCES) {1}
|
||||
set ::env(SYNTH_SIZING) {0}
|
||||
set ::env(SYNTH_STRATEGY) {AREA 0}
|
||||
set ::env(SYNTH_TIEHI_PORT) {sky130_fd_sc_hd__conb_1 HI}
|
||||
set ::env(SYNTH_TIELO_PORT) {sky130_fd_sc_hd__conb_1 LO}
|
||||
set ::env(SYNTH_TIMING_DERATE) {0.05}
|
||||
set ::env(TAKE_LAYOUT_SCROT) {0}
|
||||
set ::env(TAP_DECAP_INSERTION) {1}
|
||||
set ::env(TECH_LEF) {/home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/techlef/sky130_fd_sc_hd__nom.tlef}
|
||||
set ::env(TECH_LEF_MAX) {/home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/techlef/sky130_fd_sc_hd__max.tlef}
|
||||
set ::env(TECH_LEF_MIN) {/home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/techlef/sky130_fd_sc_hd__min.tlef}
|
||||
set ::env(TECH_LEF_OPT) {/home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/techlef/sky130_fd_sc_hd__nom.tlef}
|
||||
set ::env(TERMINAL_OUTPUT) {/dev/null}
|
||||
set ::env(TMP_DIR) {/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/tmp}
|
||||
set ::env(TOP_MARGIN_MULT) {2}
|
||||
set ::env(TRACKS_INFO_FILE) {/home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.tech/openlane/sky130_fd_sc_hd/tracks.info}
|
||||
set ::env(TRISTATE_BUFFER_MAP) {/home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.tech/openlane/sky130_fd_sc_hd/tribuff_map.v}
|
||||
set ::env(USE_ARC_ANTENNA_CHECK) {1}
|
||||
set ::env(USE_GPIO_PADS) {0}
|
||||
set ::env(VDD_PIN) {VPWR}
|
||||
set ::env(VERILOG_FILES) {/home/kareem_farid/caravel/openlane/digital_pll/../../verilog/rtl/digital_pll.v}
|
||||
set ::env(WIRE_RC_LAYER) {met1}
|
||||
set ::env(YOSYS_REWRITE_VERILOG) {0}
|
||||
set ::env(cts_logs) {/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/logs/cts}
|
||||
set ::env(cts_reports) {/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/reports/cts}
|
||||
set ::env(cts_results) {/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/cts}
|
||||
set ::env(cts_tmpfiles) {/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/tmp/cts}
|
||||
set ::env(eco_logs) {/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/logs/eco}
|
||||
set ::env(eco_reports) {/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/reports/eco}
|
||||
set ::env(eco_results) {/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/eco}
|
||||
set ::env(eco_tmpfiles) {/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/tmp/eco}
|
||||
set ::env(floorplan_logs) {/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/logs/floorplan}
|
||||
set ::env(floorplan_reports) {/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/reports/floorplan}
|
||||
set ::env(floorplan_results) {/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/floorplan}
|
||||
set ::env(floorplan_tmpfiles) {/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/tmp/floorplan}
|
||||
set ::env(placement_logs) {/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/logs/placement}
|
||||
set ::env(placement_reports) {/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/reports/placement}
|
||||
set ::env(placement_results) {/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/placement}
|
||||
set ::env(placement_tmpfiles) {/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/tmp/placement}
|
||||
set ::env(routing_logs) {/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/logs/routing}
|
||||
set ::env(routing_reports) {/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/reports/routing}
|
||||
set ::env(routing_results) {/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/routing}
|
||||
set ::env(routing_tmpfiles) {/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/tmp/routing}
|
||||
set ::env(signoff_logs) {/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/logs/signoff}
|
||||
set ::env(signoff_reports) {/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/reports/signoff}
|
||||
set ::env(signoff_results) {/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/signoff}
|
||||
set ::env(signoff_tmpfiles) {/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/tmp/signoff}
|
||||
set ::env(synthesis_logs) {/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/logs/synthesis}
|
||||
set ::env(synthesis_reports) {/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/reports/synthesis}
|
||||
set ::env(synthesis_results) {/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/synthesis}
|
||||
set ::env(synthesis_tmpfiles) {/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/tmp/synthesis}
|
||||
set ::env(SYNTH_MAX_TRAN) {0.75}
|
||||
set ::env(CURRENT_INDEX) 32
|
||||
set ::env(CURRENT_DEF) /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/routing/digital_pll.def
|
||||
set ::env(CURRENT_GUIDE) /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/tmp/routing/12-global.guide
|
||||
set ::env(CURRENT_NETLIST) /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/tmp/signoff/26-digital_pll.nl.v
|
||||
set ::env(CURRENT_POWERED_NETLIST) {0}
|
||||
set ::env(CURRENT_ODB) /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/routing/digital_pll.odb
|
||||
set ::env(PDK_ROOT) {/home/kareem_farid/caravel/deps/openlane-new/pdk}
|
||||
set ::env(ANTENNA_CHECK_CURRENT_DEF) {/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/tmp/signoff/26-digital_pll.p.def}
|
||||
set ::env(ANTENNA_VIOLATOR_LIST) {/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/reports/signoff/31-antenna_violators.rpt}
|
||||
set ::env(BASE_SDC_FILE) {/home/kareem_farid/caravel/openlane/digital_pll/base.sdc}
|
||||
set ::env(BASIC_PREP_COMPLETE) {1}
|
||||
set ::env(BOTTOM_MARGIN_MULT) {2}
|
||||
set ::env(CARAVEL_ROOT) {/home/kareem_farid/caravel}
|
||||
set ::env(CARRY_SELECT_ADDER_MAP) {/home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.tech/openlane/sky130_fd_sc_hd/csa_map.v}
|
||||
set ::env(CELLS_LEF) {/home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/lef/sky130_ef_sc_hd.lef /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/lef/sky130_fd_sc_hd.lef}
|
||||
set ::env(CELLS_LEF_OPT) {/home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/lef/sky130_ef_sc_hd.lef /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/lef/sky130_fd_sc_hd.lef}
|
||||
set ::env(CELL_CLK_PORT) {CLK}
|
||||
set ::env(CELL_PAD_EXCLUDE) {sky130_fd_sc_hd__tap* sky130_fd_sc_hd__decap* sky130_ef_sc_hd__decap* sky130_fd_sc_hd__fill*}
|
||||
set ::env(CHECK_ASSIGN_STATEMENTS) {0}
|
||||
set ::env(CHECK_UNMAPPED_CELLS) {1}
|
||||
set ::env(CLK_BUFFER) {sky130_fd_sc_hd__clkbuf_4}
|
||||
set ::env(CLK_BUFFER_INPUT) {A}
|
||||
set ::env(CLK_BUFFER_OUTPUT) {X}
|
||||
set ::env(CLOCK_BUFFER_FANOUT) {16}
|
||||
set ::env(CLOCK_PERIOD) {10.0}
|
||||
set ::env(CLOCK_PORT) {}
|
||||
set ::env(CLOCK_TREE_SYNTH) {0}
|
||||
set ::env(CLOCK_WIRE_RC_LAYER) {met5}
|
||||
set ::env(CONFIGS) {general.tcl checkers.tcl synthesis.tcl floorplan.tcl cts.tcl placement.tcl routing.tcl extraction.tcl}
|
||||
set ::env(CORE_AREA) {5.52 5.44 94.3 68.0}
|
||||
set ::env(CORE_HEIGHT) {62.56}
|
||||
set ::env(CORE_WIDTH) {88.78}
|
||||
set ::env(CTS_CLK_BUFFER_LIST) {sky130_fd_sc_hd__clkbuf_8 sky130_fd_sc_hd__clkbuf_4 sky130_fd_sc_hd__clkbuf_2}
|
||||
set ::env(CTS_CLK_MAX_WIRE_LENGTH) {0}
|
||||
set ::env(CTS_CURRENT_DEF) {/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/placement/digital_pll.def}
|
||||
set ::env(CTS_DISABLE_POST_PROCESSING) {0}
|
||||
set ::env(CTS_DISTANCE_BETWEEN_BUFFERS) {0}
|
||||
set ::env(CTS_MAX_CAP) {1.53169}
|
||||
set ::env(CTS_REPORT_TIMING) {1}
|
||||
set ::env(CTS_ROOT_BUFFER) {sky130_fd_sc_hd__clkbuf_16}
|
||||
set ::env(CTS_SINK_CLUSTERING_MAX_DIAMETER) {50}
|
||||
set ::env(CTS_SINK_CLUSTERING_SIZE) {25}
|
||||
set ::env(CTS_SQR_CAP) {0.258e-3}
|
||||
set ::env(CTS_SQR_RES) {0.125}
|
||||
set ::env(CTS_TARGET_SKEW) {200}
|
||||
set ::env(CTS_TECH_DIR) {N/A}
|
||||
set ::env(CTS_TOLERANCE) {100}
|
||||
set ::env(CURRENT_DEF) {/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/tmp/signoff/26-digital_pll.p.def}
|
||||
set ::env(CURRENT_GDS) {/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/signoff/digital_pll.gds}
|
||||
set ::env(CURRENT_GUIDE) {/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/tmp/routing/12-global.guide}
|
||||
set ::env(CURRENT_INDEX) {32}
|
||||
set ::env(CURRENT_NETLIST) {/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/tmp/signoff/26-digital_pll.nl.v}
|
||||
set ::env(CURRENT_ODB) {/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/routing/digital_pll.odb}
|
||||
set ::env(CURRENT_POWERED_NETLIST) {/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/tmp/signoff/26-digital_pll.pnl.v}
|
||||
set ::env(CURRENT_SDC) {/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/tmp/floorplan/3-initial_fp.sdc}
|
||||
set ::env(CURRENT_SDF) {/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/routing/mca/process_corner_nom/digital_pll.sdf}
|
||||
set ::env(CURRENT_SPEF) {/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/routing/mca/process_corner_nom/digital_pll.spef}
|
||||
set ::env(CURRENT_STEP) {}
|
||||
set ::env(CVC_SCRIPTS_DIR) {/home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.tech/openlane/cvc}
|
||||
set ::env(DATA_WIRE_RC_LAYER) {met2}
|
||||
set ::env(DECAP_CELL) {sky130_ef_sc_hd__decap_12 sky130_fd_sc_hd__decap_8 sky130_fd_sc_hd__decap_6 sky130_fd_sc_hd__decap_4 sky130_fd_sc_hd__decap_3}
|
||||
set ::env(DEFAULT_MAX_TRAN) {0.75}
|
||||
set ::env(DEF_UNITS_PER_MICRON) {1000}
|
||||
set ::env(DESIGN_CONFIG) {/home/kareem_farid/caravel/openlane/digital_pll/config.tcl}
|
||||
set ::env(DESIGN_DIR) {/home/kareem_farid/caravel/openlane/digital_pll}
|
||||
set ::env(DESIGN_IS_CORE) {1}
|
||||
set ::env(DESIGN_NAME) {digital_pll}
|
||||
set ::env(DETAILED_ROUTER) {tritonroute}
|
||||
set ::env(DIE_AREA) {0.0 0.0 100.0 75.0}
|
||||
set ::env(DIODE_CELL) {sky130_fd_sc_hd__diode_2}
|
||||
set ::env(DIODE_CELL_PIN) {DIODE}
|
||||
set ::env(DIODE_INSERTION_CURRENT_DEF) {/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/routing/digital_pll.def}
|
||||
set ::env(DIODE_INSERTION_STRATEGY) {4}
|
||||
set ::env(DIODE_PADDING) {0}
|
||||
set ::env(DONT_USE_CELLS) {sky130_fd_sc_hd__a2111oi_0 sky130_fd_sc_hd__a21boi_0 sky130_fd_sc_hd__and2_0 sky130_fd_sc_hd__buf_16 sky130_fd_sc_hd__clkdlybuf4s15_1 sky130_fd_sc_hd__clkdlybuf4s18_1 sky130_fd_sc_hd__fa_4 sky130_fd_sc_hd__lpflow_bleeder_1 sky130_fd_sc_hd__lpflow_clkbufkapwr_1 sky130_fd_sc_hd__lpflow_clkbufkapwr_16 sky130_fd_sc_hd__lpflow_clkbufkapwr_2 sky130_fd_sc_hd__lpflow_clkbufkapwr_4 sky130_fd_sc_hd__lpflow_clkbufkapwr_8 sky130_fd_sc_hd__lpflow_clkinvkapwr_1 sky130_fd_sc_hd__lpflow_clkinvkapwr_16 sky130_fd_sc_hd__lpflow_clkinvkapwr_2 sky130_fd_sc_hd__lpflow_clkinvkapwr_4 sky130_fd_sc_hd__lpflow_clkinvkapwr_8 sky130_fd_sc_hd__lpflow_decapkapwr_12 sky130_fd_sc_hd__lpflow_decapkapwr_3 sky130_fd_sc_hd__lpflow_decapkapwr_4 sky130_fd_sc_hd__lpflow_decapkapwr_6 sky130_fd_sc_hd__lpflow_decapkapwr_8 sky130_fd_sc_hd__lpflow_inputiso0n_1 sky130_fd_sc_hd__lpflow_inputiso0p_1 sky130_fd_sc_hd__lpflow_inputiso1n_1 sky130_fd_sc_hd__lpflow_inputiso1p_1 sky130_fd_sc_hd__lpflow_inputisolatch_1 sky130_fd_sc_hd__lpflow_isobufsrc_1 sky130_fd_sc_hd__lpflow_isobufsrc_16 sky130_fd_sc_hd__lpflow_isobufsrc_2 sky130_fd_sc_hd__lpflow_isobufsrc_4 sky130_fd_sc_hd__lpflow_isobufsrc_8 sky130_fd_sc_hd__lpflow_isobufsrckapwr_16 sky130_fd_sc_hd__lpflow_lsbuf_lh_hl_isowell_tap_1 sky130_fd_sc_hd__lpflow_lsbuf_lh_hl_isowell_tap_2 sky130_fd_sc_hd__lpflow_lsbuf_lh_hl_isowell_tap_4 sky130_fd_sc_hd__lpflow_lsbuf_lh_isowell_4 sky130_fd_sc_hd__lpflow_lsbuf_lh_isowell_tap_1 sky130_fd_sc_hd__lpflow_lsbuf_lh_isowell_tap_2 sky130_fd_sc_hd__lpflow_lsbuf_lh_isowell_tap_4 sky130_fd_sc_hd__mux4_4 sky130_fd_sc_hd__o21ai_0 sky130_fd_sc_hd__o311ai_0 sky130_fd_sc_hd__or2_0 sky130_fd_sc_hd__probe_p_8 sky130_fd_sc_hd__probec_p_8 sky130_fd_sc_hd__xor3_1 sky130_fd_sc_hd__xor3_2 sky130_fd_sc_hd__xor3_4 sky130_fd_sc_hd__xnor3_1 sky130_fd_sc_hd__xnor3_2 sky130_fd_sc_hd__xnor3_4 }
|
||||
set ::env(DPL_CELL_PADDING) {2}
|
||||
set ::env(DRC_CURRENT_DEF) {/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/tmp/signoff/26-digital_pll.p.def}
|
||||
set ::env(DRC_EXCLUDE_CELL_LIST) {/home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.tech/openlane/sky130_fd_sc_hd/drc_exclude.cells}
|
||||
set ::env(DRC_EXCLUDE_CELL_LIST_OPT) {/home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.tech/openlane/sky130_fd_sc_hd/drc_exclude.cells}
|
||||
set ::env(DRT_CELL_PADDING) {4}
|
||||
set ::env(DRT_OPT_ITERS) {64}
|
||||
set ::env(ECO_ENABLE) {0}
|
||||
set ::env(ECO_FINISH) {0}
|
||||
set ::env(ECO_ITER) {0}
|
||||
set ::env(ECO_SKIP_PIN) {1}
|
||||
set ::env(EXT_NETLIST) {/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/signoff/digital_pll.spice}
|
||||
set ::env(FAKEDIODE_CELL) {sky130_ef_sc_hd__fakediode_2}
|
||||
set ::env(FILL_CELL) {sky130_fd_sc_hd__fill*}
|
||||
set ::env(FILL_INSERTION) {1}
|
||||
set ::env(FP_ASPECT_RATIO) {1}
|
||||
set ::env(FP_CORE_UTIL) {50}
|
||||
set ::env(FP_ENDCAP_CELL) {sky130_fd_sc_hd__decap_3}
|
||||
set ::env(FP_IO_HEXTEND) {-1}
|
||||
set ::env(FP_IO_HLAYER) {met3}
|
||||
set ::env(FP_IO_HLENGTH) {4}
|
||||
set ::env(FP_IO_HTHICKNESS_MULT) {2}
|
||||
set ::env(FP_IO_MIN_DISTANCE) {3}
|
||||
set ::env(FP_IO_MODE) {1}
|
||||
set ::env(FP_IO_UNMATCHED_ERROR) {1}
|
||||
set ::env(FP_IO_VEXTEND) {-1}
|
||||
set ::env(FP_IO_VLAYER) {met2}
|
||||
set ::env(FP_IO_VLENGTH) {4}
|
||||
set ::env(FP_IO_VTHICKNESS_MULT) {2}
|
||||
set ::env(FP_PDN_AUTO_ADJUST) {1}
|
||||
set ::env(FP_PDN_CHECK_NODES) {1}
|
||||
set ::env(FP_PDN_CORE_RING) {0}
|
||||
set ::env(FP_PDN_CORE_RING_HOFFSET) {6}
|
||||
set ::env(FP_PDN_CORE_RING_HSPACING) {1.7}
|
||||
set ::env(FP_PDN_CORE_RING_HWIDTH) {1.6}
|
||||
set ::env(FP_PDN_CORE_RING_VOFFSET) {6}
|
||||
set ::env(FP_PDN_CORE_RING_VSPACING) {1.7}
|
||||
set ::env(FP_PDN_CORE_RING_VWIDTH) {1.6}
|
||||
set ::env(FP_PDN_ENABLE_GLOBAL_CONNECTIONS) {1}
|
||||
set ::env(FP_PDN_ENABLE_MACROS_GRID) {1}
|
||||
set ::env(FP_PDN_ENABLE_RAILS) {1}
|
||||
set ::env(FP_PDN_HOFFSET) {16.41}
|
||||
set ::env(FP_PDN_HORIZONTAL_HALO) {10}
|
||||
set ::env(FP_PDN_HPITCH) {40}
|
||||
set ::env(FP_PDN_HSPACING) {18.4}
|
||||
set ::env(FP_PDN_HWIDTH) {1.6}
|
||||
set ::env(FP_PDN_IRDROP) {1}
|
||||
set ::env(FP_PDN_LOWER_LAYER) {met4}
|
||||
set ::env(FP_PDN_RAILS_LAYER) {met1}
|
||||
set ::env(FP_PDN_RAIL_OFFSET) {0}
|
||||
set ::env(FP_PDN_RAIL_WIDTH) {0.48}
|
||||
set ::env(FP_PDN_SKIPTRIM) {1}
|
||||
set ::env(FP_PDN_UPPER_LAYER) {met5}
|
||||
set ::env(FP_PDN_VERTICAL_HALO) {10}
|
||||
set ::env(FP_PDN_VOFFSET) {16.32}
|
||||
set ::env(FP_PDN_VPITCH) {40}
|
||||
set ::env(FP_PDN_VSPACING) {18.4}
|
||||
set ::env(FP_PDN_VWIDTH) {1.6}
|
||||
set ::env(FP_PIN_ORDER_CFG) {/home/kareem_farid/caravel/openlane/digital_pll/pin_order.cfg}
|
||||
set ::env(FP_SIZING) {absolute}
|
||||
set ::env(FP_TAPCELL_DIST) {13}
|
||||
set ::env(FP_TAP_HORIZONTAL_HALO) {10}
|
||||
set ::env(FP_TAP_VERTICAL_HALO) {10}
|
||||
set ::env(FP_WELLTAP_CELL) {sky130_fd_sc_hd__tapvpwrvgnd_1}
|
||||
set ::env(FULL_ADDER_MAP) {/home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.tech/openlane/sky130_fd_sc_hd/fa_map.v}
|
||||
set ::env(GDS_FILES) {/home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/gds/sky130_fd_sc_hd.gds}
|
||||
set ::env(GDS_FILES_OPT) {/home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/gds/sky130_fd_sc_hd.gds}
|
||||
set ::env(GENERATE_FINAL_SUMMARY_REPORT) {1}
|
||||
set ::env(GLB_CFG_FILE) {/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/config.tcl}
|
||||
set ::env(GLB_OPTIMIZE_MIRRORING) {1}
|
||||
set ::env(GLB_RESIZER_ALLOW_SETUP_VIOS) {0}
|
||||
set ::env(GLB_RESIZER_HOLD_MAX_BUFFER_PERCENT) {50}
|
||||
set ::env(GLB_RESIZER_HOLD_SLACK_MARGIN) {0.05}
|
||||
set ::env(GLB_RESIZER_MAX_CAP_MARGIN) {10}
|
||||
set ::env(GLB_RESIZER_MAX_SLEW_MARGIN) {10}
|
||||
set ::env(GLB_RESIZER_MAX_WIRE_LENGTH) {0}
|
||||
set ::env(GLB_RESIZER_SETUP_MAX_BUFFER_PERCENT) {50}
|
||||
set ::env(GLB_RESIZER_SETUP_SLACK_MARGIN) {0.025}
|
||||
set ::env(GLB_RESIZER_TIMING_OPTIMIZATIONS) {0}
|
||||
set ::env(GLOBAL_ROUTER) {fastroute}
|
||||
set ::env(GND_NET) {VGND}
|
||||
set ::env(GND_NETS) {VGND}
|
||||
set ::env(GND_PIN) {VGND}
|
||||
set ::env(GPIO_PADS_LEF) { /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_io/lef/sky130_fd_io.lef /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_io/lef/sky130_ef_io.lef }
|
||||
set ::env(GPIO_PADS_LEF_CORE_SIDE) { /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.tech/openlane/custom_cells/lef/sky130_fd_io_core.lef /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.tech/openlane/custom_cells/lef/sky130_ef_io_core.lef }
|
||||
set ::env(GPIO_PADS_VERILOG) {/home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/verilog/sky130_fd_io/sky130_ef_io.v}
|
||||
set ::env(GPL_CELL_PADDING) {0}
|
||||
set ::env(GRT_ADJUSTMENT) {0}
|
||||
set ::env(GRT_ALLOW_CONGESTION) {0}
|
||||
set ::env(GRT_ANT_ITERS) {3}
|
||||
set ::env(GRT_ESTIMATE_PARASITICS) {1}
|
||||
set ::env(GRT_LAYER_ADJUSTMENTS) {0.99,0,0,0,0,0}
|
||||
set ::env(GRT_MACRO_EXTENSION) {0}
|
||||
set ::env(GRT_MAX_DIODE_INS_ITERS) {1}
|
||||
set ::env(GRT_OVERFLOW_ITERS) {50}
|
||||
set ::env(HOME) {/}
|
||||
set ::env(HOSTNAME) {d62ec4b65d8c}
|
||||
set ::env(IO_PCT) {0.2}
|
||||
set ::env(KLAYOUT_DRC_KLAYOUT_GDS) {0}
|
||||
set ::env(KLAYOUT_DRC_TECH_SCRIPT) {/home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.tech/klayout/drc/sky130A_mr.drc}
|
||||
set ::env(KLAYOUT_PROPERTIES) {/home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.tech/klayout/tech/sky130A.lyp}
|
||||
set ::env(KLAYOUT_TECH) {/home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.tech/klayout/tech/sky130A.lyt}
|
||||
set ::env(KLAYOUT_XOR_GDS) {1}
|
||||
set ::env(KLAYOUT_XOR_XML) {1}
|
||||
set ::env(LANG) {en_US.UTF-8}
|
||||
set ::env(LAST_TIMING_REPORT_TAG) {/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/reports/signoff/21-rcx_sta}
|
||||
set ::env(LC_ALL) {en_US.UTF-8}
|
||||
set ::env(LC_CTYPE) {en_US.UTF-8}
|
||||
set ::env(LD_LIBRARY_PATH) {/build//lib:/build//lib/Linux-x86_64:}
|
||||
set ::env(LEC_ENABLE) {0}
|
||||
set ::env(LEFT_MARGIN_MULT) {12}
|
||||
set ::env(LIB_CTS) {/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/tmp/cts/cts.lib}
|
||||
set ::env(LIB_FASTEST) {/home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/lib/sky130_fd_sc_hd__ff_n40C_1v95.lib}
|
||||
set ::env(LIB_SLOWEST) {/home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/lib/sky130_fd_sc_hd__ss_100C_1v60.lib}
|
||||
set ::env(LIB_SLOWEST_OPT) {/home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/lib/sky130_fd_sc_hd__ss_100C_1v60.lib}
|
||||
set ::env(LIB_SYNTH) {/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/tmp/synthesis/trimmed.lib}
|
||||
set ::env(LIB_SYNTH_COMPLETE) {/home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/lib/sky130_fd_sc_hd__tt_025C_1v80.lib}
|
||||
set ::env(LIB_SYNTH_COMPLETE_NO_PG) {/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/tmp/synthesis/1-sky130_fd_sc_hd__tt_025C_1v80.no_pg.lib}
|
||||
set ::env(LIB_SYNTH_MERGED) {/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/tmp/synthesis/merged.lib}
|
||||
set ::env(LIB_SYNTH_NO_PG) {/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/tmp/synthesis/1-trimmed.no_pg.lib}
|
||||
set ::env(LIB_TYPICAL) {/home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/lib/sky130_fd_sc_hd__tt_025C_1v80.lib}
|
||||
set ::env(LOGS_DIR) {/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/logs}
|
||||
set ::env(LVS_CONNECT_BY_LABEL) {0}
|
||||
set ::env(LVS_CURRENT_DEF) {/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/routing/digital_pll.def}
|
||||
set ::env(LVS_INSERT_POWER_PINS) {1}
|
||||
set ::env(MACRO_BLOCKAGES_LAYER) {li1 met1 met2 met3 met4}
|
||||
set ::env(MAGIC_CONVERT_DRC_TO_RDB) {1}
|
||||
set ::env(MAGIC_DISABLE_HIER_GDS) {1}
|
||||
set ::env(MAGIC_DRC_USE_GDS) {1}
|
||||
set ::env(MAGIC_EXT_USE_GDS) {0}
|
||||
set ::env(MAGIC_GDS) {/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/signoff/digital_pll.magic.gds}
|
||||
set ::env(MAGIC_GENERATE_GDS) {1}
|
||||
set ::env(MAGIC_GENERATE_LEF) {1}
|
||||
set ::env(MAGIC_GENERATE_MAGLEF) {1}
|
||||
set ::env(MAGIC_INCLUDE_GDS_POINTERS) {0}
|
||||
set ::env(MAGIC_MAGICRC) {/home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.tech/magic/sky130A.magicrc}
|
||||
set ::env(MAGIC_PAD) {0}
|
||||
set ::env(MAGIC_TECH_FILE) {/home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.tech/magic/sky130A.tech}
|
||||
set ::env(MAGIC_WRITE_FULL_LEF) {0}
|
||||
set ::env(MAGIC_ZEROIZE_ORIGIN) {0}
|
||||
set ::env(MAGTYPE) {maglef}
|
||||
set ::env(MANPATH) {/build//share/man:}
|
||||
set ::env(MAX_METAL_LAYER) {6}
|
||||
set ::env(MC_SDF_DIR) {/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/routing/mca/sdf}
|
||||
set ::env(MC_SPEF_DIR) {/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/routing/mca/spef}
|
||||
set ::env(MERGED_LEF) {/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/tmp/merged.nom.lef}
|
||||
set ::env(MERGED_LEF_MAX) {/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/tmp/merged.max.lef}
|
||||
set ::env(MERGED_LEF_MIN) {/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/tmp/merged.min.lef}
|
||||
set ::env(MISMATCHES_OK) {1}
|
||||
set ::env(NETGEN_SETUP_FILE) {/home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.tech/netgen/sky130A_setup.tcl}
|
||||
set ::env(NO_SYNTH_CELL_LIST) {/home/kareem_farid/caravel/openlane/digital_pll/no_synth.list}
|
||||
set ::env(OPENLANE_ROOT) {/openlane}
|
||||
set ::env(OPENLANE_RUN_TAG) {22_10_18_06_51}
|
||||
set ::env(OPENLANE_VERBOSE) {1}
|
||||
set ::env(OPENLANE_VERSION) {e3a5189a1b0fc4290686fcf2ae46cd6d7947cf9f}
|
||||
set ::env(OPENROAD) {/build/}
|
||||
set ::env(OPENROAD_BIN) {openroad}
|
||||
set ::env(PARSITICS_CURRENT_DEF) {/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/routing/digital_pll.def}
|
||||
set ::env(PATH) {/openlane:/openlane/scripts:/build//bin:/build//bin/Linux-x86_64:/build//pdn/scripts:/usr/local/sbin:/usr/local/bin:/usr/sbin:/usr/bin:/sbin:/bin}
|
||||
set ::env(PDK) {sky130A}
|
||||
set ::env(PDKPATH) {/home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A}
|
||||
set ::env(PDK_ROOT) {/home/kareem_farid/caravel/deps/openlane-new/pdk}
|
||||
set ::env(PDN_CFG) {/openlane/scripts/openroad/common/pdn_cfg.tcl}
|
||||
set ::env(PLACEMENT_CURRENT_DEF) {/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/tmp/floorplan/6-pdn.def}
|
||||
set ::env(PLACE_SITE) {unithd}
|
||||
set ::env(PLACE_SITE_HEIGHT) {2.720}
|
||||
set ::env(PLACE_SITE_WIDTH) {0.460}
|
||||
set ::env(PL_BASIC_PLACEMENT) {0}
|
||||
set ::env(PL_ESTIMATE_PARASITICS) {1}
|
||||
set ::env(PL_INIT_COEFF) {0.00002}
|
||||
set ::env(PL_IO_ITER) {5}
|
||||
set ::env(PL_LIB) {/home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/lib/sky130_fd_sc_hd__tt_025C_1v80.lib}
|
||||
set ::env(PL_MACRO_CHANNEL) {0 0}
|
||||
set ::env(PL_MACRO_HALO) {0 0}
|
||||
set ::env(PL_MAX_DISPLACEMENT_X) {500}
|
||||
set ::env(PL_MAX_DISPLACEMENT_Y) {100}
|
||||
set ::env(PL_OPTIMIZE_MIRRORING) {1}
|
||||
set ::env(PL_RANDOM_GLB_PLACEMENT) {0}
|
||||
set ::env(PL_RANDOM_INITIAL_PLACEMENT) {0}
|
||||
set ::env(PL_RESIZER_ALLOW_SETUP_VIOS) {0}
|
||||
set ::env(PL_RESIZER_BUFFER_INPUT_PORTS) {1}
|
||||
set ::env(PL_RESIZER_BUFFER_OUTPUT_PORTS) {1}
|
||||
set ::env(PL_RESIZER_DESIGN_OPTIMIZATIONS) {0}
|
||||
set ::env(PL_RESIZER_HOLD_MAX_BUFFER_PERCENT) {50}
|
||||
set ::env(PL_RESIZER_HOLD_SLACK_MARGIN) {0.1}
|
||||
set ::env(PL_RESIZER_MAX_CAP_MARGIN) {20}
|
||||
set ::env(PL_RESIZER_MAX_SLEW_MARGIN) {20}
|
||||
set ::env(PL_RESIZER_MAX_WIRE_LENGTH) {0}
|
||||
set ::env(PL_RESIZER_REPAIR_DESIGN) {1}
|
||||
set ::env(PL_RESIZER_REPAIR_TIE_FANOUT) {1}
|
||||
set ::env(PL_RESIZER_SETUP_MAX_BUFFER_PERCENT) {50}
|
||||
set ::env(PL_RESIZER_SETUP_SLACK_MARGIN) {0.05}
|
||||
set ::env(PL_RESIZER_TIE_SEPERATION) {0}
|
||||
set ::env(PL_RESIZER_TIMING_OPTIMIZATIONS) {0}
|
||||
set ::env(PL_ROUTABILITY_DRIVEN) {1}
|
||||
set ::env(PL_SKIP_INITIAL_PLACEMENT) {0}
|
||||
set ::env(PL_TARGET_DENSITY) {0.68}
|
||||
set ::env(PL_TIME_DRIVEN) {1}
|
||||
set ::env(PRIMARY_SIGNOFF_TOOL) {magic}
|
||||
set ::env(PROCESS) {130}
|
||||
set ::env(PWD) {/home/kareem_farid/caravel/openlane}
|
||||
set ::env(QUIT_ON_HOLD_VIOLATIONS) {1}
|
||||
set ::env(QUIT_ON_ILLEGAL_OVERLAPS) {1}
|
||||
set ::env(QUIT_ON_LVS_ERROR) {1}
|
||||
set ::env(QUIT_ON_MAGIC_DRC) {1}
|
||||
set ::env(QUIT_ON_SETUP_VIOLATIONS) {1}
|
||||
set ::env(QUIT_ON_TIMING_VIOLATIONS) {1}
|
||||
set ::env(QUIT_ON_TR_DRC) {1}
|
||||
set ::env(RCX_CC_MODEL) {10}
|
||||
set ::env(RCX_CONTEXT_DEPTH) {5}
|
||||
set ::env(RCX_CORNER_COUNT) {1}
|
||||
set ::env(RCX_COUPLING_THRESHOLD) {0.1}
|
||||
set ::env(RCX_MAX_RESISTANCE) {50}
|
||||
set ::env(RCX_MERGE_VIA_WIRE_RES) {1}
|
||||
set ::env(RCX_RULES) {/home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.tech/openlane/rules.openrcx.sky130A.nom.calibre}
|
||||
set ::env(RCX_RULES_MAX) {/home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.tech/openlane/rules.openrcx.sky130A.max.calibre}
|
||||
set ::env(RCX_RULES_MIN) {/home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.tech/openlane/rules.openrcx.sky130A.min.calibre}
|
||||
set ::env(RCX_SDC_FILE) {/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/tmp/floorplan/3-initial_fp.sdc}
|
||||
set ::env(REPORTS_DIR) {/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/reports}
|
||||
set ::env(RESULTS_DIR) {/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results}
|
||||
set ::env(RE_BUFFER_CELL) {sky130_fd_sc_hd__buf_4}
|
||||
set ::env(RIGHT_MARGIN_MULT) {12}
|
||||
set ::env(RIPPLE_CARRY_ADDER_MAP) {/home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.tech/openlane/sky130_fd_sc_hd/rca_map.v}
|
||||
set ::env(ROOT_CLK_BUFFER) {sky130_fd_sc_hd__clkbuf_16}
|
||||
set ::env(ROUTING_CORES) {2}
|
||||
set ::env(ROUTING_CURRENT_DEF) {/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/placement/digital_pll.def}
|
||||
set ::env(RSZ_DONT_TOUCH_RX) {\$^}
|
||||
set ::env(RSZ_LIB) {/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/tmp/synthesis/resizer_sky130_fd_sc_hd__tt_025C_1v80.lib}
|
||||
set ::env(RSZ_USE_OLD_REMOVER) {0}
|
||||
set ::env(RT_MAX_LAYER) {met5}
|
||||
set ::env(RT_MIN_LAYER) {met1}
|
||||
set ::env(RUN_CVC) {1}
|
||||
set ::env(RUN_DIR) {/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51}
|
||||
set ::env(RUN_DRT) {1}
|
||||
set ::env(RUN_IRDROP_REPORT) {1}
|
||||
set ::env(RUN_KLAYOUT) {1}
|
||||
set ::env(RUN_KLAYOUT_DRC) {0}
|
||||
set ::env(RUN_KLAYOUT_XOR) {1}
|
||||
set ::env(RUN_LVS) {1}
|
||||
set ::env(RUN_MAGIC) {1}
|
||||
set ::env(RUN_MAGIC_DRC) {1}
|
||||
set ::env(RUN_SPEF_EXTRACTION) {1}
|
||||
set ::env(RUN_STANDALONE) {1}
|
||||
set ::env(RUN_TAG) {22_10_18_06_51}
|
||||
set ::env(SCRIPTS_DIR) {/openlane/scripts}
|
||||
set ::env(SHLVL) {1}
|
||||
set ::env(SPEF_EXTRACTOR) {openrcx}
|
||||
set ::env(START_TIME) {2022.10.18_13.51.57}
|
||||
set ::env(STA_PRE_CTS) {0}
|
||||
set ::env(STA_REPORT_POWER) {1}
|
||||
set ::env(STA_WRITE_LIB) {0}
|
||||
set ::env(STD_CELL_GROUND_PINS) {VGND VNB}
|
||||
set ::env(STD_CELL_LIBRARY) {sky130_fd_sc_hd}
|
||||
set ::env(STD_CELL_LIBRARY_CDL) {/home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/cdl/sky130_fd_sc_hd.cdl}
|
||||
set ::env(STD_CELL_LIBRARY_OPT) {sky130_fd_sc_hd}
|
||||
set ::env(STD_CELL_LIBRARY_OPT_CDL) {/home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/cdl/sky130_fd_sc_hd.cdl}
|
||||
set ::env(STD_CELL_POWER_PINS) {VPWR VPB}
|
||||
set ::env(SYNTH_ADDER_TYPE) {YOSYS}
|
||||
set ::env(SYNTH_BIN) {yosys}
|
||||
set ::env(SYNTH_BUFFERING) {1}
|
||||
set ::env(SYNTH_CAP_LOAD) {33.442}
|
||||
set ::env(SYNTH_CLOCK_TRANSITION) {0.15}
|
||||
set ::env(SYNTH_CLOCK_UNCERTAINTY) {0.25}
|
||||
set ::env(SYNTH_DRIVING_CELL) {sky130_fd_sc_hd__inv_2}
|
||||
set ::env(SYNTH_DRIVING_CELL_PIN) {Y}
|
||||
set ::env(SYNTH_ELABORATE_ONLY) {0}
|
||||
set ::env(SYNTH_EXTRA_MAPPING_FILE) {}
|
||||
set ::env(SYNTH_FLAT_TOP) {0}
|
||||
set ::env(SYNTH_LATCH_MAP) {/home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.tech/openlane/sky130_fd_sc_hd/latch_map.v}
|
||||
set ::env(SYNTH_MAX_FANOUT) {7}
|
||||
set ::env(SYNTH_MAX_TRAN) {0.75}
|
||||
set ::env(SYNTH_MIN_BUF_PORT) {sky130_fd_sc_hd__buf_2 A X}
|
||||
set ::env(SYNTH_MUX4_MAP) {/home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.tech/openlane/sky130_fd_sc_hd/mux4_map.v}
|
||||
set ::env(SYNTH_MUX_MAP) {/home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.tech/openlane/sky130_fd_sc_hd/mux2_map.v}
|
||||
set ::env(SYNTH_NO_FLAT) {0}
|
||||
set ::env(SYNTH_OPT) {0}
|
||||
set ::env(SYNTH_READ_BLACKBOX_LIB) {1}
|
||||
set ::env(SYNTH_SCRIPT) {/openlane/scripts/yosys/synth.tcl}
|
||||
set ::env(SYNTH_SHARE_RESOURCES) {1}
|
||||
set ::env(SYNTH_SIZING) {0}
|
||||
set ::env(SYNTH_STRATEGY) {AREA 0}
|
||||
set ::env(SYNTH_TIEHI_PORT) {sky130_fd_sc_hd__conb_1 HI}
|
||||
set ::env(SYNTH_TIELO_PORT) {sky130_fd_sc_hd__conb_1 LO}
|
||||
set ::env(SYNTH_TIMING_DERATE) {0.05}
|
||||
set ::env(TAKE_LAYOUT_SCROT) {0}
|
||||
set ::env(TAP_DECAP_INSERTION) {1}
|
||||
set ::env(TECH_LEF) {/home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/techlef/sky130_fd_sc_hd__nom.tlef}
|
||||
set ::env(TECH_LEF_MAX) {/home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/techlef/sky130_fd_sc_hd__max.tlef}
|
||||
set ::env(TECH_LEF_MIN) {/home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/techlef/sky130_fd_sc_hd__min.tlef}
|
||||
set ::env(TECH_LEF_OPT) {/home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/techlef/sky130_fd_sc_hd__nom.tlef}
|
||||
set ::env(TECH_METAL_LAYERS) {li1 met1 met2 met3 met4 met5}
|
||||
set ::env(TERM) {xterm}
|
||||
set ::env(TERMINAL_OUTPUT) {/dev/null}
|
||||
set ::env(TMP_DIR) {/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/tmp}
|
||||
set ::env(TOP_MARGIN_MULT) {2}
|
||||
set ::env(TRACKS_INFO_FILE) {/home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.tech/openlane/sky130_fd_sc_hd/tracks.info}
|
||||
set ::env(TRACKS_INFO_FILE_PROCESSED) {/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/tmp/routing/config.tracks}
|
||||
set ::env(TRISTATE_BUFFER_MAP) {/home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.tech/openlane/sky130_fd_sc_hd/tribuff_map.v}
|
||||
set ::env(USE_ARC_ANTENNA_CHECK) {1}
|
||||
set ::env(USE_GPIO_PADS) {0}
|
||||
set ::env(VCHECK_OUTPUT) {}
|
||||
set ::env(VDD_NET) {VPWR}
|
||||
set ::env(VDD_NETS) {VPWR}
|
||||
set ::env(VDD_PIN) {VPWR}
|
||||
set ::env(VERILOG_FILES) {/home/kareem_farid/caravel/openlane/digital_pll/../../verilog/rtl/digital_pll.v}
|
||||
set ::env(WIRE_RC_LAYER) {met1}
|
||||
set ::env(YOSYS_REWRITE_VERILOG) {0}
|
||||
set ::env(_) {/openlane/flow.tcl}
|
||||
set ::env(cts_logs) {/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/logs/cts}
|
||||
set ::env(cts_reports) {/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/reports/cts}
|
||||
set ::env(cts_results) {/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/cts}
|
||||
set ::env(cts_tmpfiles) {/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/tmp/cts}
|
||||
set ::env(drc_prefix) {/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/reports/signoff/drc}
|
||||
set ::env(eco_logs) {/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/logs/eco}
|
||||
set ::env(eco_reports) {/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/reports/eco}
|
||||
set ::env(eco_results) {/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/eco}
|
||||
set ::env(eco_tmpfiles) {/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/tmp/eco}
|
||||
set ::env(floorplan_logs) {/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/logs/floorplan}
|
||||
set ::env(floorplan_reports) {/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/reports/floorplan}
|
||||
set ::env(floorplan_results) {/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/floorplan}
|
||||
set ::env(floorplan_tmpfiles) {/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/tmp/floorplan}
|
||||
set ::env(fp_report_prefix) {/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/reports/floorplan/3-initial_fp}
|
||||
set ::env(placement_logs) {/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/logs/placement}
|
||||
set ::env(placement_reports) {/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/reports/placement}
|
||||
set ::env(placement_results) {/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/placement}
|
||||
set ::env(placement_tmpfiles) {/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/tmp/placement}
|
||||
set ::env(routing_logs) {/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/logs/routing}
|
||||
set ::env(routing_reports) {/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/reports/routing}
|
||||
set ::env(routing_results) {/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/routing}
|
||||
set ::env(routing_tmpfiles) {/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/tmp/routing}
|
||||
set ::env(signoff_logs) {/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/logs/signoff}
|
||||
set ::env(signoff_reports) {/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/reports/signoff}
|
||||
set ::env(signoff_results) {/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/signoff}
|
||||
set ::env(signoff_tmpfiles) {/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/tmp/signoff}
|
||||
set ::env(synth_report_prefix) {/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/reports/synthesis/1-synthesis}
|
||||
set ::env(synthesis_logs) {/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/logs/synthesis}
|
||||
set ::env(synthesis_reports) {/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/reports/synthesis}
|
||||
set ::env(synthesis_results) {/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/results/synthesis}
|
||||
set ::env(synthesis_tmpfiles) {/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/tmp/synthesis}
|
||||
set ::env(timer_end) {1666101184}
|
||||
set ::env(timer_routed) {1666101163}
|
||||
set ::env(timer_start) {1666101117}
|
||||
|
|
@ -1,51 +0,0 @@
|
|||
CVC: Log output to /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/reports/signoff/digital_pll.rpt
|
||||
CVC: Error output to /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/reports/signoff/digital_pll.rpt.error.gz
|
||||
CVC: Debug output to /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/reports/signoff/digital_pll.rpt.debug.gz
|
||||
CVC: Circuit Validation Check Version 1.1.0
|
||||
CVC: Start: Tue Oct 18 13:53:04 2022
|
||||
|
||||
Using the following parameters for CVC (Circuit Validation Check) from /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.tech/openlane/cvc/cvcrc
|
||||
CVC_TOP = 'digital_pll'
|
||||
CVC_NETLIST = '/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/tmp/signoff/digital_pll.cdl'
|
||||
CVC_MODE = 'digital_pll'
|
||||
CVC_MODEL_FILE = '/home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.tech/openlane/cvc/models'
|
||||
CVC_POWER_FILE = '/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/tmp/signoff/digital_pll.power'
|
||||
CVC_FUSE_FILE = ''
|
||||
CVC_REPORT_FILE = '/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/reports/signoff/digital_pll.rpt'
|
||||
CVC_REPORT_TITLE = 'CVC $CVC_TOP'
|
||||
CVC_CIRCUIT_ERROR_LIMIT = '100'
|
||||
CVC_SEARCH_LIMIT = '100'
|
||||
CVC_LEAK_LIMIT = '0.0002'
|
||||
CVC_SOI = 'false'
|
||||
CVC_SCRC = 'false'
|
||||
CVC_VTH_GATES = 'false'
|
||||
CVC_MIN_VTH_GATES = 'false'
|
||||
CVC_IGNORE_VTH_FLOATING = 'false'
|
||||
CVC_IGNORE_NO_LEAK_FLOATING = 'false'
|
||||
CVC_LEAK_OVERVOLTAGE = 'true'
|
||||
CVC_LOGIC_DIODES = 'false'
|
||||
CVC_ANALOG_GATES = 'true'
|
||||
CVC_BACKUP_RESULTS = 'false'
|
||||
CVC_MOS_DIODE_ERROR_THRESHOLD = '0'
|
||||
CVC_SHORT_ERROR_THRESHOLD = '0'
|
||||
CVC_BIAS_ERROR_THRESHOLD = '0'
|
||||
CVC_FORWARD_ERROR_THRESHOLD = '0'
|
||||
CVC_FLOATING_ERROR_THRESHOLD = '0'
|
||||
CVC_GATE_ERROR_THRESHOLD = '0'
|
||||
CVC_LEAK?_ERROR_THRESHOLD = '0'
|
||||
CVC_EXPECTED_ERROR_THRESHOLD = '0'
|
||||
CVC_OVERVOLTAGE_ERROR_THRESHOLD = '0'
|
||||
CVC_PARALLEL_CIRCUIT_PORT_LIMIT = '0'
|
||||
CVC_CELL_ERROR_LIMIT_FILE = ''
|
||||
CVC_CELL_CHECKSUM_FILE = ''
|
||||
CVC_LARGE_CIRCUIT_SIZE = '10000000'
|
||||
CVC_NET_CHECK_FILE = ''
|
||||
CVC_MODEL_CHECK_FILE = ''
|
||||
End of parameters
|
||||
|
||||
CVC: Reading device model settings...
|
||||
CVC: Reading power settings...
|
||||
CVC: Parsing netlist /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_18_06_51/tmp/signoff/digital_pll.cdl
|
||||
Cdl fixed data size 35716
|
||||
Usage CDL: Time: 0 Memory: 7292 I/O: 8 Swap: 0
|
||||
CVC: Counting and linking...
|
||||
Binary file not shown.
Binary file not shown.
|
|
@ -1,94 +0,0 @@
|
|||
###############################################################################
|
||||
# Created by write_sdc
|
||||
# Tue Oct 18 13:52:05 2022
|
||||
###############################################################################
|
||||
current_design digital_pll
|
||||
###############################################################################
|
||||
# Timing Constraints
|
||||
###############################################################################
|
||||
create_clock -name pll_control_clock -period 6.6667 [get_pins {ringosc.ibufp01/Y}]
|
||||
set_clock_transition 0.1500 [get_clocks {pll_control_clock}]
|
||||
set_clock_uncertainty 0.2500 pll_control_clock
|
||||
set_input_delay 2.0000 -add_delay [get_ports {dco}]
|
||||
set_input_delay 2.0000 -add_delay [get_ports {div[0]}]
|
||||
set_input_delay 2.0000 -add_delay [get_ports {div[1]}]
|
||||
set_input_delay 2.0000 -add_delay [get_ports {div[2]}]
|
||||
set_input_delay 2.0000 -add_delay [get_ports {div[3]}]
|
||||
set_input_delay 2.0000 -add_delay [get_ports {div[4]}]
|
||||
set_input_delay 2.0000 -add_delay [get_ports {enable}]
|
||||
set_input_delay 2.0000 -add_delay [get_ports {ext_trim[0]}]
|
||||
set_input_delay 2.0000 -add_delay [get_ports {ext_trim[10]}]
|
||||
set_input_delay 2.0000 -add_delay [get_ports {ext_trim[11]}]
|
||||
set_input_delay 2.0000 -add_delay [get_ports {ext_trim[12]}]
|
||||
set_input_delay 2.0000 -add_delay [get_ports {ext_trim[13]}]
|
||||
set_input_delay 2.0000 -add_delay [get_ports {ext_trim[14]}]
|
||||
set_input_delay 2.0000 -add_delay [get_ports {ext_trim[15]}]
|
||||
set_input_delay 2.0000 -add_delay [get_ports {ext_trim[16]}]
|
||||
set_input_delay 2.0000 -add_delay [get_ports {ext_trim[17]}]
|
||||
set_input_delay 2.0000 -add_delay [get_ports {ext_trim[18]}]
|
||||
set_input_delay 2.0000 -add_delay [get_ports {ext_trim[19]}]
|
||||
set_input_delay 2.0000 -add_delay [get_ports {ext_trim[1]}]
|
||||
set_input_delay 2.0000 -add_delay [get_ports {ext_trim[20]}]
|
||||
set_input_delay 2.0000 -add_delay [get_ports {ext_trim[21]}]
|
||||
set_input_delay 2.0000 -add_delay [get_ports {ext_trim[22]}]
|
||||
set_input_delay 2.0000 -add_delay [get_ports {ext_trim[23]}]
|
||||
set_input_delay 2.0000 -add_delay [get_ports {ext_trim[24]}]
|
||||
set_input_delay 2.0000 -add_delay [get_ports {ext_trim[25]}]
|
||||
set_input_delay 2.0000 -add_delay [get_ports {ext_trim[2]}]
|
||||
set_input_delay 2.0000 -add_delay [get_ports {ext_trim[3]}]
|
||||
set_input_delay 2.0000 -add_delay [get_ports {ext_trim[4]}]
|
||||
set_input_delay 2.0000 -add_delay [get_ports {ext_trim[5]}]
|
||||
set_input_delay 2.0000 -add_delay [get_ports {ext_trim[6]}]
|
||||
set_input_delay 2.0000 -add_delay [get_ports {ext_trim[7]}]
|
||||
set_input_delay 2.0000 -add_delay [get_ports {ext_trim[8]}]
|
||||
set_input_delay 2.0000 -add_delay [get_ports {ext_trim[9]}]
|
||||
set_input_delay 2.0000 -add_delay [get_ports {osc}]
|
||||
set_input_delay 2.0000 -add_delay [get_ports {resetb}]
|
||||
set_output_delay 2.0000 -add_delay [get_ports {clockp[0]}]
|
||||
set_output_delay 2.0000 -add_delay [get_ports {clockp[1]}]
|
||||
###############################################################################
|
||||
# Environment
|
||||
###############################################################################
|
||||
set_load -pin_load 0.0334 [get_ports {clockp[1]}]
|
||||
set_load -pin_load 0.0334 [get_ports {clockp[0]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {dco}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {enable}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {osc}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {resetb}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {div[4]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {div[3]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {div[2]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {div[1]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {div[0]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {ext_trim[25]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {ext_trim[24]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {ext_trim[23]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {ext_trim[22]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {ext_trim[21]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {ext_trim[20]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {ext_trim[19]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {ext_trim[18]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {ext_trim[17]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {ext_trim[16]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {ext_trim[15]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {ext_trim[14]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {ext_trim[13]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {ext_trim[12]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {ext_trim[11]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {ext_trim[10]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {ext_trim[9]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {ext_trim[8]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {ext_trim[7]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {ext_trim[6]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {ext_trim[5]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {ext_trim[4]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {ext_trim[3]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {ext_trim[2]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {ext_trim[1]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {ext_trim[0]}]
|
||||
set_timing_derate -early 0.9500
|
||||
set_timing_derate -late 1.0500
|
||||
###############################################################################
|
||||
# Design Rules
|
||||
###############################################################################
|
||||
set_max_fanout 7.0000 [current_design]
|
||||
Binary file not shown.
File diff suppressed because it is too large
Load Diff
|
|
@ -1,10 +0,0 @@
|
|||
<?xml version="1.0" ?>
|
||||
<report-database>
|
||||
<categories/>
|
||||
<cells>
|
||||
<cell>
|
||||
<name>digital_pll</name>
|
||||
</cell>
|
||||
</cells>
|
||||
<items/>
|
||||
</report-database>
|
||||
|
|
@ -1 +0,0 @@
|
|||
$digital_pll 100
|
||||
|
|
@ -1,5 +0,0 @@
|
|||
digital_pll
|
||||
----------------------------------------
|
||||
[INFO]: COUNT: 0
|
||||
[INFO]: Should be divided by 3 or 4
|
||||
|
||||
File diff suppressed because one or more lines are too long
|
|
@ -1,31 +0,0 @@
|
|||
Max transition on internal signals: 1.25ns
|
||||
Hold WNS (F2F): -0.02 (ff-*)
|
||||
Setup WNS (F2F): -1.17 (ss-max)
|
||||
|
||||
lvs clean: Y
|
||||
drc clean: Y
|
||||
cvc clean: Y
|
||||
Antenna Violations: 0
|
||||
Antenna Violations (400-500): 0
|
||||
Antenna Violations (500-800): 0
|
||||
Antenna Violations (800-1000): 0
|
||||
|
||||
non-physical cells: 1093 - 730 = 363
|
||||
decap cell count: 206
|
||||
% decap: 206 / 1093 * 100 = 18.8%
|
||||
max ir drop: 1.69e-09 V
|
||||
|
||||
Verilog "assign" in the netlist: N
|
||||
Does the netlist show cells from different libraries: N
|
||||
Does the macro have mixed power domains powered cells: N
|
||||
Any internal macros with floating input ports: N
|
||||
Output ports not connected to any logic inside the macro: N
|
||||
Input ports not connected to any logic inside the macro: N
|
||||
Tri-state cells are connected directly to output ports: N
|
||||
Analog Signals are not digitally buffered: N
|
||||
Output ports are properly buffred (>=buf_4): Y
|
||||
buffer cells count: 59
|
||||
logic cells that are not buffers count: 363 - 59 = 304
|
||||
buf_1 & buf_2 cells count: 57
|
||||
0.5mm or longer wire count: 0
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
|
|
@ -1,68 +0,0 @@
|
|||
box 10304 5967 10333 6001
|
||||
feedback add "Illegal overlap between obsli1 and locali (types do not connect)" medium
|
||||
box 10367 5967 10425 6001
|
||||
feedback add "Illegal overlap between obsli1 and locali (types do not connect)" medium
|
||||
box 10459 5967 10488 6001
|
||||
feedback add "Illegal overlap between obsli1 and locali (types do not connect)" medium
|
||||
box 10948 5967 10977 6001
|
||||
feedback add "Illegal overlap between obsli1 and locali (types do not connect)" medium
|
||||
box 11011 5967 11069 6001
|
||||
feedback add "Illegal overlap between obsli1 and locali (types do not connect)" medium
|
||||
box 11103 5967 11161 6001
|
||||
feedback add "Illegal overlap between obsli1 and locali (types do not connect)" medium
|
||||
box 11195 5967 11201 6001
|
||||
feedback add "Illegal overlap between obsli1 and locali (types do not connect)" medium
|
||||
box 10488 5967 10517 6001
|
||||
feedback add "Illegal overlap between obsli1 and locali (types do not connect)" medium
|
||||
box 10551 5967 10609 6001
|
||||
feedback add "Illegal overlap between obsli1 and locali (types do not connect)" medium
|
||||
box 10643 5967 10701 6001
|
||||
feedback add "Illegal overlap between obsli1 and locali (types do not connect)" medium
|
||||
box 10735 5967 10793 6001
|
||||
feedback add "Illegal overlap between obsli1 and locali (types do not connect)" medium
|
||||
box 10827 5967 10885 6001
|
||||
feedback add "Illegal overlap between obsli1 and locali (types do not connect)" medium
|
||||
box 10919 5967 10948 6001
|
||||
feedback add "Illegal overlap between obsli1 and locali (types do not connect)" medium
|
||||
box 10120 5967 10149 6001
|
||||
feedback add "Illegal overlap between obsli1 and locali (types do not connect)" medium
|
||||
box 10149 5967 10183 6001
|
||||
feedback add "Illegal overlap between obsli1c and locali (types do not connect)" medium
|
||||
box 10183 5967 10241 6001
|
||||
feedback add "Illegal overlap between obsli1 and locali (types do not connect)" medium
|
||||
box 10275 5967 10304 6001
|
||||
feedback add "Illegal overlap between obsli1 and locali (types do not connect)" medium
|
||||
box 11199 5967 11224 6001
|
||||
feedback add "Illegal overlap between obsli1 and locali (types do not connect)" medium
|
||||
box 12420 5967 12449 6001
|
||||
feedback add "Illegal overlap between obsli1 and locali (types do not connect)" medium
|
||||
box 12483 5967 12541 6001
|
||||
feedback add "Illegal overlap between obsli1 and locali (types do not connect)" medium
|
||||
box 12575 5967 12601 6001
|
||||
feedback add "Illegal overlap between obsli1 and locali (types do not connect)" medium
|
||||
box 11592 5967 11621 6001
|
||||
feedback add "Illegal overlap between obsli1 and locali (types do not connect)" medium
|
||||
box 11621 5967 11655 6001
|
||||
feedback add "Illegal overlap between obsli1c and locali (types do not connect)" medium
|
||||
box 11655 5967 11713 6001
|
||||
feedback add "Illegal overlap between obsli1 and locali (types do not connect)" medium
|
||||
box 11747 5967 11805 6001
|
||||
feedback add "Illegal overlap between obsli1 and locali (types do not connect)" medium
|
||||
box 11839 5967 11897 6001
|
||||
feedback add "Illegal overlap between obsli1 and locali (types do not connect)" medium
|
||||
box 11931 5967 11989 6001
|
||||
feedback add "Illegal overlap between obsli1 and locali (types do not connect)" medium
|
||||
box 12023 5967 12081 6001
|
||||
feedback add "Illegal overlap between obsli1 and locali (types do not connect)" medium
|
||||
box 12115 5967 12173 6001
|
||||
feedback add "Illegal overlap between obsli1 and locali (types do not connect)" medium
|
||||
box 12207 5967 12265 6001
|
||||
feedback add "Illegal overlap between obsli1 and locali (types do not connect)" medium
|
||||
box 12299 5967 12357 6001
|
||||
feedback add "Illegal overlap between obsli1 and locali (types do not connect)" medium
|
||||
box 12391 5967 12420 6001
|
||||
feedback add "Illegal overlap between obsli1 and locali (types do not connect)" medium
|
||||
box 12599 5967 12633 6001
|
||||
feedback add "Illegal overlap between obsli1 and locali (types do not connect)" medium
|
||||
box 12667 5967 12696 6001
|
||||
feedback add "Illegal overlap between obsli1 and locali (types do not connect)" medium
|
||||
|
|
@ -1,371 +0,0 @@
|
|||
ringosc.dstage\[4\].id.d2 1.38
|
||||
ringosc.dstage\[8\].id.d2 1.38
|
||||
_003_ 1.575
|
||||
_010_ 1.575
|
||||
ringosc.dstage\[7\].id.d0 1.72
|
||||
_030_ 1.79
|
||||
_109_ 1.84
|
||||
ringosc.c\[0\] 1.84
|
||||
_087_ 2.035
|
||||
_138_ 2.035
|
||||
_076_ 2.13
|
||||
_189_ 2.13
|
||||
_203_ 2.155
|
||||
_007_ 2.28
|
||||
ringosc.iss.ctrl0 2.3
|
||||
_042_ 2.375
|
||||
_084_ 2.375
|
||||
_159_ 2.375
|
||||
ringosc.dstage\[1\].id.d2 2.375
|
||||
ringosc.iss.d2 2.375
|
||||
ringosc.c\[1\] 2.47
|
||||
_139_ 2.52
|
||||
_145_ 2.52
|
||||
_005_ 2.595
|
||||
_016_ 2.595
|
||||
_185_ 2.715
|
||||
_156_ 2.745
|
||||
_029_ 2.76
|
||||
_146_ 2.76
|
||||
_154_ 2.81
|
||||
ringosc.dstage\[8\].id.d0 2.835
|
||||
_006_ 2.935
|
||||
_012_ 2.935
|
||||
ringosc.dstage\[11\].id.d2 2.955
|
||||
_150_ 3.055
|
||||
_204_ 3.055
|
||||
_136_ 3.075
|
||||
_188_ 3.075
|
||||
_022_ 3.15
|
||||
_137_ 3.175
|
||||
_144_ 3.2
|
||||
_020_ 3.275
|
||||
_182_ 3.395
|
||||
_135_ 3.44
|
||||
_019_ 3.66
|
||||
_149_ 4.02
|
||||
ringosc.dstage\[6\].id.d2 4.14
|
||||
_036_ 4.335
|
||||
ringosc.dstage\[1\].id.trim\[0\] 4.435
|
||||
_049_ 4.51
|
||||
_039_ 4.755
|
||||
ringosc.iss.d0 4.755
|
||||
_026_ 4.895
|
||||
_093_ 4.94
|
||||
clockp[0] 4.945
|
||||
ringosc.dstage\[5\].id.d1 4.97
|
||||
_002_ 4.99
|
||||
_152_ 5.015
|
||||
ringosc.dstage\[7\].id.d2 5.095
|
||||
_070_ 5.19
|
||||
_134_ 5.19
|
||||
_032_ 5.215
|
||||
ringosc.dstage\[4\].id.trim\[0\] 5.23
|
||||
ringosc.dstage\[10\].id.d0 5.235
|
||||
ringosc.dstage\[8\].id.trim\[1\] 5.235
|
||||
_078_ 5.26
|
||||
_120_ 5.31
|
||||
_013_ 5.315
|
||||
_004_ 5.34
|
||||
_046_ 5.36
|
||||
_018_ 5.385
|
||||
ringosc.dstage\[8\].id.d1 5.43
|
||||
_126_ 5.47
|
||||
_041_ 5.475
|
||||
ringosc.clockp\[1\] 5.53
|
||||
ringosc.dstage\[10\].id.out 5.555
|
||||
ringosc.dstage\[1\].id.d1 5.57
|
||||
ringosc.dstage\[9\].id.d0 5.595
|
||||
_183_ 5.86
|
||||
_069_ 5.895
|
||||
ringosc.dstage\[0\].id.out 5.935
|
||||
ringosc.dstage\[3\].id.d0 5.96
|
||||
ringosc.dstage\[2\].id.trim\[1\] 6.015
|
||||
ringosc.dstage\[7\].id.trim\[1\] 6.015
|
||||
_133_ 6.055
|
||||
_190_ 6.115
|
||||
_031_ 6.135
|
||||
_071_ 6.155
|
||||
_143_ 6.165
|
||||
_092_ 6.235
|
||||
_113_ 6.235
|
||||
_207_ 6.235
|
||||
_011_ 6.25
|
||||
ringosc.dstage\[9\].id.d1 6.295
|
||||
_067_ 6.3
|
||||
ringosc.dstage\[2\].id.d0 6.32
|
||||
_140_ 6.335
|
||||
ringosc.dstage\[10\].id.trim\[1\] 6.355
|
||||
_028_ 6.38
|
||||
_008_ 6.4
|
||||
ringosc.dstage\[5\].id.d0 6.475
|
||||
_201_ 6.48
|
||||
_155_ 6.55
|
||||
_187_ 6.6
|
||||
_009_ 6.67
|
||||
_062_ 6.695
|
||||
ringosc.iss.one 6.695
|
||||
_082_ 6.935
|
||||
_085_ 6.955
|
||||
_132_ 6.955
|
||||
pll_control.oscbuf\[0\] 6.975
|
||||
_015_ 7.015
|
||||
_086_ 7.075
|
||||
ringosc.dstage\[11\].id.ts 7.15
|
||||
ringosc.dstage\[0\].id.d1 7.17
|
||||
ringosc.dstage\[5\].id.d2 7.23
|
||||
_127_ 7.275
|
||||
_202_ 7.315
|
||||
ringosc.dstage\[2\].id.d2 7.36
|
||||
ringosc.dstage\[3\].id.out 7.395
|
||||
_000_ 7.425
|
||||
ringosc.dstage\[1\].id.d0 7.435
|
||||
_118_ 7.485
|
||||
_080_ 7.52
|
||||
_164_ 7.71
|
||||
_091_ 7.715
|
||||
_035_ 7.76
|
||||
ringosc.dstage\[3\].id.d1 7.775
|
||||
_014_ 7.8
|
||||
_054_ 7.815
|
||||
_068_ 7.83
|
||||
ringosc.dstage\[11\].id.d0 7.855
|
||||
ringosc.dstage\[6\].id.trim\[0\] 7.855
|
||||
_077_ 7.86
|
||||
ringosc.dstage\[3\].id.trim\[0\] 8.195
|
||||
ringosc.dstage\[5\].id.trim\[0\] 8.195
|
||||
_111_ 8.275
|
||||
ringosc.dstage\[4\].id.d0 8.395
|
||||
_153_ 8.4
|
||||
_200_ 8.525
|
||||
_047_ 8.58
|
||||
ringosc.dstage\[7\].id.d1 8.595
|
||||
_040_ 8.615
|
||||
ringosc.dstage\[10\].id.in 8.71
|
||||
_090_ 8.895
|
||||
ringosc.dstage\[0\].id.d2 8.895
|
||||
_088_ 8.955
|
||||
_179_ 8.98
|
||||
_199_ 8.995
|
||||
_197_ 9.27
|
||||
_043_ 9.295
|
||||
_037_ 9.415
|
||||
_116_ 9.44
|
||||
ringosc.dstage\[0\].id.d0 9.535
|
||||
ringosc.dstage\[10\].id.d2 9.54
|
||||
_184_ 9.62
|
||||
ringosc.dstage\[11\].id.d1 9.695
|
||||
osc 9.88
|
||||
_021_ 10.03
|
||||
ringosc.dstage\[9\].id.d2 10.12
|
||||
ringosc.dstage\[10\].id.d1 10.15
|
||||
_064_ 10.175
|
||||
_024_ 10.195
|
||||
ext_trim[1] 10.205
|
||||
ringosc.dstage\[2\].id.out 10.365
|
||||
_103_ 10.47
|
||||
pll_control.count1\[1\] 10.47
|
||||
_048_ 10.535
|
||||
_063_ 10.535
|
||||
ringosc.dstage\[11\].id.trim\[1\] 10.595
|
||||
ringosc.dstage\[4\].id.d1 10.595
|
||||
_074_ 10.62
|
||||
_081_ 10.77
|
||||
ringosc.dstage\[7\].id.trim\[0\] 11.2
|
||||
_038_ 11.235
|
||||
_079_ 11.255
|
||||
_119_ 11.415
|
||||
_033_ 11.675
|
||||
pll_control.prep\[1\] 11.97
|
||||
_089_ 12.04
|
||||
_141_ 12.16
|
||||
_148_ 12.235
|
||||
_027_ 12.3
|
||||
_034_ 12.375
|
||||
ringosc.dstage\[8\].id.out 12.46
|
||||
ringosc.dstage\[9\].id.trim\[1\] 12.475
|
||||
_198_ 12.49
|
||||
_147_ 12.615
|
||||
ringosc.dstage\[6\].id.d1 12.79
|
||||
ringosc.iss.d1 13.09
|
||||
ringosc.dstage\[4\].id.out 13.175
|
||||
_169_ 13.21
|
||||
_058_ 13.23
|
||||
pll_control.prep\[2\] 13.275
|
||||
_075_ 13.34
|
||||
_195_ 13.58
|
||||
ringosc.dstage\[5\].id.ts 13.61
|
||||
_163_ 13.835
|
||||
pll_control.oscbuf\[2\] 14.0
|
||||
ringosc.dstage\[10\].id.ts 14.065
|
||||
ringosc.dstage\[6\].id.out 14.435
|
||||
pll_control.prep\[0\] 14.475
|
||||
ringosc.dstage\[9\].id.ts 14.855
|
||||
_121_ 14.98
|
||||
_051_ 15.0
|
||||
ringosc.dstage\[1\].id.out 15.085
|
||||
ringosc.dstage\[1\].id.ts 15.975
|
||||
_073_ 16.05
|
||||
ringosc.dstage\[8\].id.ts 16.15
|
||||
ringosc.dstage\[2\].id.trim\[0\] 16.19
|
||||
_001_ 16.345
|
||||
_205_ 16.695
|
||||
_165_ 16.85
|
||||
_102_ 16.855
|
||||
pll_control.count1\[4\] 16.905
|
||||
_023_ 16.94
|
||||
_065_ 17.045
|
||||
ext_trim[4] 17.2
|
||||
_066_ 17.615
|
||||
_083_ 17.615
|
||||
_191_ 17.635
|
||||
div[2] 17.77
|
||||
ringosc.dstage\[2\].id.d1 17.87
|
||||
_061_ 17.96
|
||||
pll_control.count1\[3\] 18.075
|
||||
_161_ 18.12
|
||||
_060_ 18.295
|
||||
ringosc.dstage\[0\].id.trim\[0\] 18.575
|
||||
ringosc.dstage\[3\].id.d2 18.595
|
||||
_017_ 19.03
|
||||
_131_ 19.16
|
||||
_094_ 19.22
|
||||
_104_ 19.35
|
||||
ringosc.dstage\[0\].id.ts 19.495
|
||||
ringosc.dstage\[3\].id.trim\[1\] 19.675
|
||||
_194_ 19.74
|
||||
_059_ 19.955
|
||||
pll_control.tval\[1\] 20.005
|
||||
ringosc.dstage\[5\].id.out 20.135
|
||||
_112_ 20.415
|
||||
_105_ 20.575
|
||||
ringosc.dstage\[6\].id.d0 20.96
|
||||
_129_ 21.235
|
||||
ringosc.dstage\[4\].id.ts 21.895
|
||||
ringosc.iss.trim\[1\] 21.9
|
||||
_072_ 22.545
|
||||
_115_ 22.765
|
||||
pll_control.count0\[0\] 22.92
|
||||
ext_trim[5] 22.99
|
||||
ext_trim[6] 23.025
|
||||
_025_ 23.56
|
||||
ext_trim[13] 24.175
|
||||
_055_ 24.58
|
||||
_192_ 25.075
|
||||
_196_ 25.075
|
||||
ringosc.dstage\[11\].id.out 25.11
|
||||
ext_trim[11] 25.14
|
||||
_162_ 25.17
|
||||
_056_ 25.19
|
||||
_175_ 25.455
|
||||
_098_ 26.095
|
||||
pll_control.tint\[1\] 26.1
|
||||
resetb 26.23
|
||||
_125_ 26.635
|
||||
pll_control.count1\[0\] 26.655
|
||||
pll_control.count1\[2\] 26.73
|
||||
_101_ 26.955
|
||||
_057_ 27.38
|
||||
_142_ 27.95
|
||||
_107_ 28.53
|
||||
_151_ 28.55
|
||||
pll_control.oscbuf\[1\] 28.765
|
||||
_206_ 28.935
|
||||
ringosc.dstage\[7\].id.ts 29.085
|
||||
_170_ 29.215
|
||||
_168_ 29.335
|
||||
ext_trim[14] 29.56
|
||||
ringosc.dstage\[6\].id.trim\[1\] 29.835
|
||||
ringosc.dstage\[8\].id.trim\[0\] 30.395
|
||||
_130_ 31.19
|
||||
enable 31.225
|
||||
ext_trim[12] 31.27
|
||||
div[4] 31.375
|
||||
ringosc.dstage\[6\].id.ts 31.395
|
||||
ext_trim[7] 31.88
|
||||
ext_trim[23] 32.005
|
||||
_174_ 32.32
|
||||
ext_trim[0] 32.46
|
||||
_106_ 32.685
|
||||
_128_ 34.255
|
||||
ext_trim[16] 34.355
|
||||
ringosc.dstage\[0\].id.trim\[1\] 34.435
|
||||
ringosc.dstage\[9\].id.trim\[0\] 35.2
|
||||
ext_trim[3] 35.385
|
||||
_193_ 35.92
|
||||
_171_ 36.215
|
||||
_208_ 36.525
|
||||
ringosc.dstage\[1\].id.trim\[1\] 37.75
|
||||
pll_control.count0\[1\] 37.935
|
||||
ext_trim[15] 38.66
|
||||
_097_ 39.165
|
||||
ext_trim[10] 39.28
|
||||
pll_control.tint\[3\] 40.64
|
||||
clockp[1] 40.645
|
||||
ringosc.dstage\[3\].id.ts 40.72
|
||||
pll_control.count0\[4\] 40.905
|
||||
div[3] 40.945
|
||||
_172_ 42.145
|
||||
ext_trim[24] 43.205
|
||||
pll_control.tval\[0\] 43.355
|
||||
ringosc.dstage\[7\].id.out 43.455
|
||||
_117_ 44.33
|
||||
ext_trim[22] 44.53
|
||||
_114_ 44.94
|
||||
div[1] 45.165
|
||||
_211_ 45.23
|
||||
_177_ 47.705
|
||||
ext_trim[17] 48.3
|
||||
ringosc.dstage\[4\].id.trim\[1\] 48.675
|
||||
_210_ 48.845
|
||||
_209_ 52.46
|
||||
pll_control.tint\[2\] 53.22
|
||||
_166_ 53.24
|
||||
_096_ 54.24
|
||||
_110_ 54.26
|
||||
_108_ 55.58
|
||||
_100_ 55.75
|
||||
ringosc.dstage\[10\].id.trim\[0\] 56.035
|
||||
pll_control.tint\[0\] 57.225
|
||||
_181_ 57.475
|
||||
pll_control.count0\[2\] 57.585
|
||||
div[0] 58.155
|
||||
_178_ 59.01
|
||||
ringosc.dstage\[5\].id.trim\[1\] 59.565
|
||||
ext_trim[25] 59.69
|
||||
ext_trim[19] 60.54
|
||||
_173_ 60.86
|
||||
_176_ 61.095
|
||||
_095_ 61.1
|
||||
_124_ 61.3
|
||||
_052_ 61.485
|
||||
ext_trim[20] 61.665
|
||||
pll_control.count0\[3\] 63.74
|
||||
_180_ 63.96
|
||||
_053_ 64.045
|
||||
ext_trim[21] 64.325
|
||||
_160_ 65.675
|
||||
ringosc.dstage\[11\].id.trim\[0\] 66.1
|
||||
ext_trim[18] 67.19
|
||||
_050_ 70.23
|
||||
ringosc.dstage\[2\].id.ts 70.935
|
||||
ringosc.iss.trim\[0\] 72.24
|
||||
_167_ 75.37
|
||||
_123_ 75.84
|
||||
pll_control.tint\[4\] 78.825
|
||||
ringosc.iss.reset 79.64
|
||||
ext_trim[9] 81.41
|
||||
ext_trim[2] 83.52
|
||||
_157_ 85.145
|
||||
_212_ 88.185
|
||||
_045_ 88.87
|
||||
_099_ 90.52
|
||||
_122_ 91.085
|
||||
ext_trim[8] 92.66
|
||||
_158_ 94.085
|
||||
_213_ 110.955
|
||||
ringosc.dstage\[0\].id.in 116.96
|
||||
_044_ 118.205
|
||||
dco 122.445
|
||||
_186_ 159.71
|
||||
pll_control.clock 191.96
|
||||
|
|
@ -1,371 +0,0 @@
|
|||
clockp[0] 4.945
|
||||
clockp[1] 40.645
|
||||
dco 122.445
|
||||
div[0] 58.155
|
||||
div[1] 45.165
|
||||
div[2] 17.77
|
||||
div[3] 40.945
|
||||
div[4] 31.375
|
||||
enable 31.225
|
||||
ext_trim[0] 32.46
|
||||
ext_trim[10] 39.28
|
||||
ext_trim[11] 25.14
|
||||
ext_trim[12] 31.27
|
||||
ext_trim[13] 24.175
|
||||
ext_trim[14] 29.56
|
||||
ext_trim[15] 38.66
|
||||
ext_trim[16] 34.355
|
||||
ext_trim[17] 48.3
|
||||
ext_trim[18] 67.19
|
||||
ext_trim[19] 60.54
|
||||
ext_trim[1] 10.205
|
||||
ext_trim[20] 61.665
|
||||
ext_trim[21] 64.325
|
||||
ext_trim[22] 44.53
|
||||
ext_trim[23] 32.005
|
||||
ext_trim[24] 43.205
|
||||
ext_trim[25] 59.69
|
||||
ext_trim[2] 83.52
|
||||
ext_trim[3] 35.385
|
||||
ext_trim[4] 17.2
|
||||
ext_trim[5] 22.99
|
||||
ext_trim[6] 23.025
|
||||
ext_trim[7] 31.88
|
||||
ext_trim[8] 92.66
|
||||
ext_trim[9] 81.41
|
||||
osc 9.88
|
||||
resetb 26.23
|
||||
_000_ 7.425
|
||||
_001_ 16.345
|
||||
_002_ 4.99
|
||||
_003_ 1.575
|
||||
_004_ 5.34
|
||||
_005_ 2.595
|
||||
_006_ 2.935
|
||||
_007_ 2.28
|
||||
_008_ 6.4
|
||||
_009_ 6.67
|
||||
_010_ 1.575
|
||||
_011_ 6.25
|
||||
_012_ 2.935
|
||||
_013_ 5.315
|
||||
_014_ 7.8
|
||||
_015_ 7.015
|
||||
_016_ 2.595
|
||||
_017_ 19.03
|
||||
_018_ 5.385
|
||||
_019_ 3.66
|
||||
_020_ 3.275
|
||||
_021_ 10.03
|
||||
_022_ 3.15
|
||||
_023_ 16.94
|
||||
_024_ 10.195
|
||||
_025_ 23.56
|
||||
_026_ 4.895
|
||||
_027_ 12.3
|
||||
_028_ 6.38
|
||||
_029_ 2.76
|
||||
_030_ 1.79
|
||||
_031_ 6.135
|
||||
_032_ 5.215
|
||||
_033_ 11.675
|
||||
_034_ 12.375
|
||||
_035_ 7.76
|
||||
_036_ 4.335
|
||||
_037_ 9.415
|
||||
_038_ 11.235
|
||||
_039_ 4.755
|
||||
_040_ 8.615
|
||||
_041_ 5.475
|
||||
_042_ 2.375
|
||||
_043_ 9.295
|
||||
_044_ 118.205
|
||||
_045_ 88.87
|
||||
_046_ 5.36
|
||||
_047_ 8.58
|
||||
_048_ 10.535
|
||||
_049_ 4.51
|
||||
_050_ 70.23
|
||||
_051_ 15.0
|
||||
_052_ 61.485
|
||||
_053_ 64.045
|
||||
_054_ 7.815
|
||||
_055_ 24.58
|
||||
_056_ 25.19
|
||||
_057_ 27.38
|
||||
_058_ 13.23
|
||||
_059_ 19.955
|
||||
_060_ 18.295
|
||||
_061_ 17.96
|
||||
_062_ 6.695
|
||||
_063_ 10.535
|
||||
_064_ 10.175
|
||||
_065_ 17.045
|
||||
_066_ 17.615
|
||||
_067_ 6.3
|
||||
_068_ 7.83
|
||||
_069_ 5.895
|
||||
_070_ 5.19
|
||||
_071_ 6.155
|
||||
_072_ 22.545
|
||||
_073_ 16.05
|
||||
_074_ 10.62
|
||||
_075_ 13.34
|
||||
_076_ 2.13
|
||||
_077_ 7.86
|
||||
_078_ 5.26
|
||||
_079_ 11.255
|
||||
_080_ 7.52
|
||||
_081_ 10.77
|
||||
_082_ 6.935
|
||||
_083_ 17.615
|
||||
_084_ 2.375
|
||||
_085_ 6.955
|
||||
_086_ 7.075
|
||||
_087_ 2.035
|
||||
_088_ 8.955
|
||||
_089_ 12.04
|
||||
_090_ 8.895
|
||||
_091_ 7.715
|
||||
_092_ 6.235
|
||||
_093_ 4.94
|
||||
_094_ 19.22
|
||||
_095_ 61.1
|
||||
_096_ 54.24
|
||||
_097_ 39.165
|
||||
_098_ 26.095
|
||||
_099_ 90.52
|
||||
_100_ 55.75
|
||||
_101_ 26.955
|
||||
_102_ 16.855
|
||||
_103_ 10.47
|
||||
_104_ 19.35
|
||||
_105_ 20.575
|
||||
_106_ 32.685
|
||||
_107_ 28.53
|
||||
_108_ 55.58
|
||||
_109_ 1.84
|
||||
_110_ 54.26
|
||||
_111_ 8.275
|
||||
_112_ 20.415
|
||||
_113_ 6.235
|
||||
_114_ 44.94
|
||||
_115_ 22.765
|
||||
_116_ 9.44
|
||||
_117_ 44.33
|
||||
_118_ 7.485
|
||||
_119_ 11.415
|
||||
_120_ 5.31
|
||||
_121_ 14.98
|
||||
_122_ 91.085
|
||||
_123_ 75.84
|
||||
_124_ 61.3
|
||||
_125_ 26.635
|
||||
_126_ 5.47
|
||||
_127_ 7.275
|
||||
_128_ 34.255
|
||||
_129_ 21.235
|
||||
_130_ 31.19
|
||||
_131_ 19.16
|
||||
_132_ 6.955
|
||||
_133_ 6.055
|
||||
_134_ 5.19
|
||||
_135_ 3.44
|
||||
_136_ 3.075
|
||||
_137_ 3.175
|
||||
_138_ 2.035
|
||||
_139_ 2.52
|
||||
_140_ 6.335
|
||||
_141_ 12.16
|
||||
_142_ 27.95
|
||||
_143_ 6.165
|
||||
_144_ 3.2
|
||||
_145_ 2.52
|
||||
_146_ 2.76
|
||||
_147_ 12.615
|
||||
_148_ 12.235
|
||||
_149_ 4.02
|
||||
_150_ 3.055
|
||||
_151_ 28.55
|
||||
_152_ 5.015
|
||||
_153_ 8.4
|
||||
_154_ 2.81
|
||||
_155_ 6.55
|
||||
_156_ 2.745
|
||||
_157_ 85.145
|
||||
_158_ 94.085
|
||||
_159_ 2.375
|
||||
_160_ 65.675
|
||||
_161_ 18.12
|
||||
_162_ 25.17
|
||||
_163_ 13.835
|
||||
_164_ 7.71
|
||||
_165_ 16.85
|
||||
_166_ 53.24
|
||||
_167_ 75.37
|
||||
_168_ 29.335
|
||||
_169_ 13.21
|
||||
_170_ 29.215
|
||||
_171_ 36.215
|
||||
_172_ 42.145
|
||||
_173_ 60.86
|
||||
_174_ 32.32
|
||||
_175_ 25.455
|
||||
_176_ 61.095
|
||||
_177_ 47.705
|
||||
_178_ 59.01
|
||||
_179_ 8.98
|
||||
_180_ 63.96
|
||||
_181_ 57.475
|
||||
_182_ 3.395
|
||||
_183_ 5.86
|
||||
_184_ 9.62
|
||||
_185_ 2.715
|
||||
_186_ 159.71
|
||||
_187_ 6.6
|
||||
_188_ 3.075
|
||||
_189_ 2.13
|
||||
_190_ 6.115
|
||||
_191_ 17.635
|
||||
_192_ 25.075
|
||||
_193_ 35.92
|
||||
_194_ 19.74
|
||||
_195_ 13.58
|
||||
_196_ 25.075
|
||||
_197_ 9.27
|
||||
_198_ 12.49
|
||||
_199_ 8.995
|
||||
_200_ 8.525
|
||||
_201_ 6.48
|
||||
_202_ 7.315
|
||||
_203_ 2.155
|
||||
_204_ 3.055
|
||||
_205_ 16.695
|
||||
_206_ 28.935
|
||||
_207_ 6.235
|
||||
_208_ 36.525
|
||||
_209_ 52.46
|
||||
_210_ 48.845
|
||||
_211_ 45.23
|
||||
_212_ 88.185
|
||||
_213_ 110.955
|
||||
pll_control.clock 191.96
|
||||
pll_control.count0\[0\] 22.92
|
||||
pll_control.count0\[1\] 37.935
|
||||
pll_control.count0\[2\] 57.585
|
||||
pll_control.count0\[3\] 63.74
|
||||
pll_control.count0\[4\] 40.905
|
||||
pll_control.count1\[0\] 26.655
|
||||
pll_control.count1\[1\] 10.47
|
||||
pll_control.count1\[2\] 26.73
|
||||
pll_control.count1\[3\] 18.075
|
||||
pll_control.count1\[4\] 16.905
|
||||
pll_control.oscbuf\[0\] 6.975
|
||||
pll_control.oscbuf\[1\] 28.765
|
||||
pll_control.oscbuf\[2\] 14.0
|
||||
pll_control.prep\[0\] 14.475
|
||||
pll_control.prep\[1\] 11.97
|
||||
pll_control.prep\[2\] 13.275
|
||||
pll_control.tint\[0\] 57.225
|
||||
pll_control.tint\[1\] 26.1
|
||||
pll_control.tint\[2\] 53.22
|
||||
pll_control.tint\[3\] 40.64
|
||||
pll_control.tint\[4\] 78.825
|
||||
pll_control.tval\[0\] 43.355
|
||||
pll_control.tval\[1\] 20.005
|
||||
ringosc.c\[0\] 1.84
|
||||
ringosc.c\[1\] 2.47
|
||||
ringosc.clockp\[1\] 5.53
|
||||
ringosc.dstage\[0\].id.d0 9.535
|
||||
ringosc.dstage\[0\].id.d1 7.17
|
||||
ringosc.dstage\[0\].id.d2 8.895
|
||||
ringosc.dstage\[0\].id.in 116.96
|
||||
ringosc.dstage\[0\].id.out 5.935
|
||||
ringosc.dstage\[0\].id.trim\[0\] 18.575
|
||||
ringosc.dstage\[0\].id.trim\[1\] 34.435
|
||||
ringosc.dstage\[0\].id.ts 19.495
|
||||
ringosc.dstage\[10\].id.d0 5.235
|
||||
ringosc.dstage\[10\].id.d1 10.15
|
||||
ringosc.dstage\[10\].id.d2 9.54
|
||||
ringosc.dstage\[10\].id.in 8.71
|
||||
ringosc.dstage\[10\].id.out 5.555
|
||||
ringosc.dstage\[10\].id.trim\[0\] 56.035
|
||||
ringosc.dstage\[10\].id.trim\[1\] 6.355
|
||||
ringosc.dstage\[10\].id.ts 14.065
|
||||
ringosc.dstage\[11\].id.d0 7.855
|
||||
ringosc.dstage\[11\].id.d1 9.695
|
||||
ringosc.dstage\[11\].id.d2 2.955
|
||||
ringosc.dstage\[11\].id.out 25.11
|
||||
ringosc.dstage\[11\].id.trim\[0\] 66.1
|
||||
ringosc.dstage\[11\].id.trim\[1\] 10.595
|
||||
ringosc.dstage\[11\].id.ts 7.15
|
||||
ringosc.dstage\[1\].id.d0 7.435
|
||||
ringosc.dstage\[1\].id.d1 5.57
|
||||
ringosc.dstage\[1\].id.d2 2.375
|
||||
ringosc.dstage\[1\].id.out 15.085
|
||||
ringosc.dstage\[1\].id.trim\[0\] 4.435
|
||||
ringosc.dstage\[1\].id.trim\[1\] 37.75
|
||||
ringosc.dstage\[1\].id.ts 15.975
|
||||
ringosc.dstage\[2\].id.d0 6.32
|
||||
ringosc.dstage\[2\].id.d1 17.87
|
||||
ringosc.dstage\[2\].id.d2 7.36
|
||||
ringosc.dstage\[2\].id.out 10.365
|
||||
ringosc.dstage\[2\].id.trim\[0\] 16.19
|
||||
ringosc.dstage\[2\].id.trim\[1\] 6.015
|
||||
ringosc.dstage\[2\].id.ts 70.935
|
||||
ringosc.dstage\[3\].id.d0 5.96
|
||||
ringosc.dstage\[3\].id.d1 7.775
|
||||
ringosc.dstage\[3\].id.d2 18.595
|
||||
ringosc.dstage\[3\].id.out 7.395
|
||||
ringosc.dstage\[3\].id.trim\[0\] 8.195
|
||||
ringosc.dstage\[3\].id.trim\[1\] 19.675
|
||||
ringosc.dstage\[3\].id.ts 40.72
|
||||
ringosc.dstage\[4\].id.d0 8.395
|
||||
ringosc.dstage\[4\].id.d1 10.595
|
||||
ringosc.dstage\[4\].id.d2 1.38
|
||||
ringosc.dstage\[4\].id.out 13.175
|
||||
ringosc.dstage\[4\].id.trim\[0\] 5.23
|
||||
ringosc.dstage\[4\].id.trim\[1\] 48.675
|
||||
ringosc.dstage\[4\].id.ts 21.895
|
||||
ringosc.dstage\[5\].id.d0 6.475
|
||||
ringosc.dstage\[5\].id.d1 4.97
|
||||
ringosc.dstage\[5\].id.d2 7.23
|
||||
ringosc.dstage\[5\].id.out 20.135
|
||||
ringosc.dstage\[5\].id.trim\[0\] 8.195
|
||||
ringosc.dstage\[5\].id.trim\[1\] 59.565
|
||||
ringosc.dstage\[5\].id.ts 13.61
|
||||
ringosc.dstage\[6\].id.d0 20.96
|
||||
ringosc.dstage\[6\].id.d1 12.79
|
||||
ringosc.dstage\[6\].id.d2 4.14
|
||||
ringosc.dstage\[6\].id.out 14.435
|
||||
ringosc.dstage\[6\].id.trim\[0\] 7.855
|
||||
ringosc.dstage\[6\].id.trim\[1\] 29.835
|
||||
ringosc.dstage\[6\].id.ts 31.395
|
||||
ringosc.dstage\[7\].id.d0 1.72
|
||||
ringosc.dstage\[7\].id.d1 8.595
|
||||
ringosc.dstage\[7\].id.d2 5.095
|
||||
ringosc.dstage\[7\].id.out 43.455
|
||||
ringosc.dstage\[7\].id.trim\[0\] 11.2
|
||||
ringosc.dstage\[7\].id.trim\[1\] 6.015
|
||||
ringosc.dstage\[7\].id.ts 29.085
|
||||
ringosc.dstage\[8\].id.d0 2.835
|
||||
ringosc.dstage\[8\].id.d1 5.43
|
||||
ringosc.dstage\[8\].id.d2 1.38
|
||||
ringosc.dstage\[8\].id.out 12.46
|
||||
ringosc.dstage\[8\].id.trim\[0\] 30.395
|
||||
ringosc.dstage\[8\].id.trim\[1\] 5.235
|
||||
ringosc.dstage\[8\].id.ts 16.15
|
||||
ringosc.dstage\[9\].id.d0 5.595
|
||||
ringosc.dstage\[9\].id.d1 6.295
|
||||
ringosc.dstage\[9\].id.d2 10.12
|
||||
ringosc.dstage\[9\].id.trim\[0\] 35.2
|
||||
ringosc.dstage\[9\].id.trim\[1\] 12.475
|
||||
ringosc.dstage\[9\].id.ts 14.855
|
||||
ringosc.iss.ctrl0 2.3
|
||||
ringosc.iss.d0 4.755
|
||||
ringosc.iss.d1 13.09
|
||||
ringosc.iss.d2 2.375
|
||||
ringosc.iss.one 6.695
|
||||
ringosc.iss.reset 79.64
|
||||
ringosc.iss.trim\[0\] 72.24
|
||||
ringosc.iss.trim\[1\] 21.9
|
||||
|
|
@ -1,11 +0,0 @@
|
|||
Klayout MR DRC: Passed
|
||||
Layout Vs Schematic: Passed
|
||||
digital_pll-nom-s-sta STA: Passed (max_tran)
|
||||
digital_pll-min-s-sta STA: Passed (max_tran)
|
||||
digital_pll-max-t-sta STA: Passed (max_tran)
|
||||
digital_pll-min-t-sta STA: Passed
|
||||
digital_pll-min-f-sta STA: Passed
|
||||
digital_pll-max-f-sta STA: Passed
|
||||
digital_pll-nom-t-sta STA: Passed
|
||||
digital_pll-max-s-sta STA: Passed (max_tran)
|
||||
digital_pll-nom-f-sta STA: Passed
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
|
|
@ -1,873 +0,0 @@
|
|||
<?xml version="1.0" encoding="utf-8"?>
|
||||
<report-database>
|
||||
<description>SKY130 DRC runset</description>
|
||||
<original-file/>
|
||||
<generator>drc: script='tech-files/sky130A_mr.drc'</generator>
|
||||
<top-cell>digital_pll</top-cell>
|
||||
<tags>
|
||||
</tags>
|
||||
<categories>
|
||||
<category>
|
||||
<name>dnwell.2</name>
|
||||
<description>dnwell.2 : min. dnwell width : 3.0um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>nwell.1</name>
|
||||
<description>nwell.1 : min. nwell width : 0.84um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>nwell.2a</name>
|
||||
<description>nwell.2a : min. nwell spacing (merged if less) : 1.27um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>nwell.6</name>
|
||||
<description>nwell.6 : min enclosure of nwellHole by dnwell : 1.03um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>hvtp.1</name>
|
||||
<description>hvtp.1 : min. hvtp width : 0.38um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>hvtp.2</name>
|
||||
<description>hvtp.2 : min. hvtp spacing : 0.38um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>hvtr.1</name>
|
||||
<description>hvtr.1 : min. hvtr width : 0.38um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>hvtr.2</name>
|
||||
<description>hvtr.2 : min. hvtr spacing : 0.38um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>hvtr.2_a</name>
|
||||
<description>hvtr.2_a : hvtr must not overlap hvtp</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>lvtn.1a</name>
|
||||
<description>lvtn.1a : min. lvtn width : 0.38um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>lvtn.2</name>
|
||||
<description>lvtn.2 : min. lvtn spacing : 0.38um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>ncm.1</name>
|
||||
<description>ncm.1 : min. ncm width : 0.38um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>ncm.2a</name>
|
||||
<description>ncm.2a : min. ncm spacing : 0.38um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>difftap.1</name>
|
||||
<description>difftap.1 : min. diff width across areaid:ce : 0.15um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>difftap.1_a</name>
|
||||
<description>difftap.1_a : min. diff width in periphery : 0.15um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>difftap.1_b</name>
|
||||
<description>difftap.1_b : min. tap width across areaid:ce : 0.15um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>difftap.1_c</name>
|
||||
<description>difftap.1_c : min. tap width in periphery : 0.15um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>difftap.3</name>
|
||||
<description>difftap.3 : min. difftap spacing : 0.27um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>tunm.1</name>
|
||||
<description>tunm.1 : min. tunm width : 0.41um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>tunm.2</name>
|
||||
<description>tunm.2 : min. tunm spacing : 0.5um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>poly.1a</name>
|
||||
<description>poly.1a : min. poly width : 0.15um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>poly.2</name>
|
||||
<description>poly.2 : min. poly spacing : 0.21um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>rpm.1a</name>
|
||||
<description>rpm.1a : min. rpm width : 1.27um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>rpm.2</name>
|
||||
<description>rpm.2 : min. rpm spacing : 0.84um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>urpm.1a</name>
|
||||
<description>urpm.1a : min. rpm width : 1.27um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>urpm.2</name>
|
||||
<description>urpm.2 : min. rpm spacing : 0.84um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>npc.1</name>
|
||||
<description>npc.1 : min. npc width : 0.27um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>npc.2</name>
|
||||
<description>npc.2 : min. npc spacing, should be manually merged if less than : 0.27um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>nsd.1</name>
|
||||
<description>nsd.1 : min. nsdm width : 0.38um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>nsd.2</name>
|
||||
<description>nsd.2 : min. nsdm spacing, should be manually merged if less than : 0.38um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>psd.1</name>
|
||||
<description>psd.1 : min. psdm width : 0.38um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>psd.2</name>
|
||||
<description>psd.2 : min. psdm spacing, should be manually merged if less than : 0.38um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>licon.1</name>
|
||||
<description>licon.1 : licon should be rectangle</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>licon.1_a/b</name>
|
||||
<description>licon.1_a/b : minimum/maximum width of licon : 0.17um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>licon.13</name>
|
||||
<description>licon.13 : min. difftap licon spacing to npc : 0.09um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>licon.13_a</name>
|
||||
<description>licon.13_a : licon of diffTap in periphery must not overlap npc</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>licon.17</name>
|
||||
<description>licon.17 : Licons may not overlap both poly and (diff or tap)</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>capm.1</name>
|
||||
<description>capm.1 : min. capm width : 1.0um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>capm.2a</name>
|
||||
<description>capm.2a : min. capm spacing : 0.84um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>capm.2b</name>
|
||||
<description>capm.2b : min. capm spacing : 1.2um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>capm.2b_a</name>
|
||||
<description>capm.2b_a : min. spacing of m3_bot_plate : 1.2um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>capm.3</name>
|
||||
<description>capm.3 : min. capm and m3 enclosure of m3 : 0.14um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>capm.3_a</name>
|
||||
<description>capm.3_a : min. m3 enclosure of capm : 0.14um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>capm.4</name>
|
||||
<description>capm.4 : min. capm enclosure of via3 : 0.14um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>capm.5</name>
|
||||
<description>capm.5 : min. capm spacing to via3 : 0.14um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>capm.11</name>
|
||||
<description>capm.11 : Min spacing of capm and met3 not overlapping capm : 0.5um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>cap2m.1</name>
|
||||
<description>cap2m.1 : min. cap2m width : 1.0um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>cap2m.2a</name>
|
||||
<description>cap2m.2a : min. cap2m spacing : 0.84um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>cap2m.2b</name>
|
||||
<description>cap2m.2b : min. cap2m spacing : 1.2um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>cap2m.2b_a</name>
|
||||
<description>cap2m.2b_a : min. spacing of m4_bot_plate : 1.2um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>cap2m.3</name>
|
||||
<description>cap2m.3 : min. m4 enclosure of cap2m : 0.14um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>cap2m.3_a</name>
|
||||
<description>cap2m.3_a : min. m4 enclosure of cap2m : 0.14um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>cap2m.4</name>
|
||||
<description>cap2m.4 : min. cap2m enclosure of via4 : 0.14um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>cap2m.5</name>
|
||||
<description>cap2m.5 : min. cap2m spacing to via4 : 0.14um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>cap2m.11</name>
|
||||
<description>cap2m.11 : Min spacing of cap2m and met4 not overlapping cap2m : 0.5um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>li.1</name>
|
||||
<description>li.1 : min. li width : 0.17um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>li.3</name>
|
||||
<description>li.3 : min. li spacing : 0.17um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>li.5</name>
|
||||
<description>li.5 : min. li enclosure of licon of 2 adjacent edges : 0.08um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>li.6</name>
|
||||
<description>li.6 : min. li area : 0.0561um²</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>ct.1</name>
|
||||
<description>ct.1: non-ring mcon should be rectangular</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>ct.1_a</name>
|
||||
<description>ct.1_a : minimum width of mcon : 0.17um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>ct.1_b</name>
|
||||
<description>ct.1_b : maximum length of mcon : 0.17um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>ct.2</name>
|
||||
<description>ct.2 : min. mcon spacing : 0.19um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>ct.3</name>
|
||||
<description>ct.3 : min. width of ring-shaped mcon : 0.17um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>ct.3_a</name>
|
||||
<description>ct.3_a : max. width of ring-shaped mcon : 0.175um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>ct.3_b</name>
|
||||
<description>ct.3_b: ring-shaped mcon must be enclosed by areaid_sl</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>ct.4</name>
|
||||
<description>ct.4 : mcon should covered by li</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>m1.1</name>
|
||||
<description>m1.1 : min. m1 width : 0.14um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>m1.2</name>
|
||||
<description>m1.2 : min. m1 spacing : 0.14um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>m1.3ab</name>
|
||||
<description>m1.3ab : min. 3um.m1 spacing m1 : 0.28um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>791_m1.4</name>
|
||||
<description>791_m1.4 : min. m1 enclosure of mcon : 0.03um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>m1.4</name>
|
||||
<description>m1.4 : mcon periphery must be enclosed by m1</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>m1.4a</name>
|
||||
<description>m1.4a : min. m1 enclosure of mcon for specific cells : 0.005um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>m1.4a_a</name>
|
||||
<description>m1.4a_a : mcon periph must be enclosed by met1 for specific cells</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>m1.6</name>
|
||||
<description>m1.6 : min. m1 area : 0.083um²</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>m1.7</name>
|
||||
<description>m1.7 : min. m1 with holes area : 0.14um²</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>m1.5</name>
|
||||
<description>m1.5 : min. m1 enclosure of mcon of 2 adjacent edges : 0.06um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>via.1a</name>
|
||||
<description>via.1a : via outside of moduleCut should be rectangular</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>via.1a_a</name>
|
||||
<description>via.1a_a : min. width of via outside of moduleCut : 0.15um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>via.1a_b</name>
|
||||
<description>via.1a_b : maximum length of via : 0.15um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>via.2</name>
|
||||
<description>via.2 : min. via spacing : 0.17um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>via.3</name>
|
||||
<description>via.3 : min. width of ring-shaped via : 0.2um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>via.3_a</name>
|
||||
<description>via.3_a : max. width of ring-shaped via : 0.205um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>via.3_b</name>
|
||||
<description>via.3_b: ring-shaped via must be enclosed by areaid_sl</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>via.4a</name>
|
||||
<description>via.4a : min. m1 enclosure of 0.15um via : 0.055um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>via.4a_a</name>
|
||||
<description>via.4a_a : 0.15um via must be enclosed by met1</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>via.5a</name>
|
||||
<description>via.5a : min. m1 enclosure of 0.15um via of 2 adjacent edges : 0.085um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>m2.1</name>
|
||||
<description>m2.1 : min. m2 width : 0.14um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>m2.2</name>
|
||||
<description>m2.2 : min. m2 spacing : 0.14um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>m2.3ab</name>
|
||||
<description>m2.3ab : min. 3um.m2 spacing m2 : 0.28um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>m2.6</name>
|
||||
<description>m2.6 : min. m2 area : 0.0676um²</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>m2.7</name>
|
||||
<description>m2.7 : min. m2 holes area : 0.14um²</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>m2.4</name>
|
||||
<description>m2.4 : min. m2 enclosure of via : 0.055um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>m2.4_a</name>
|
||||
<description>m2.4_a : via in periphery must be enclosed by met2</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>m2.5</name>
|
||||
<description>m2.5 : min. m2 enclosure of via of 2 adjacent edges : 0.085um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>via2.1a</name>
|
||||
<description>via2.1a : via2 outside of moduleCut should be rectangular</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>via2.1a_a</name>
|
||||
<description>via2.1a_a : min. width of via2 outside of moduleCut : 0.2um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>via2.1a_b</name>
|
||||
<description>via2.1a_b : maximum length of via2 : 0.2um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>via2.2</name>
|
||||
<description>via2.2 : min. via2 spacing : 0.2um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>via2.3</name>
|
||||
<description>via2.3 : min. width of ring-shaped via2 : 0.2um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>via2.3_a</name>
|
||||
<description>via2.3_a : max. width of ring-shaped via2 : 0.205um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>via2.3_b</name>
|
||||
<description>via2.3_b: ring-shaped via2 must be enclosed by areaid_sl</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>via2.4</name>
|
||||
<description>via2.4 : min. m2 enclosure of via2 : 0.04um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>via2.4_a</name>
|
||||
<description>via2.4_a : via must be enclosed by met2</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>via2.5</name>
|
||||
<description>via2.5 : min. m3 enclosure of via2 of 2 adjacent edges : 0.085um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>m3.1</name>
|
||||
<description>m3.1 : min. m3 width : 0.3um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>m3.2</name>
|
||||
<description>m3.2 : min. m3 spacing : 0.3um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>m3.3cd</name>
|
||||
<description>m3.3cd : min. 3um.m3 spacing m3 : 0.4um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>m3.4</name>
|
||||
<description>m3.4 : min. m3 enclosure of via2 : 0.065um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>m3.4_a</name>
|
||||
<description>m3.4_a : via2 must be enclosed by met3</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>via3.1</name>
|
||||
<description>via3.1 : via3 outside of moduleCut should be rectangular</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>via3.1_a</name>
|
||||
<description>via3.1_a : min. width of via3 outside of moduleCut : 0.2um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>via3.1_b</name>
|
||||
<description>via3.1_b : maximum length of via3 : 0.2um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>via3.2</name>
|
||||
<description>via3.2 : min. via3 spacing : 0.2um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>via3.4</name>
|
||||
<description>via3.4 : min. m3 enclosure of via3 : 0.06um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>via3.4_a</name>
|
||||
<description>via3.4_a : non-ring via3 must be enclosed by met3</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>via3.5</name>
|
||||
<description>via3.5 : min. m3 enclosure of via3 of 2 adjacent edges : 0.09um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>m4.1</name>
|
||||
<description>m4.1 : min. m4 width : 0.3um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>m4.2</name>
|
||||
<description>m4.2 : min. m4 spacing : 0.3um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>m4.4a</name>
|
||||
<description>m4.4a : min. m4 area : 0.240um²</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>m4.5ab</name>
|
||||
<description>m4.5ab : min. 3um.m4 spacing m4 : 0.4um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>m4.3</name>
|
||||
<description>m4.3 : min. m4 enclosure of via3 : 0.065um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>m4.3_a</name>
|
||||
<description>m4.3_a : via3 must be enclosed by met4</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>via4.1</name>
|
||||
<description>via4.1 : via4 outside of moduleCut should be rectangular</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>via4.1_a</name>
|
||||
<description>via4.1_a : min. width of via4 outside of moduleCut : 0.8um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>via4.1_b</name>
|
||||
<description>via4.1_b : maximum length of via4 : 0.8um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>via4.2</name>
|
||||
<description>via4.2 : min. via4 spacing : 0.8um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>via4.3</name>
|
||||
<description>via4.3 : min. width of ring-shaped via4 : 0.8um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>via4.3_a</name>
|
||||
<description>via4.3_a : max. width of ring-shaped via4 : 0.805um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>via4.3_b</name>
|
||||
<description>via4.3_b: ring-shaped via4 must be enclosed by areaid_sl</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>via4.4</name>
|
||||
<description>via4.4 : min. m4 enclosure of via4 : 0.19um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>via4.4_a</name>
|
||||
<description>via4.4_a : m4 must enclose all via4</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>m5.1</name>
|
||||
<description>m5.1 : min. m5 width : 1.6um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>m5.2</name>
|
||||
<description>m5.2 : min. m5 spacing : 1.6um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>m5.3</name>
|
||||
<description>m5.3 : min. m5 enclosure of via4 : 0.31um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>m5.3_a</name>
|
||||
<description>m5.3_a : via must be enclosed by m5</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>m5.4</name>
|
||||
<description>m5.4 : min. m5 area : 4.0um²</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>pad.2</name>
|
||||
<description>pad.2 : min. pad spacing : 1.27um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>hvi.1</name>
|
||||
<description>hvi.1 : min. hvi width : 0.6um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>hvi.2a</name>
|
||||
<description>hvi.2a : min. hvi spacing : 0.7um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>hvntm.1</name>
|
||||
<description>hvntm.1 : min. hvntm width : 0.7um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
<category>
|
||||
<name>hvntm.2</name>
|
||||
<description>hvntm.2 : min. hvntm spacing : 0.7um</description>
|
||||
<categories>
|
||||
</categories>
|
||||
</category>
|
||||
</categories>
|
||||
<cells>
|
||||
<cell>
|
||||
<name>digital_pll</name>
|
||||
<variant/>
|
||||
<references>
|
||||
</references>
|
||||
</cell>
|
||||
</cells>
|
||||
<items>
|
||||
</items>
|
||||
</report-database>
|
||||
|
|
@ -1 +0,0 @@
|
|||
Layout Vs Schematic Passed
|
||||
Loading…
Reference in New Issue