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[DATA] Update mgmt_protect pin placement

This commit is contained in:
manarabdelaty 2021-11-19 01:33:11 +02:00
parent 53b3a9013e
commit 61bf3c651e
17 changed files with 454020 additions and 469420 deletions
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213954
def/mgmt_protect.def
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gds/mgmt_protect.gds.gz
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gds/mprj_logic_high.gds.gz
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6
lef/mgmt_protect.lef
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@ -10389,8 +10389,8 @@ MACRO mgmt_protect
RECT 4.000 5.080 1095.600 6.480 ;
RECT 4.000 0.175 1096.000 5.080 ;
LAYER met4 ;
RECT 229.375 114.880 1080.705 119.505 ;
RECT 229.375 4.800 245.420 114.880 ;
RECT 230.295 114.880 1080.705 119.505 ;
RECT 230.295 4.800 245.420 114.880 ;
RECT 247.120 114.640 320.670 114.880 ;
RECT 247.120 5.040 249.520 114.640 ;
RECT 251.220 5.040 253.620 114.640 ;
@ -10454,7 +10454,7 @@ MACRO mgmt_protect
RECT 1074.870 5.040 1077.270 114.640 ;
RECT 1078.970 5.040 1080.705 114.640 ;
RECT 1074.870 4.800 1080.705 5.040 ;
RECT 229.375 0.175 1080.705 4.800 ;
RECT 230.295 0.175 1080.705 4.800 ;
END
END mgmt_protect
END LIBRARY

666697
mag/mgmt_protect.mag
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1544
mag/mprj_logic_high.mag
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14
maglef/mgmt_protect.mag
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@ -1,7 +1,7 @@
magic
tech sky130A
magscale 1 2
timestamp 1636974907
timestamp 1637234857
<< obsli1 >>
rect 1104 17 218868 23987
<< obsm1 >>
@ -2325,8 +2325,8 @@ rect 216354 1088 216534 22848
rect 216914 1088 217094 22848
rect 217514 1088 217694 22848
<< obsm4 >>
rect 45875 22976 216141 23901
rect 45875 960 49084 22976
rect 46059 22976 216141 23901
rect 46059 960 49084 22976
rect 49424 22928 64134 22976
rect 49424 1008 49904 22928
rect 50244 1008 50724 22928
@ -2390,7 +2390,7 @@ rect 199924 960 214634 1008
rect 214974 1008 215454 22928
rect 215794 1008 216141 22928
rect 214974 960 216141 1008
rect 45875 35 216141 960
rect 46059 35 216141 960
<< labels >>
rlabel metal3 s -400 3952 800 4072 6 caravel_clk
port 1 nsew signal input
@ -4746,8 +4746,8 @@ port 1134 nsew ground input
string LEFclass BLOCK
string FIXED_BBOX 0 0 220000 24000
string LEFview TRUE
string GDS_FILE /project/openlane/mgmt_protect/runs/mgmt_protect/results/magic/mgmt_protect.gds
string GDS_END 15159762
string GDS_START 800806
string GDS_FILE /home/ma/ef/caravel_openframe/openlane/mgmt_protect/runs/mgmt_protect/results/magic/mgmt_protect.gds
string GDS_END 14474898
string GDS_START 813852
<< end >>

4
maglef/mprj_logic_high.mag
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@ -1,7 +1,7 @@
magic
tech sky130A
magscale 1 2
timestamp 1636973520
timestamp 1637171158
<< obsli1 >>
rect 1288 1071 68816 3281
<< obsm1 >>
@ -1908,7 +1908,7 @@ port 465 nsew ground input
string LEFclass BLOCK
string FIXED_BBOX 0 0 70000 4400
string LEFview TRUE
string GDS_FILE /project/openlane/mprj_logic_high/runs/mprj_logic_high/results/magic/mprj_logic_high.gds
string GDS_FILE /home/ma/ef/caravel_openframe/openlane/mprj_logic_high/runs/mprj_logic_high/results/magic/mprj_logic_high.gds
string GDS_END 514418
string GDS_START 24116
<< end >>

4
openlane/mgmt_protect/config.tcl
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@ -40,8 +40,8 @@ set ::env(DIE_AREA) "0 0 1100 120"
set ::env(FP_PIN_ORDER_CFG) $script_dir/pin_order.cfg
set ::env(FP_VERTICAL_HALO) 14
set ::env(FP_HORIZONTAL_HALO) 14
set ::env(FP_VERTICAL_HALO) 10
set ::env(FP_HORIZONTAL_HALO) 10
set ::env(FP_IO_MIN_DISTANCE) 5

2
signoff/mgmt_protect/OPENLANE_VERSION
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@ -1 +1 @@
openlane 2021.09.09_03.00.48-60-gcbb562b
openlane 2021.09.09_03.00.48-66-gbdb1b56

9
signoff/mgmt_protect/PDK_SOURCES
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@ -1,6 +1,3 @@
-ne openlane
e6ba5d36a9b32a9f87626d49bf3c80cf3964ebeb
-ne skywater-pdk
c094b6e83a4f9298e47f696ec5a7fd53535ec5eb
-ne open_pdks
f90a86bdd133bd629251d59eebb1aee8452c0f5c
openlane cbb562bd43c5c410b1b498604803c3dd88a44856
skywater-pdk c094b6e83a4f9298e47f696ec5a7fd53535ec5eb
open_pdks c5730b574461889c82858b08d12ba42423d9c2cb

2
signoff/mgmt_protect/final_summary_report.csv
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@ -1,2 +1,2 @@
,design,design_name,config,flow_status,total_runtime,routed_runtime,(Cell/mm^2)/Core_Util,DIEAREA_mm^2,CellPer_mm^2,OpenDP_Util,Peak_Memory_Usage_MB,cell_count,tritonRoute_violations,Short_violations,MetSpc_violations,OffGrid_violations,MinHole_violations,Other_violations,Magic_violations,antenna_violations,lvs_total_errors,cvc_total_errors,klayout_violations,wire_length,vias,wns,pl_wns,optimized_wns,fastroute_wns,spef_wns,tns,pl_tns,optimized_tns,fastroute_tns,spef_tns,HPWL,routing_layer1_pct,routing_layer2_pct,routing_layer3_pct,routing_layer4_pct,routing_layer5_pct,routing_layer6_pct,wires_count,wire_bits,public_wires_count,public_wire_bits,memories_count,memory_bits,processes_count,cells_pre_abc,AND,DFF,NAND,NOR,OR,XOR,XNOR,MUX,inputs,outputs,level,EndCaps,TapCells,Diodes,Total_Physical_Cells,suggested_clock_frequency,suggested_clock_period,CLOCK_PERIOD,SYNTH_STRATEGY,SYNTH_MAX_FANOUT,FP_CORE_UTIL,FP_ASPECT_RATIO,FP_PDN_VPITCH,FP_PDN_HPITCH,PL_TARGET_DENSITY,GLB_RT_ADJUSTMENT,STD_CELL_LIBRARY,CELL_PAD,DIODE_INSERTION_STRATEGY
0,/project/openlane/mgmt_protect,mgmt_protect,mgmt_protect,flow_completed,0h23m48s,-1,19000.0,0.132,9500.0,16.91,825.22,1254,0,-1,-1,-1,-1,0,9,-1,67,-1,-1,465174,38088,0.0,-0.62,-1,0.0,-1,0.0,-6.18,-1,0.0,-1,420024977.0,0.0,81.4,43.86,73.51,13.92,-1,388,2353,59,2024,0,0,0,1254,0,0,0,0,0,0,0,4,329,329,1,120,1435,3131,4686,111.11111111111111,9,8,AREA 0,5,50,1,150.5,5.44,0.17,0.0,sky130_fd_sc_hd,0,1
0,/home/ma/ef/caravel_openframe/openlane/mgmt_protect,mgmt_protect,mgmt_protect,flow_completed,0h39m58s,-1,19000.0,0.132,9500.0,15.61,793.38,1254,0,-1,-1,-1,-1,0,9,-1,63,-1,-1,442895,35827,0.0,-0.39,-1,0.0,-1,0.0,-2.9,-1,0.0,-1,403735372.0,0.0,78.84,38.96,71.88,14.0,-1,388,2353,59,2024,0,0,0,1254,0,0,0,0,0,0,0,4,329,329,1,112,1542,3131,4785,111.11111111111111,9,8,AREA 0,5,50,1,150.5,5.44,0.17,0.0,sky130_fd_sc_hd,0,1

1 design design_name config flow_status total_runtime routed_runtime (Cell/mm^2)/Core_Util DIEAREA_mm^2 CellPer_mm^2 OpenDP_Util Peak_Memory_Usage_MB cell_count tritonRoute_violations Short_violations MetSpc_violations OffGrid_violations MinHole_violations Other_violations Magic_violations antenna_violations lvs_total_errors cvc_total_errors klayout_violations wire_length vias wns pl_wns optimized_wns fastroute_wns spef_wns tns pl_tns optimized_tns fastroute_tns spef_tns HPWL routing_layer1_pct routing_layer2_pct routing_layer3_pct routing_layer4_pct routing_layer5_pct routing_layer6_pct wires_count wire_bits public_wires_count public_wire_bits memories_count memory_bits processes_count cells_pre_abc AND DFF NAND NOR OR XOR XNOR MUX inputs outputs level EndCaps TapCells Diodes Total_Physical_Cells suggested_clock_frequency suggested_clock_period CLOCK_PERIOD SYNTH_STRATEGY SYNTH_MAX_FANOUT FP_CORE_UTIL FP_ASPECT_RATIO FP_PDN_VPITCH FP_PDN_HPITCH PL_TARGET_DENSITY GLB_RT_ADJUSTMENT STD_CELL_LIBRARY CELL_PAD DIODE_INSERTION_STRATEGY
2 0 /project/openlane/mgmt_protect /home/ma/ef/caravel_openframe/openlane/mgmt_protect mgmt_protect mgmt_protect flow_completed 0h23m48s 0h39m58s -1 19000.0 0.132 9500.0 16.91 15.61 825.22 793.38 1254 0 -1 -1 -1 -1 0 9 -1 67 63 -1 -1 465174 442895 38088 35827 0.0 -0.62 -0.39 -1 0.0 -1 0.0 -6.18 -2.9 -1 0.0 -1 420024977.0 403735372.0 0.0 81.4 78.84 43.86 38.96 73.51 71.88 13.92 14.0 -1 388 2353 59 2024 0 0 0 1254 0 0 0 0 0 0 0 4 329 329 1 120 112 1435 1542 3131 4686 4785 111.11111111111111 9 8 AREA 0 5 50 1 150.5 5.44 0.17 0.0 sky130_fd_sc_hd 0 1

2
signoff/mprj_logic_high/OPENLANE_VERSION
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@ -1 +1 @@
openlane 2021.09.09_03.00.48-60-gcbb562b
openlane 2021.09.09_03.00.48-66-gbdb1b56

9
signoff/mprj_logic_high/PDK_SOURCES
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@ -1,6 +1,3 @@
-ne openlane
e6ba5d36a9b32a9f87626d49bf3c80cf3964ebeb
-ne skywater-pdk
c094b6e83a4f9298e47f696ec5a7fd53535ec5eb
-ne open_pdks
f90a86bdd133bd629251d59eebb1aee8452c0f5c
openlane cbb562bd43c5c410b1b498604803c3dd88a44856
skywater-pdk c094b6e83a4f9298e47f696ec5a7fd53535ec5eb
open_pdks c5730b574461889c82858b08d12ba42423d9c2cb

2
signoff/mprj_logic_high/final_summary_report.csv
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@ -1,2 +1,2 @@
,design,design_name,config,flow_status,total_runtime,routed_runtime,(Cell/mm^2)/Core_Util,DIEAREA_mm^2,CellPer_mm^2,OpenDP_Util,Peak_Memory_Usage_MB,cell_count,tritonRoute_violations,Short_violations,MetSpc_violations,OffGrid_violations,MinHole_violations,Other_violations,Magic_violations,antenna_violations,lvs_total_errors,cvc_total_errors,klayout_violations,wire_length,vias,wns,pl_wns,optimized_wns,fastroute_wns,spef_wns,tns,pl_tns,optimized_tns,fastroute_tns,spef_tns,HPWL,routing_layer1_pct,routing_layer2_pct,routing_layer3_pct,routing_layer4_pct,routing_layer5_pct,routing_layer6_pct,wires_count,wire_bits,public_wires_count,public_wire_bits,memories_count,memory_bits,processes_count,cells_pre_abc,AND,DFF,NAND,NOR,OR,XOR,XNOR,MUX,inputs,outputs,level,EndCaps,TapCells,Diodes,Total_Physical_Cells,suggested_clock_frequency,suggested_clock_period,CLOCK_PERIOD,SYNTH_STRATEGY,SYNTH_MAX_FANOUT,FP_CORE_UTIL,FP_ASPECT_RATIO,FP_PDN_VPITCH,FP_PDN_HPITCH,PL_TARGET_DENSITY,GLB_RT_ADJUSTMENT,STD_CELL_LIBRARY,CELL_PAD,DIODE_INSERTION_STRATEGY
0,/project/openlane/mprj_logic_high,mprj_logic_high,mprj_logic_high,flow_completed,0h1m1s,-1,120259.74025974025,0.0077,60129.87012987013,49.01,453.23,463,0,-1,-1,-1,-1,0,0,-1,0,0,-1,4376,1026,0.0,0.0,-1,0.0,-1,0.0,0.0,-1,0.0,-1,4155009.0,0.0,10.58,33.07,0.0,-1,13.85,1,463,1,463,0,0,0,463,0,0,0,0,0,0,0,4,-1,-1,-1,8,78,0,86,90.9090909090909,11.0,10.0,AREA 0,5,50,1,60,10.8,0.95,0.0,sky130_fd_sc_hd,0,3
0,/home/ma/ef/caravel_openframe/openlane/mprj_logic_high,mprj_logic_high,mprj_logic_high,flow_completed,0h1m20s,-1,120259.74025974025,0.0077,60129.87012987013,49.01,453.18,463,0,-1,-1,-1,-1,0,0,-1,0,0,-1,4376,1026,0.0,0.0,-1,0.0,-1,0.0,0.0,-1,0.0,-1,4155009.0,0.0,10.58,33.07,0.0,-1,13.85,1,463,1,463,0,0,0,463,0,0,0,0,0,0,0,4,-1,-1,-1,8,78,0,86,90.9090909090909,11.0,10.0,AREA 0,5,50,1,60,10.8,0.95,0.0,sky130_fd_sc_hd,0,3

1 design design_name config flow_status total_runtime routed_runtime (Cell/mm^2)/Core_Util DIEAREA_mm^2 CellPer_mm^2 OpenDP_Util Peak_Memory_Usage_MB cell_count tritonRoute_violations Short_violations MetSpc_violations OffGrid_violations MinHole_violations Other_violations Magic_violations antenna_violations lvs_total_errors cvc_total_errors klayout_violations wire_length vias wns pl_wns optimized_wns fastroute_wns spef_wns tns pl_tns optimized_tns fastroute_tns spef_tns HPWL routing_layer1_pct routing_layer2_pct routing_layer3_pct routing_layer4_pct routing_layer5_pct routing_layer6_pct wires_count wire_bits public_wires_count public_wire_bits memories_count memory_bits processes_count cells_pre_abc AND DFF NAND NOR OR XOR XNOR MUX inputs outputs level EndCaps TapCells Diodes Total_Physical_Cells suggested_clock_frequency suggested_clock_period CLOCK_PERIOD SYNTH_STRATEGY SYNTH_MAX_FANOUT FP_CORE_UTIL FP_ASPECT_RATIO FP_PDN_VPITCH FP_PDN_HPITCH PL_TARGET_DENSITY GLB_RT_ADJUSTMENT STD_CELL_LIBRARY CELL_PAD DIODE_INSERTION_STRATEGY
2 0 /project/openlane/mprj_logic_high /home/ma/ef/caravel_openframe/openlane/mprj_logic_high mprj_logic_high mprj_logic_high flow_completed 0h1m1s 0h1m20s -1 120259.74025974025 0.0077 60129.87012987013 49.01 453.23 453.18 463 0 -1 -1 -1 -1 0 0 -1 0 0 -1 4376 1026 0.0 0.0 -1 0.0 -1 0.0 0.0 -1 0.0 -1 4155009.0 0.0 10.58 33.07 0.0 -1 13.85 1 463 1 463 0 0 0 463 0 0 0 0 0 0 0 4 -1 -1 -1 8 78 0 86 90.9090909090909 11.0 10.0 AREA 0 5 50 1 60 10.8 0.95 0.0 sky130_fd_sc_hd 0 3

18583
spi/lvs/mgmt_protect.spice
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22608
verilog/gl/mgmt_protect.v
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