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Merge branch 'main' into fix_serial_loader_data_timing 

Merging latest changes from main branch into this fix.
This commit is contained in:
Tim Edwards 2022-09-02 10:02:36 -04:00
parent ac1928a45b 9949306c42
commit 1b4637dbb7
6 changed files with 71669 additions and 1578 deletions
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20
mag/caravan.mag
View File

@ -58900,6 +58900,16 @@ rect 460640 6598 473160 19088
rect 515440 6598 527960 19088
rect 570422 6811 582590 18975
rect 624222 6811 636390 18975
rect 621960 246802 629984 249230
rect 621948 250708 629990 253036
rect 621550 262640 629508 265144
rect 621514 266692 629472 269196
rect 590480 230750 595228 233134
rect 590522 234770 595540 236910
rect 621512 258708 630212 261250
rect 621598 254668 630298 257210
rect 621936 242776 630636 245318
rect 621794 238736 630494 241278
use caravan_logo caravan_logo_0
timestamp 1636751500
transform 1 0 255684 0 1 5594
@ -59327,6 +59337,16 @@ flabel metal5 s 6167 70054 19619 80934 0 FreeSans 25000 0 0 0 vccd
port 61 nsew signal bidirectional
flabel metal5 s 243266 6167 254146 19619 0 FreeSans 25000 0 0 0 vssd
port 62 nsew signal bidirectional
flabel metal5 s 621960 246802 629984 249230 0 FreeSans 16000 0 0 0 vccd1_core
flabel metal5 s 621948 250708 629990 253036 0 FreeSans 16000 0 0 0 vssd1_core
flabel metal5 s 621550 262640 629508 265144 0 FreeSans 16000 0 0 0 vdda1_core
flabel metal5 s 621514 266692 629472 269196 0 FreeSans 16000 0 0 0 vssa1_core
flabel metal5 s 590480 230750 595228 233134 0 FreeSans 16000 0 0 0 vccd_core
flabel metal5 s 590522 234770 595540 236910 0 FreeSans 16000 0 0 0 vssd_core
flabel metal5 s 621512 258708 630212 261250 0 FreeSans 16000 0 0 0 vssa2_core
flabel metal5 s 621598 254668 630298 257210 0 FreeSans 16000 0 0 0 vdda2_core
flabel metal5 s 621936 242776 630636 245318 0 FreeSans 16000 0 0 0 vssd2_core
flabel metal5 s 621794 238736 630494 241278 0 FreeSans 16000 0 0 0 vccd2_core
<< properties >>
string FIXED_BBOX 0 0 717600 1037600
<< end >>

20
mag/caravel.mag
View File

@ -73700,6 +73700,16 @@ rect 460640 6598 473160 19088
rect 515440 6598 527960 19088
rect 570422 6811 582590 18976
rect 624222 6811 636390 18976
rect 621960 246802 629984 249230
rect 621948 250708 629990 253036
rect 621550 262640 629508 265144
rect 621514 266692 629472 269196
rect 590480 230750 595228 233134
rect 590522 234770 595540 236910
rect 621512 258708 630212 261250
rect 621598 254668 630298 257210
rect 621936 242776 630636 245318
rect 621794 238736 630494 241278
use caravel_logo caravel_logo_0
timestamp 1638586901
transform 1 0 269006 0 1 5020
@ -74211,6 +74221,16 @@ flabel metal5 s 570422 6811 582590 18976 0 FreeSans 25000 0 0 0 vssio
port 61 nsew signal bidirectional
flabel metal5 s 334810 1018624 346978 1030789 0 FreeSans 25000 0 0 0 vssio_2
port 62 nsew signal bidirectional
flabel metal5 s 621960 246802 629984 249230 0 FreeSans 16000 0 0 0 vccd1_core
flabel metal5 s 621948 250708 629990 253036 0 FreeSans 16000 0 0 0 vssd1_core
flabel metal5 s 621550 262640 629508 265144 0 FreeSans 16000 0 0 0 vdda1_core
flabel metal5 s 621514 266692 629472 269196 0 FreeSans 16000 0 0 0 vssa1_core
flabel metal5 s 590480 230750 595228 233134 0 FreeSans 16000 0 0 0 vccd_core
flabel metal5 s 590522 234770 595540 236910 0 FreeSans 16000 0 0 0 vssd_core
flabel metal5 s 621512 258708 630212 261250 0 FreeSans 16000 0 0 0 vssa2_core
flabel metal5 s 621598 254668 630298 257210 0 FreeSans 16000 0 0 0 vdda2_core
flabel metal5 s 621936 242776 630636 245318 0 FreeSans 16000 0 0 0 vssd2_core
flabel metal5 s 621794 238736 630494 241278 0 FreeSans 16000 0 0 0 vccd2_core
<< properties >>
string FIXED_BBOX 0 0 717600 1037600
<< end >>

4
scripts/run_caravan_lvs.sh
View File

@ -13,6 +13,7 @@ crashbackups stop
load caravan
select top cell
expand
extract no all ;# <-- large speed-up
extract do local
extract all
ext2spice lvs
@ -24,6 +25,7 @@ export NETGEN_COLUMNS=60
netgen -batch lvs "caravan.spice caravan" "../verilog/gl/caravan.v caravan" \
$PDK_ROOT/$PDK/libs.tech/netgen/${PDK}_setup.tcl caravan_comp.out
mv caravan.spice ../spi/lvs/caravan_lvs.spice
# mv caravan.spice ../spi/lvs/caravan_lvs.spice
mv caravan.spice ../spi/lvs/caravan.spice
mv caravan_comp.out ../signoff/
exit 0

4
scripts/run_caravel_lvs.sh
View File

@ -12,6 +12,7 @@ crashbackups stop
load caravel
select top cell
expand
extract no all ;# <-- large speed-up
extract do local
extract all
ext2spice lvs
@ -23,6 +24,7 @@ export NETGEN_COLUMNS=60
netgen -batch lvs "caravel.spice caravel" "../verilog/gl/caravel.v caravel" \
$PDK_ROOT/$PDK/libs.tech/netgen/${PDK}_setup.tcl caravel_comp.out
mv caravel.spice ../spi/lvs/caravel_lvs.spice
# mv caravel.spice ../spi/lvs/caravel_lvs.spice
mv caravel.spice ../spi/lvs/caravel.spice
mv caravel_comp.out ../signoff/
exit 0

36774
spi/lvs/caravan.spice
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36425
spi/lvs/caravel.spice
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