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Correct user_id bit order in gl verilog and layout.

This commit is contained in:
D. Mitch Bailey 2023-12-05 16:05:25 -08:00
parent 05baf48756
commit 092ff66da0
1 changed files with 2 additions and 2 deletions
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4
scripts/set_user_id.py
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@ -132,7 +132,7 @@ if __name__ == '__main__':
# Convert to binary
try:
user_id_int = int('0x' + user_id_value, 0)
user_id_bits = '{0:032b}'.format(user_id_int)
user_id_bits = '{0:032b}'.format(user_id_int)[::-1]
except:
user_project_path = arguments[0]
@ -170,7 +170,7 @@ if __name__ == '__main__':
try:
user_id_int = int('0x' + user_id_value, 0)
user_id_bits = '{0:032b}'.format(user_id_int)
user_id_bits = '{0:032b}'.format(user_id_int)[::-1]
except:
print('Error: Cannot parse user ID "' + user_id_value + '" as an 8-digit hex number.')
sys.exit(1)