mirror of https://github.com/efabless/caravel.git
96 lines
2.6 KiB
ReStructuredText
96 lines
2.6 KiB
ReStructuredText
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.. raw:: html
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<!---
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# SPDX-FileCopyrightText: 2020 Efabless Corporation
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#
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# Licensed under the Apache License, Version 2.0 (the "License");
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# you may not use this file except in compliance with the License.
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# You may obtain a copy of the License at
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#
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# http://www.apache.org/licenses/LICENSE-2.0
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#
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# Unless required by applicable law or agreed to in writing, software
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# distributed under the License is distributed on an "AS IS" BASIS,
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# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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# See the License for the specific language governing permissions and
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# limitations under the License.
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#
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# SPDX-License-Identifier: Apache-2.0
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-->
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Supplementary figures
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=====================
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GPIO pads - management and user IO
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----------------------------------
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.. figure:: _static/gpio_pads.svg
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:name: gpio_pads_management_and_user_io
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:alt: GPIO pads - management and user IO
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:align: center
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GPIO pad structure - pads 0 (JTAG) and 1 (SDO)
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----------------------------------------------
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.. figure:: _static/single_gpio_pad_structure_used_for_pad_0_and_pad_1.svg
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:name: gpio_pad_structure_pads_0_and_1
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:alt: GPIO pad structure - pads 0 (JTAG) and 1 (SDO)
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:align: center
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GPIO pad structure - all pads except 0 and 1
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--------------------------------------------
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.. figure:: _static/single_gpio_pad_structure_used_all_pads_except_0_and_1.svg
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:name: gpio_pad_structure_all_pads_except_0_and_1
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:alt: GPIO pad structure - all pads except 0 and 1
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:align: center
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Die arrangement and pads
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------------------------
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.. figure:: _static/die_pads.svg
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:name: die_arrangement_and_pads
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:alt: Die arrangement and pads
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:align: center
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Die voltage clamp arrangement
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-----------------------------
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.. figure:: _static/voltage_clamp_arrangement.svg
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:name: voltage_clamp_arrangement
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:alt: Voltage clamp arrangement
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:align: center
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Die plot
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------------------------
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.. figure:: _static/caravel.png
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:name: caravel
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:alt: Die plot
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:align: center
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Die to WLCSP bond plan
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------------------------
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.. figure:: _static/bond_plan.svg
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:name: bond_plan
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:alt: Die to WLCSP bond plan
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:align: center
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Power domain splits
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-------------------
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.. figure:: _static/power_domain_splits.svg
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:name: power_domain_splits
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:alt: Power domain splits
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:align: center
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PCB example route pattern
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-------------------------
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.. figure:: _static/pcb_example_route_pattern.svg
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:name: pcb_example_route_pattern
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:alt: PCB example route pattern
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:align: center
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