mirror of https://github.com/efabless/caravel.git
393 lines
8.6 KiB
ReStructuredText
393 lines
8.6 KiB
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.. raw:: html
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<!---
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# SPDX-FileCopyrightText: 2020 Efabless Corporation
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#
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# Licensed under the Apache License, Version 2.0 (the "License");
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# you may not use this file except in compliance with the License.
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# You may obtain a copy of the License at
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#
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# http://www.apache.org/licenses/LICENSE-2.0
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#
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# Unless required by applicable law or agreed to in writing, software
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# distributed under the License is distributed on an "AS IS" BASIS,
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# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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# See the License for the specific language governing permissions and
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# limitations under the License.
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#
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# SPDX-License-Identifier: Apache-2.0
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-->
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Pinout description
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==================
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This section describes lists the pinout for the SoC, and provides the description for pins.
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.. todo::
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Verify `flash_io[1:0]`, `flash_csb`, `flash2_io[1:0]`, `flash2_csb` pins.
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There was inconsistency (Pinout vs Pin description) in source PDF.
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Ball assignment (6x10 WLCSP)
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----------------------------
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.. figure:: _static/package_as_viewed_from_the_bottom.svg
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:name: ball_assignment
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:width: 30%
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:align: center
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Ball assignment (6x10 WLCSP)
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Pinout (6x10 WLCSP)
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-------------------
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.. list-table:: Pinout
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:name: pinout
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:header-rows: 1
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:stub-columns: 1
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* -
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- F
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- E
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- D
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- C
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- B
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- A
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* - 1
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- :ref:`mprj_io[15] <mprj_io>`
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- :ref:`mprj_io[16] <mprj_io>`
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- :ref:`mprj_io[18] <mprj_io>`
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- :ref:`mprj_io[19] <mprj_io>`
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- :ref:`mprj_io[21] <mprj_io>`
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- :ref:`mprj_io[23] <mprj_io>`
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* - 2
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- :ref:`vccd1 <vccd1>`
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- :ref:`mprj_io[14] <mprj_io>`
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- :ref:`mprj_io[17] <mprj_io>`
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- :ref:`mprj_io[20] <mprj_io>`
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- :ref:`mprj_io[22] <mprj_io>`
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- :ref:`vccd2 <vccd2>`
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* - 3
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- :ref:`mprj_io[12] <mprj_io>`
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- :ref:`mprj_io[11] <mprj_io>`
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:ref:`flash2_io[1] <flash2_io>`
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- :ref:`mprj_io[13] <mprj_io>`
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- :ref:`mprj_io[24] <mprj_io>`
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- :ref:`vssa2 <vssa2>`
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- :ref:`mprj_io[25] <mprj_io>`
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* - 4
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- :ref:`mprj_io[10] <mprj_io>`
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:ref:`flash2_io[0] <flash2_io>`
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- :ref:`mprj_io[9] <mprj_io>`
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:ref:`flash2_sck <flash2_sck>`
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- :ref:`vdda1 <vdda1>`
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- :ref:`vddio <vddio>`
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- :ref:`mprj_io[26] <mprj_io>`
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- :ref:`mprj_io[27] <mprj_io>`
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* - 5
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- :ref:`mprj_io[8] <mprj_io>`
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:ref:`flash2_csb <flash2_csb>`
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- :ref:`mprj_io[7] <mprj_io>`
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:ref:`irq <irq>`
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- :ref:`vssio <vssio_vssa_vssd>`
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:ref:`vssa <vssio_vssa_vssd>`
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:ref:`vssd <vssio_vssa_vssd>`
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- :ref:`vssio <vssio_vssa_vssd>`
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:ref:`vssa <vssio_vssa_vssd>`
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:ref:`vssd <vssio_vssa_vssd>`
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- :ref:`mprj_io[28] <mprj_io>`
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- :ref:`mprj_io[29] <mprj_io>`
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* - 6
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- :ref:`vssd1 <vssd1>`
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- :ref:`vssa1 <vssa1>`
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- :ref:`vssio <vssio_vssa_vssd>`
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:ref:`vssa <vssio_vssa_vssd>`
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:ref:`vssd <vssio_vssa_vssd>`
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- :ref:`vssio <vssio_vssa_vssd>`
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:ref:`vssa <vssio_vssa_vssd>`
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:ref:`vssd <vssio_vssa_vssd>`
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- :ref:`mprj_io[30] <mprj_io>`
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- :ref:`mprj_io[31] <mprj_io>`
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* - 7
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- :ref:`mprj_io[6] <mprj_io>`
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:ref:`ser_tx <ser_tx>`
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- :ref:`mprj_io[5] <mprj_io>`
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:ref:`ser_rx <ser_rx>`
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- :ref:`mprj_io[0] <mprj_io>`
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:ref:`JTAG <jtag>`
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- :ref:`vdda2 <vdda2>`
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- :ref:`vssd2 <vssd2>`
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- :ref:`mprj_io[32] <mprj_io>`
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* - 8
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- :ref:`mprj_io[4] <mprj_io>`
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:ref:`SCK <sck>`
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- :ref:`mprj_io[3] <mprj_io>`
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:ref:`CSB <csb>`
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- :ref:`flash_clk <flash_clk>`
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- :ref:`mprj_io[33] <mprj_io>`
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- :ref:`mprj_io[34] <mprj_io>`
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- :ref:`mprj_io[35] <mprj_io>`
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* - 9
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- :ref:`mprj_io[2] <mprj_io>`
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:ref:`SDI <sdi>`
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- :ref:`mprj_io[1] <mprj_io>`
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:ref:`SDO <sdo>`
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- :ref:`flash_io[1] <flash_io>`
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- :ref:`clock <clock>`
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- :ref:`mprj_io[36] <mprj_io>`
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- :ref:`mprj_io[37] <mprj_io>`
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* - 10
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- :ref:`vdda <vdda>`
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- :ref:`gpio <gpio>`
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- :ref:`flash_io[0] <flash_io>`
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- :ref:`flash_csb <flash_csb>`
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- :ref:`resetb <resetb>`
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- :ref:`vccd <vccd>`
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Pin description (6x10 WLCSP)
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----------------------------
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.. list-table:: Pin description
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:name: pin-description
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:header-rows: 1
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* - Pin #
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- Name
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- Type
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- Summary description
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* - A9, B9, A8, B8, C8, A7, A6, B6, A5, B5, A4, B4, A3, C3, A1, B2, B1, C2, C1, D1, D2, E1, F1, E2, D3, F3, E3, F4, E4, F5, E5, F7, E7, F8, E8, F9, E9, D7
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- .. _mprj_io:
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``mprj_io[37:0]``
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- Digital I/O
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- General purpose configurable digital I/O with pullup/pulldown, input or output, enable/disable, analog output, high voltage output, slew rate control.
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Shared between the user project area and the management SoC.
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* - D8
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- .. _flash_clk:
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``flash_clk``
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- Digital out
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- Flash SPI clock
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* - C10
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- .. _flash_csb:
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``flash_csb``
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- Digital out
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- Flash SPI chip select
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* - D9, D10
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- .. _flash_io:
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``flash_io[1:0]``
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- Digital I/O
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- Flash SPI data input/output
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* - C9
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- .. _clock:
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``clock``
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- Digital in
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- External CMOS 3.3V clock source
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* - B10
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- .. _resetb:
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``resetb``
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- Digital in
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- SoC system reset (sense inverted)
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* - E9
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- .. _sdo:
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``SDO``
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- Digital out
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- Housekeeping serial interface data output
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* - F9
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- .. _sdi:
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``SDI``
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- Digital in
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- Housekeeping serial interface data input
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* - E8
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- .. _csb:
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``CSB``
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- Digital in
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- Housekeeping serial interface chip select
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* - F8
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- .. _sck:
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``SCK``
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- Digital in
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- Housekeeping serial interface clock
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* - F7
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- .. _ser_tx:
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``ser_tx``
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- Digital out
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- UART transmit channel
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* - E7
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- .. _ser_rx:
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``ser_rx``
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- Digital in
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- UART receive channel
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* - E5
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- .. _irq:
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``irq``
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- Digital in
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- External interrupt
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* - E10
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- .. _gpio:
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``gpio``
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- Digital I/O
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- Management GPIO/user power enable
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* - D7
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- .. _jtag:
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``JTAG``
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- Digital I/O
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- JTAG system access
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* - F5
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- .. _flash2_csb:
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``flash2_csb``
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- Digital out
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- User area QSPI flash enable (sense inverted)
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* - E4
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- .. _flash2_sck:
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``flash2_sck``
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- Digital out
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- User area QSPI flash clock
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* - E3, F4
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- .. _flash2_io:
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``flash2_io[1:0]``
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- Digital I/O
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- User area QSPI flash data
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* - F9
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- .. _spi_sdo:
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``spi_sdo``
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- Digital out
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- Serial interface controller data output
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* - F8
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- .. _spi_sck:
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``spi_sck``
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- Digital out
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- Serial interface controller clock
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* - E8
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- .. _spi_csb:
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``spi_csb``
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- Digital out
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- Serial interface controller chip select
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* - E9
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- .. _spi_sdi:
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``spi_sdi``
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- Digital in
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- Serial interface controller data input
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* - C4
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- .. _vddio:
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``vddio``
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- 3.3V Power
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- ESD and padframe power supply
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* - F10
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- .. _vdda:
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``vdda``
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- 3.3V Power
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- Management area power supply
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* - A10
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- .. _vccd:
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``vccd``
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- 1.8V Power
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- Management area digital power supply
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* - C5, C6, D5, D7
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- .. _vssio_vssa_vssd:
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``vssio``/``vssa``/``vssd``
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- Ground
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- ESD, padframe, and management area ground
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* - D4
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- .. _vdda1:
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``vdda1``
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- 3.3V Power
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- User area 1 power supply
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* - F2
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- .. _vccd1:
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``vccd1``
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- 1.8V Power
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- User area 1 digital power supply
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* - E6
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- .. _vssa1:
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``vssa1``
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- Ground
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- User area 1 ground
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* - F6
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- .. _vssd1:
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``vssd1``
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- Ground
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- User area 1 digital ground
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* - C7
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- .. _vdda2:
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``vdda2``
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- 3.3V Power
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- User area 2 power supply
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* - A2
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- .. _vccd2:
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``vccd2``
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- 1.8V Power
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- User area 2 digital power supply
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* - B3
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- .. _vssa2:
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``vssa2``
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- Ground
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- User area 2 ground
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* - B7
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- .. _vssd2:
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``vssd2``
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- Ground
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- User area 2 digital ground
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.. list-table:: Package physical measurements
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:name: wlcsp-physical-measurements
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* - Standard package
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- WLCSP (bump bond)
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* - Package size
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- 3.2 mm x 5.3 mm
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* - Bump pitch
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- 0.5 mm
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