mirror of https://github.com/efabless/caravel.git
48 lines
2.1 KiB
Coq
48 lines
2.1 KiB
Coq
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// SPDX-FileCopyrightText: 2020 Efabless Corporation
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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// SPDX-License-Identifier: Apache-2.0
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`default_nettype none
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/*
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*-------------------------------------------------------------
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*
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* user_project_la_example
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*
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* This is a user project for testing the la only
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*
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*-------------------------------------------------------------
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*/
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module user_project_la_example (
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// Logic Analyzer Signals
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input [127:0] la_data_in,
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output [127:0] la_data_out,
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input [127:0] la_oenb
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);
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// LA
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assign la_data_out[63:32] = la_oenb[31:0] ? 32'hz: la_data_in[31:0] ; // assign la0 to la1 if la0 output enable
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assign la_data_out[31:0] = la_oenb[63:32] ? 32'hz: la_data_in[63:32] ; // assign la1 to la0 if la1 output enable
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assign la_data_out[127:96] = la_oenb[95:64] ? 32'hz: la_data_in[95:64] ; // assign la2 to la3 if la2 output enable
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assign la_data_out[95:64] = la_oenb[127:96] ? 32'hz: la_data_in[127:96] ; // assign la3 to la2 if la3 output enable
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// // LA
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// assign la_data_out[63:32] = la_oenb[31:0] ? la_data_in[31:0] : 32'hz ; // assign la0 to la1 if la0 output enable
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// assign la_data_out[31:0] = la_oenb[63:32] ? la_data_in[63:32] : 32'hz ; // assign la1 to la0 if la1 output enable
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// assign la_data_out[127:96] = la_oenb[95:64] ? la_data_in[95:64] : 32'hz ; // assign la2 to la3 if la2 output enable
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// assign la_data_out[95:64] = la_oenb[127:96] ? la_data_in[127:96] : 32'hz ; // assign la3 to la2 if la3 output enable
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endmodule
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`default_nettype wire
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