2022-10-25 09:45:30 -05:00
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### Caravan Signoff SDC
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2022-10-30 10:16:52 -05:00
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### Rev 2
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### Date: 28/10/2022
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2022-10-25 09:45:30 -05:00
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## MASTER CLOCKS
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create_clock -name clk -period 25 [get_ports {clock}]
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create_clock -name hkspi_clk -period 100 [get_pins {housekeeping/mgmt_gpio_in[4]} ]
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create_clock -name hk_serial_clk -period 50 [get_pins {housekeeping/serial_clock}]
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create_clock -name hk_serial_load -period 1000 [get_pins {housekeeping/serial_load}]
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# hk_serial_clk period is x2 core clock
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2022-10-30 10:16:52 -05:00
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set_clock_uncertainty 0.1000 [get_clocks {clk hkspi_clk hk_serial_clk hk_serial_load}]
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2022-10-25 09:45:30 -05:00
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set_clock_groups \
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-name clock_group \
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-logically_exclusive \
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-group [get_clocks {clk}]\
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-group [get_clocks {hk_serial_clk}]\
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-group [get_clocks {hk_serial_load}]\
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-group [get_clocks {hkspi_clk}]
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# clock <-> hk_serial_clk/load no paths
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# future note: CDC stuff
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# clock <-> hkspi_clk no paths with careful methods (clock is off)
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set_propagated_clock [get_clocks {clk}]
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set_propagated_clock [get_clocks {hk_serial_clk}]
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set_propagated_clock [get_clocks {hk_serial_load}]
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set_propagated_clock [get_clocks {hkspi_clk}]
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## INPUT/OUTPUT DELAYS
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set input_delay_value 4
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set output_delay_value 4
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puts "\[INFO\]: Setting output delay to: $output_delay_value"
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puts "\[INFO\]: Setting input delay to: $input_delay_value"
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set_input_delay $input_delay_value -clock [get_clocks {clk}] -add_delay [get_ports {gpio}]
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set_input_delay $input_delay_value -clock [get_clocks {clk}] -add_delay [get_ports {mprj_io[0]}]
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#set_input_delay $input_delay_value -clock [get_clocks {clk}] -add_delay [get_ports {mprj_io[1]}]
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set_input_delay $input_delay_value -clock [get_clocks {hkspi_clk}] -add_delay [get_ports {mprj_io[2]}]
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set_input_delay $input_delay_value -clock [get_clocks {hkspi_clk}] -add_delay [get_ports {mprj_io[3]}]
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#set_input_delay $input_delay_value -clock [get_clocks {clk}] -add_delay [get_ports {mprj_io[4]}]
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set_input_delay $input_delay_value -clock [get_clocks {clk}] -add_delay [get_ports {mprj_io[5]}]
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set_input_delay $input_delay_value -clock [get_clocks {clk}] -add_delay [get_ports {mprj_io[6]}]
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set_input_delay $input_delay_value -clock [get_clocks {clk}] -add_delay [get_ports {mprj_io[7]}]
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set_input_delay $input_delay_value -clock [get_clocks {clk}] -add_delay [get_ports {mprj_io[8]}]
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set_input_delay $input_delay_value -clock [get_clocks {clk}] -add_delay [get_ports {mprj_io[9]}]
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set_input_delay $input_delay_value -clock [get_clocks {clk}] -add_delay [get_ports {mprj_io[10]}]
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set_input_delay $input_delay_value -clock [get_clocks {clk}] -add_delay [get_ports {mprj_io[11]}]
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set_input_delay $input_delay_value -clock [get_clocks {clk}] -add_delay [get_ports {mprj_io[12]}]
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set_input_delay $input_delay_value -clock [get_clocks {clk}] -add_delay [get_ports {mprj_io[13]}]
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set_input_delay $input_delay_value -clock [get_clocks {clk}] -add_delay [get_ports {mprj_io[14]}]
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set_input_delay $input_delay_value -clock [get_clocks {clk}] -add_delay [get_ports {mprj_io[15]}]
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set_input_delay $input_delay_value -clock [get_clocks {clk}] -add_delay [get_ports {mprj_io[16]}]
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set_input_delay $input_delay_value -clock [get_clocks {clk}] -add_delay [get_ports {mprj_io[17]}]
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set_input_delay $input_delay_value -clock [get_clocks {clk}] -add_delay [get_ports {mprj_io[18]}]
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set_input_delay $input_delay_value -clock [get_clocks {clk}] -add_delay [get_ports {mprj_io[19]}]
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set_input_delay $input_delay_value -clock [get_clocks {clk}] -add_delay [get_ports {mprj_io[20]}]
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set_input_delay $input_delay_value -clock [get_clocks {clk}] -add_delay [get_ports {mprj_io[21]}]
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set_input_delay $input_delay_value -clock [get_clocks {clk}] -add_delay [get_ports {mprj_io[22]}]
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set_input_delay $input_delay_value -clock [get_clocks {clk}] -add_delay [get_ports {mprj_io[23]}]
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set_input_delay $input_delay_value -clock [get_clocks {clk}] -add_delay [get_ports {mprj_io[24]}]
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set_input_delay $input_delay_value -clock [get_clocks {clk}] -add_delay [get_ports {mprj_io[25]}]
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set_input_delay $input_delay_value -clock [get_clocks {clk}] -add_delay [get_ports {mprj_io[26]}]
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set_input_delay $input_delay_value -clock [get_clocks {clk}] -add_delay [get_ports {mprj_io[27]}]
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set_input_delay $input_delay_value -clock [get_clocks {clk}] -add_delay [get_ports {mprj_io[28]}]
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set_input_delay $input_delay_value -clock [get_clocks {clk}] -add_delay [get_ports {mprj_io[29]}]
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set_input_delay $input_delay_value -clock [get_clocks {clk}] -add_delay [get_ports {mprj_io[30]}]
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set_input_delay $input_delay_value -clock [get_clocks {clk}] -add_delay [get_ports {mprj_io[31]}]
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set_input_delay $input_delay_value -clock [get_clocks {clk}] -add_delay [get_ports {mprj_io[32]}]
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set_input_delay $input_delay_value -clock [get_clocks {clk}] -add_delay [get_ports {mprj_io[33]}]
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set_input_delay $input_delay_value -clock [get_clocks {clk}] -add_delay [get_ports {mprj_io[34]}]
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set_input_delay $input_delay_value -clock [get_clocks {clk}] -add_delay [get_ports {mprj_io[35]}]
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set_input_delay $input_delay_value -clock [get_clocks {clk}] -add_delay [get_ports {mprj_io[36]}]
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set_input_delay $input_delay_value -clock [get_clocks {clk}] -add_delay [get_ports {mprj_io[37]}]
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set_output_delay $output_delay_value -clock [get_clocks {clk}] -add_delay [get_ports {flash_csb}]
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set_output_delay $output_delay_value -clock [get_clocks {clk}] -add_delay [get_ports {flash_clk}]
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set_output_delay $output_delay_value -clock [get_clocks {clk}] -add_delay [get_ports {flash_io0}]
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set_output_delay $output_delay_value -clock [get_clocks {clk}] -add_delay [get_ports {flash_io1}]
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# set_output_delay $output_delay_value -clock [get_clocks {hkspi_clk}] -add_delay [get_ports {mprj_io[1]}]
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set_max_fanout 12 [current_design]
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# synthesis max fanout should be less than 12 (7 maybe)
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## Set system monitoring mux select to zero so that the clock/user_clk monitoring is disabled
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set_case_analysis 0 [get_pins housekeeping/_3936_/S]
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set_case_analysis 0 [get_pins housekeeping/_3937_/S]
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2022-10-30 10:16:52 -05:00
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# Add case analysis for pads DM[2]==1'b1 & DM[1]==1'b1 & DM[0]==1'b0 to be outputs
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2022-10-25 09:45:30 -05:00
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2022-10-30 10:16:52 -05:00
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set_case_analysis 1 [get_pins padframe/*_pad*/DM[2]]
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set_case_analysis 1 [get_pins padframe/*_pad*/DM[1]]
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set_case_analysis 0 [get_pins padframe/*_pad*/DM[0]]
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set_case_analysis 0 [get_pins padframe/*_pad*/SLOW]
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set_case_analysis 0 [get_pins padframe/*_pad*/ANALOG_EN]
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2022-10-25 09:45:30 -05:00
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2022-10-30 10:16:52 -05:00
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# the following pads are set as inputs
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2022-10-25 09:45:30 -05:00
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set_case_analysis 0 [get_pins padframe/*area1_io_pad[4]/DM[2]]
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set_case_analysis 0 [get_pins padframe/*area1_io_pad[4]/DM[1]]
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set_case_analysis 1 [get_pins padframe/*area1_io_pad[4]/DM[0]]
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set_case_analysis 0 [get_pins padframe/*area1_io_pad[2]/DM[2]]
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set_case_analysis 0 [get_pins padframe/*area1_io_pad[2]/DM[1]]
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set_case_analysis 1 [get_pins padframe/*area1_io_pad[2]/DM[0]]
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set_case_analysis 0 [get_pins padframe/clock_pad/DM[2]]
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set_case_analysis 0 [get_pins padframe/clock_pad/DM[1]]
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set_case_analysis 1 [get_pins padframe/clock_pad/DM[0]]
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## FALSE PATHS (ASYNCHRONOUS INPUTS)
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set_false_path -from [get_ports {resetb}]
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2022-10-30 10:16:52 -05:00
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# set_false_path -from [get_ports mprj_io[*]] -through [get_pins housekeeping/mgmt_gpio_in[*]]
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# reset_path -from [get_ports mprj_io[4]]
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# reset_path -from [get_ports mprj_io[2]]
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#reset_path is not supported in PT read_sdc ^
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2022-10-25 09:45:30 -05:00
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set_false_path -from [get_ports mprj_io[0]] -through [get_pins housekeeping/mgmt_gpio_in[0]]
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set_false_path -from [get_ports mprj_io[1]] -through [get_pins housekeeping/mgmt_gpio_in[1]]
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set_false_path -from [get_ports mprj_io[3]] -through [get_pins housekeeping/mgmt_gpio_in[3]]
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set_false_path -from [get_ports mprj_io[5]] -through [get_pins housekeeping/mgmt_gpio_in[5]]
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set_false_path -from [get_ports mprj_io[6]] -through [get_pins housekeeping/mgmt_gpio_in[6]]
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set_false_path -from [get_ports mprj_io[7]] -through [get_pins housekeeping/mgmt_gpio_in[7]]
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set_false_path -from [get_ports mprj_io[8]] -through [get_pins housekeeping/mgmt_gpio_in[8]]
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set_false_path -from [get_ports mprj_io[9]] -through [get_pins housekeeping/mgmt_gpio_in[9]]
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set_false_path -from [get_ports mprj_io[10]] -through [get_pins housekeeping/mgmt_gpio_in[10]]
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set_false_path -from [get_ports mprj_io[11]] -through [get_pins housekeeping/mgmt_gpio_in[11]]
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set_false_path -from [get_ports mprj_io[12]] -through [get_pins housekeeping/mgmt_gpio_in[12]]
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set_false_path -from [get_ports mprj_io[13]] -through [get_pins housekeeping/mgmt_gpio_in[13]]
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set_false_path -from [get_ports mprj_io[14]] -through [get_pins housekeeping/mgmt_gpio_in[14]]
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set_false_path -from [get_ports mprj_io[15]] -through [get_pins housekeeping/mgmt_gpio_in[15]]
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set_false_path -from [get_ports mprj_io[16]] -through [get_pins housekeeping/mgmt_gpio_in[16]]
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set_false_path -from [get_ports mprj_io[17]] -through [get_pins housekeeping/mgmt_gpio_in[17]]
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set_false_path -from [get_ports mprj_io[18]] -through [get_pins housekeeping/mgmt_gpio_in[18]]
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set_false_path -from [get_ports mprj_io[19]] -through [get_pins housekeeping/mgmt_gpio_in[19]]
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set_false_path -from [get_ports mprj_io[20]] -through [get_pins housekeeping/mgmt_gpio_in[20]]
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set_false_path -from [get_ports mprj_io[21]] -through [get_pins housekeeping/mgmt_gpio_in[21]]
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set_false_path -from [get_ports mprj_io[22]] -through [get_pins housekeeping/mgmt_gpio_in[22]]
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set_false_path -from [get_ports mprj_io[23]] -through [get_pins housekeeping/mgmt_gpio_in[23]]
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set_false_path -from [get_ports mprj_io[24]] -through [get_pins housekeeping/mgmt_gpio_in[24]]
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set_false_path -from [get_ports mprj_io[25]] -through [get_pins housekeeping/mgmt_gpio_in[25]]
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set_false_path -from [get_ports mprj_io[26]] -through [get_pins housekeeping/mgmt_gpio_in[26]]
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set_false_path -from [get_ports mprj_io[27]] -through [get_pins housekeeping/mgmt_gpio_in[27]]
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set_false_path -from [get_ports mprj_io[28]] -through [get_pins housekeeping/mgmt_gpio_in[28]]
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set_false_path -from [get_ports mprj_io[29]] -through [get_pins housekeeping/mgmt_gpio_in[29]]
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set_false_path -from [get_ports mprj_io[30]] -through [get_pins housekeeping/mgmt_gpio_in[30]]
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set_false_path -from [get_ports mprj_io[31]] -through [get_pins housekeeping/mgmt_gpio_in[31]]
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set_false_path -from [get_ports mprj_io[32]] -through [get_pins housekeeping/mgmt_gpio_in[32]]
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set_false_path -from [get_ports mprj_io[33]] -through [get_pins housekeeping/mgmt_gpio_in[33]]
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set_false_path -from [get_ports mprj_io[34]] -through [get_pins housekeeping/mgmt_gpio_in[34]]
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set_false_path -from [get_ports mprj_io[35]] -through [get_pins housekeeping/mgmt_gpio_in[35]]
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set_false_path -from [get_ports mprj_io[36]] -through [get_pins housekeeping/mgmt_gpio_in[36]]
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set_false_path -from [get_ports mprj_io[37]] -through [get_pins housekeeping/mgmt_gpio_in[37]]
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set_false_path -from [get_ports mprj_io[*]] -through [get_pins housekeeping/mgmt_gpio_out[*]]
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set_false_path -from [get_ports mprj_io[*]] -through [get_pins housekeeping/mgmt_gpio_oeb[*]]
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set_false_path -from [get_ports gpio]
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2022-10-30 10:16:52 -05:00
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# add loads for output ports (pads)
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set min_cap 5
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set max_cap 10
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puts "\[INFO\]: Cap load range: $min_cap : $max_cap"
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# set_load 10 [all_outputs]
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set_load -min $min_cap [all_outputs]
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set_load -max $max_cap [all_outputs]
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#add input transition for the inputs ports (pads)
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# set_input_transition 2 [all_inputs]
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#add exception for power pads as 2ns on them results in max_tran violations (false viol)
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# set_input_transition 2 [remove_from_collection [all_inputs] [get_ports v*]]
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# remove_from_collection is not supported in PT read_sdc ^
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# set_input_transition 2 [all_inputs]
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# set_input_transition 0 [get_ports v*]
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set min_in_tran 1
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set max_in_tran 4
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puts "\[INFO\]: Input transition range: $min_in_tran : $max_in_tran"
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set_input_transition -min $min_in_tran [all_inputs]
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set_input_transition -min 0 [get_ports v*]
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set_input_transition -max $max_in_tran [all_inputs]
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set_input_transition -max 0 [get_ports v*]
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# check ocv table (not provided) -- maybe try 8%
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set derate 0.0375
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puts "\[INFO\]: Setting derate factor to: [expr $derate * 100] %"
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set_timing_derate -early [expr 1-$derate]
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set_timing_derate -late [expr 1+$derate]
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# add max_tran constraint as the default max_tran of the ss hd SCL is 10 so the violations are not caught in ss corners
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# apply the constraint to hd cells at the ss corner only
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# if {$::env(PROC_CORNER) == "s"} {
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# set max_tran 1.5
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# set_max_transition $max_tran [get_pins -of_objects [get_cells -filter {ref_name=~sky130_fd_sc_hd*}]]
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# set_max_transition $max_tran [get_pins -of_objects [get_cells */* -filter {ref_name=~sky130_fd_sc_hd*}]]
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# set_max_transition $max_tran [get_pins -of_objects [get_cells */*/* -filter {ref_name=~sky130_fd_sc_hd*}]]
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# puts "\[INFO\]: Setting maximum transition of HD cells in slow process corner to: $max_tran"
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# }
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# -filter not supported in PT read_sdc ^
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