- MIPS R3000
This commit is contained in:
Ludovic Jacomme
parent
eb9cdca50d
commit
d840190012
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@ -0,0 +1,9 @@
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mips_dec C
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mips_seqo C
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mips_sts C
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timer C
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rome C
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romr C
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romu C
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roms C
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sr64_1a C
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@ -0,0 +1,10 @@
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mips_dec C
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mips_seqo C
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mips_sts C
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mips_dpt C
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timer C
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rome C
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romr C
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romu C
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roms C
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sr64_1a C
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@ -0,0 +1,9 @@
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mips_dec C
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mips_seqo C
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mips_sts C
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timer C
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rome C
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romr C
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romu C
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roms C
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sr64_1a C
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@ -0,0 +1,9 @@
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mips_dec C
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mips_sts C
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mips_dpt C
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timer C
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rome C
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romr C
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romu C
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roms C
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sr64_1a C
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@ -0,0 +1,8 @@
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mips_dec C
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mips_dpt C
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timer C
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rome C
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romr C
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romu C
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roms C
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sr64_1a C
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@ -0,0 +1,7 @@
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mips_dec C
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timer C
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rome C
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romr C
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romu C
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roms C
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sr64_1a C
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@ -0,0 +1,9 @@
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mips_dec C
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mips_seqo C
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mips_dpt C
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timer C
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rome C
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romr C
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romu C
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roms C
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sr64_1a C
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@ -0,0 +1,290 @@
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# Pierre Nguyen Tuong
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# 19 octobre 1999
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# Makefile pour l'automate ; verification de l'alu
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#
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# Derniere modification : 19 octobre 1999
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# Version : 1.0
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#
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tests : alu
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alu : add0 add1 add2 add3 add4 add5 addu0 addu1 addu2 addu3 \
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and0 and1 lhi0 lhi1 nor0 or0 or1 or2 reg0 sle0 \
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sle1 sle2 sle3 sle4 sle5 sle6 sle7 sll0 sll1 sra0 \
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sra1 srl0 srl1 sub0 sub1 xor0 xor1 xor2
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add0 :
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@echo "**********************************************************************" >> res_test ; \
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./go-bench.sh add000 > tmp_test ; \
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cat tmp_test ; \
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cat tmp_test >> res_test ; \
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echo "Test de add et de addi" ; \
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echo "Test de add et de addi" >> res_test
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add1 :
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@./go-bench.sh add001 > tmp_test ; \
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cat tmp_test ; \
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cat tmp_test >> res_test ; \
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echo "Test de add et de addi (bis)" ; \
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echo "Test de add et de addi (bis)" >> res_test
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add2 :
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@./go-bench.sh add002 > tmp_test ; \
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cat tmp_test ; \
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cat tmp_test >> res_test ; \
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echo "Test de add et de addi (bis bis)" ; \
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echo "Test de add et de addi (bis bis)" >> res_test
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add3 :
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@./go-bench.sh add003 > tmp_test ; \
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cat tmp_test ; \
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cat tmp_test >> res_test ; \
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echo "Test de add et de addi bis bis bis" ; \
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echo "Test de add et de addi bis bis bis" >> res_test
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add4 :
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@./go-bench.sh add004 > tmp_test ; \
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cat tmp_test ; \
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cat tmp_test >> res_test ; \
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echo "Test de sub, loadi, addi" ; \
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echo "Test de sub, loadi, addi" >> res_test
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add5 :
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@./go-bench.sh add005 > tmp_test ; \
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cat tmp_test ; \
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cat tmp_test >> res_test ; \
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echo "Test de addi, initialisation des registres avec leurs propres numeros" ; \
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echo "Test de addi, initialisation des registres avec leurs propres numeros" >> res_test
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addu0 :
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@./go-bench.sh addu000 > tmp_test ; \
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cat tmp_test ; \
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cat tmp_test >> res_test ; \
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echo "Test de addui " ; \
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echo "Test de addui " >> res_test
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addu1 :
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@./go-bench.sh addu001 > tmp_test ; \
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cat tmp_test ; \
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cat tmp_test >> res_test ; \
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echo "Test de addui " ; \
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echo "Test de addui " >> res_test
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addu2 :
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@./go-bench.sh addu002 > tmp_test ; \
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cat tmp_test ; \
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cat tmp_test >> res_test ; \
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echo "Test de addui, addu" ; \
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echo "Test de addui, addu" >> res_test
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addu3 :
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@./go-bench.sh addu003 > tmp_test ; \
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cat tmp_test ; \
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cat tmp_test >> res_test ; \
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echo "Test de addui, addu" ; \
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echo "Test de addui, addu" >> res_test
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and0 :
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@./go-bench.sh and000 > tmp_test ; \
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cat tmp_test ; \
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cat tmp_test >> res_test ; \
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echo "Test de addui, seqi, and " ; \
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echo "Test de addui, seqi, and " >> res_test
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and1 :
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@./go-bench.sh and001 > tmp_test ; \
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cat tmp_test ; \
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cat tmp_test >> res_test ; \
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echo "Test de addui, loadi, andi " ; \
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echo "Test de addui, loadi, andi " >> res_test
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lhi0 :
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@./go-bench.sh lhi000 > tmp_test ; \
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cat tmp_test ; \
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cat tmp_test >> res_test ; \
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echo "Test de addui, lui, sll" ; \
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echo "Test de addui, lui, sll" >> res_test
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lhi1 :
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@./go-bench.sh lhi001 > tmp_test ; \
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cat tmp_test ; \
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cat tmp_test >> res_test ; \
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echo "Test de addui, lui, sll " ; \
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echo "Test de addui, lui, sll " >> res_test
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nor0 :
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@./go-bench.sh nor000 > tmp_test ; \
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cat tmp_test ; \
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cat tmp_test >> res_test ; \
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echo "Test de loadi, nor " ; \
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echo "Test de loadi, nor " >> res_test
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or0 :
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@./go-bench.sh or000 > tmp_test ; \
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cat tmp_test ; \
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cat tmp_test >> res_test ; \
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echo "Test de loadi, or " ; \
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echo "Test de loadi, or " >> res_test
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or1 :
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@./go-bench.sh or001 > tmp_test ; \
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cat tmp_test ; \
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cat tmp_test >> res_test ; \
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echo "Test de loadi, or " ; \
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echo "Test de loadi, or " >> res_test
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or2 :
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@./go-bench.sh or002 > tmp_test ; \
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cat tmp_test ; \
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cat tmp_test >> res_test ; \
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echo "Test de loadi, ori, addui " ; \
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echo "Test de loadi, ori, addui " >> res_test
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reg0 :
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@./go-bench.sh or002 > tmp_test ; \
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cat tmp_test ; \
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cat tmp_test >> res_test ; \
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echo "Test de l'addition signee" ; \
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echo "Test de l'addition signee" >> res_test
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sle0:
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@./go-bench.sh sle000 > tmp_test ; \
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cat tmp_test ; \
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cat tmp_test >> res_test ; \
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echo "Test de slt " ; \
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echo "Test de slt " >> res_test
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sle1:
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@./go-bench.sh sle000 > tmp_test ; \
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cat tmp_test ; \
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cat tmp_test >> res_test ; \
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echo "Test de slt bis" ; \
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echo "Test de slt bis" >> res_test
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sle2:
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@./go-bench.sh sle000 > tmp_test ; \
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cat tmp_test ; \
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cat tmp_test >> res_test ; \
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echo "Test de loadi, addui, slt " ; \
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echo "Test de loadi, addui, slt " >> res_test
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sle3:
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@./go-bench.sh sle000 > tmp_test ; \
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cat tmp_test ; \
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cat tmp_test >> res_test ; \
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echo "Test de loadi, addui, slti " ; \
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echo "Test de loadi, addui, slti " >> res_test
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sle4:
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@./go-bench.sh sle000 > tmp_test ; \
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cat tmp_test ; \
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cat tmp_test >> res_test ; \
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echo "Test de loadi, addui, slt " ; \
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echo "Test de loadi, addui, slt " >> res_test
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sle5:
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@./go-bench.sh sle000 > tmp_test ; \
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cat tmp_test ; \
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cat tmp_test >> res_test ; \
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echo "Test de loadi, addui, slti " ; \
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echo "Test de loadi, addui, slti " >> res_test
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sle6:
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@./go-bench.sh sle000 > tmp_test ; \
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cat tmp_test ; \
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cat tmp_test >> res_test ; \
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echo "Test de loadi, addui, sltu " ; \
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echo "Test de loadi, addui, sltu " >> res_test
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sle7:
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@./go-bench.sh sle000 > tmp_test ; \
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cat tmp_test ; \
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cat tmp_test >> res_test ; \
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echo "Test de loadi, addui, sltu" ; \
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echo "Test de loadi, addui, sltu" >> res_test
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sll0:
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@./go-bench.sh sll000 > tmp_test ; \
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cat tmp_test ; \
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cat tmp_test >> res_test ; \
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echo "Test de addui, sllv " ; \
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echo "Test de addui, sllv " >> res_test
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sll1:
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@./go-bench.sh sll001 > tmp_test ; \
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cat tmp_test ; \
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cat tmp_test >> res_test ; \
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echo "Test de addui, loadi,sll " ; \
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echo "Test de addui, loadi,sll " >> res_test
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sra0:
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@./go-bench.sh sra000 > tmp_test ; \
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cat tmp_test ; \
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cat tmp_test >> res_test ; \
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echo "Test de addui, srav " ; \
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echo "Test de addui, srav " >> res_test
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sra1:
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@./go-bench.sh sra001 > tmp_test ; \
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cat tmp_test ; \
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cat tmp_test >> res_test ; \
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echo "Test de addui, sra " ; \
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echo "Test de addui, sra " >> res_test
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srl0:
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@./go-bench.sh srl000 > tmp_test ; \
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cat tmp_test ; \
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cat tmp_test >> res_test ; \
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echo "Test de addui, srlv" ; \
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echo "Test de addui, srlv" >> res_test
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srl1:
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@./go-bench.sh srl001 > tmp_test ; \
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cat tmp_test ; \
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cat tmp_test >> res_test ; \
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echo "Test de addui, srl " ; \
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echo "Test de addui, srl " >> res_test
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sub0:
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@./go-bench.sh sub000 > tmp_test ; \
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cat tmp_test ; \
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cat tmp_test >> res_test ; \
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echo "Test de addi, sub " ; \
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echo "Test de addi, sub " >> res_test
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sub1:
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@./go-bench.sh sub001 > tmp_test ; \
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cat tmp_test ; \
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cat tmp_test >> res_test ; \
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echo "Test de loadi, subu " ; \
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echo "Test de loadi, subu " >> res_test
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xor0:
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@./go-bench.sh xor000 > tmp_test ; \
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cat tmp_test ; \
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cat tmp_test >> res_test ; \
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echo "Test de loadi, xor " ; \
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echo "Test de loadi, xor " >> res_test
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xor1:
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@./go-bench.sh xor001 > tmp_test ; \
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cat tmp_test ; \
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cat tmp_test >> res_test ; \
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echo "Test de loadi, xor " ; \
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echo "Test de loadi, xor " >> res_test
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xor2:
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@./go-bench.sh xor002 > tmp_test ; \
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cat tmp_test ; \
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cat tmp_test >> res_test ; \
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echo "Test de slti, xori " ; \
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echo "Test de slti, xori " >> res_test
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@ -0,0 +1,391 @@
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# Pierre Nguyen Tuong
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# 19 octobre 1999
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# Makefile pour l'automate
|
||||
#
|
||||
# Derniere modification : 19 octobre 1999
|
||||
# Version : 1.0
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||||
#
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tests : bm
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bm : beq0 beq1 bgez0 bgez1 bgezal bgtz blez bltz bltzal bne0 bne1 \
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lhi0 lhi1 jal0 jal1 jalr0 jalr1 lsb0 lsb1 lsb2 lsb3 lsb4 lsb5 lsb6 lsb7 \
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lsbu0 lsbu1 lsbu2 lsbu3 lsh0 lsh1 lsh2 lsh3 lshu0 lshu1 lsw0 lsw1 sltu0 \
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sltu1 sltu2 sltu3 sltu4 sltiu0 sltiu1 sltiu2 sltiu3 sltiu4
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beq0 :
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@echo "**************************************************************************" >> res_test ; \
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./go-bench.sh beq000 > tmp_test ; \
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cat tmp_test ; \
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cat tmp_test >> res_test ; \
|
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echo "Test de beq 0" >> res_test ; \
|
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echo "Test de beq 0"
|
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|
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beq1 :
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@./go-bench.sh beq001 > tmp_test ; \
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cat tmp_test ; \
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cat tmp_test >> res_test ; \
|
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echo "Test de beq 1" >> res_test ; \
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echo "Test de beq 1"
|
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bgez0 :
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@./go-bench.sh bgez000 > tmp_test ; \
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cat tmp_test ; \
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cat tmp_test >> res_test ; \
|
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echo "Test de bgez0" >> res_test ; \
|
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echo "Test de bgez0"
|
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|
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|
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bgez1 :
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@./go-bench.sh bgez001 > tmp_test ; \
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cat tmp_test ; \
|
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cat tmp_test >> res_test ; \
|
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echo "Test de bgez1" >> res_test ; \
|
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echo "Test de bgez1"
|
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|
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|
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bgezal :
|
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@./go-bench.sh bgezal000 > tmp_test ; \
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cat tmp_test ; \
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cat tmp_test >> res_test ; \
|
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echo "Test de bgezal" >> res_test ; \
|
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echo "Test de bgezal"
|
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|
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|
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bgtz :
|
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@./go-bench.sh bgtz000 > tmp_test ; \
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cat tmp_test ; \
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cat tmp_test >> res_test ; \
|
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echo "Test de bgtz" >> res_test ; \
|
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echo "Test de bgtz"
|
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|
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blez :
|
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@./go-bench.sh blez000 > tmp_test ; \
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cat tmp_test ; \
|
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cat tmp_test >> res_test ; \
|
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echo "Test de blez" >> res_test ; \
|
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echo "Test de blez"
|
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|
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|
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bltz :
|
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@./go-bench.sh bltz000 > tmp_test ; \
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cat tmp_test ; \
|
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cat tmp_test >> res_test ; \
|
||||
echo "Test de bltz" >> res_test ; \
|
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echo "Test de bltz"
|
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|
||||
|
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bltzal :
|
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@./go-bench.sh bltzal000 > tmp_test ; \
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cat tmp_test ; \
|
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cat tmp_test >> res_test ; \
|
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echo "Test de bltzal" >> res_test ; \
|
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echo "Test de bltzal"
|
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|
||||
|
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bne0 :
|
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@./go-bench.sh bne000 > tmp_test ; \
|
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cat tmp_test ; \
|
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cat tmp_test >> res_test ; \
|
||||
echo "Test de bne0" >> res_test ; \
|
||||
echo "Test de bne0"
|
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|
||||
|
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bne1 :
|
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@./go-bench.sh bne001 > tmp_test ; \
|
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cat tmp_test ; \
|
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cat tmp_test >> res_test ; \
|
||||
echo "Test de bne1" >> res_test ; \
|
||||
echo "Test de bne1"
|
||||
|
||||
|
||||
jal0 :
|
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@./go-bench.sh jal000 > tmp_test ; \
|
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cat tmp_test ; \
|
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cat tmp_test >> res_test ; \
|
||||
echo "Test de jal0" >> res_test ; \
|
||||
echo "Test de jal0"
|
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|
||||
|
||||
jal1 :
|
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@./go-bench.sh jal001 > tmp_test ; \
|
||||
cat tmp_test ; \
|
||||
cat tmp_test >> res_test ; \
|
||||
echo "Test de jal1" >> res_test ; \
|
||||
echo "Test de jal1"
|
||||
|
||||
|
||||
jalr0 :
|
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@./go-bench.sh jalr000 > tmp_test ; \
|
||||
cat tmp_test ; \
|
||||
cat tmp_test >> res_test ; \
|
||||
echo "Test de jalr0" >> res_test ; \
|
||||
echo "Test de jalr0"
|
||||
|
||||
|
||||
jalr1 :
|
||||
@./go-bench.sh jalr001 > tmp_test ; \
|
||||
cat tmp_test ; \
|
||||
cat tmp_test >> res_test ; \
|
||||
echo "Test de jalr1" >> res_test ; \
|
||||
echo "Test de jalr1"
|
||||
|
||||
|
||||
lhi0 :
|
||||
@./go-bench.sh lhi000 > tmp_test ; \
|
||||
cat tmp_test ; \
|
||||
cat tmp_test >> res_test ; \
|
||||
echo "Test de lhi0" >> res_test ; \
|
||||
echo "Test de lhi0"
|
||||
|
||||
|
||||
lhi1 :
|
||||
@./go-bench.sh lhi001 > tmp_test ; \
|
||||
cat tmp_test ; \
|
||||
cat tmp_test >> res_test ; \
|
||||
echo "Test de lhi1" >> res_test ; \
|
||||
echo "Test de lhi1"
|
||||
|
||||
|
||||
lsb0 :
|
||||
@./go-bench.sh lsb000 > tmp_test ; \
|
||||
cat tmp_test ; \
|
||||
cat tmp_test >> res_test ; \
|
||||
echo "Test de lsb0" >> res_test ; \
|
||||
echo "Test de lsb0"
|
||||
|
||||
|
||||
lsb1 :
|
||||
@./go-bench.sh lsb001 > tmp_test ; \
|
||||
cat tmp_test ; \
|
||||
cat tmp_test >> res_test ; \
|
||||
echo "Test de lsb1" >> res_test ; \
|
||||
echo "Test de lsb1"
|
||||
|
||||
|
||||
lsb2 :
|
||||
@./go-bench.sh lsb002 > tmp_test ; \
|
||||
cat tmp_test ; \
|
||||
cat tmp_test >> res_test ; \
|
||||
echo "Test de lsb2" >> res_test ; \
|
||||
echo "Test de lsb2"
|
||||
|
||||
|
||||
lsb3 :
|
||||
@./go-bench.sh lsb003 > tmp_test ; \
|
||||
cat tmp_test ; \
|
||||
cat tmp_test >> res_test ; \
|
||||
echo "Test de lsb3" >> res_test ; \
|
||||
echo "Test de lsb3"
|
||||
|
||||
|
||||
lsb4 :
|
||||
@./go-bench.sh lsb004 > tmp_test ; \
|
||||
cat tmp_test ; \
|
||||
cat tmp_test >> res_test ; \
|
||||
echo "Test de lsb4" >> res_test ; \
|
||||
echo "Test de lsb4"
|
||||
|
||||
|
||||
lsb5 :
|
||||
@./go-bench.sh lsb005 > tmp_test ; \
|
||||
cat tmp_test ; \
|
||||
cat tmp_test >> res_test ; \
|
||||
echo "Test de lsb5" >> res_test ; \
|
||||
echo "Test de lsb5"
|
||||
|
||||
|
||||
lsb6 :
|
||||
@./go-bench.sh lsb006 > tmp_test ; \
|
||||
cat tmp_test ; \
|
||||
cat tmp_test >> res_test ; \
|
||||
echo "Test de lsb6" >> res_test ; \
|
||||
echo "Test de lsb6"
|
||||
|
||||
|
||||
lsb7 :
|
||||
@./go-bench.sh lsb007 > tmp_test ; \
|
||||
cat tmp_test ; \
|
||||
cat tmp_test >> res_test ; \
|
||||
echo "Test de lsb7" >> res_test ; \
|
||||
echo "Test de lsb7"
|
||||
|
||||
|
||||
lsbu0 :
|
||||
@./go-bench.sh lsbu000 > tmp_test ; \
|
||||
cat tmp_test ; \
|
||||
cat tmp_test >> res_test ; \
|
||||
echo "Test de lsbu0" >> res_test ; \
|
||||
echo "Test de lsbu0"
|
||||
|
||||
|
||||
lsbu1 :
|
||||
@./go-bench.sh lsbu001 > tmp_test ; \
|
||||
cat tmp_test ; \
|
||||
cat tmp_test >> res_test ; \
|
||||
echo "Test de lsbu1" >> res_test ; \
|
||||
echo "Test de lsbu1"
|
||||
|
||||
|
||||
lsbu2 :
|
||||
@./go-bench.sh lsbu002 > tmp_test ; \
|
||||
cat tmp_test ; \
|
||||
cat tmp_test >> res_test ; \
|
||||
echo "Test de lsbu2" >> res_test ; \
|
||||
echo "Test de lsbu2"
|
||||
|
||||
|
||||
lsbu3 :
|
||||
@./go-bench.sh lsbu003 > tmp_test ; \
|
||||
cat tmp_test ; \
|
||||
cat tmp_test >> res_test ; \
|
||||
echo "Test de lsbu3" >> res_test ; \
|
||||
echo "Test de lsbu3"
|
||||
|
||||
|
||||
lsh0 :
|
||||
@./go-bench.sh lsh000 > tmp_test ; \
|
||||
cat tmp_test ; \
|
||||
cat tmp_test >> res_test ; \
|
||||
echo "Test de lsh0" >> res_test ; \
|
||||
echo "Test de lsh0"
|
||||
|
||||
|
||||
lsh1 :
|
||||
@./go-bench.sh lsh001 > tmp_test ; \
|
||||
cat tmp_test ; \
|
||||
cat tmp_test >> res_test ; \
|
||||
echo "Test de lsh1 " >> res_test ; \
|
||||
echo "Test de lsh1"
|
||||
|
||||
|
||||
lsh2 :
|
||||
@./go-bench.sh lsh002 > tmp_test ; \
|
||||
cat tmp_test ; \
|
||||
cat tmp_test >> res_test ; \
|
||||
echo "Test de lsh2" >> res_test ; \
|
||||
echo "Test de lsh2"
|
||||
|
||||
|
||||
lsh3 :
|
||||
@./go-bench.sh lsh003 > tmp_test ; \
|
||||
cat tmp_test ; \
|
||||
cat tmp_test >> res_test ; \
|
||||
echo "Test de lsh3" >> res_test ; \
|
||||
echo "Test de lsh3"
|
||||
|
||||
|
||||
lshu0 :
|
||||
@./go-bench.sh lshu000 > tmp_test ; \
|
||||
cat tmp_test ; \
|
||||
cat tmp_test >> res_test ; \
|
||||
echo "Test de lshu0" >> res_test ; \
|
||||
echo "Test de lshu0"
|
||||
|
||||
|
||||
lshu1 :
|
||||
@./go-bench.sh lshu001 > tmp_test ; \
|
||||
cat tmp_test ; \
|
||||
cat tmp_test >> res_test ; \
|
||||
echo "Test de lshu1" >> res_test ; \
|
||||
echo "Test de lshu1"
|
||||
|
||||
|
||||
lsw0 :
|
||||
@./go-bench.sh lsw000 > tmp_test ; \
|
||||
cat tmp_test ; \
|
||||
cat tmp_test >> res_test ; \
|
||||
echo "Test de lsw0" >> res_test ; \
|
||||
echo "Test de lsw0"
|
||||
|
||||
|
||||
lsw1 :
|
||||
@./go-bench.sh lsw001 > tmp_test ; \
|
||||
cat tmp_test ; \
|
||||
cat tmp_test >> res_test ; \
|
||||
echo "Test de lsw1" >> res_test ; \
|
||||
echo "Test de lsw1"
|
||||
|
||||
|
||||
sltu0 :
|
||||
@./go-bench.sh sltu000 > tmp_test ; \
|
||||
cat tmp_test ; \
|
||||
cat tmp_test >> res_test ; \
|
||||
echo "Test de sltu0" >> res_test ; \
|
||||
echo "Test de sltu0"
|
||||
|
||||
|
||||
sltu1 :
|
||||
@./go-bench.sh sltu001 > tmp_test ; \
|
||||
cat tmp_test ; \
|
||||
cat tmp_test >> res_test ; \
|
||||
echo "Test de sltu1" >> res_test ; \
|
||||
echo "Test de sltu1"
|
||||
|
||||
|
||||
|
||||
sltu2 :
|
||||
@./go-bench.sh sltu002 > tmp_test ; \
|
||||
cat tmp_test ; \
|
||||
cat tmp_test >> res_test ; \
|
||||
echo "Test de sltu2" >> res_test ; \
|
||||
echo "Test de sltu2"
|
||||
|
||||
|
||||
sltu3 :
|
||||
@./go-bench.sh sltu003 > tmp_test ; \
|
||||
cat tmp_test ; \
|
||||
cat tmp_test >> res_test ; \
|
||||
echo "Test de sltu3" >> res_test ; \
|
||||
echo "Test de sltu3"
|
||||
|
||||
|
||||
sltu4 :
|
||||
@./go-bench.sh sltu004 > tmp_test ; \
|
||||
cat tmp_test ; \
|
||||
cat tmp_test >> res_test ; \
|
||||
echo "Test de sltu4" >> res_test ; \
|
||||
echo "Test de sltu4"
|
||||
|
||||
|
||||
sltiu0 :
|
||||
@./go-bench.sh sltiu000 > tmp_test ; \
|
||||
cat tmp_test ; \
|
||||
cat tmp_test >> res_test ; \
|
||||
echo "Test de sltiu0" >> res_test ; \
|
||||
echo "Test de sltiu0"
|
||||
|
||||
|
||||
sltiu1 :
|
||||
@./go-bench.sh sltiu001 > tmp_test ; \
|
||||
cat tmp_test ; \
|
||||
cat tmp_test >> res_test ; \
|
||||
echo "Test de sltiu1" >> res_test ; \
|
||||
echo "Test de sltiu1"
|
||||
|
||||
|
||||
sltiu2 :
|
||||
@./go-bench.sh sltiu002 > tmp_test ; \
|
||||
cat tmp_test ; \
|
||||
cat tmp_test >> res_test ; \
|
||||
echo "Test de sltiu2" >> res_test ; \
|
||||
echo "Test de sltiu2"
|
||||
|
||||
|
||||
sltiu3 :
|
||||
@./go-bench.sh sltiu003 > tmp_test ; \
|
||||
cat tmp_test ; \
|
||||
cat tmp_test >> res_test ; \
|
||||
echo "Test de sltiu3" >> res_test ; \
|
||||
echo "Test de sltiu3"
|
||||
|
||||
|
||||
sltiu4 :
|
||||
@./go-bench.sh sltiu004 > tmp_test ; \
|
||||
cat tmp_test ; \
|
||||
cat tmp_test >> res_test ; \
|
||||
echo "Test de sltiu4" >> res_test ; \
|
||||
echo "Test de sltiu4"
|
||||
|
|
@ -0,0 +1,318 @@
|
|||
# Pierre Nguyen Tuong
|
||||
# 19 octobre 1999
|
||||
# Makefile pour l'automate ; verification des exceptions
|
||||
#
|
||||
# Derniere modification : 19 octobre 1999
|
||||
# Version : 1.0
|
||||
#
|
||||
|
||||
|
||||
tests : excp
|
||||
|
||||
excp : exc00 exc01 exc02 exc03 \
|
||||
exc04 exc05 exc06 exc07 \
|
||||
exc08 exc09 exc10 exc11 \
|
||||
exc12 exc13 exc14 exc15 \
|
||||
exc16 exc17 exc18 exc19 \
|
||||
exc20 exc21 exc22 exc23 \
|
||||
exc24
|
||||
|
||||
|
||||
exc00 :
|
||||
@echo "**************************************************************************" >> res_test ; \
|
||||
cp exc000.e rome.e ; \
|
||||
mips_asm rome.e rome toto > /dev/null ; \
|
||||
cp exc000.u rome.u ; \
|
||||
mips_asm rome.u romu toto > /dev/null ; \
|
||||
./go-bench.sh exc000 > tmp_test ; \
|
||||
cat tmp_test ; \
|
||||
cat tmp_test >> res_test ; \
|
||||
echo "Test de mauvais alignement de data " >> res_test ; \
|
||||
echo "Test de mauvais alignement de data "
|
||||
|
||||
exc01:
|
||||
@cp exc001.e rome.e ; \
|
||||
mips_asm rome.e rome toto > /dev/null ; \
|
||||
cp exc001.u rome.u ; \
|
||||
mips_asm rome.u romu toto > /dev/null ; \
|
||||
./go-bench.sh exc001 > tmp_test ; \
|
||||
cat tmp_test ; \
|
||||
cat tmp_test >> res_test ; \
|
||||
echo "Test de ADES" >> res_test ; \
|
||||
echo "Test de ADES"
|
||||
|
||||
|
||||
exc02:
|
||||
@cp exc002.e rome.e ; \
|
||||
mips_asm rome.e rome toto > /dev/null ; \
|
||||
cp exc002.u rome.u ; \
|
||||
mips_asm rome.u romu toto > /dev/null ; \
|
||||
./go-bench.sh exc002 > tmp_test ; \
|
||||
cat tmp_test ; \
|
||||
cat tmp_test >> res_test ; \
|
||||
echo "Test d'OVERFLOW de sum de nb >0" >> res_test ; \
|
||||
echo "Test d'OVERFLOW de sum de nb >0"
|
||||
|
||||
|
||||
exc03:
|
||||
@cp exc003.e rome.e ; \
|
||||
mips_asm rome.e rome toto > /dev/null ; \
|
||||
cp exc003.u rome.u ; \
|
||||
mips_asm rome.u romu toto > /dev/null ; \
|
||||
./go-bench.sh exc003 > tmp_test ; \
|
||||
cat tmp_test ; \
|
||||
cat tmp_test >> res_test ; \
|
||||
echo "Test d'OVERFLOW de sum de nb >0" >> res_test ; \
|
||||
echo "Test d'OVERFLOW de sum de nb >0"
|
||||
|
||||
|
||||
exc04:
|
||||
@cp exc004.e rome.e ; \
|
||||
mips_asm rome.e rome toto > /dev/null ; \
|
||||
cp exc004.u rome.u ; \
|
||||
mips_asm rome.u romu toto > /dev/null ; \
|
||||
./go-bench.sh exc004 > tmp_test ; \
|
||||
cat tmp_test ; \
|
||||
cat tmp_test >> res_test ; \
|
||||
echo "Test d'OVERFLOW de sum de nb >0" >> res_test ; \
|
||||
echo "Test d'OVERFLOW de sum de nb >0"
|
||||
|
||||
|
||||
exc05:
|
||||
@cp exc005.e rome.e ; \
|
||||
mips_asm rome.e rome toto > /dev/null ; \
|
||||
cp exc005.u rome.u ; \
|
||||
mips_asm rome.u romu toto > /dev/null ; \
|
||||
./go-bench.sh exc005 > tmp_test ; \
|
||||
cat tmp_test ; \
|
||||
cat tmp_test >> res_test ; \
|
||||
echo "Test d'OVERFLOW de sum de nb >0" >> res_test ; \
|
||||
echo "Test d'OVERFLOW de sum de nb >0"
|
||||
|
||||
|
||||
exc06:
|
||||
@cp exc006.e rome.e ; \
|
||||
mips_asm rome.e rome toto > /dev/null ; \
|
||||
cp exc006.u rome.u ; \
|
||||
mips_asm rome.u romu toto > /dev/null ; \
|
||||
./go-bench.sh exc006 > tmp_test ; \
|
||||
cat tmp_test ; \
|
||||
cat tmp_test >> res_test ; \
|
||||
echo " illegal instruction address" >> res_test ; \
|
||||
echo " illegal instruction address"
|
||||
|
||||
|
||||
exc07:
|
||||
@cp exc007.e rome.e ; \
|
||||
mips_asm rome.e rome toto > /dev/null ; \
|
||||
cp exc007.u rome.u ; \
|
||||
mips_asm rome.u romu toto > /dev/null ; \
|
||||
./go-bench.sh exc007 > tmp_test ; \
|
||||
cat tmp_test ; \
|
||||
cat tmp_test >> res_test ; \
|
||||
echo " Test de ADEL" >> res_test ; \
|
||||
echo " Test de ADEL"
|
||||
|
||||
|
||||
exc08:
|
||||
@cp exc008.e rome.e ; \
|
||||
mips_asm rome.e rome toto > /dev/null ; \
|
||||
cp exc008.u rome.u ; \
|
||||
mips_asm rome.u romu toto > /dev/null ; \
|
||||
./go-bench.sh exc008 > tmp_test ; \
|
||||
cat tmp_test ; \
|
||||
cat tmp_test >> res_test ; \
|
||||
echo " Test de ADEL" >> res_test ; \
|
||||
echo " Test de ADEL"
|
||||
|
||||
|
||||
exc09:
|
||||
@cp exc009.e rome.e ; \
|
||||
mips_asm rome.e rome toto > /dev/null ; \
|
||||
cp exc009.u rome.u ; \
|
||||
mips_asm rome.u romu toto > /dev/null ; \
|
||||
./go-bench.sh exc009 > tmp_test ; \
|
||||
cat tmp_test ; \
|
||||
cat tmp_test >> res_test ; \
|
||||
echo " ri (when executing a mfc0)" >> res_test ; \
|
||||
echo " ri (when executing a mfc0)"
|
||||
|
||||
|
||||
exc10:
|
||||
@cp exc010.e rome.e ; \
|
||||
mips_asm rome.e rome toto > /dev/null ; \
|
||||
cp exc010.u rome.u ; \
|
||||
mips_asm rome.u romu toto > /dev/null ; \
|
||||
./go-bench.sh exc010 > tmp_test ; \
|
||||
cat tmp_test ; \
|
||||
cat tmp_test >> res_test ; \
|
||||
echo " ri" >> res_test ; \
|
||||
echo " ri"
|
||||
|
||||
|
||||
exc11:
|
||||
@cp exc011.e rome.e ; \
|
||||
mips_asm rome.e rome toto > /dev/null ; \
|
||||
cp exc012.u rome.u ; \
|
||||
mips_asm rome.u romu toto > /dev/null ; \
|
||||
./go-bench.sh exc011 > tmp_test ; \
|
||||
cat tmp_test ; \
|
||||
cat tmp_test >> res_test ; \
|
||||
echo "adel (when loading a half-word) " >> res_test ; \
|
||||
echo "adel (when loading a half-word) "
|
||||
|
||||
|
||||
exc12:
|
||||
@cp exc012.e rome.e ; \
|
||||
mips_asm rome.e rome toto > /dev/null ; \
|
||||
cp exc012.u rome.u ; \
|
||||
mips_asm rome.u romu toto > /dev/null ; \
|
||||
./go-bench.sh exc012 > tmp_test ; \
|
||||
cat tmp_test ; \
|
||||
cat tmp_test >> res_test ; \
|
||||
echo "ades (when storing a word) " >> res_test ; \
|
||||
echo "ades (when storing a word) "
|
||||
|
||||
|
||||
exc13:
|
||||
@cp exc013.e rome.e ; \
|
||||
mips_asm rome.e rome toto > /dev/null ; \
|
||||
cp exc013.u rome.u ; \
|
||||
mips_asm rome.u romu toto > /dev/null ; \
|
||||
./go-bench.sh exc013 > tmp_test ; \
|
||||
cat tmp_test ; \
|
||||
cat tmp_test >> res_test ; \
|
||||
echo "sleep" >> res_test ; \
|
||||
echo "sleep"
|
||||
|
||||
|
||||
exc14:
|
||||
@cp exc014.e rome.e ; \
|
||||
mips_asm rome.e rome toto > /dev/null ; \
|
||||
cp exc014.u rome.u ; \
|
||||
mips_asm rome.u romu toto > /dev/null ; \
|
||||
./go-bench.sh exc014 > tmp_test ; \
|
||||
cat tmp_test ; \
|
||||
cat tmp_test >> res_test ; \
|
||||
echo " data bus error" >> res_test ; \
|
||||
echo " data bus error"
|
||||
|
||||
|
||||
exc15:
|
||||
@cp exc015.e rome.e ; \
|
||||
mips_asm rome.e rome toto > /dev/null ; \
|
||||
cp exc015.u rome.u ; \
|
||||
mips_asm rome.u romu toto > /dev/null ; \
|
||||
./go-bench.sh exc015 > tmp_test ; \
|
||||
cat tmp_test ; \
|
||||
cat tmp_test >> res_test ; \
|
||||
echo " overflow (when adding positive numbers)" >> res_test ; \
|
||||
echo " overflow (when adding positive numbers)"
|
||||
|
||||
|
||||
exc16:
|
||||
@cp exc016.e rome.e ; \
|
||||
mips_asm rome.e rome toto > /dev/null ; \
|
||||
cp exc016.u rome.u ; \
|
||||
mips_asm rome.u romu toto > /dev/null ; \
|
||||
./go-bench.sh exc016 > tmp_test ; \
|
||||
cat tmp_test ; \
|
||||
cat tmp_test >> res_test ; \
|
||||
echo " overflow (when adding positive numbers)" >> res_test ; \
|
||||
echo " overflow (when adding positive numbers)"
|
||||
|
||||
|
||||
exc17:
|
||||
@cp exc017.e rome.e ; \
|
||||
mips_asm rome.e rome toto > /dev/null ; \
|
||||
cp exc017.u rome.u ; \
|
||||
mips_asm rome.u romu toto > /dev/null ; \
|
||||
./go-bench.sh exc017 > tmp_test ; \
|
||||
cat tmp_test ; \
|
||||
cat tmp_test >> res_test ; \
|
||||
echo "data bus error" >> res_test ; \
|
||||
echo "data bus error"
|
||||
|
||||
|
||||
exc18:
|
||||
@cp exc018.e rome.e ; \
|
||||
mips_asm rome.e rome toto > /dev/null ; \
|
||||
cp exc018.u rome.u ; \
|
||||
mips_asm rome.u romu toto > /dev/null ; \
|
||||
./go-bench.sh exc018 > tmp_test ; \
|
||||
cat tmp_test ; \
|
||||
cat tmp_test >> res_test ; \
|
||||
echo "data bus error" >> res_test ; \
|
||||
echo "data bus error"
|
||||
|
||||
|
||||
exc19:
|
||||
@cp exc019.e rome.e ; \
|
||||
mips_asm rome.e rome toto > /dev/null ; \
|
||||
cp exc019.u rome.u ; \
|
||||
mips_asm rome.u romu toto > /dev/null ; \
|
||||
./go-bench.sh exc019 > tmp_test ; \
|
||||
cat tmp_test ; \
|
||||
cat tmp_test >> res_test ; \
|
||||
echo "data bus error" >> res_test ; \
|
||||
echo "data bus error"
|
||||
|
||||
|
||||
exc20:
|
||||
@cp exc020.e rome.e ; \
|
||||
mips_asm rome.e rome toto > /dev/null ; \
|
||||
cp exc020.u rome.u ; \
|
||||
mips_asm rome.u romu toto > /dev/null ; \
|
||||
./go-bench.sh exc020 > tmp_test ; \
|
||||
cat tmp_test ; \
|
||||
cat tmp_test >> res_test ; \
|
||||
echo "data bus error" >> res_test ; \
|
||||
echo "data bus error"
|
||||
|
||||
|
||||
exc21:
|
||||
@cp exc021.e rome.e ; \
|
||||
mips_asm rome.e rome toto > /dev/null ; \
|
||||
cp exc021.u rome.u ; \
|
||||
mips_asm rome.u romu toto > /dev/null ; \
|
||||
./go-bench.sh exc021 > tmp_test ; \
|
||||
cat tmp_test ; \
|
||||
cat tmp_test >> res_test ; \
|
||||
echo "data bus error" >> res_test ; \
|
||||
echo "data bus error"
|
||||
|
||||
|
||||
exc22:
|
||||
@cp exc022.e rome.e ; \
|
||||
mips_asm rome.e rome toto > /dev/null ; \
|
||||
cp exc022.u rome.u ; \
|
||||
mips_asm rome.u romu toto > /dev/null ; \
|
||||
./go-bench.sh exc022 > tmp_test ; \
|
||||
cat tmp_test ; \
|
||||
cat tmp_test >> res_test ; \
|
||||
echo "data bus error" >> res_test ; \
|
||||
echo "data bus error"
|
||||
|
||||
|
||||
exc23:
|
||||
@cp exc023.e rome.e ; \
|
||||
mips_asm rome.e rome toto > /dev/null ; \
|
||||
cp exc023.u rome.u ; \
|
||||
mips_asm rome.u romu toto > /dev/null ; \
|
||||
./go-bench.sh exc023 > tmp_test ; \
|
||||
cat tmp_test ; \
|
||||
cat tmp_test >> res_test ; \
|
||||
echo "data bus error" >> res_test ; \
|
||||
echo "data bus error"
|
||||
|
||||
|
||||
exc24:
|
||||
@cp exc024.e rome.e ; \
|
||||
mips_asm rome.e rome toto > /dev/null ; \
|
||||
cp exc024.u rome.u ; \
|
||||
mips_asm rome.u romu toto > /dev/null ; \
|
||||
./go-bench.sh exc024 > tmp_test ; \
|
||||
cat tmp_test ; \
|
||||
cat tmp_test >> res_test ; \
|
||||
echo "instruction bus error" >> res_test ; \
|
||||
echo "instruction bus error"
|
||||
|
|
@ -0,0 +1,100 @@
|
|||
# Pierre Nguyen Tuong
|
||||
# 19 octobre 1999
|
||||
# Makefile pour l'automate ; verification des interruptions
|
||||
#
|
||||
# Derniere modification : 19 octobre 1999
|
||||
# Version : 1.0
|
||||
#
|
||||
|
||||
tests : int
|
||||
|
||||
int : it00 it01 it02 it03 \
|
||||
it04 it05 it06
|
||||
|
||||
it00:
|
||||
@echo "**************************************************************************" >> res_test ; \
|
||||
cp it000.e rome.e ; \
|
||||
mips_asm rome.e rome toto > /dev/null ; \
|
||||
cp it000.u rome.u ; \
|
||||
mips_asm rome.u romu toto > /dev/null ; \
|
||||
./go-bench.sh it000 > tmp_test ; \
|
||||
cat tmp_test ; \
|
||||
cat tmp_test >> res_test ; \
|
||||
echo "test int 00" >> res_test ; \
|
||||
echo "test int 00"
|
||||
|
||||
|
||||
it01:
|
||||
@cp it001.e rome.e ; \
|
||||
mips_asm rome.e rome toto > /dev/null ; \
|
||||
cp it001.u rome.u ; \
|
||||
mips_asm rome.u romu toto > /dev/null ; \
|
||||
./go-bench.sh it001 > tmp_test ; \
|
||||
cat tmp_test ; \
|
||||
cat tmp_test >> res_test ; \
|
||||
echo "Test int 01" >> res_test ; \
|
||||
echo "Test int 01"
|
||||
|
||||
|
||||
it02:
|
||||
@cp it002.e rome.e ; \
|
||||
mips_asm rome.e rome toto > /dev/null ; \
|
||||
cp it002.u rome.u ; \
|
||||
mips_asm rome.u romu toto > /dev/null ; \
|
||||
./go-bench.sh it002 > tmp_test ; \
|
||||
cat tmp_test ; \
|
||||
cat tmp_test >> res_test ; \
|
||||
echo "Test de int 02" >> res_test ; \
|
||||
echo "Test de int 02"
|
||||
|
||||
|
||||
it03:
|
||||
@cp it003.e rome.e ; \
|
||||
mips_asm rome.e rome toto > /dev/null ; \
|
||||
cp it003.u rome.u ; \
|
||||
mips_asm rome.u romu toto > /dev/null ; \
|
||||
./go-bench.sh it003 > tmp_test ; \
|
||||
cat tmp_test ; \
|
||||
cat tmp_test >> res_test ; \
|
||||
echo "Test de int 03" >> res_test ; \
|
||||
echo "Test de int 03"
|
||||
|
||||
|
||||
it04:
|
||||
@cp it004.e rome.e ; \
|
||||
mips_asm rome.e rome toto > /dev/null ; \
|
||||
cp it004.u rome.u ; \
|
||||
mips_asm rome.u romu toto > /dev/null ; \
|
||||
./go-bench.sh it004 > tmp_test ; \
|
||||
cat tmp_test ; \
|
||||
cat tmp_test >> res_test ; \
|
||||
echo "Test de int 04" >> res_test ; \
|
||||
echo "Test de int 04"
|
||||
|
||||
|
||||
|
||||
it05:
|
||||
@cp it005.e rome.e ; \
|
||||
mips_asm rome.e rome toto > /dev/null ; \
|
||||
cp it005.u rome.u ; \
|
||||
mips_asm rome.u romu toto > /dev/null ; \
|
||||
./go-bench.sh it005 > tmp_test ; \
|
||||
cat tmp_test ; \
|
||||
cat tmp_test >> res_test ; \
|
||||
echo "Test de int 05" >> res_test ; \
|
||||
echo "Test de int 05"
|
||||
|
||||
|
||||
|
||||
it06:
|
||||
@cp it006.e rome.e ; \
|
||||
mips_asm rome.e rome toto > /dev/null ; \
|
||||
cp it006.u rome.u ; \
|
||||
mips_asm rome.u romu toto > /dev/null ; \
|
||||
./go-bench.sh it006 > tmp_test ; \
|
||||
cat tmp_test ; \
|
||||
cat tmp_test >> res_test ; \
|
||||
echo "test int 06" >> res_test ; \
|
||||
echo "test int 06"
|
||||
|
||||
|
||||
|
|
@ -0,0 +1,75 @@
|
|||
# Pierre Nguyen Tuong
|
||||
# 19 octobre 1999
|
||||
# Makefile pour l'automate ; verification des misc
|
||||
#
|
||||
# Derniere modification : 19 octobre 1999
|
||||
# Version : 1.0
|
||||
#
|
||||
|
||||
tests : misc
|
||||
|
||||
misc : brk mftc0 mfthi mftlo syscall
|
||||
|
||||
brk:
|
||||
@echo "**************************************************************************" >> res_test ; \
|
||||
cp break_00.e rome.e ; \
|
||||
mips_asm rome.e rome toto > /dev/null ; \
|
||||
cp break_00.u rome.u ; \
|
||||
mips_asm rome.u romu toto > /dev/null ; \
|
||||
./go-bench.sh break_00 > tmp_test ; \
|
||||
cat tmp_test ; \
|
||||
cat tmp_test >> res_test ; \
|
||||
echo "test de break" >> res_test ; \
|
||||
echo "test de break"
|
||||
|
||||
|
||||
|
||||
mftc0:
|
||||
@cp mftc0_00.e rome.e ; \
|
||||
mips_asm rome.e rome toto > /dev/null ; \
|
||||
cp mftc0_00.u rome.u ; \
|
||||
mips_asm rome.u romu toto > /dev/null ; \
|
||||
./go-bench.sh mftc0_00 > tmp_test ; \
|
||||
cat tmp_test ; \
|
||||
cat tmp_test >> res_test ; \
|
||||
echo "test de mftc0" >> res_test ; \
|
||||
echo "test de mftc0"
|
||||
|
||||
|
||||
mfthi:
|
||||
@cp mfthi_00.e rome.e ; \
|
||||
mips_asm rome.e rome toto > /dev/null ; \
|
||||
cp mfthi_00.u rome.u ; \
|
||||
mips_asm rome.u romu toto > /dev/null ; \
|
||||
./go-bench.sh mfthi_00 > tmp_test ; \
|
||||
cat tmp_test ; \
|
||||
cat tmp_test >> res_test ; \
|
||||
echo "test de mfthi" >> res_test ; \
|
||||
echo "test de mfthi"
|
||||
|
||||
|
||||
|
||||
mftlo:
|
||||
@cp mftlo_00.e rome.e ; \
|
||||
mips_asm rome.e rome toto > /dev/null ; \
|
||||
cp mftlo_00.u rome.u ; \
|
||||
mips_asm rome.u romu toto > /dev/null ; \
|
||||
./go-bench.sh mftlo_00 > tmp_test ; \
|
||||
cat tmp_test ; \
|
||||
cat tmp_test >> res_test ; \
|
||||
echo "test de mftlo" >> res_test ; \
|
||||
echo "test de mftlo"
|
||||
|
||||
|
||||
|
||||
syscall:
|
||||
@cp syscall_00.e rome.e ; \
|
||||
mips_asm rome.e rome toto > /dev/null ; \
|
||||
cp syscall_00.u rome.u ; \
|
||||
mips_asm rome.u romu toto > /dev/null ; \
|
||||
./go-bench.sh syscall_00 > tmp_test ; \
|
||||
cat tmp_test ; \
|
||||
cat tmp_test >> res_test ; \
|
||||
echo "test de syscall" >> res_test ; \
|
||||
echo "test de syscall"
|
||||
|
||||
|
|
@ -0,0 +1,363 @@
|
|||
|
||||
-- description generated by Pat driver
|
||||
|
||||
-- date : Mon May 24 00:00:10 2004
|
||||
-- revision : v109
|
||||
|
||||
-- sequence : mips_cpu
|
||||
|
||||
-- input / output list :
|
||||
in ck B;;
|
||||
in reset B;;
|
||||
in frz B;;
|
||||
in scin B;;
|
||||
in test B;;
|
||||
in vdd B;;
|
||||
in vss B;;
|
||||
out rw B;;
|
||||
out w (0 to 1) B;;
|
||||
out scout B;;
|
||||
inout data (31 downto 0) X;;
|
||||
inout data_adr (31 downto 0) X;;
|
||||
signal mips1.adr_c (31 downto 0) X spy ;;
|
||||
signal mips1.datain_c (31 downto 0) X spy ;;
|
||||
signal mips1.dataout_c (31 downto 0) X spy ;;
|
||||
signal mips1.int_c (5 downto 0) B spy ;;
|
||||
signal mips1.scin_c B spy ;;
|
||||
signal mips1.scout_c B spy ;;
|
||||
signal mips1.test_c B spy ;;
|
||||
signal mips1.reset_c B spy ;;
|
||||
signal mips1.frz_c B spy ;;
|
||||
signal mips1.w_c (0 to 1) B spy ;;
|
||||
signal mips1.rw_c B spy ;;
|
||||
signal mips1.berr_c B spy ;;
|
||||
signal mips1.rw_ctl_c (15 downto 0) B spy ;;
|
||||
signal mips1.frz_ctl_c (15 downto 0) B spy ;;
|
||||
signal mips1.ck_ctl_c B spy ;;
|
||||
signal mips1.ck_dpt_c B spy ;;
|
||||
|
||||
begin
|
||||
|
||||
-- Pattern description :
|
||||
|
||||
-- c r f s t v v r w s d d m m m m m m m m m m m m m m m m
|
||||
-- k e r c e d s w c a a i i i i i i i i i i i i i i i i
|
||||
-- s z i s d s o t t p p p p p p p p p p p p p p p p
|
||||
-- e n t u a a s s s s s s s s s s s s s s s s
|
||||
-- t t _ 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
|
||||
-- a . . . . . . . . . . . . . . . .
|
||||
-- d a d d i s s t r f w r b r f c c
|
||||
-- r d a a n c c e e r _ w e w r k k
|
||||
-- r t t t i o s s z c _ r _ z _ _
|
||||
-- _ a a _ n u t e _ c r c _ c d
|
||||
-- c i o c _ t _ t c _ t c t p
|
||||
-- n u c _ c _ c l t l t
|
||||
-- _ t c c _ l _ _
|
||||
-- c _ c _ c c
|
||||
-- c c
|
||||
|
||||
< 0 ps> : 1 1 0 0 0 1 0 ?1 ?00 ?0 ?uuuuuuuu ?00000000 ?00000000 ?uuuuuuuu ?3fc00080 ?111111 ?0 ?0 ?0 ?1 ?0 ?00 ?1 ?1 ?0000000000000000 ?1111111111111111 ?1 ?1 ;
|
||||
< 50000 ps> : 1 1 0 0 0 1 0 ?1 ?00 ?0 ?uuuuuuuu ?00000000 ?00000000 ?uuuuuuuu ?3fc00080 ?111111 ?0 ?0 ?0 ?1 ?0 ?00 ?1 ?1 ?0000000000000000 ?1111111111111111 ?1 ?1 ;
|
||||
< 100000 ps> : 0 1 0 0 0 1 0 ?1 ?00 ?0 ?uuuuuuuu ?00000000 ?00000000 ?uuuuuuuu ?3fc00080 ?111111 ?0 ?0 ?0 ?1 ?0 ?00 ?1 ?1 ?0000000000000000 ?1111111111111111 ?0 ?0 ;
|
||||
< 150000 ps> : 0 1 0 0 0 1 0 ?1 ?00 ?0 ?uuuuuuuu ?00000000 ?00000000 ?uuuuuuuu ?3fc00080 ?111111 ?0 ?0 ?0 ?1 ?0 ?00 ?1 ?1 ?0000000000000000 ?1111111111111111 ?0 ?0 ;
|
||||
< 200000 ps> : 1 1 0 0 0 1 0 ?1 ?00 ?0 ?uuuuuuuu ?00000000 ?00000000 ?uuuuuuuu ?bfc00000 ?111111 ?0 ?0 ?0 ?1 ?0 ?00 ?1 ?1 ?0000000000000000 ?1111111111111111 ?1 ?1 ;
|
||||
< 250000 ps> : 1 1 0 0 0 1 0 ?1 ?00 ?0 ?uuuuuuuu ?00000000 ?00000000 ?uuuuuuuu ?bfc00000 ?111111 ?0 ?0 ?0 ?1 ?0 ?00 ?1 ?1 ?0000000000000000 ?1111111111111111 ?1 ?1 ;
|
||||
< 300000 ps> : 0 1 0 0 0 1 0 ?1 ?00 ?0 ?uuuuuuuu ?00000000 ?00000000 ?uuuuuuuu ?bfc00000 ?111111 ?0 ?0 ?0 ?1 ?0 ?00 ?1 ?1 ?0000000000000000 ?1111111111111111 ?0 ?0 ;
|
||||
< 350000 ps> : 0 1 0 0 0 1 0 ?1 ?00 ?0 ?uuuuuuuu ?00000000 ?00000000 ?uuuuuuuu ?bfc00000 ?111111 ?0 ?0 ?0 ?1 ?0 ?00 ?1 ?1 ?0000000000000000 ?1111111111111111 ?0 ?0 ;
|
||||
< 400000 ps> : 1 1 0 0 0 1 0 ?1 ?00 ?0 ?uuuuuuuu ?00000000 ?00000000 ?uuuuuuuu ?bfc00000 ?111111 ?0 ?0 ?0 ?1 ?0 ?00 ?1 ?1 ?0000000000000000 ?1111111111111111 ?1 ?1 ;
|
||||
< 450000 ps> : 1 1 0 0 0 1 0 ?1 ?00 ?0 ?uuuuuuuu ?00000000 ?00000000 ?uuuuuuuu ?bfc00000 ?111111 ?0 ?0 ?0 ?1 ?0 ?00 ?1 ?1 ?0000000000000000 ?1111111111111111 ?1 ?1 ;
|
||||
< 500000 ps> : 0 0 0 0 0 1 0 ?1 ?00 ?0 ?uuuuuuuu ?00000000 ?00000000 ?uuuuuuuu ?bfc00000 ?111111 ?0 ?0 ?0 ?0 ?0 ?00 ?1 ?1 ?0000000000000000 ?1111111111111111 ?0 ?0 ;
|
||||
< 550000 ps> : 0 0 0 0 0 1 0 ?1 ?00 ?0 ?uuuuuuuu ?00000000 ?00000000 ?uuuuuuuu ?bfc00000 ?111111 ?0 ?0 ?0 ?0 ?0 ?00 ?1 ?1 ?0000000000000000 ?1111111111111111 ?0 ?0 ;
|
||||
< 600000 ps> : 1 0 0 0 0 1 0 ?1 ?00 ?0 ?3c1ec000 ?bfc00000 ?bfc00000 ?3c1ec000 ?00000000 ?111111 ?0 ?0 ?0 ?0 ?0 ?00 ?1 ?1 ?0000000000000000 ?1111111111111111 ?1 ?1 ;
|
||||
< 650000 ps> : 1 0 0 0 0 1 0 ?1 ?00 ?0 ?3c1ec000 ?bfc00000 ?bfc00000 ?3c1ec000 ?00000000 ?111111 ?0 ?0 ?0 ?0 ?0 ?00 ?1 ?1 ?0000000000000000 ?1111111111111111 ?1 ?1 ;
|
||||
< 700000 ps> : 0 0 0 0 0 1 0 ?1 ?00 ?0 ?3c1ec000 ?bfc00000 ?bfc00000 ?3c1ec000 ?00000000 ?111111 ?0 ?0 ?0 ?0 ?0 ?00 ?1 ?1 ?0000000000000000 ?1111111111111111 ?0 ?0 ;
|
||||
< 750000 ps> : 0 0 0 0 0 1 0 ?1 ?00 ?0 ?3c1ec000 ?bfc00000 ?bfc00000 ?3c1ec000 ?00000000 ?111111 ?0 ?0 ?0 ?0 ?0 ?00 ?1 ?1 ?0000000000000000 ?1111111111111111 ?0 ?0 ;
|
||||
< 800000 ps> : 1 0 0 0 0 1 0 ?1 ?00 ?0 ?3c1ec000 ?bfc00000 ?bfc00000 ?3c1ec000 ?00000000 ?111111 ?0 ?0 ?0 ?0 ?0 ?00 ?1 ?1 ?0000000000000000 ?1111111111111111 ?1 ?1 ;
|
||||
< 850000 ps> : 1 0 0 0 0 1 0 ?1 ?00 ?0 ?3c1ec000 ?bfc00000 ?bfc00000 ?3c1ec000 ?00000000 ?111111 ?0 ?0 ?0 ?0 ?0 ?00 ?1 ?1 ?0000000000000000 ?1111111111111111 ?1 ?1 ;
|
||||
< 900000 ps> : 0 0 0 0 0 1 0 ?1 ?00 ?0 ?3c1ec000 ?bfc00000 ?bfc00000 ?3c1ec000 ?00000000 ?111111 ?0 ?0 ?0 ?0 ?0 ?00 ?1 ?1 ?0000000000000000 ?1111111111111111 ?0 ?0 ;
|
||||
< 950000 ps> : 0 0 0 0 0 1 0 ?1 ?00 ?0 ?3c1ec000 ?bfc00000 ?bfc00000 ?3c1ec000 ?00000000 ?111111 ?0 ?0 ?0 ?0 ?0 ?00 ?1 ?1 ?0000000000000000 ?1111111111111111 ?0 ?0 ;
|
||||
< 1000000 ps> : 1 0 0 0 0 1 0 ?1 ?00 ?0 ?3c1ec000 ?bfc00000 ?bfc00000 ?3c1ec000 ?bfc00004 ?111111 ?0 ?0 ?0 ?0 ?0 ?00 ?1 ?1 ?0000000000000000 ?1111111111111111 ?1 ?1 ;
|
||||
< 1050000 ps> : 1 0 0 0 0 1 0 ?1 ?00 ?0 ?3c1ec000 ?bfc00000 ?bfc00000 ?3c1ec000 ?bfc00004 ?111111 ?0 ?0 ?0 ?0 ?0 ?00 ?1 ?1 ?0000000000000000 ?1111111111111111 ?1 ?1 ;
|
||||
< 1100000 ps> : 0 0 0 0 0 1 0 ?1 ?00 ?0 ?3c1ec000 ?bfc00000 ?bfc00000 ?3c1ec000 ?bfc00004 ?111111 ?0 ?0 ?0 ?0 ?0 ?00 ?1 ?1 ?0000000000000000 ?1111111111111111 ?0 ?0 ;
|
||||
< 1150000 ps> : 0 0 0 0 0 1 0 ?1 ?00 ?0 ?3c1ec000 ?bfc00000 ?bfc00000 ?3c1ec000 ?bfc00004 ?111111 ?0 ?0 ?0 ?0 ?0 ?00 ?1 ?1 ?0000000000000000 ?1111111111111111 ?0 ?0 ;
|
||||
< 1200000 ps> : 1 0 0 0 0 1 0 ?1 ?00 ?0 ?37de0000 ?bfc00004 ?bfc00004 ?37de0000 ?ffffc000 ?111111 ?0 ?0 ?0 ?0 ?0 ?00 ?1 ?1 ?0000000000000000 ?1111111111111111 ?1 ?1 ;
|
||||
< 1250000 ps> : 1 0 0 0 0 1 0 ?1 ?00 ?0 ?37de0000 ?bfc00004 ?bfc00004 ?37de0000 ?ffffc000 ?111111 ?0 ?0 ?0 ?0 ?0 ?00 ?1 ?1 ?0000000000000000 ?1111111111111111 ?1 ?1 ;
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|
||||
< 11600000 ps> : 1 0 0 0 0 1 0 ?1 ?00 ?0 ?10a3002f ?00400010 ?00400010 ?10a3002f ?00400014 ?111111 ?0 ?0 ?0 ?0 ?0 ?00 ?1 ?1 ?0000000000000000 ?1111111111111111 ?1 ?1 ;
|
||||
< 11650000 ps> : 1 0 0 0 0 1 0 ?1 ?00 ?0 ?10a3002f ?00400010 ?00400010 ?10a3002f ?00400014 ?111111 ?0 ?0 ?0 ?0 ?0 ?00 ?1 ?1 ?0000000000000000 ?1111111111111111 ?1 ?1 ;
|
||||
< 11700000 ps> : 0 0 0 0 0 1 0 ?1 ?00 ?0 ?10a3002f ?00400010 ?00400010 ?10a3002f ?00400014 ?111111 ?0 ?0 ?0 ?0 ?0 ?00 ?1 ?1 ?0000000000000000 ?1111111111111111 ?0 ?0 ;
|
||||
< 11750000 ps> : 0 0 0 0 0 1 0 ?1 ?00 ?0 ?10a3002f ?00400010 ?00400010 ?10a3002f ?00400014 ?111111 ?0 ?0 ?0 ?0 ?0 ?00 ?1 ?1 ?0000000000000000 ?1111111111111111 ?0 ?0 ;
|
||||
< 11800000 ps> : 1 0 0 0 0 1 0 ?1 ?00 ?0 ?08100036 ?00400014 ?00400014 ?08100036 ?0000000c ?111111 ?0 ?0 ?0 ?0 ?0 ?00 ?1 ?1 ?0000000000000000 ?1111111111111111 ?1 ?1 ;
|
||||
< 11850000 ps> : 1 0 0 0 0 1 0 ?1 ?00 ?0 ?08100036 ?00400014 ?00400014 ?08100036 ?0000000c ?111111 ?0 ?0 ?0 ?0 ?0 ?00 ?1 ?1 ?0000000000000000 ?1111111111111111 ?1 ?1 ;
|
||||
< 11900000 ps> : 0 0 0 0 0 1 0 ?1 ?00 ?0 ?08100036 ?00400014 ?00400014 ?08100036 ?0000000c ?111111 ?0 ?0 ?0 ?0 ?0 ?00 ?1 ?1 ?0000000000000000 ?1111111111111111 ?0 ?0 ;
|
||||
< 11950000 ps> : 0 0 0 0 0 1 0 ?1 ?00 ?0 ?08100036 ?00400014 ?00400014 ?08100036 ?0000000c ?111111 ?0 ?0 ?0 ?0 ?0 ?00 ?1 ?1 ?0000000000000000 ?1111111111111111 ?0 ?0 ;
|
||||
< 12000000 ps> : 1 0 0 0 0 1 0 ?1 ?00 ?0 ?08100036 ?00400014 ?00400014 ?08100036 ?00000000 ?111111 ?0 ?0 ?0 ?0 ?0 ?00 ?1 ?1 ?0000000000000000 ?1111111111111111 ?1 ?1 ;
|
||||
< 12050000 ps> : 1 0 0 0 0 1 0 ?1 ?00 ?0 ?08100036 ?00400014 ?00400014 ?08100036 ?00000000 ?111111 ?0 ?0 ?0 ?0 ?0 ?00 ?1 ?1 ?0000000000000000 ?1111111111111111 ?1 ?1 ;
|
||||
< 12100000 ps> : 0 0 0 0 0 1 0 ?1 ?00 ?0 ?08100036 ?00400014 ?00400014 ?08100036 ?00000000 ?111111 ?0 ?0 ?0 ?0 ?0 ?00 ?1 ?1 ?0000000000000000 ?1111111111111111 ?0 ?0 ;
|
||||
< 12150000 ps> : 0 0 0 0 0 1 0 ?1 ?00 ?0 ?08100036 ?00400014 ?00400014 ?08100036 ?00000000 ?111111 ?0 ?0 ?0 ?0 ?0 ?00 ?1 ?1 ?0000000000000000 ?1111111111111111 ?0 ?0 ;
|
||||
< 12200000 ps> : 1 0 0 0 0 1 0 ?1 ?00 ?0 ?08100036 ?00400014 ?00400014 ?08100036 ?004000d0 ?111111 ?0 ?0 ?0 ?0 ?0 ?00 ?1 ?1 ?0000000000000000 ?1111111111111111 ?1 ?1 ;
|
||||
< 12250000 ps> : 1 0 0 0 0 1 0 ?1 ?00 ?0 ?08100036 ?00400014 ?00400014 ?08100036 ?004000d0 ?111111 ?0 ?0 ?0 ?0 ?0 ?00 ?1 ?1 ?0000000000000000 ?1111111111111111 ?1 ?1 ;
|
||||
< 12300000 ps> : 0 0 0 0 0 1 0 ?1 ?00 ?0 ?08100036 ?00400014 ?00400014 ?08100036 ?004000d0 ?111111 ?0 ?0 ?0 ?0 ?0 ?00 ?1 ?1 ?0000000000000000 ?1111111111111111 ?0 ?0 ;
|
||||
< 12350000 ps> : 0 0 0 0 0 1 0 ?1 ?00 ?0 ?08100036 ?00400014 ?00400014 ?08100036 ?004000d0 ?111111 ?0 ?0 ?0 ?0 ?0 ?00 ?1 ?1 ?0000000000000000 ?1111111111111111 ?0 ?0 ;
|
||||
< 12400000 ps> : 1 0 0 0 0 1 0 ?1 ?00 ?0 ?08100034 ?004000d0 ?004000d0 ?08100034 ?00000000 ?111111 ?0 ?0 ?0 ?0 ?0 ?00 ?1 ?1 ?0000000000000000 ?1111111111111111 ?1 ?1 ;
|
||||
< 12450000 ps> : 1 0 0 0 0 1 0 ?1 ?00 ?0 ?08100034 ?004000d0 ?004000d0 ?08100034 ?00000000 ?111111 ?0 ?0 ?0 ?0 ?0 ?00 ?1 ?1 ?0000000000000000 ?1111111111111111 ?1 ?1 ;
|
||||
< 12500000 ps> : 0 0 0 0 0 1 0 ?1 ?00 ?0 ?08100034 ?004000d0 ?004000d0 ?08100034 ?00000000 ?111111 ?0 ?0 ?0 ?0 ?0 ?00 ?1 ?1 ?0000000000000000 ?1111111111111111 ?0 ?0 ;
|
||||
< 12550000 ps> : 0 0 0 0 0 1 0 ?1 ?00 ?0 ?08100034 ?004000d0 ?004000d0 ?08100034 ?00000000 ?111111 ?0 ?0 ?0 ?0 ?0 ?00 ?1 ?1 ?0000000000000000 ?1111111111111111 ?0 ?0 ;
|
||||
< 12600000 ps> : 1 0 0 0 0 1 0 ?1 ?00 ?0 ?08100034 ?004000d0 ?004000d0 ?08100034 ?004000d4 ?111111 ?0 ?0 ?0 ?0 ?0 ?00 ?1 ?1 ?0000000000000000 ?1111111111111111 ?1 ?1 ;
|
||||
< 12650000 ps> : 1 0 0 0 0 1 0 ?1 ?00 ?0 ?08100034 ?004000d0 ?004000d0 ?08100034 ?004000d4 ?111111 ?0 ?0 ?0 ?0 ?0 ?00 ?1 ?1 ?0000000000000000 ?1111111111111111 ?1 ?1 ;
|
||||
< 12700000 ps> : 0 0 0 0 0 1 0 ?1 ?00 ?0 ?08100034 ?004000d0 ?004000d0 ?08100034 ?004000d4 ?111111 ?0 ?0 ?0 ?0 ?0 ?00 ?1 ?1 ?0000000000000000 ?1111111111111111 ?0 ?0 ;
|
||||
< 12750000 ps> : 0 0 0 0 0 1 0 ?1 ?00 ?0 ?08100034 ?004000d0 ?004000d0 ?08100034 ?004000d4 ?111111 ?0 ?0 ?0 ?0 ?0 ?00 ?1 ?1 ?0000000000000000 ?1111111111111111 ?0 ?0 ;
|
||||
< 12800000 ps> : 1 0 0 0 0 1 0 ?1 ?00 ?0 ?00000021 ?004000d4 ?004000d4 ?00000021 ?004000d0 ?111111 ?0 ?0 ?0 ?0 ?0 ?00 ?1 ?1 ?0000000000000000 ?1111111111111111 ?1 ?1 ;
|
||||
< 12850000 ps> : 1 0 0 0 0 1 0 ?1 ?00 ?0 ?00000021 ?004000d4 ?004000d4 ?00000021 ?004000d0 ?111111 ?0 ?0 ?0 ?0 ?0 ?00 ?1 ?1 ?0000000000000000 ?1111111111111111 ?1 ?1 ;
|
||||
< 12900000 ps> : 0 0 0 0 0 1 0 ?1 ?00 ?0 ?00000021 ?004000d4 ?004000d4 ?00000021 ?004000d0 ?111111 ?0 ?0 ?0 ?0 ?0 ?00 ?1 ?1 ?0000000000000000 ?1111111111111111 ?0 ?0 ;
|
||||
< 12950000 ps> : 0 0 0 0 0 1 0 ?1 ?00 ?0 ?00000021 ?004000d4 ?004000d4 ?00000021 ?004000d0 ?111111 ?0 ?0 ?0 ?0 ?0 ?00 ?1 ?1 ?0000000000000000 ?1111111111111111 ?0 ?0 ;
|
||||
< 13000000 ps> : 1 0 0 0 0 1 0 ?1 ?00 ?0 ?08100034 ?004000d0 ?004000d0 ?08100034 ?00000000 ?111111 ?0 ?0 ?0 ?0 ?0 ?00 ?1 ?1 ?0000000000000000 ?1111111111111111 ?1 ?1 ;
|
||||
< 13050000 ps> : 1 0 0 0 0 1 0 ?1 ?00 ?0 ?08100034 ?004000d0 ?004000d0 ?08100034 ?00000000 ?111111 ?0 ?0 ?0 ?0 ?0 ?00 ?1 ?1 ?0000000000000000 ?1111111111111111 ?1 ?1 ;
|
||||
< 13100000 ps> : 0 0 0 0 0 1 0 ?1 ?00 ?0 ?08100034 ?004000d0 ?004000d0 ?08100034 ?00000000 ?111111 ?0 ?0 ?0 ?0 ?0 ?00 ?1 ?1 ?0000000000000000 ?1111111111111111 ?0 ?0 ;
|
||||
< 13150000 ps> : 0 0 0 0 0 1 0 ?1 ?00 ?0 ?08100034 ?004000d0 ?004000d0 ?08100034 ?00000000 ?111111 ?0 ?0 ?0 ?0 ?0 ?00 ?1 ?1 ?0000000000000000 ?1111111111111111 ?0 ?0 ;
|
||||
< 13200000 ps> : 1 0 0 0 0 1 0 ?1 ?00 ?0 ?08100034 ?004000d0 ?004000d0 ?08100034 ?004000d4 ?111111 ?0 ?0 ?0 ?0 ?0 ?00 ?1 ?1 ?0000000000000000 ?1111111111111111 ?1 ?1 ;
|
||||
|
||||
-- Beware : unprocessed patterns
|
||||
|
||||
< 13250000 ps> : 1 0 0 0 0 1 0 ?* ?** ?* ?******** ?******** ?******** ?******** ?******** ?****** ?* ?* ?* ?* ?* ?** ?* ?* ?**************** ?**************** ?* ?* ;
|
||||
< 13300000 ps> : 0 0 0 0 0 1 0 ?* ?** ?* ?******** ?******** ?******** ?******** ?******** ?****** ?* ?* ?* ?* ?* ?** ?* ?* ?**************** ?**************** ?* ?* ;
|
||||
< 13350000 ps> : 0 0 0 0 0 1 0 ?* ?** ?* ?******** ?******** ?******** ?******** ?******** ?****** ?* ?* ?* ?* ?* ?** ?* ?* ?**************** ?**************** ?* ?* ;
|
||||
< 13400000 ps> : 1 0 0 0 0 1 0 ?* ?** ?* ?******** ?******** ?******** ?******** ?******** ?****** ?* ?* ?* ?* ?* ?** ?* ?* ?**************** ?**************** ?* ?* ;
|
||||
< 13450000 ps> : 1 0 0 0 0 1 0 ?* ?** ?* ?******** ?******** ?******** ?******** ?******** ?****** ?* ?* ?* ?* ?* ?** ?* ?* ?**************** ?**************** ?* ?* ;
|
||||
< 13500000 ps> : 0 0 0 0 0 1 0 ?* ?** ?* ?******** ?******** ?******** ?******** ?******** ?****** ?* ?* ?* ?* ?* ?** ?* ?* ?**************** ?**************** ?* ?* ;
|
||||
< 13550000 ps> : 0 0 0 0 0 1 0 ?* ?** ?* ?******** ?******** ?******** ?******** ?******** ?****** ?* ?* ?* ?* ?* ?** ?* ?* ?**************** ?**************** ?* ?* ;
|
||||
< 13600000 ps> : 1 0 0 0 0 1 0 ?* ?** ?* ?******** ?******** ?******** ?******** ?******** ?****** ?* ?* ?* ?* ?* ?** ?* ?* ?**************** ?**************** ?* ?* ;
|
||||
< 13650000 ps> : 1 0 0 0 0 1 0 ?* ?** ?* ?******** ?******** ?******** ?******** ?******** ?****** ?* ?* ?* ?* ?* ?** ?* ?* ?**************** ?**************** ?* ?* ;
|
||||
< 13700000 ps> : 0 0 0 0 0 1 0 ?* ?** ?* ?******** ?******** ?******** ?******** ?******** ?****** ?* ?* ?* ?* ?* ?** ?* ?* ?**************** ?**************** ?* ?* ;
|
||||
< 13750000 ps> : 0 0 0 0 0 1 0 ?* ?** ?* ?******** ?******** ?******** ?******** ?******** ?****** ?* ?* ?* ?* ?* ?** ?* ?* ?**************** ?**************** ?* ?* ;
|
||||
< 13800000 ps> : 1 0 0 0 0 1 0 ?* ?** ?* ?******** ?******** ?******** ?******** ?******** ?****** ?* ?* ?* ?* ?* ?** ?* ?* ?**************** ?**************** ?* ?* ;
|
||||
< 13850000 ps> : 1 0 0 0 0 1 0 ?* ?** ?* ?******** ?******** ?******** ?******** ?******** ?****** ?* ?* ?* ?* ?* ?** ?* ?* ?**************** ?**************** ?* ?* ;
|
||||
< 13900000 ps> : 0 0 0 0 0 1 0 ?* ?** ?* ?******** ?******** ?******** ?******** ?******** ?****** ?* ?* ?* ?* ?* ?** ?* ?* ?**************** ?**************** ?* ?* ;
|
||||
< 13950000 ps> : 0 0 0 0 0 1 0 ?* ?** ?* ?******** ?******** ?******** ?******** ?******** ?****** ?* ?* ?* ?* ?* ?** ?* ?* ?**************** ?**************** ?* ?* ;
|
||||
< 14000000 ps> : 1 0 0 0 0 1 0 ?* ?** ?* ?******** ?******** ?******** ?******** ?******** ?****** ?* ?* ?* ?* ?* ?** ?* ?* ?**************** ?**************** ?* ?* ;
|
||||
< 14050000 ps> : 1 0 0 0 0 1 0 ?* ?** ?* ?******** ?******** ?******** ?******** ?******** ?****** ?* ?* ?* ?* ?* ?** ?* ?* ?**************** ?**************** ?* ?* ;
|
||||
< 14100000 ps> : 0 0 0 0 0 1 0 ?* ?** ?* ?******** ?******** ?******** ?******** ?******** ?****** ?* ?* ?* ?* ?* ?** ?* ?* ?**************** ?**************** ?* ?* ;
|
||||
< 14150000 ps> : 0 0 0 0 0 1 0 ?* ?** ?* ?******** ?******** ?******** ?******** ?******** ?****** ?* ?* ?* ?* ?* ?** ?* ?* ?**************** ?**************** ?* ?* ;
|
||||
< 14200000 ps> : 1 0 0 0 0 1 0 ?* ?** ?* ?******** ?******** ?******** ?******** ?******** ?****** ?* ?* ?* ?* ?* ?** ?* ?* ?**************** ?**************** ?* ?* ;
|
||||
< 14250000 ps> : 1 0 0 0 0 1 0 ?* ?** ?* ?******** ?******** ?******** ?******** ?******** ?****** ?* ?* ?* ?* ?* ?** ?* ?* ?**************** ?**************** ?* ?* ;
|
||||
< 14300000 ps> : 0 0 0 0 0 1 0 ?* ?** ?* ?******** ?******** ?******** ?******** ?******** ?****** ?* ?* ?* ?* ?* ?** ?* ?* ?**************** ?**************** ?* ?* ;
|
||||
< 14350000 ps> : 0 0 0 0 0 1 0 ?* ?** ?* ?******** ?******** ?******** ?******** ?******** ?****** ?* ?* ?* ?* ?* ?** ?* ?* ?**************** ?**************** ?* ?* ;
|
||||
< 14400000 ps> : 1 0 0 0 0 1 0 ?* ?** ?* ?******** ?******** ?******** ?******** ?******** ?****** ?* ?* ?* ?* ?* ?** ?* ?* ?**************** ?**************** ?* ?* ;
|
||||
< 14450000 ps> : 1 0 0 0 0 1 0 ?* ?** ?* ?******** ?******** ?******** ?******** ?******** ?****** ?* ?* ?* ?* ?* ?** ?* ?* ?**************** ?**************** ?* ?* ;
|
||||
< 14500000 ps> : 0 0 0 0 0 1 0 ?* ?** ?* ?******** ?******** ?******** ?******** ?******** ?****** ?* ?* ?* ?* ?* ?** ?* ?* ?**************** ?**************** ?* ?* ;
|
||||
< 14550000 ps> : 0 0 0 0 0 1 0 ?* ?** ?* ?******** ?******** ?******** ?******** ?******** ?****** ?* ?* ?* ?* ?* ?** ?* ?* ?**************** ?**************** ?* ?* ;
|
||||
< 14600000 ps> : 1 0 0 0 0 1 0 ?* ?** ?* ?******** ?******** ?******** ?******** ?******** ?****** ?* ?* ?* ?* ?* ?** ?* ?* ?**************** ?**************** ?* ?* ;
|
||||
< 14650000 ps> : 1 0 0 0 0 1 0 ?* ?** ?* ?******** ?******** ?******** ?******** ?******** ?****** ?* ?* ?* ?* ?* ?** ?* ?* ?**************** ?**************** ?* ?* ;
|
||||
< 14700000 ps> : 0 0 0 0 0 1 0 ?* ?** ?* ?******** ?******** ?******** ?******** ?******** ?****** ?* ?* ?* ?* ?* ?** ?* ?* ?**************** ?**************** ?* ?* ;
|
||||
< 14750000 ps> : 0 0 0 0 0 1 0 ?* ?** ?* ?******** ?******** ?******** ?******** ?******** ?****** ?* ?* ?* ?* ?* ?** ?* ?* ?**************** ?**************** ?* ?* ;
|
||||
< 14800000 ps> : 1 0 0 0 0 1 0 ?* ?** ?* ?******** ?******** ?******** ?******** ?******** ?****** ?* ?* ?* ?* ?* ?** ?* ?* ?**************** ?**************** ?* ?* ;
|
||||
< 14850000 ps> : 1 0 0 0 0 1 0 ?* ?** ?* ?******** ?******** ?******** ?******** ?******** ?****** ?* ?* ?* ?* ?* ?** ?* ?* ?**************** ?**************** ?* ?* ;
|
||||
< 14900000 ps> : 0 0 0 0 0 1 0 ?* ?** ?* ?******** ?******** ?******** ?******** ?******** ?****** ?* ?* ?* ?* ?* ?** ?* ?* ?**************** ?**************** ?* ?* ;
|
||||
< 14950000 ps> : 0 0 0 0 0 1 0 ?* ?** ?* ?******** ?******** ?******** ?******** ?******** ?****** ?* ?* ?* ?* ?* ?** ?* ?* ?**************** ?**************** ?* ?* ;
|
||||
|
||||
end;
|
||||
|
|
@ -0,0 +1,35 @@
|
|||
; ###----------------------------------------------------------------###
|
||||
; # file : add000.u #
|
||||
; # date : Mar 26 1996 #
|
||||
; # descr. : functional test for mips #
|
||||
; ###----------------------------------------------------------------###
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # signed addition #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
val1 .equ 0x000a
|
||||
val2 .equ 0x0002
|
||||
|
||||
.org 0x00400000
|
||||
.start init
|
||||
|
||||
init:
|
||||
|
||||
addi r1 , r0 , val1
|
||||
addi r2 , r0 , val2
|
||||
add r3 , r2 , r1
|
||||
|
||||
addi r5 , r0 , (val1 + val2)
|
||||
beq r5 ,r3 , good
|
||||
; nop
|
||||
j bad
|
||||
nop
|
||||
|
||||
.org 0x004000d0
|
||||
good: j good
|
||||
nop
|
||||
bad: j bad
|
||||
nop
|
||||
.end
|
||||
|
||||
|
|
@ -0,0 +1,33 @@
|
|||
; ###----------------------------------------------------------------###
|
||||
; # file : add001.u #
|
||||
; # date : Mar 26 1996 #
|
||||
; # descr. : functional test for mips #
|
||||
; ###----------------------------------------------------------------###
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # signed addition #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
val .equ 0x0002
|
||||
|
||||
.org 0x00400000
|
||||
.start init
|
||||
|
||||
init:
|
||||
addi r1 , r0 , val
|
||||
addi r2 , r0 , val
|
||||
add r3 , r2 , r1
|
||||
|
||||
addi r11, r0 , (val + val)
|
||||
beq r11, r3, good
|
||||
nop
|
||||
j bad
|
||||
nop
|
||||
|
||||
.org 0x004000d0
|
||||
good: j good
|
||||
nop
|
||||
bad: j bad
|
||||
nop
|
||||
.end
|
||||
|
||||
|
|
@ -0,0 +1,34 @@
|
|||
; ###----------------------------------------------------------------###
|
||||
; # file : add002.u #
|
||||
; # date : Mar 26 1996 #
|
||||
; # descr. : functional test for mips #
|
||||
; ###----------------------------------------------------------------###
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # signed addition #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
val1 .equ 0x1000
|
||||
val2 .equ 0xf000
|
||||
|
||||
.org 0x00400000
|
||||
.start init
|
||||
|
||||
init:
|
||||
addi r11, r0 , val1
|
||||
addi r12, r0 , val2
|
||||
add r13, r12, r11
|
||||
|
||||
addi r6 , r0, (val1 + val2)
|
||||
beq r6 , r13,good
|
||||
nop
|
||||
j bad
|
||||
nop
|
||||
|
||||
.org 0x004000d0
|
||||
good: j good
|
||||
nop
|
||||
bad: j bad
|
||||
nop
|
||||
.end
|
||||
|
||||
|
|
@ -0,0 +1,39 @@
|
|||
; ###----------------------------------------------------------------###
|
||||
; # file : add003.u #
|
||||
; # date : Mar 26 1996 #
|
||||
; # descr. : functional test for mips #
|
||||
; ###----------------------------------------------------------------###
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # signed addition #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
val1 .equ 0xf1c1
|
||||
val2 .equ 0x1112
|
||||
|
||||
.org 0x00400000
|
||||
.start init
|
||||
|
||||
init:
|
||||
addi r1 , r0 , val1
|
||||
addi r2 , r0 , val2
|
||||
|
||||
addi r3 , r1 , 1
|
||||
addi r4 , r2 , 2
|
||||
add r17, r3 , r4
|
||||
|
||||
lui r29 , (val1 + val2) + 3
|
||||
sra r29, r29, 16
|
||||
|
||||
beq r29,r17, good
|
||||
nop
|
||||
j bad
|
||||
nop
|
||||
|
||||
.org 0x004000d0
|
||||
good: j good
|
||||
nop
|
||||
bad: j bad
|
||||
nop
|
||||
.end
|
||||
|
||||
|
|
@ -0,0 +1,39 @@
|
|||
; ###----------------------------------------------------------------###
|
||||
; # file : add004.u #
|
||||
; # date : Mar 26 1996 #
|
||||
; # descr. : functional test for mips #
|
||||
; ###----------------------------------------------------------------###
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # signed subtraction #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
vai .equ 1
|
||||
limit .equ 7
|
||||
first .equ 10
|
||||
|
||||
.org 0x00400000
|
||||
.start init
|
||||
|
||||
init :
|
||||
loadi r1 , limit
|
||||
loadi r2 , first
|
||||
|
||||
loop :
|
||||
addi r4,r0,vai
|
||||
sub r2 , r2 ,r4
|
||||
bne r2 , r1,loop
|
||||
nop
|
||||
|
||||
beq r1,r2,good
|
||||
nop
|
||||
j bad
|
||||
nop
|
||||
|
||||
.org 0x004000d0
|
||||
good: j good
|
||||
nop
|
||||
bad: j bad
|
||||
nop
|
||||
.end
|
||||
|
||||
|
|
@ -0,0 +1,63 @@
|
|||
; ###----------------------------------------------------------------###
|
||||
; # file : add005.u #
|
||||
; # date : Mar 26 1996 #
|
||||
; # descr. : functional test for mips #
|
||||
; ###----------------------------------------------------------------###
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # signed addition #
|
||||
; # each register is initialized with its number #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
increment .equ 1
|
||||
|
||||
.org 0x00400000
|
||||
.start init
|
||||
|
||||
init:
|
||||
addi r1 , r0 , increment
|
||||
addi r2 , r1 , increment
|
||||
addi r3 , r2 , increment
|
||||
addi r4 , r3 , increment
|
||||
addi r5 , r4 , increment
|
||||
addi r6 , r5 , increment
|
||||
addi r7 , r6 , increment
|
||||
addi r8 , r7 , increment
|
||||
addi r9 , r8 , increment
|
||||
addi r10, r9 , increment
|
||||
addi r11, r10, increment
|
||||
addi r12, r11, increment
|
||||
addi r13, r12, increment
|
||||
addi r14, r13, increment
|
||||
addi r15, r14, increment
|
||||
addi r16, r15, increment
|
||||
addi r17, r16, increment
|
||||
addi r18, r17, increment
|
||||
addi r19, r18, increment
|
||||
addi r20, r19, increment
|
||||
addi r21, r20, increment
|
||||
addi r22, r21, increment
|
||||
addi r23, r22, increment
|
||||
addi r24, r23, increment
|
||||
addi r25, r24, increment
|
||||
addi r26, r25, increment
|
||||
addi r27, r26, increment
|
||||
addi r28, r27, increment
|
||||
addi r29, r28, increment
|
||||
addi r30, r29, increment
|
||||
addi r31, r30, increment
|
||||
|
||||
addi r30, r0, (increment * 31)
|
||||
beq r31 ,r30 , good
|
||||
nop
|
||||
j bad
|
||||
nop
|
||||
|
||||
.org 0x004000d0
|
||||
|
||||
good: j good
|
||||
nop
|
||||
bad: j bad
|
||||
nop
|
||||
.end
|
||||
|
||||
|
|
@ -0,0 +1,30 @@
|
|||
; ###----------------------------------------------------------------###
|
||||
; # file : addu000.u #
|
||||
; # date : Mar 26 1996 #
|
||||
; # descr. : functional test for mips #
|
||||
; ###----------------------------------------------------------------###
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # unsigned addition #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
.org 0x00400000
|
||||
const .equ 0x07cb
|
||||
.start init
|
||||
|
||||
init:
|
||||
addiu r13, r0, const
|
||||
addiu r14, r0, const + 1
|
||||
|
||||
bne r14, r13,good
|
||||
nop
|
||||
j bad
|
||||
nop
|
||||
|
||||
.org 0x004000d0
|
||||
good: j good
|
||||
nop
|
||||
bad: j bad
|
||||
nop
|
||||
.end
|
||||
|
||||
|
|
@ -0,0 +1,30 @@
|
|||
; ###----------------------------------------------------------------###
|
||||
; # file : addu001.u #
|
||||
; # date : Mar 26 1996 #
|
||||
; # descr. : functional test for mips #
|
||||
; ###----------------------------------------------------------------###
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # unsigned addition #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
.org 0x00400000
|
||||
const .equ 0x34ae
|
||||
.start init
|
||||
|
||||
init:
|
||||
addiu r18, r0, const
|
||||
addiu r17, r0, const
|
||||
|
||||
beq r18, r17,good
|
||||
nop
|
||||
j bad
|
||||
nop
|
||||
|
||||
.org 0x004000d0
|
||||
good: j good
|
||||
nop
|
||||
bad: j bad
|
||||
nop
|
||||
.end
|
||||
|
||||
|
|
@ -0,0 +1,36 @@
|
|||
; ###----------------------------------------------------------------###
|
||||
; # file : addu002.u #
|
||||
; # date : Mar 26 1996 #
|
||||
; # descr. : functional test for mips #
|
||||
; ###----------------------------------------------------------------###
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # unsigned addition #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
const .equ 0x1acb
|
||||
|
||||
.org 0x00400000
|
||||
.start init
|
||||
|
||||
init:
|
||||
addiu r13, r0, const
|
||||
addiu r14, r0, const
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
addu r15, r13, r14
|
||||
|
||||
addiu r30, r0, (const + const)
|
||||
beq r30, r15,good
|
||||
nop
|
||||
j bad
|
||||
nop
|
||||
|
||||
.org 0x004000d0
|
||||
good: j good
|
||||
nop
|
||||
bad: j bad
|
||||
nop
|
||||
.end
|
||||
|
||||
|
|
@ -0,0 +1,30 @@
|
|||
; ###----------------------------------------------------------------###
|
||||
; # file : addu000.u #
|
||||
; # date : Mar 26 1996 #
|
||||
; # descr. : functional test for mips #
|
||||
; ###----------------------------------------------------------------###
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # unsigned addition #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
.org 0x00400000
|
||||
const1 .equ 0x07cb
|
||||
const2 .equ 0xffff07cb
|
||||
.start init
|
||||
|
||||
init:
|
||||
addiu r13, r0, const1
|
||||
addiu r14, r0, const2
|
||||
|
||||
bne r14, r13,bad
|
||||
nop
|
||||
nop
|
||||
|
||||
.org 0x004000d0
|
||||
good: j good
|
||||
nop
|
||||
bad: j bad
|
||||
nop
|
||||
.end
|
||||
|
||||
|
|
@ -0,0 +1,63 @@
|
|||
; ###----------------------------------------------------------------###
|
||||
; # file : and000.u #
|
||||
; # date : Mar 26 1996 #
|
||||
; # descr. : functional test for mips #
|
||||
; ###----------------------------------------------------------------###
|
||||
|
||||
.org 0x00400000
|
||||
.start init
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # Test of AND instruction in 4 steps #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
un .equ 1
|
||||
deux .equ 2
|
||||
trois .equ 3
|
||||
mask .equ 0xffff ;mask = -1
|
||||
mask1 .equ 0x00ff ;mask = -1
|
||||
mask2 .equ 0xff00 ;mask = -1
|
||||
|
||||
init:
|
||||
addiu r5 , r0 , mask ;r5 = -1
|
||||
addiu r6 , r0 , un ;r6 = 1
|
||||
|
||||
and r7 , r6 , r5 ;r7 = 1
|
||||
|
||||
bne r6 , r7, bad
|
||||
nop
|
||||
|
||||
addiu r8 , r0 , mask1
|
||||
addiu r3 , r0 , mask2
|
||||
|
||||
and r9 , r3 , r8 ;r9 = 0
|
||||
|
||||
bne r0, r9, bad
|
||||
nop
|
||||
|
||||
addiu r5 , r0 , un ;r5 = 1
|
||||
addiu r6 , r0 , trois ;r6 = 3
|
||||
|
||||
and r8 , r6 , r5 ;r8 = 1
|
||||
|
||||
bne r5,r8, bad
|
||||
nop
|
||||
|
||||
addiu r7 , r0 , deux ;r7 = 2
|
||||
addiu r9 , r0 , trois ;r9 = 3
|
||||
|
||||
and r6 , r9 , r7 ;r6 = 2
|
||||
|
||||
bne r6,r7, bad
|
||||
nop
|
||||
|
||||
j good
|
||||
nop
|
||||
|
||||
.org 0x004000d0
|
||||
good: j good
|
||||
nop
|
||||
bad: j bad
|
||||
nop
|
||||
.end
|
||||
|
||||
|
|
@ -0,0 +1,33 @@
|
|||
; ###----------------------------------------------------------------###
|
||||
; # file : and001.u #
|
||||
; # date : Mar 26 1996 #
|
||||
; # descr. : functional test for mips #
|
||||
; ###----------------------------------------------------------------###
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # and immediate #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
data1 .equ 0xd6f2
|
||||
data2 .equ 0xc451
|
||||
|
||||
.org 0x00400000
|
||||
.start init
|
||||
|
||||
init:
|
||||
addiu r6 , r0 , data1 ; r6 = data2
|
||||
andi r7 , r6 , data2 ; r7 = data1 & data2
|
||||
|
||||
loadi r3 , (data1 & data2) ; good if r7 correct
|
||||
bne r3 , r7 , bad
|
||||
|
||||
j good
|
||||
nop
|
||||
|
||||
.org 0x004000d0
|
||||
good: j good
|
||||
nop
|
||||
bad: j bad
|
||||
nop
|
||||
.end
|
||||
|
||||
|
|
@ -0,0 +1,37 @@
|
|||
|
||||
; ###----------------------------------------------------------------###
|
||||
; # file : beq000.u #
|
||||
; # date : Mar 26 1996 #
|
||||
; # descr. : functional test for mips #
|
||||
; ###----------------------------------------------------------------###
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # conditional branch #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
val1 .equ 0x000057a1
|
||||
val2 .equ 0x00000001
|
||||
val3 .equ 0x000057a2
|
||||
|
||||
.org 0x00400000
|
||||
.start init
|
||||
|
||||
init :
|
||||
loadi r7 , val1
|
||||
loadi r8 , val2
|
||||
addu r9 , r8 , r7
|
||||
|
||||
loadi r10 , val3
|
||||
|
||||
beq r10 , r9 , good
|
||||
nop
|
||||
j bad
|
||||
nop
|
||||
|
||||
.org 0x004000d0
|
||||
good: j good
|
||||
nop
|
||||
bad: j bad
|
||||
nop
|
||||
.end
|
||||
|
||||
|
|
@ -0,0 +1,36 @@
|
|||
|
||||
; ###----------------------------------------------------------------###
|
||||
; # file : beq001.u #
|
||||
; # date : nov 1996 #
|
||||
; # descr. : functional test for mips #
|
||||
; ###----------------------------------------------------------------###
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # conditional branch #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
val1 .equ 0xa7a1
|
||||
val2 .equ 0x2339
|
||||
|
||||
.org 0x00400000
|
||||
.start init
|
||||
|
||||
init :
|
||||
addi r7 ,r0 , val1
|
||||
addi r8 ,r0 , val2
|
||||
addi r9 ,r0 , (val1 - val2)
|
||||
|
||||
sub r10 , r7 , r8
|
||||
|
||||
beq r10 , r9 , good
|
||||
nop
|
||||
j bad
|
||||
nop
|
||||
|
||||
.org 0x004000d0
|
||||
good: j good
|
||||
nop
|
||||
bad: j bad
|
||||
nop
|
||||
.end
|
||||
|
||||
|
|
@ -0,0 +1,50 @@
|
|||
|
||||
; ###----------------------------------------------------------------###
|
||||
; # file : bgez000.u #
|
||||
; # date : Nov 1996 #
|
||||
; # descr. : functional test for mips #
|
||||
; ###----------------------------------------------------------------###
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # conditional branch #
|
||||
; # tests if it doesn't branch when it's not greater or #
|
||||
; # equal. Then it tests greater #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
val1 .equ 0xffffffff
|
||||
val2 .equ 0x0000ffff
|
||||
val3 .equ 0x00000001
|
||||
|
||||
.org 0x00400000
|
||||
.start init
|
||||
|
||||
init :
|
||||
lui r7 , val1
|
||||
addiu r8 , r0 , val2
|
||||
|
||||
or r10 , r7 , r8
|
||||
|
||||
bgez r10 , bad
|
||||
nop
|
||||
|
||||
addiu r9 , r10 , val3
|
||||
bgez r9 , inter
|
||||
nop
|
||||
|
||||
j bad
|
||||
nop
|
||||
|
||||
.org 0x004000d0
|
||||
|
||||
|
||||
good: j good
|
||||
nop
|
||||
bad: j bad
|
||||
nop
|
||||
inter: addiu r9 , r9 , val3
|
||||
bgez r9 , good
|
||||
nop
|
||||
j bad
|
||||
|
||||
.end
|
||||
|
||||
|
|
@ -0,0 +1,46 @@
|
|||
|
||||
; ###----------------------------------------------------------------###
|
||||
; # file : bgez001.u #
|
||||
; # date : Nov 1996 #
|
||||
; # descr. : functional test for mips #
|
||||
; ###----------------------------------------------------------------###
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # conditional branch #
|
||||
; # test if equal #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
|
||||
|
||||
val1 .equ 0x000057a1
|
||||
val2 .equ 0x000057a4
|
||||
val3 .equ 0x00000003
|
||||
|
||||
.org 0x00400000
|
||||
.start init
|
||||
|
||||
init :
|
||||
loadi r7 , val1
|
||||
loadi r8 , val2
|
||||
|
||||
sub r10 , r7 , r8
|
||||
|
||||
bgez r10 , bad
|
||||
nop
|
||||
|
||||
addiu r9 , r10 , val3
|
||||
bgez r9 , good
|
||||
nop
|
||||
|
||||
j bad
|
||||
nop
|
||||
|
||||
.org 0x004000d0
|
||||
|
||||
|
||||
good: j good
|
||||
nop
|
||||
bad: j bad
|
||||
nop
|
||||
.end
|
||||
|
||||
|
|
@ -0,0 +1,57 @@
|
|||
|
||||
; ###----------------------------------------------------------------###
|
||||
; # file : bgezal000.u #
|
||||
; # date : nov 1996 #
|
||||
; # descr. : functional test for mips #
|
||||
; ###----------------------------------------------------------------###
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # Branch if greater or equal and link #
|
||||
; # We test when it's greater , when it's lower or equal and #
|
||||
; # if it puts pc + 4 in r31 in all cases #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
const .equ 0x00000002
|
||||
val1 .equ 0x00000001
|
||||
val2 .equ 0x00000002
|
||||
val3 .equ 0x00000008
|
||||
mask .equ 0xffffffff
|
||||
mask1 .equ 0x0000ffff
|
||||
|
||||
.org 0x00400000
|
||||
|
||||
.start init
|
||||
|
||||
init:
|
||||
loadi r23, const
|
||||
loadi r24, (4 * const)
|
||||
|
||||
bgezal r0, mul2
|
||||
nop
|
||||
addiu r1 , r0 , val1
|
||||
bgezal r1 , mul2
|
||||
nop
|
||||
|
||||
lui r1 , mask
|
||||
addiu r16, r0 , mask1
|
||||
or r1 , r1 , r16
|
||||
bgezal r1 , bad
|
||||
addiu r31, r31, val3
|
||||
jr r31
|
||||
beq r24 ,r23, good
|
||||
nop
|
||||
j bad
|
||||
nop
|
||||
|
||||
mul2 :
|
||||
addu r23, r23, r23
|
||||
jr r31
|
||||
nop
|
||||
|
||||
.org 0x004000d0
|
||||
good: j good
|
||||
nop
|
||||
bad: j bad
|
||||
nop
|
||||
.end
|
||||
|
||||
|
|
@ -0,0 +1,47 @@
|
|||
|
||||
; ###----------------------------------------------------------------###
|
||||
; # file : bgtz000.u #
|
||||
; # date : Nov 1996 #
|
||||
; # descr. : functional test for mips #
|
||||
; ###----------------------------------------------------------------###
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # conditional branch #
|
||||
; # Branch if register is greater to zero #
|
||||
; # the 3 cases are tested: greater or equal or lower #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
val3 .equ 0xffffffff
|
||||
val4 .equ 0x0000ffff
|
||||
val5 .equ 0x00000005
|
||||
|
||||
.org 0x00400000
|
||||
.start init
|
||||
|
||||
init :
|
||||
lui r11, val3
|
||||
addiu r16, r0 , val4
|
||||
or r11, r11 , r16
|
||||
|
||||
bgtz r0 , bad
|
||||
nop
|
||||
|
||||
bgtz r11 , bad
|
||||
nop
|
||||
|
||||
addiu r10 , r0 , val5
|
||||
bgtz r10 , good
|
||||
nop
|
||||
|
||||
j bad
|
||||
nop
|
||||
|
||||
.org 0x004000d0
|
||||
|
||||
|
||||
good: j good
|
||||
nop
|
||||
bad: j bad
|
||||
nop
|
||||
.end
|
||||
|
||||
|
|
@ -0,0 +1,47 @@
|
|||
|
||||
; ###----------------------------------------------------------------###
|
||||
; # file : blez000.u #
|
||||
; # date : Nov 1996 #
|
||||
; # descr. : functional test for mips #
|
||||
; ###----------------------------------------------------------------###
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # conditional branch #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
mask .equ 0xffffffff
|
||||
mask1 .equ 0x0000ffff
|
||||
val1 .equ 0x00000001
|
||||
|
||||
.org 0x00400000
|
||||
.start init
|
||||
|
||||
init :
|
||||
loadi r10, val1
|
||||
|
||||
blez r10 , bad
|
||||
nop
|
||||
|
||||
blez r0 , test
|
||||
nop
|
||||
|
||||
j bad
|
||||
nop
|
||||
|
||||
test :
|
||||
lui r10 , mask
|
||||
addiu r16 , r0 , mask1
|
||||
or r10 , r10 , r16
|
||||
blez r10 , good
|
||||
j bad
|
||||
nop
|
||||
|
||||
.org 0x004000d0
|
||||
|
||||
|
||||
good: j good
|
||||
nop
|
||||
bad: j bad
|
||||
nop
|
||||
.end
|
||||
|
||||
|
|
@ -0,0 +1,47 @@
|
|||
|
||||
; ###----------------------------------------------------------------###
|
||||
; # file : bltz000.u #
|
||||
; # date : Nov 1996 #
|
||||
; # descr. : functional test for mips #
|
||||
; ###----------------------------------------------------------------###
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # conditional branch #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
mask .equ 0xffffffff
|
||||
mask1 .equ 0x0000ffff
|
||||
val1 .equ 0x00000001
|
||||
|
||||
.org 0x00400000
|
||||
.start init
|
||||
|
||||
init :
|
||||
loadi r10 , val1
|
||||
|
||||
bltz r10 , bad
|
||||
nop
|
||||
|
||||
bltz r0 , bad
|
||||
j test
|
||||
nop
|
||||
|
||||
test :
|
||||
lui r10 , mask
|
||||
addiu r16 , r0 , mask1
|
||||
or r10 , r10 , r16
|
||||
bltz r10 , good
|
||||
nop
|
||||
|
||||
j bad
|
||||
nop
|
||||
|
||||
.org 0x004000d0
|
||||
|
||||
|
||||
good: j good
|
||||
nop
|
||||
bad: j bad
|
||||
nop
|
||||
.end
|
||||
|
||||
|
|
@ -0,0 +1,62 @@
|
|||
|
||||
; ###----------------------------------------------------------------###
|
||||
; # file : bltzal000.u #
|
||||
; # date : Nov 1996 #
|
||||
; # descr. : functional test for dlx #
|
||||
; ###----------------------------------------------------------------###
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # conditional branch #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
mask .equ 0xffffffff
|
||||
mask1 .equ 0x0000fffe
|
||||
mask2 .equ 0x0000ffff
|
||||
const .equ 0x00000002
|
||||
val1 .equ 0x00000001
|
||||
val2 .equ 0x00000008
|
||||
|
||||
.org 0x00400000
|
||||
|
||||
.start init
|
||||
|
||||
init:
|
||||
loadi r23, const
|
||||
loadi r24, (4 * const)
|
||||
|
||||
lui r1 , mask
|
||||
addiu r16, r0 , mask1
|
||||
or r1 , r1 , r16
|
||||
bltzal r1 , mul2
|
||||
nop
|
||||
|
||||
lui r1 , mask
|
||||
addiu r16, r0 , mask2
|
||||
or r1 , r1 , r16
|
||||
bltzal r1 , mul2
|
||||
nop
|
||||
|
||||
loadi r1 , val1
|
||||
bltzal r1 , bad
|
||||
bltzal r0 , bad
|
||||
addiu r31 , r31 , val2
|
||||
jr r31
|
||||
|
||||
beq r24 , r23 , good
|
||||
nop
|
||||
|
||||
j bad
|
||||
nop
|
||||
|
||||
mul2 :
|
||||
addu r23 , r23 , r23
|
||||
jr r31
|
||||
nop
|
||||
|
||||
.org 0x004000d0
|
||||
good: j good
|
||||
nop
|
||||
bad: j bad
|
||||
nop
|
||||
.end
|
||||
|
||||
|
|
@ -0,0 +1,35 @@
|
|||
|
||||
; ###----------------------------------------------------------------###
|
||||
; # file : bne000.u #
|
||||
; # date : Mar 26 1996 #
|
||||
; # descr. : functional test for mips #
|
||||
; ###----------------------------------------------------------------###
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # conditional branch #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
val1 .equ 0x00000001
|
||||
val2 .equ 0x00000002
|
||||
|
||||
.org 0x00400000
|
||||
.start init
|
||||
|
||||
init :
|
||||
loadi r7 , val1
|
||||
addu r7 , r7 , r7
|
||||
loadi r8 , val2
|
||||
|
||||
|
||||
bne r7 , r8 , bad
|
||||
nop
|
||||
j good
|
||||
nop
|
||||
|
||||
.org 0x004000d0
|
||||
good: j good
|
||||
nop
|
||||
bad: j bad
|
||||
nop
|
||||
.end
|
||||
|
||||
|
|
@ -0,0 +1,36 @@
|
|||
|
||||
; ###----------------------------------------------------------------###
|
||||
; # file : bne000.u #
|
||||
; # date : nov 1996 #
|
||||
; # descr. : functional test for mips #
|
||||
; ###----------------------------------------------------------------###
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # conditional branch #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
val1 .equ 0xa7a1
|
||||
val2 .equ 0x2339
|
||||
|
||||
.org 0x00400000
|
||||
.start init
|
||||
|
||||
init :
|
||||
addi r7 ,r0 , val1
|
||||
addi r8 ,r0 , val2
|
||||
addi r9 ,r0 , (val1 - val2)
|
||||
|
||||
sub r10 , r7 , r8
|
||||
|
||||
bne r10 , r9 , bad
|
||||
nop
|
||||
j good
|
||||
nop
|
||||
|
||||
.org 0x004000d0
|
||||
good: j good
|
||||
nop
|
||||
bad: j bad
|
||||
nop
|
||||
.end
|
||||
|
||||
|
|
@ -0,0 +1,61 @@
|
|||
|
||||
; ###----------------------------------------------------------------###
|
||||
; # file : break_00.s #
|
||||
; # date : Mar 26 1996 #
|
||||
; # descr. : functional test for mips #
|
||||
; ###----------------------------------------------------------------###
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # exceptions : #
|
||||
; # - break #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
val1 .equ 0x3C
|
||||
|
||||
val .equ 0x24
|
||||
|
||||
.org 0x80000080
|
||||
.start it_handler
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # interrupt and exception handler #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
it_handler:
|
||||
|
||||
sw r29, 0 (r30)
|
||||
sw r28, 4 (r30)
|
||||
|
||||
addi r28, r0, val1
|
||||
mfc0 r29, cause
|
||||
nop
|
||||
and r29, r29, r28
|
||||
addi r27, r0, val
|
||||
bne r29, r27, not_good
|
||||
nop
|
||||
|
||||
lw r29, 0 (r30)
|
||||
lw r28, 4 (r30)
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # restore return address before returning (from EXCEPTION) #
|
||||
; # to the user program (address must be saved by the user #
|
||||
; # prior to the EXCEPTION in epc) #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
restore_return_adr:
|
||||
mfc0 r31,epc
|
||||
nop
|
||||
addi r31,r31,8
|
||||
jr r31
|
||||
rfe
|
||||
|
||||
not_good:
|
||||
mfc0 r31,epc
|
||||
nop
|
||||
addi r31,r31,4
|
||||
jr r31
|
||||
rfe
|
||||
|
||||
.end
|
||||
|
||||
|
|
@ -0,0 +1,41 @@
|
|||
; ###----------------------------------------------------------------###
|
||||
; # #
|
||||
; # file : break_00.u #
|
||||
; # date : Apr 21 1995 #
|
||||
; # descr. : functional test for mips #
|
||||
; # #
|
||||
; ###----------------------------------------------------------------###
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # software interrupt : #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
|
||||
.org 0x00400000
|
||||
.start init
|
||||
|
||||
init:
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # sotware interrupt #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
break 1
|
||||
j bad
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # check that the the trap has been done (r1 must contain #
|
||||
; # the trap number) #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
back_from_exception:
|
||||
j good ; jump to good if OK
|
||||
|
||||
.org 0x004000d0
|
||||
good: j good
|
||||
nop
|
||||
bad: j bad
|
||||
nop
|
||||
|
||||
.end
|
||||
|
||||
|
|
@ -0,0 +1,64 @@
|
|||
|
||||
; ###----------------------------------------------------------------###
|
||||
; # file : exc000.s #
|
||||
; # date : Mar 26 1996 #
|
||||
; # descr. : functional test for mips #
|
||||
; ###----------------------------------------------------------------###
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # exceptions : #
|
||||
; # - data miss alignement #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
val1 .equ 0x3C ; arithmetic overflow
|
||||
|
||||
val .equ 0x10
|
||||
|
||||
.org 0x80000080
|
||||
.start it_handler
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # interrupt and exception handler #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
it_handler:
|
||||
|
||||
sw r29, 0(r30)
|
||||
sw r28, 4(r30)
|
||||
|
||||
addiu r28,r0,val1
|
||||
mfc0 r29,cause
|
||||
nop
|
||||
and r29, r29, r28 ; data address violation ?
|
||||
addiu r27,r0,val
|
||||
bne r29,r27, other_causes
|
||||
nop
|
||||
|
||||
lw r29, 0 (r30)
|
||||
lw r28, 4 (r30)
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # restore return address before returning (from EXCEPTION) #
|
||||
; # to the user program (address must be saved by the user #
|
||||
; # prior to the EXCEPTION in epc) #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
restore_return_adr:
|
||||
mfc0 r31,epc
|
||||
nop
|
||||
addiu r31,r31,4
|
||||
j return
|
||||
nop
|
||||
|
||||
other_causes: j other_causes
|
||||
nop
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # return to the interrupted program #
|
||||
; ###--------------------------------------------------------###
|
||||
.org 0x800000d0
|
||||
return:
|
||||
rfe
|
||||
jr r31
|
||||
|
||||
.end
|
||||
|
|
@ -0,0 +1,52 @@
|
|||
|
||||
; ###----------------------------------------------------------------###
|
||||
; # file : exc100.u #
|
||||
; # date : Mar 26 1996 #
|
||||
; # descr. : functional test for mips #
|
||||
; ###----------------------------------------------------------------###
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # exceptions : #
|
||||
; # - data address miss alignment (when loading a word) #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
adr .equ 0x40000050 ; word address
|
||||
data .equ 0x9043ad6b ; data
|
||||
|
||||
.org 0x00400000
|
||||
.start init
|
||||
|
||||
init:
|
||||
loadi r31, back_from_exception
|
||||
loadi r1 , adr ; word's address
|
||||
loadi r2 , data ; init. r2 with a data
|
||||
loadi r3 , data ; init. r3 with the same value
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # load a word at a miss aligned address (data address #
|
||||
; # alignment exception) #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
lw r2 , 1 (r1 ) ; EXCEPTION (alignement)
|
||||
nop
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # check that the load has faild and the content of the #
|
||||
; # register has not been altered #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
back_from_exception:
|
||||
; check that the lw has failed
|
||||
beq r3 ,r2, good ; jump to good if OK
|
||||
nop
|
||||
j bad
|
||||
nop
|
||||
|
||||
.org 0x004000D0
|
||||
good: j good
|
||||
nop
|
||||
.org 0x004000D8
|
||||
bad: j bad
|
||||
nop
|
||||
|
||||
.end
|
||||
|
|
@ -0,0 +1,64 @@
|
|||
|
||||
; ###----------------------------------------------------------------###
|
||||
; # file : exc000.s #
|
||||
; # date : Mar 26 1996 #
|
||||
; # descr. : functional test for mips #
|
||||
; ###----------------------------------------------------------------###
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # exceptions : #
|
||||
; # - ades #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
val1 .equ 0x3C
|
||||
val .equ 0x14
|
||||
|
||||
.org 0x80000080
|
||||
.start it_handler
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # interrupt and exception handler #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
it_handler:
|
||||
|
||||
sw r29, 0(r30)
|
||||
sw r28, 4(r30)
|
||||
|
||||
addiu r28,r0,val1
|
||||
mfc0 r29,cause
|
||||
nop
|
||||
and r29, r29, r28 ; data address violation ?
|
||||
addiu r27,r0,val
|
||||
bne r29,r27, other_causes
|
||||
nop
|
||||
|
||||
lw r29, 0 (r30)
|
||||
lw r28, 4 (r30)
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # restore return address before returning (from EXCEPTION) #
|
||||
; # to the user program (address must be saved by the user #
|
||||
; # prior to the EXCEPTION in epc) #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
restore_return_adr:
|
||||
mfc0 r31,epc
|
||||
nop
|
||||
addiu r31,r31,4
|
||||
j return
|
||||
nop
|
||||
|
||||
other_causes: j other_causes
|
||||
nop
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # return to the interrupted program #
|
||||
; ###--------------------------------------------------------###
|
||||
.org 0x800000d0
|
||||
return:
|
||||
rfe
|
||||
jr r31
|
||||
|
||||
.end
|
||||
|
||||
|
|
@ -0,0 +1,61 @@
|
|||
|
||||
; ###----------------------------------------------------------------###
|
||||
; # file : exc001.u #
|
||||
; # date : Mar 26 1996 #
|
||||
; # descr. : functional test for mips #
|
||||
; ###----------------------------------------------------------------###
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # exceptions : #
|
||||
; # - data address miss alignment (when storing a word) #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
adr .equ 0x40000050
|
||||
data .equ 0x9043ad6b ; data
|
||||
|
||||
.org 0x00400000
|
||||
.start init
|
||||
|
||||
init:
|
||||
loadi r31, back_from_exception
|
||||
loadi r1 , adr ; word's address in r1
|
||||
loadi r2 , data ; data in r2
|
||||
loadi r3 , data ; same data in r3
|
||||
loadi r4 , data ^ 0xffffffff ; complemented data in r4
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # store the word to initialize the memory location #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
sw r2, 0 (r1 )
|
||||
sw r2, 4 (r1 )
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # store word at a miss aligned address #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
sw r4, 1 (r1 ) ; EXCEPTION (alignment)
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # after returning from exception, read the memory location #
|
||||
; # and check that the faulty store word has not modified the #
|
||||
; # memory #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
back_from_exception:
|
||||
lw r5 , 0 (r1 )
|
||||
bne r5,r3, bad
|
||||
nop
|
||||
lw r5 , 4 (r1 )
|
||||
bne r5,r3, bad
|
||||
nop
|
||||
j good
|
||||
nop
|
||||
|
||||
.org 0x004000d0
|
||||
good: j good
|
||||
nop
|
||||
bad: j bad
|
||||
nop
|
||||
.end
|
||||
|
||||
|
|
@ -0,0 +1,66 @@
|
|||
|
||||
; ###----------------------------------------------------------------###
|
||||
; # file : exc002.s #
|
||||
; # date : Mar 26 1996 #
|
||||
; # descr. : functional test for dlx #
|
||||
; ###----------------------------------------------------------------###
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # exceptions : #
|
||||
; # - overflow (when adding positive numbers) #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
val1 .equ 0x3C ; arithmetic overflow
|
||||
|
||||
user_prog .equ 0x00400000
|
||||
val .equ 0x30
|
||||
|
||||
.org 0x80000080
|
||||
.start it_handler
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # interrupt and exception handler #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
it_handler:
|
||||
|
||||
sw r29, 0 (r30)
|
||||
sw r28, 4 (r30)
|
||||
|
||||
addiu r28, r0 ,val1
|
||||
mfc0 r29,cause
|
||||
nop
|
||||
and r29, r29, r28 ; data address violation ?
|
||||
addiu r27,r0,val
|
||||
bne r29,r27, other_causes
|
||||
nop
|
||||
|
||||
lw r29, 0 (r30)
|
||||
lw r28, 4 (r30)
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # restore return address before returning (from EXCEPTION) #
|
||||
; # to the user program (address must be saved by the user #
|
||||
; # prior to the EXCEPTION in epc) #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
restore_return_adr:
|
||||
mfc0 r1,epc
|
||||
nop
|
||||
addiu r1,r1,4
|
||||
j return
|
||||
nop
|
||||
|
||||
other_causes: j other_causes
|
||||
nop
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # return to the interrupted program #
|
||||
; ###--------------------------------------------------------###
|
||||
.org 0x800000d0
|
||||
return:
|
||||
rfe
|
||||
jr r1
|
||||
|
||||
.end
|
||||
|
||||
|
|
@ -0,0 +1,46 @@
|
|||
|
||||
; ###----------------------------------------------------------------###
|
||||
; # file : exc002.u #
|
||||
; # date : Mar 26 1996 #
|
||||
; # descr. : functional test for mips #
|
||||
; ###----------------------------------------------------------------###
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # exceptions : #
|
||||
; # - overflow (when adding positive numbers) #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
data .equ 0x6234fe80 ; a big positive data
|
||||
|
||||
.org 0x00400000
|
||||
.start init
|
||||
|
||||
init:
|
||||
loadi r31, back_from_exception
|
||||
loadi r10, data ; big positive data in r10
|
||||
loadi r11, data ; same data in r11
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # addition generating an overflow #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
add r10, r10, r10 ; EXCEPTION (overflow)
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # after returning from exception check that r10 has not #
|
||||
; # been altered #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
back_from_exception:
|
||||
beq r10, r11, good
|
||||
nop
|
||||
j bad
|
||||
nop
|
||||
|
||||
.org 0x004000d0
|
||||
good: j good
|
||||
nop
|
||||
bad: j bad
|
||||
nop
|
||||
.end
|
||||
|
||||
|
|
@ -0,0 +1,68 @@
|
|||
|
||||
; ###----------------------------------------------------------------###
|
||||
; # file : exc003.s #
|
||||
; # date : Mar 26 1996 #
|
||||
; # descr. : functional test for mips #
|
||||
; ###----------------------------------------------------------------###
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # exceptions : #
|
||||
; # - overflow (when adding positive numbers) #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
val1 .equ 0x3C ; arithmetic overflow
|
||||
|
||||
system_stack .equ 0xC0000000 ; system stack address
|
||||
|
||||
user_prog .equ 0x00400000
|
||||
val .equ 0x30
|
||||
|
||||
.org 0x80000080
|
||||
.start it_handler
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # interrupt and exception handler #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
it_handler:
|
||||
|
||||
sw r29, 0 (r30)
|
||||
sw r28, 4 (r30)
|
||||
|
||||
addi r28, r0 ,val1
|
||||
mfc0 r29,cause
|
||||
nop
|
||||
and r29, r29, r28 ; data address violation ?
|
||||
addiu r27,r0,val
|
||||
bne r29,r27, other_causes
|
||||
nop
|
||||
|
||||
lw r29, 0 (r30)
|
||||
lw r28, 4 (r30)
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # restore return address before returning (from EXCEPTION) #
|
||||
; # to the user program (address must be saved by the user #
|
||||
; # prior to the EXCEPTION in epc) #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
restore_return_adr:
|
||||
mfc0 r1,epc
|
||||
nop
|
||||
addiu r1,r1,4
|
||||
j return
|
||||
nop
|
||||
|
||||
other_causes: j other_causes
|
||||
nop
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # return to the interrupted program #
|
||||
; ###--------------------------------------------------------###
|
||||
.org 0x800000d0
|
||||
return:
|
||||
rfe
|
||||
jr r1
|
||||
|
||||
.end
|
||||
|
||||
|
|
@ -0,0 +1,47 @@
|
|||
|
||||
; ###----------------------------------------------------------------###
|
||||
; # file : exc003.u #
|
||||
; # date : Mar 26 1996 #
|
||||
; # descr. : functional test for mips #
|
||||
; ###----------------------------------------------------------------###
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # exceptions : #
|
||||
; # - overflow (when subtracting from a positive number) #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
data .equ 0x52d4aec6 ; a big positive data
|
||||
|
||||
.org 0x00400000
|
||||
.start init
|
||||
|
||||
init:
|
||||
loadi r31, back_from_exception
|
||||
loadi r10, data ; big positive data in r10
|
||||
loadi r11, data ; same data in r11
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # substract generating an overflow #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
sub r12, r0 , r10
|
||||
sub r10, r12, r10 ; EXCEPTION (overflow)
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # after returning from exception check that r10 has not #
|
||||
; # been altered #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
back_from_exception:
|
||||
bne r10, r11,bad
|
||||
nop
|
||||
j good
|
||||
nop
|
||||
|
||||
.org 0x004000D0
|
||||
good: j good
|
||||
nop
|
||||
bad: j bad
|
||||
nop
|
||||
.end
|
||||
|
||||
|
|
@ -0,0 +1,66 @@
|
|||
|
||||
; ###----------------------------------------------------------------###
|
||||
; # file : exc004.s #
|
||||
; # date : Mar 26 1996 #
|
||||
; # descr. : functional test for mips #
|
||||
; ###----------------------------------------------------------------###
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # exceptions : #
|
||||
; # - overflow (when adding positive numbers) #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
val1 .equ 0x3C ; arithmetic overflow
|
||||
|
||||
user_prog .equ 0x00400000
|
||||
val .equ 0x30
|
||||
|
||||
.org 0x80000080
|
||||
.start it_handler
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # interrupt and exception handler #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
it_handler:
|
||||
|
||||
sw r29, 0 (r30)
|
||||
sw r28, 4 (r30)
|
||||
|
||||
addi r28, r0 ,val1
|
||||
mfc0 r29,cause
|
||||
nop
|
||||
and r29, r29, r28 ; data address violation ?
|
||||
addiu r27,r0,val
|
||||
bne r29,r27, other_causes
|
||||
nop
|
||||
|
||||
lw r29, 0 (r30)
|
||||
lw r28, 4 (r30)
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # restore return address before returning (from EXCEPTION) #
|
||||
; # to the user program (address must be saved by the user #
|
||||
; # prior to the EXCEPTION in epc) #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
restore_return_adr:
|
||||
mfc0 r1,epc
|
||||
nop
|
||||
addiu r1,r1,4
|
||||
j return
|
||||
nop
|
||||
|
||||
other_causes: j other_causes
|
||||
nop
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # return to the interrupted program #
|
||||
; ###--------------------------------------------------------###
|
||||
.org 0x800000d0
|
||||
return:
|
||||
rfe
|
||||
jr r1
|
||||
|
||||
.end
|
||||
|
||||
|
|
@ -0,0 +1,46 @@
|
|||
|
||||
; ###----------------------------------------------------------------###
|
||||
; # file : exc004.u #
|
||||
; # date : Mar 26 1996 #
|
||||
; # descr. : functional test for mips #
|
||||
; ###----------------------------------------------------------------###
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # exceptions : #
|
||||
; # - overflow (when adding negative numbers) #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
data .equ 0xb2305ec0 ; a big negative data
|
||||
|
||||
.org 0x00400000
|
||||
.start init
|
||||
|
||||
init:
|
||||
loadi r31, back_from_exception
|
||||
loadi r10, data ; big positive data in r10
|
||||
loadi r11, data ; same data in r11
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # addtion generating an overflow #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
add r10, r10, r10 ; EXCEPTION (overflow)
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # after returning from exception check that r10 has not #
|
||||
; # been altered #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
back_from_exception:
|
||||
bne r10,r11, bad
|
||||
nop
|
||||
j good
|
||||
nop
|
||||
|
||||
.org 0x004000d0
|
||||
good: j good
|
||||
nop
|
||||
bad: j bad
|
||||
nop
|
||||
.end
|
||||
|
||||
|
|
@ -0,0 +1,66 @@
|
|||
|
||||
; ###----------------------------------------------------------------###
|
||||
; # file : exc005.s #
|
||||
; # date : Mar 26 1996 #
|
||||
; # descr. : functional test for mips #
|
||||
; ###----------------------------------------------------------------###
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # exceptions : #
|
||||
; # - overflow (when adding positive numbers) #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
val1 .equ 0x3C ; arithmetic overflow
|
||||
|
||||
user_prog .equ 0x00400000
|
||||
val .equ 0x30
|
||||
|
||||
.org 0x80000080
|
||||
.start it_handler
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # interrupt and exception handler #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
it_handler:
|
||||
|
||||
sw r29, 0 (r30)
|
||||
sw r28, 4 (r30)
|
||||
|
||||
addi r28, r0 ,val1
|
||||
mfc0 r29,cause
|
||||
nop
|
||||
and r29, r29, r28 ; data address violation ?
|
||||
addiu r27,r0,val
|
||||
bne r29,r27, other_causes
|
||||
nop
|
||||
|
||||
lw r29, 0 (r30)
|
||||
lw r28, 4 (r30)
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # restore return address before returning (from EXCEPTION) #
|
||||
; # to the user program (address must be saved by the user #
|
||||
; # prior to the EXCEPTION in epc) #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
restore_return_adr:
|
||||
mfc0 r1,epc
|
||||
nop
|
||||
addiu r1,r1,4
|
||||
j return
|
||||
nop
|
||||
|
||||
other_causes: j other_causes
|
||||
nop
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # return to the interrupted program #
|
||||
; ###--------------------------------------------------------###
|
||||
.org 0x800000d0
|
||||
return:
|
||||
rfe
|
||||
jr r1
|
||||
|
||||
.end
|
||||
|
||||
|
|
@ -0,0 +1,47 @@
|
|||
|
||||
; ###----------------------------------------------------------------###
|
||||
; # file : exc005.u #
|
||||
; # date : Mar 26 1996 #
|
||||
; # descr. : functional test for mips #
|
||||
; ###----------------------------------------------------------------###
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # exceptions : #
|
||||
; # - overflow (when subtracting from a negative number) #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
data .equ 0x946e3d0f ; a big negative data
|
||||
|
||||
.org 0x00400000
|
||||
.start init
|
||||
|
||||
init:
|
||||
loadi r31, back_from_exception
|
||||
loadi r10, data ; big negative data in r10
|
||||
loadi r11, data ; same data in r11
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # substract generating an overflow #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
sub r12, r0 , r10
|
||||
sub r10, r12, r10 ; EXCEPTION (overflow)
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # after returning from exception check that r10 has not #
|
||||
; # been altered #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
back_from_exception:
|
||||
bne r10,r11, bad
|
||||
nop
|
||||
j good
|
||||
nop
|
||||
|
||||
.org 0x004000d0
|
||||
good: j good
|
||||
nop
|
||||
bad: j bad
|
||||
nop
|
||||
.end
|
||||
|
||||
|
|
@ -0,0 +1,66 @@
|
|||
|
||||
; ###----------------------------------------------------------------###
|
||||
; # file : exc006.s #
|
||||
; # date : Mar 26 1996 #
|
||||
; # descr. : functional test for mips #
|
||||
; ###----------------------------------------------------------------###
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # exceptions : #
|
||||
; # - illegal instruction address (alignment) #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
val1 .equ 0x3C
|
||||
|
||||
val .equ 0x10 ; adel
|
||||
|
||||
.org 0x80000080
|
||||
.start it_handler
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # interrupt and exception handler #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
it_handler:
|
||||
|
||||
sw r29, 0 (r30)
|
||||
sw r28, 4 (r30)
|
||||
|
||||
addiu r28, r0 ,val1
|
||||
mfc0 r29,cause
|
||||
nop
|
||||
and r29, r29, r28 ; data address violation ?
|
||||
addiu r27,r0,val
|
||||
bne r29,r27, other_causes
|
||||
nop
|
||||
|
||||
lw r29, 0 (r30)
|
||||
lw r28, 4 (r30)
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # restore return address before returning (from EXCEPTION) #
|
||||
; # to the user program (address saved by the user in epc #
|
||||
; # can't be used: it's misaligned !! ) => jump at good. #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
restore_return_adr:
|
||||
;mfc0 r31,epc
|
||||
;nop
|
||||
;addiu r31,r31,4
|
||||
loadi r31, 0x004000d0
|
||||
j return
|
||||
nop
|
||||
|
||||
other_causes: j other_causes
|
||||
nop
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # return to the interrupted program #
|
||||
; ###--------------------------------------------------------###
|
||||
.org 0x800000d0
|
||||
return:
|
||||
rfe
|
||||
jr r31
|
||||
|
||||
.end
|
||||
|
||||
|
|
@ -0,0 +1,37 @@
|
|||
|
||||
; ###----------------------------------------------------------------###
|
||||
; # file : exc006.u #
|
||||
; # date : Mar 26 1996 #
|
||||
; # descr. : functional test for mips #
|
||||
; ###----------------------------------------------------------------###
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # exceptions : #
|
||||
; # - illegal instruction address (alignment) #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
.org 0x00400000
|
||||
.start init
|
||||
|
||||
init:
|
||||
loadi r31, back_from_exception
|
||||
loadi r20, target_adr + 1 ; missaligned address in r20
|
||||
target_adr:
|
||||
jr r20 ; EXCEPTION (alignment)
|
||||
nop
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # jump to good if returned from exception #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
back_from_exception:
|
||||
j good
|
||||
nop
|
||||
|
||||
.org 0x004000d0
|
||||
good: j good
|
||||
nop
|
||||
bad: j bad
|
||||
nop
|
||||
.end
|
||||
|
||||
|
|
@ -0,0 +1,62 @@
|
|||
|
||||
; ###----------------------------------------------------------------###
|
||||
; # file : exc007.s #
|
||||
; # date : Mar 26 1996 #
|
||||
; # descr. : functional test for mips #
|
||||
; ###----------------------------------------------------------------###
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # exceptions : #
|
||||
; # - adel #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
val1 .equ 0x3C
|
||||
|
||||
user_prog .equ 0x00400000
|
||||
val .equ 0x10 ; adel
|
||||
|
||||
.org 0x80000080
|
||||
.start it_handler
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # interrupt and exception handler #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
it_handler:
|
||||
|
||||
sw r29, 0 (r30)
|
||||
sw r28, 4 (r30)
|
||||
|
||||
addiu r28, r0 ,val1
|
||||
addiu r27,r0,val
|
||||
mfc0 r29,cause
|
||||
nop
|
||||
and r29, r29, r28 ; data address violation ?
|
||||
bne r27,r29, other_causes
|
||||
nop
|
||||
|
||||
lw r29, 0 (r30)
|
||||
lw r28, 4 (r30)
|
||||
|
||||
j return
|
||||
; ###--------------------------------------------------------###
|
||||
; # restore return address before returning (from EXCEPTION) #
|
||||
; # to the user program (address must be saved by the user #
|
||||
; # prior to the EXCEPTION in epc) #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
restore_return_adr:
|
||||
|
||||
other_causes: j other_causes
|
||||
nop
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # return to the interrupted program #
|
||||
; ###--------------------------------------------------------###
|
||||
.org 0x800000d0
|
||||
return:
|
||||
rfe
|
||||
jr r31
|
||||
|
||||
.end
|
||||
|
||||
|
|
@ -0,0 +1,36 @@
|
|||
; ###----------------------------------------------------------------###
|
||||
; # file : exc007.u #
|
||||
; # date : Mar 26 1996 #
|
||||
; # descr. : functional test for mips #
|
||||
; ###----------------------------------------------------------------###
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # exceptions : #
|
||||
; # - illegal instruction address (segment) #
|
||||
; ###--------------------------------------------------------###
|
||||
it_handler .equ 0x80000080
|
||||
|
||||
.org 0x00400000
|
||||
.start init
|
||||
|
||||
init:
|
||||
loadi r31, back_from_exception
|
||||
loadi r20, it_handler
|
||||
jr r20 ; EXCEPTION (segment)
|
||||
nop
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # jump to good if returned from exception #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
back_from_exception:
|
||||
j good
|
||||
nop
|
||||
|
||||
.org 0x004000d0
|
||||
good: j good
|
||||
nop
|
||||
bad: j bad
|
||||
nop
|
||||
.end
|
||||
|
||||
|
|
@ -0,0 +1,64 @@
|
|||
|
||||
; ###----------------------------------------------------------------###
|
||||
; # file : exc008.s #
|
||||
; # date : Mar 26 1996 #
|
||||
; # descr. : functional test for mips #
|
||||
; ###----------------------------------------------------------------###
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # exceptions : #
|
||||
; # - adel #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
val1 .equ 0x3C
|
||||
val .equ 0x10 ; adel
|
||||
|
||||
.org 0x80000080
|
||||
.start it_handler
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # interrupt and exception handler #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
it_handler:
|
||||
|
||||
sw r29, 0 (r30)
|
||||
sw r28, 4 (r30)
|
||||
|
||||
addiu r28, r0 ,val1
|
||||
mfc0 r29,cause
|
||||
nop
|
||||
and r29, r29, r28 ; data address violation ?
|
||||
addiu r27,r0,val
|
||||
bne r29,r27, other_causes
|
||||
nop
|
||||
|
||||
lw r29, 0 (r30)
|
||||
lw r28, 4 (r30)
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # restore return address before returning (from EXCEPTION) #
|
||||
; # to the user program (address must be saved by the user #
|
||||
; # prior to the EXCEPTION in epc) #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
restore_return_adr:
|
||||
mfc0 r31,epc
|
||||
nop
|
||||
addiu r31,r31,4
|
||||
j return
|
||||
nop
|
||||
|
||||
other_causes: j other_causes
|
||||
nop
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # return to the interrupted program #
|
||||
; ###--------------------------------------------------------###
|
||||
.org 0x800000d0
|
||||
return:
|
||||
rfe
|
||||
jr r31
|
||||
|
||||
.end
|
||||
|
||||
|
|
@ -0,0 +1,51 @@
|
|||
|
||||
; ###----------------------------------------------------------------###
|
||||
; # file : exc008.u #
|
||||
; # date : Mar 26 1996 #
|
||||
; # descr. : functional test for mips #
|
||||
; ###----------------------------------------------------------------###
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # exceptions : #
|
||||
; # - illegal data address (segment when loading) #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
adr .equ 0xC000003c ; data adr in system segment
|
||||
data .equ 0x9043ad6b ; data
|
||||
|
||||
.org 0x00400000
|
||||
.start init
|
||||
|
||||
init:
|
||||
loadi r31, back_from_exception
|
||||
loadi r1 , adr ; word's address
|
||||
loadi r2 , data ; init. r2 with a data
|
||||
loadi r3 , data ; init. r3 with the same value
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # load a word at a miss segmented address (data address #
|
||||
; # segment exception) #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
lw r2 , 0 (r1 ) ; EXCEPTION (segment)
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # check that the load has faild and the content of the #
|
||||
; # register has not been altered #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
back_from_exception:
|
||||
; check that the lw has failed
|
||||
beq r2 ,r3, good ; jump to good if OK
|
||||
nop
|
||||
j bad
|
||||
nop
|
||||
|
||||
.org 0x004000d0
|
||||
good: j good
|
||||
nop
|
||||
bad: j bad
|
||||
nop
|
||||
|
||||
.end
|
||||
|
||||
|
|
@ -0,0 +1,64 @@
|
|||
|
||||
; ###----------------------------------------------------------------###
|
||||
; # file : exc009.s #
|
||||
; # date : Mar 26 1996 #
|
||||
; # descr. : functional test for mips #
|
||||
; ###----------------------------------------------------------------###
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # exceptions : #
|
||||
; # - ri (when executing a mfc0) #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
val1 .equ 0x3C
|
||||
val .equ 0x2C ; cpu
|
||||
|
||||
.org 0x80000080
|
||||
.start it_handler
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # interrupt and exception handler #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
it_handler:
|
||||
|
||||
sw r29, 0 (r30)
|
||||
sw r28, 4 (r30)
|
||||
|
||||
addiu r28, r0 ,val1
|
||||
mfc0 r29,cause
|
||||
nop
|
||||
and r29, r29, r28 ; data address violation ?
|
||||
addiu r27,r0,val
|
||||
bne r29,r27, other_causes
|
||||
nop
|
||||
|
||||
lw r29, 0 (r30)
|
||||
lw r28, 4 (r30)
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # restore return address before returning (from EXCEPTION) #
|
||||
; # to the user program (address must be saved by the user #
|
||||
; # prior to the EXCEPTION in epc) #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
restore_return_adr:
|
||||
mfc0 r31,epc
|
||||
nop
|
||||
addiu r31,r31,8
|
||||
j return
|
||||
nop
|
||||
|
||||
other_causes: j other_causes
|
||||
nop
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # return to the interrupted program #
|
||||
; ###--------------------------------------------------------###
|
||||
.org 0x800000d0
|
||||
return:
|
||||
rfe
|
||||
jr r31
|
||||
|
||||
.end
|
||||
|
||||
|
|
@ -0,0 +1,49 @@
|
|||
|
||||
; ###----------------------------------------------------------------###
|
||||
; # file : exc009.u #
|
||||
; # date : Mar 26 1996 #
|
||||
; # descr. : functional test for mips #
|
||||
; ###----------------------------------------------------------------###
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # exceptions : #
|
||||
; # - illegal instruction (when executing a mfc0) #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
data .equ 0x324f6b71
|
||||
.org 0x00400000
|
||||
.start init
|
||||
|
||||
init:
|
||||
loadi r31, back_from_exception
|
||||
loadi r1 , data ; init. r2 with a data
|
||||
loadi r2 , data ; init. r3 with the same value
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # move SR into r1. This must generate an exception #
|
||||
; # (coprocesseur inaccessible) #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
mfc0 r1 , status ; EXCEPTION (privileged)
|
||||
nop
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # check that the load has faild and the content of the #
|
||||
; # register has not been altered #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
back_from_exception:
|
||||
; check that the move has failed
|
||||
beq r1 , r2 ,good ; jump to good if OK
|
||||
nop
|
||||
j bad
|
||||
nop
|
||||
|
||||
.org 0x004000d0
|
||||
good: j good
|
||||
nop
|
||||
bad: j bad
|
||||
nop
|
||||
|
||||
.end
|
||||
|
||||
|
|
@ -0,0 +1,61 @@
|
|||
|
||||
; ###----------------------------------------------------------------###
|
||||
; # file : exc010.s #
|
||||
; # date : Mar 26 1996 #
|
||||
; # descr. : functional test for mips #
|
||||
; ###----------------------------------------------------------------###
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # exceptions : #
|
||||
; # - ri #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
val1 .equ 0x3C
|
||||
val .equ 0x2C ; cpu (copro inaccessible..)
|
||||
|
||||
.org 0x80000080
|
||||
.start it_handler
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # interrupt and exception handler #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
it_handler:
|
||||
|
||||
sw r29, 0 (r30)
|
||||
sw r28, 4 (r30)
|
||||
|
||||
addiu r28, r0 ,val1
|
||||
mfc0 r29,cause
|
||||
nop
|
||||
and r29, r29, r28 ; data address violation ?
|
||||
addiu r27,r0,val
|
||||
bne r29,r27, other_causes
|
||||
nop
|
||||
|
||||
lw r29, 0 (r30)
|
||||
lw r28, 4 (r30)
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # restore return address before returning (from EXCEPTION) #
|
||||
; # to the user program (address must be saved by the user #
|
||||
; # prior to the EXCEPTION in epc) #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
restore_return_adr:
|
||||
j return
|
||||
nop
|
||||
|
||||
other_causes: j other_causes
|
||||
nop
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # return to the interrupted program #
|
||||
; ###--------------------------------------------------------###
|
||||
.org 0x800000d0
|
||||
return:
|
||||
rfe
|
||||
jr r31
|
||||
|
||||
.end
|
||||
|
||||
|
|
@ -0,0 +1,45 @@
|
|||
|
||||
; ###----------------------------------------------------------------###
|
||||
; # file : exc010.u #
|
||||
; # date : Mar 26 1996 #
|
||||
; # descr. : functional test for mips #
|
||||
; ###----------------------------------------------------------------###
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # exceptions : #
|
||||
; # - illegal instruction (when executing a mtc0) #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
new_sr .equ 0x00000000 ; try to set system mode
|
||||
.org 0x00400000
|
||||
.start init
|
||||
|
||||
init:
|
||||
loadi r1 , new_sr ; init. r2 with the desired
|
||||
;+value of sr
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # move r1 into sr. This must generate an exception #
|
||||
; # (privileged instruction) #
|
||||
; ###--------------------------------------------------------###
|
||||
loadi r31,back_from_exception
|
||||
mtc0 r1, status ; EXCEPTION (privileged)
|
||||
nop
|
||||
j bad
|
||||
nop
|
||||
|
||||
back_from_exception:
|
||||
loadi r31,good
|
||||
rfe ; EXCEPTION (privileged)
|
||||
nop
|
||||
j bad
|
||||
nop
|
||||
|
||||
.org 0x004000d0
|
||||
good: j good
|
||||
nop
|
||||
bad: j bad
|
||||
nop
|
||||
|
||||
.end
|
||||
|
||||
|
|
@ -0,0 +1,64 @@
|
|||
|
||||
; ###----------------------------------------------------------------###
|
||||
; # file : exc011.s #
|
||||
; # date : Mar 26 1996 #
|
||||
; # descr. : functional test for mips #
|
||||
; ###----------------------------------------------------------------###
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # exceptions : #
|
||||
; # - adel (when loading a half-word) #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
val1 .equ 0x3C
|
||||
val .equ 0x10 ; adel
|
||||
|
||||
.org 0x80000080
|
||||
.start it_handler
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # interrupt and exception handler #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
it_handler:
|
||||
|
||||
sw r29, 0 (r30)
|
||||
sw r28, 4 (r30)
|
||||
|
||||
addiu r28, r0 ,val1
|
||||
mfc0 r29,cause
|
||||
nop
|
||||
and r29, r29, r28 ; data address violation ?
|
||||
addiu r27,r0,val
|
||||
bne r29,r27, other_causes
|
||||
nop
|
||||
|
||||
lw r29, 0 (r30)
|
||||
lw r28, 4 (r30)
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # restore return address before returning (from EXCEPTION) #
|
||||
; # to the user program (address must be saved by the user #
|
||||
; # prior to the EXCEPTION in epc) #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
restore_return_adr:
|
||||
mfc0 r31,epc
|
||||
nop
|
||||
addiu r31,r31,4
|
||||
j return
|
||||
nop
|
||||
|
||||
other_causes: j other_causes
|
||||
nop
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # return to the interrupted program #
|
||||
; ###--------------------------------------------------------###
|
||||
.org 0x800000d0
|
||||
return:
|
||||
rfe
|
||||
jr r31
|
||||
|
||||
.end
|
||||
|
||||
|
|
@ -0,0 +1,51 @@
|
|||
|
||||
; ###----------------------------------------------------------------###
|
||||
; # file : exc011.u #
|
||||
; # date : Mar 26 1996 #
|
||||
; # descr. : functional test for mips #
|
||||
; ###----------------------------------------------------------------###
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # exceptions : #
|
||||
; # - data address miss alignment (when loading a half-word) #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
adr .equ 0x40000050 ; miss aligned word address
|
||||
data .equ 0x9043ad6b ; data
|
||||
|
||||
.org 0x00400000
|
||||
.start init
|
||||
|
||||
init:
|
||||
loadi r31, back_from_exception
|
||||
loadi r1 , adr ; half word's address
|
||||
loadi r2 , data ; init. r2 with a data
|
||||
loadi r3 , data ; init. r3 with the same value
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # load a half-word at a miss aligned address (data address #
|
||||
; # alignment exception) #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
lh r2 , 1 (r1 ) ; EXCEPTION (alignement)
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # check that the load has faild and the content of the #
|
||||
; # register has not been altered #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
back_from_exception:
|
||||
; check that the lh has failed
|
||||
beq r2 ,r3, good ; jump to good if OK
|
||||
nop
|
||||
j bad
|
||||
nop
|
||||
|
||||
.org 0x004000d0
|
||||
good: j good
|
||||
nop
|
||||
bad: j bad
|
||||
nop
|
||||
|
||||
.end
|
||||
|
||||
|
|
@ -0,0 +1,64 @@
|
|||
|
||||
; ###----------------------------------------------------------------###
|
||||
; # file : exc012.s #
|
||||
; # date : Mar 26 1996 #
|
||||
; # descr. : functional test for mips #
|
||||
; ###----------------------------------------------------------------###
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # exceptions : #
|
||||
; # - ades (when storing a word) #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
val1 .equ 0x3C
|
||||
val .equ 0x14 ; ades
|
||||
|
||||
.org 0x80000080
|
||||
.start it_handler
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # interrupt and exception handler #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
it_handler:
|
||||
|
||||
sw r29, 0 (r30)
|
||||
sw r28, 4 (r30)
|
||||
|
||||
addiu r28, r0 ,val1
|
||||
mfc0 r29,cause
|
||||
nop
|
||||
and r29, r29, r28 ; data address violation ?
|
||||
addiu r27,r0,val
|
||||
bne r29,r27, other_causes
|
||||
nop
|
||||
|
||||
lw r29, 0 (r30)
|
||||
lw r28, 4 (r30)
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # restore return address before returning (from EXCEPTION) #
|
||||
; # to the user program (address must be saved by the user #
|
||||
; # prior to the EXCEPTION in epc) #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
restore_return_adr:
|
||||
mfc0 r31,epc
|
||||
nop
|
||||
addiu r31,r31,4
|
||||
j return
|
||||
nop
|
||||
|
||||
other_causes: j other_causes
|
||||
nop
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # return to the interrupted program #
|
||||
; ###--------------------------------------------------------###
|
||||
.org 0x800000d0
|
||||
return:
|
||||
rfe
|
||||
jr r31
|
||||
|
||||
.end
|
||||
|
||||
|
|
@ -0,0 +1,62 @@
|
|||
|
||||
; ###----------------------------------------------------------------###
|
||||
; # file : exc012.u #
|
||||
; # date : Mar 26 1996 #
|
||||
; # descr. : functional test for mips #
|
||||
; ###----------------------------------------------------------------###
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # exceptions : #
|
||||
; # - data address miss alignment (storing a half-word) #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
adr .equ 0x40000050
|
||||
data .equ 0x616b ; data
|
||||
|
||||
.org 0x00400000
|
||||
.start init
|
||||
|
||||
init:
|
||||
loadi r31, back_from_exception
|
||||
loadi r1 , adr ; half word's address in r1
|
||||
loadi r2 , data ; data in r2
|
||||
loadi r3 , data ; same data in r3
|
||||
loadi r4 , data ^ 0xffffffff ; complemented data in r4
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # store the word to initialize the memory location #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
sw r2, 0 (r1 )
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # store half-word at a miss aligned address #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
sh r4, 1 (r1 ) ; EXCEPTION (alignment)
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # after returning from exception, read the memory #
|
||||
; # location and check that the faulty store word has not #
|
||||
; # modified the memory #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
back_from_exception:
|
||||
lw r5 , 0 (r1 )
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # if the read word is correct branch to good #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
bne r5, r3,bad
|
||||
nop
|
||||
j good
|
||||
nop
|
||||
|
||||
.org 0x004000d0
|
||||
good: j good
|
||||
nop
|
||||
bad: j bad
|
||||
nop
|
||||
.end
|
||||
|
||||
|
|
@ -0,0 +1,68 @@
|
|||
|
||||
; ###----------------------------------------------------------------###
|
||||
; # file : exc013.s #
|
||||
; # date : Mar 26 1996 #
|
||||
; # descr. : functional test for mips #
|
||||
; ###----------------------------------------------------------------###
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # exceptions : #
|
||||
; # - sleep #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
val1 .equ 0x3C
|
||||
|
||||
system_stack .equ 0xC0000000 ; system stack address
|
||||
|
||||
user_prog .equ 0x00400000
|
||||
val .equ 0x28 ; ri
|
||||
|
||||
.org 0x80000080
|
||||
.start it_handler
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # interrupt and exception handler #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
it_handler:
|
||||
|
||||
sw r29, 0 (r30)
|
||||
sw r28, 4 (r30)
|
||||
|
||||
addiu r28, r0 ,val1
|
||||
mfc0 r29,cause
|
||||
nop
|
||||
and r29, r29, r28 ; data address violation ?
|
||||
addiu r27,r0,val
|
||||
bne r29,r27, other_causes
|
||||
nop
|
||||
|
||||
lw r29, 0 (r30)
|
||||
lw r28, 4 (r30)
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # restore return address before returning (from EXCEPTION) #
|
||||
; # to the user program (address must be saved by the user #
|
||||
; # prior to the EXCEPTION in epc) #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
restore_return_adr:
|
||||
mfc0 r1,epc
|
||||
nop
|
||||
addiu r1,r1,8
|
||||
j return
|
||||
nop
|
||||
|
||||
other_causes: j other_causes
|
||||
nop
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # return to the interrupted program #
|
||||
; ###--------------------------------------------------------###
|
||||
.org 0x800000d0
|
||||
return:
|
||||
rfe
|
||||
jr r1
|
||||
|
||||
.end
|
||||
|
||||
|
|
@ -0,0 +1,41 @@
|
|||
|
||||
; ###----------------------------------------------------------------###
|
||||
; # file : exc013.u #
|
||||
; # date : Mar 26 1996 #
|
||||
; # descr. : functional test for mips #
|
||||
; ###----------------------------------------------------------------###
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # exceptions : #
|
||||
; # - illegal instruction (when executing a sleep) #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
.org 0x00400000
|
||||
.start init
|
||||
|
||||
init:
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # Put the processor in SLEEP mode. This must generate an #
|
||||
; # exception (privileged instruction) #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
nop
|
||||
sleep ; EXCEPTION (privileged)
|
||||
|
||||
j bad
|
||||
nop
|
||||
|
||||
|
||||
back_from_exception:
|
||||
j good
|
||||
nop
|
||||
|
||||
.org 0x004000d0
|
||||
good: j good
|
||||
nop
|
||||
bad: j bad
|
||||
nop
|
||||
|
||||
.end
|
||||
|
||||
|
|
@ -0,0 +1,60 @@
|
|||
; ###----------------------------------------------------------------###
|
||||
; # file : exc014.s #
|
||||
; # date : Mar 26 1996 #
|
||||
; # descr. : functional test for mips #
|
||||
; ###----------------------------------------------------------------###
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # exceptions : #
|
||||
; # - data bus error #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
val1 .equ 0x3C ; exc mask
|
||||
val .equ 0x1C ; data bus error
|
||||
|
||||
.org 0x80000080
|
||||
.start it_handler
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # interrupt and exception handler #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
it_handler:
|
||||
|
||||
sw r29, 0 (r30)
|
||||
sw r28, 4 (r30)
|
||||
|
||||
addiu r28,r0,val1
|
||||
mfc0 r29,cause
|
||||
nop
|
||||
and r29, r29, r28 ; data bus error ?
|
||||
addiu r27,r0,val
|
||||
bne r29,r27, other_causes
|
||||
nop
|
||||
|
||||
lw r29, 0 (r30)
|
||||
lw r28, 4 (r30)
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # restore return address before returning (from EXCEPTION) #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
restore_return_adr:
|
||||
mfc0 r31,epc
|
||||
nop
|
||||
addiu r31,r31,4
|
||||
j return
|
||||
nop
|
||||
|
||||
other_causes: j other_causes
|
||||
nop
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # return to the interrupted program #
|
||||
; ###--------------------------------------------------------###
|
||||
.org 0x800000d0
|
||||
return:
|
||||
rfe
|
||||
jr r31
|
||||
|
||||
.end
|
||||
|
|
@ -0,0 +1,50 @@
|
|||
|
||||
; ###----------------------------------------------------------------###
|
||||
; # file : exc014.u #
|
||||
; # date : Mar 26 1996 #
|
||||
; # descr. : functional test for mips #
|
||||
; ###----------------------------------------------------------------###
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # exceptions : #
|
||||
; # - data bus error (when loading a word) #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
adr .equ 0x400000C8 ; data bus error address
|
||||
data .equ 0x9043ad6b ; data
|
||||
|
||||
.org 0x00400000
|
||||
.start init
|
||||
|
||||
init:
|
||||
loadi r1 , adr ; word's address
|
||||
loadi r2 , data ; init. r2 with a data
|
||||
loadi r3 , data ; init. r3 with the same value
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # load a word and dbe low (data bus error exception) #
|
||||
; # berr is driven by mips_dec.vbe... #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
lw r2 , 0 (r1 ) ; EXCEPTION (data bus error)
|
||||
nop
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # check that the load has faild and the content of the #
|
||||
; # register has not been altered #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
back_from_exception:
|
||||
beq r3 ,r2, good
|
||||
nop
|
||||
j bad
|
||||
nop
|
||||
|
||||
.org 0x004000D0
|
||||
good: j good
|
||||
nop
|
||||
.org 0x004000D8
|
||||
bad: j bad
|
||||
nop
|
||||
|
||||
.end
|
||||
|
|
@ -0,0 +1,66 @@
|
|||
|
||||
; ###----------------------------------------------------------------###
|
||||
; # file : exc015.s #
|
||||
; # date : Mar 26 1996 #
|
||||
; # descr. : functional test for dlx #
|
||||
; ###----------------------------------------------------------------###
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # exceptions : #
|
||||
; # - overflow (when adding positive numbers) #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
val1 .equ 0x3C ; arithmetic overflow
|
||||
|
||||
user_prog .equ 0x00400000
|
||||
val .equ 0x30
|
||||
|
||||
.org 0x80000080
|
||||
.start it_handler
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # interrupt and exception handler #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
it_handler:
|
||||
|
||||
sw r29, 0 (r30)
|
||||
sw r28, 4 (r30)
|
||||
|
||||
addiu r28, r0 ,val1
|
||||
mfc0 r29,cause
|
||||
nop
|
||||
and r29, r29, r28 ; data address violation ?
|
||||
addiu r27,r0,val
|
||||
bne r29,r27, other_causes
|
||||
nop
|
||||
|
||||
lw r29, 0 (r30)
|
||||
lw r28, 4 (r30)
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # restore return address before returning (from EXCEPTION) #
|
||||
; # to the user program (address must be saved by the user #
|
||||
; # prior to the EXCEPTION in epc) #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
restore_return_adr:
|
||||
mfc0 r1,epc
|
||||
nop
|
||||
addiu r1,r1,4
|
||||
j return
|
||||
nop
|
||||
|
||||
other_causes: j other_causes
|
||||
nop
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # return to the interrupted program #
|
||||
; ###--------------------------------------------------------###
|
||||
.org 0x800000d0
|
||||
return:
|
||||
rfe
|
||||
jr r1
|
||||
|
||||
.end
|
||||
|
||||
|
|
@ -0,0 +1,46 @@
|
|||
|
||||
; ###----------------------------------------------------------------###
|
||||
; # file : exc015.u #
|
||||
; # date : Mar 26 1996 #
|
||||
; # descr. : functional test for mips #
|
||||
; ###----------------------------------------------------------------###
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # exceptions : #
|
||||
; # - overflow (when adding positive numbers) #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
data .equ 0x7FFFFFFF; a big positive data
|
||||
imd_data .equ 0x6234
|
||||
|
||||
.org 0x00400000
|
||||
.start init
|
||||
|
||||
init:
|
||||
loadi r10, data ; big positive data in r10
|
||||
loadi r11, data ; same data in r11
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # addition generating an overflow #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
addi r10, r10, imd_data ; EXCEPTION (overflow)
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # after returning from exception check that r10 has not #
|
||||
; # been altered #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
back_from_exception:
|
||||
beq r10, r11, good
|
||||
nop
|
||||
j bad
|
||||
nop
|
||||
|
||||
.org 0x004000d0
|
||||
good: j good
|
||||
nop
|
||||
bad: j bad
|
||||
nop
|
||||
.end
|
||||
|
||||
|
|
@ -0,0 +1,66 @@
|
|||
|
||||
; ###----------------------------------------------------------------###
|
||||
; # file : exc016.s #
|
||||
; # date : Mar 26 1996 #
|
||||
; # descr. : functional test for mips #
|
||||
; ###----------------------------------------------------------------###
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # exceptions : #
|
||||
; # - overflow (when adding positive numbers) #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
val1 .equ 0x3C ; arithmetic overflow
|
||||
|
||||
user_prog .equ 0x00400000
|
||||
val .equ 0x30
|
||||
|
||||
.org 0x80000080
|
||||
.start it_handler
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # interrupt and exception handler #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
it_handler:
|
||||
|
||||
sw r29, 0 (r30)
|
||||
sw r28, 4 (r30)
|
||||
|
||||
addi r28, r0 ,val1
|
||||
mfc0 r29,cause
|
||||
nop
|
||||
and r29, r29, r28 ; data address violation ?
|
||||
addiu r27,r0,val
|
||||
bne r29,r27, other_causes
|
||||
nop
|
||||
|
||||
lw r29, 0 (r30)
|
||||
lw r28, 4 (r30)
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # restore return address before returning (from EXCEPTION) #
|
||||
; # to the user program (address must be saved by the user #
|
||||
; # prior to the EXCEPTION in epc) #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
restore_return_adr:
|
||||
mfc0 r1,epc
|
||||
nop
|
||||
addiu r1,r1,4
|
||||
j return
|
||||
nop
|
||||
|
||||
other_causes: j other_causes
|
||||
nop
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # return to the interrupted program #
|
||||
; ###--------------------------------------------------------###
|
||||
.org 0x800000d0
|
||||
return:
|
||||
rfe
|
||||
jr r1
|
||||
|
||||
.end
|
||||
|
||||
|
|
@ -0,0 +1,46 @@
|
|||
|
||||
; ###----------------------------------------------------------------###
|
||||
; # file : exc016.u #
|
||||
; # date : Mar 26 1996 #
|
||||
; # descr. : functional test for mips #
|
||||
; ###----------------------------------------------------------------###
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # exceptions : #
|
||||
; # - overflow (when adding negative numbers) #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
data .equ 0xb2305ec0 ; a big negative data
|
||||
|
||||
.org 0x00400000
|
||||
.start init
|
||||
|
||||
init:
|
||||
loadi r31, back_from_exception
|
||||
loadi r10, data ; big positive data in r10
|
||||
loadi r11, data ; same data in r11
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # addtion generating an overflow #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
add r10, r10, r10 ; EXCEPTION (overflow)
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # after returning from exception check that r10 has not #
|
||||
; # been altered #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
back_from_exception:
|
||||
bne r10,r11, bad
|
||||
nop
|
||||
j good
|
||||
nop
|
||||
|
||||
.org 0x004000d0
|
||||
good: j good
|
||||
nop
|
||||
bad: j bad
|
||||
nop
|
||||
.end
|
||||
|
||||
|
|
@ -0,0 +1,61 @@
|
|||
; ###----------------------------------------------------------------###
|
||||
; # file : exc017.s #
|
||||
; # date : Mar 26 1996 #
|
||||
; # descr. : functional test for mips #
|
||||
; ###----------------------------------------------------------------###
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # exceptions : #
|
||||
; # - data bus error #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
val1 .equ 0x3C ; exc mask
|
||||
val .equ 0x1C ; data bus error
|
||||
|
||||
.org 0x80000080
|
||||
.start it_handler
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # interrupt and exception handler #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
it_handler:
|
||||
|
||||
sw r29, 0 (r30)
|
||||
sw r28, 4 (r30)
|
||||
|
||||
addiu r28,r0,val1
|
||||
mfc0 r29,cause
|
||||
nop
|
||||
and r29, r29, r28 ; data bus error ?
|
||||
addiu r27,r0,val
|
||||
bne r29,r27, other_causes
|
||||
nop
|
||||
|
||||
addu r3 , r0, r2
|
||||
lw r29, 0 (r30)
|
||||
lw r28, 4 (r30)
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # restore return address before returning (from EXCEPTION) #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
restore_return_adr:
|
||||
mfc0 r31,epc
|
||||
nop
|
||||
addiu r31,r31,4
|
||||
j return
|
||||
nop
|
||||
|
||||
other_causes: j other_causes
|
||||
nop
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # return to the interrupted program #
|
||||
; ###--------------------------------------------------------###
|
||||
.org 0x800000d0
|
||||
return:
|
||||
rfe
|
||||
jr r31
|
||||
|
||||
.end
|
||||
|
|
@ -0,0 +1,49 @@
|
|||
|
||||
; ###----------------------------------------------------------------###
|
||||
; # file : exc017.u #
|
||||
; # date : Mar 26 1996 #
|
||||
; # descr. : functional test for mips #
|
||||
; ###----------------------------------------------------------------###
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # exceptions : #
|
||||
; # - data bus error (when storing a word) #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
adr .equ 0x400000C8 ; data bus error address
|
||||
data .equ 0x9043ad6b ; data
|
||||
|
||||
.org 0x00400000
|
||||
.start init
|
||||
|
||||
init:
|
||||
loadi r1 , adr ; word's address
|
||||
loadi r2 , data ; init. r2 with a data
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # store a word and dbe low (data bus error exception) #
|
||||
; # berr is driven by mips_dec.vbe... #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
sw r2, 0 (r1 ) ; EXCEPTION (data bus error)
|
||||
nop
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # If exception has been trapped, exception handler had #
|
||||
; # copy r2 in r3. #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
back_from_exception:
|
||||
beq r3 ,r2, good
|
||||
nop
|
||||
j bad
|
||||
nop
|
||||
|
||||
.org 0x004000D0
|
||||
good: j good
|
||||
nop
|
||||
.org 0x004000D8
|
||||
bad: j bad
|
||||
nop
|
||||
|
||||
.end
|
||||
|
|
@ -0,0 +1,60 @@
|
|||
; ###----------------------------------------------------------------###
|
||||
; # file : exc018.s #
|
||||
; # date : Mar 26 1996 #
|
||||
; # descr. : functional test for mips #
|
||||
; ###----------------------------------------------------------------###
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # exceptions : #
|
||||
; # - data bus error #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
val1 .equ 0x3C ; exc mask
|
||||
val .equ 0x1C ; data bus error
|
||||
|
||||
.org 0x80000080
|
||||
.start it_handler
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # interrupt and exception handler #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
it_handler:
|
||||
|
||||
sw r29, 0 (r30)
|
||||
sw r28, 4 (r30)
|
||||
|
||||
addiu r28,r0,val1
|
||||
mfc0 r29,cause
|
||||
nop
|
||||
and r29, r29, r28 ; data bus error ?
|
||||
addiu r27,r0,val
|
||||
bne r29,r27, other_causes
|
||||
nop
|
||||
|
||||
lw r29, 0 (r30)
|
||||
lw r28, 4 (r30)
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # restore return address before returning (from EXCEPTION) #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
restore_return_adr:
|
||||
mfc0 r31,epc
|
||||
nop
|
||||
addiu r31,r31,4
|
||||
j return
|
||||
nop
|
||||
|
||||
other_causes: j other_causes
|
||||
nop
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # return to the interrupted program #
|
||||
; ###--------------------------------------------------------###
|
||||
.org 0x800000d0
|
||||
return:
|
||||
rfe
|
||||
jr r31
|
||||
|
||||
.end
|
||||
|
|
@ -0,0 +1,50 @@
|
|||
|
||||
; ###----------------------------------------------------------------###
|
||||
; # file : exc018.u #
|
||||
; # date : Mar 26 1996 #
|
||||
; # descr. : functional test for mips #
|
||||
; ###----------------------------------------------------------------###
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # exceptions : #
|
||||
; # - data bus error (when loading a half) #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
adr .equ 0x400000C8 ; data bus error address
|
||||
data .equ 0x9043ad6b ; data
|
||||
|
||||
.org 0x00400000
|
||||
.start init
|
||||
|
||||
init:
|
||||
loadi r1 , adr ; word's address
|
||||
loadi r2 , data ; init. r2 with a data
|
||||
loadi r3 , data ; init. r3 with the same value
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # load an half and dbe low (data bus error exception) #
|
||||
; # berr is driven by mips_dec.vbe... #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
lh r2 , 0 (r1 ) ; EXCEPTION (data bus error)
|
||||
nop
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # check that the load has faild and the content of the #
|
||||
; # register has not been altered #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
back_from_exception:
|
||||
beq r3 ,r2, good
|
||||
nop
|
||||
j bad
|
||||
nop
|
||||
|
||||
.org 0x004000D0
|
||||
good: j good
|
||||
nop
|
||||
.org 0x004000D8
|
||||
bad: j bad
|
||||
nop
|
||||
|
||||
.end
|
||||
|
|
@ -0,0 +1,60 @@
|
|||
; ###----------------------------------------------------------------###
|
||||
; # file : exc019.s #
|
||||
; # date : Mar 26 1996 #
|
||||
; # descr. : functional test for mips #
|
||||
; ###----------------------------------------------------------------###
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # exceptions : #
|
||||
; # - data bus error #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
val1 .equ 0x3C ; exc mask
|
||||
val .equ 0x1C ; data bus error
|
||||
|
||||
.org 0x80000080
|
||||
.start it_handler
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # interrupt and exception handler #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
it_handler:
|
||||
|
||||
sw r29, 0 (r30)
|
||||
sw r28, 4 (r30)
|
||||
|
||||
addiu r28,r0,val1
|
||||
mfc0 r29,cause
|
||||
nop
|
||||
and r29, r29, r28 ; data bus error ?
|
||||
addiu r27,r0,val
|
||||
bne r29,r27, other_causes
|
||||
nop
|
||||
|
||||
lw r29, 0 (r30)
|
||||
lw r28, 4 (r30)
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # restore return address before returning (from EXCEPTION) #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
restore_return_adr:
|
||||
mfc0 r31,epc
|
||||
nop
|
||||
addiu r31,r31,4
|
||||
j return
|
||||
nop
|
||||
|
||||
other_causes: j other_causes
|
||||
nop
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # return to the interrupted program #
|
||||
; ###--------------------------------------------------------###
|
||||
.org 0x800000d0
|
||||
return:
|
||||
rfe
|
||||
jr r31
|
||||
|
||||
.end
|
||||
|
|
@ -0,0 +1,50 @@
|
|||
|
||||
; ###----------------------------------------------------------------###
|
||||
; # file : exc019.u #
|
||||
; # date : Mar 26 1996 #
|
||||
; # descr. : functional test for mips #
|
||||
; ###----------------------------------------------------------------###
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # exceptions : #
|
||||
; # - data bus error (when loading an unsigned half) #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
adr .equ 0x400000C8 ; data bus error address
|
||||
data .equ 0x9043ad6b ; data
|
||||
|
||||
.org 0x00400000
|
||||
.start init
|
||||
|
||||
init:
|
||||
loadi r1 , adr ; word's address
|
||||
loadi r2 , data ; init. r2 with a data
|
||||
loadi r3 , data ; init. r3 with the same value
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # load an unsigned half and dbe low (data bus error #
|
||||
; # exception) berr is driven by mips_dec.vbe... #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
lhu r2 , 0 (r1 ) ; EXCEPTION (data bus error)
|
||||
nop
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # check that the load has faild and the content of the #
|
||||
; # register has not been altered #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
back_from_exception:
|
||||
beq r3 ,r2, good
|
||||
nop
|
||||
j bad
|
||||
nop
|
||||
|
||||
.org 0x004000D0
|
||||
good: j good
|
||||
nop
|
||||
.org 0x004000D8
|
||||
bad: j bad
|
||||
nop
|
||||
|
||||
.end
|
||||
|
|
@ -0,0 +1,62 @@
|
|||
; ###----------------------------------------------------------------###
|
||||
; # file : exc020.s #
|
||||
; # date : Mar 26 1996 #
|
||||
; # descr. : functional test for mips #
|
||||
; ###----------------------------------------------------------------###
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # exceptions : #
|
||||
; # - data bus error #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
val1 .equ 0x3C ; exc mask
|
||||
val .equ 0x1C ; data bus error
|
||||
|
||||
.org 0x80000080
|
||||
.start it_handler
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # interrupt and exception handler #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
it_handler:
|
||||
|
||||
sw r29, 0 (r30)
|
||||
sw r28, 4 (r30)
|
||||
|
||||
addiu r28,r0,val1
|
||||
mfc0 r29,cause
|
||||
nop
|
||||
and r29, r29, r28 ; data bus error ?
|
||||
addiu r27,r0,val
|
||||
bne r29,r27, other_causes
|
||||
nop
|
||||
|
||||
addu r3 , r0 , r2
|
||||
|
||||
lw r29, 0 (r30)
|
||||
lw r28, 4 (r30)
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # restore return address before returning (from EXCEPTION) #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
restore_return_adr:
|
||||
mfc0 r31,epc
|
||||
nop
|
||||
addiu r31,r31,4
|
||||
j return
|
||||
nop
|
||||
|
||||
other_causes: j other_causes
|
||||
nop
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # return to the interrupted program #
|
||||
; ###--------------------------------------------------------###
|
||||
.org 0x800000d0
|
||||
return:
|
||||
rfe
|
||||
jr r31
|
||||
|
||||
.end
|
||||
|
|
@ -0,0 +1,48 @@
|
|||
|
||||
; ###----------------------------------------------------------------###
|
||||
; # file : exc020.u #
|
||||
; # date : Mar 26 1996 #
|
||||
; # descr. : functional test for mips #
|
||||
; ###----------------------------------------------------------------###
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # exceptions : #
|
||||
; # - data bus error (when storing an half) #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
adr .equ 0x400000C8 ; data bus error address
|
||||
data .equ 0x9043ad6b ; data
|
||||
|
||||
.org 0x00400000
|
||||
.start init
|
||||
|
||||
init:
|
||||
loadi r1 , adr ; word's address
|
||||
loadi r2 , data ; init. r2 with a data
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # store an half and dbe low (data bus error exception) #
|
||||
; # berr is driven by mips_dec.vbe... #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
sh r2, 0 (r1 ) ; EXCEPTION (data bus error)
|
||||
nop
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # If exception had been trapped, r2 == r3. #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
back_from_exception:
|
||||
beq r3 ,r2, good
|
||||
nop
|
||||
j bad
|
||||
nop
|
||||
|
||||
.org 0x004000D0
|
||||
good: j good
|
||||
nop
|
||||
.org 0x004000D8
|
||||
bad: j bad
|
||||
nop
|
||||
|
||||
.end
|
||||
|
|
@ -0,0 +1,60 @@
|
|||
; ###----------------------------------------------------------------###
|
||||
; # file : exc021.s #
|
||||
; # date : Mar 26 1996 #
|
||||
; # descr. : functional test for mips #
|
||||
; ###----------------------------------------------------------------###
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # exceptions : #
|
||||
; # - data bus error #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
val1 .equ 0x3C ; exc mask
|
||||
val .equ 0x1C ; data bus error
|
||||
|
||||
.org 0x80000080
|
||||
.start it_handler
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # interrupt and exception handler #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
it_handler:
|
||||
|
||||
sw r29, 0 (r30)
|
||||
sw r28, 4 (r30)
|
||||
|
||||
addiu r28,r0,val1
|
||||
mfc0 r29,cause
|
||||
nop
|
||||
and r29, r29, r28 ; data bus error ?
|
||||
addiu r27,r0,val
|
||||
bne r29,r27, other_causes
|
||||
nop
|
||||
|
||||
lw r29, 0 (r30)
|
||||
lw r28, 4 (r30)
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # restore return address before returning (from EXCEPTION) #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
restore_return_adr:
|
||||
mfc0 r31,epc
|
||||
nop
|
||||
addiu r31,r31,4
|
||||
j return
|
||||
nop
|
||||
|
||||
other_causes: j other_causes
|
||||
nop
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # return to the interrupted program #
|
||||
; ###--------------------------------------------------------###
|
||||
.org 0x800000d0
|
||||
return:
|
||||
rfe
|
||||
jr r31
|
||||
|
||||
.end
|
||||
|
|
@ -0,0 +1,50 @@
|
|||
|
||||
; ###----------------------------------------------------------------###
|
||||
; # file : exc021.u #
|
||||
; # date : Mar 26 1996 #
|
||||
; # descr. : functional test for mips #
|
||||
; ###----------------------------------------------------------------###
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # exceptions : #
|
||||
; # - data bus error (when loading a byte) #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
adr .equ 0x400000C8 ; data bus error address
|
||||
data .equ 0x9043ad6b ; data
|
||||
|
||||
.org 0x00400000
|
||||
.start init
|
||||
|
||||
init:
|
||||
loadi r1 , adr ; word's address
|
||||
loadi r2 , data ; init. r2 with a data
|
||||
loadi r3 , data ; init. r3 with the same value
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # load a word and dbe low (data bus error exception) #
|
||||
; # berr is driven by mips_dec.vbe... #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
lb r2 , 0 (r1 ) ; EXCEPTION (data bus error)
|
||||
nop
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # check that the load has faild and the content of the #
|
||||
; # register has not been altered #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
back_from_exception:
|
||||
beq r3 ,r2, good
|
||||
nop
|
||||
j bad
|
||||
nop
|
||||
|
||||
.org 0x004000D0
|
||||
good: j good
|
||||
nop
|
||||
.org 0x004000D8
|
||||
bad: j bad
|
||||
nop
|
||||
|
||||
.end
|
||||
|
|
@ -0,0 +1,60 @@
|
|||
; ###----------------------------------------------------------------###
|
||||
; # file : exc022.s #
|
||||
; # date : Mar 26 1996 #
|
||||
; # descr. : functional test for mips #
|
||||
; ###----------------------------------------------------------------###
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # exceptions : #
|
||||
; # - data bus error #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
val1 .equ 0x3C ; exc mask
|
||||
val .equ 0x1C ; data bus error
|
||||
|
||||
.org 0x80000080
|
||||
.start it_handler
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # interrupt and exception handler #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
it_handler:
|
||||
|
||||
sw r29, 0 (r30)
|
||||
sw r28, 4 (r30)
|
||||
|
||||
addiu r28,r0,val1
|
||||
mfc0 r29,cause
|
||||
nop
|
||||
and r29, r29, r28 ; data bus error ?
|
||||
addiu r27,r0,val
|
||||
bne r29,r27, other_causes
|
||||
nop
|
||||
|
||||
lw r29, 0 (r30)
|
||||
lw r28, 4 (r30)
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # restore return address before returning (from EXCEPTION) #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
restore_return_adr:
|
||||
mfc0 r31,epc
|
||||
nop
|
||||
addiu r31,r31,4
|
||||
j return
|
||||
nop
|
||||
|
||||
other_causes: j other_causes
|
||||
nop
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # return to the interrupted program #
|
||||
; ###--------------------------------------------------------###
|
||||
.org 0x800000d0
|
||||
return:
|
||||
rfe
|
||||
jr r31
|
||||
|
||||
.end
|
||||
|
|
@ -0,0 +1,50 @@
|
|||
|
||||
; ###----------------------------------------------------------------###
|
||||
; # file : exc022.u #
|
||||
; # date : Mar 26 1996 #
|
||||
; # descr. : functional test for mips #
|
||||
; ###----------------------------------------------------------------###
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # exceptions : #
|
||||
; # - data bus error (when loading an unsigned bute) #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
adr .equ 0x400000C8 ; data bus error address
|
||||
data .equ 0x9043ad6b ; data
|
||||
|
||||
.org 0x00400000
|
||||
.start init
|
||||
|
||||
init:
|
||||
loadi r1 , adr ; word's address
|
||||
loadi r2 , data ; init. r2 with a data
|
||||
loadi r3 , data ; init. r3 with the same value
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # load a word and dbe low (data bus error exception) #
|
||||
; # berr is driven by mips_dec.vbe... #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
lbu r2 , 0 (r1 ) ; EXCEPTION (data bus error)
|
||||
nop
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # check that the load has faild and the content of the #
|
||||
; # register has not been altered #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
back_from_exception:
|
||||
beq r3 ,r2, good
|
||||
nop
|
||||
j bad
|
||||
nop
|
||||
|
||||
.org 0x004000D0
|
||||
good: j good
|
||||
nop
|
||||
.org 0x004000D8
|
||||
bad: j bad
|
||||
nop
|
||||
|
||||
.end
|
||||
|
|
@ -0,0 +1,62 @@
|
|||
; ###----------------------------------------------------------------###
|
||||
; # file : exc023.s #
|
||||
; # date : Mar 26 1996 #
|
||||
; # descr. : functional test for mips #
|
||||
; ###----------------------------------------------------------------###
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # exceptions : #
|
||||
; # - data bus error #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
val1 .equ 0x3C ; exc mask
|
||||
val .equ 0x1C ; data bus error
|
||||
|
||||
.org 0x80000080
|
||||
.start it_handler
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # interrupt and exception handler #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
it_handler:
|
||||
|
||||
sw r29, 0 (r30)
|
||||
sw r28, 4 (r30)
|
||||
|
||||
addiu r28,r0,val1
|
||||
mfc0 r29,cause
|
||||
nop
|
||||
and r29, r29, r28 ; data bus error ?
|
||||
addiu r27,r0,val
|
||||
bne r29,r27, other_causes
|
||||
nop
|
||||
|
||||
addu r3 , r0 , r2
|
||||
|
||||
lw r29, 0 (r30)
|
||||
lw r28, 4 (r30)
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # restore return address before returning (from EXCEPTION) #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
restore_return_adr:
|
||||
mfc0 r31,epc
|
||||
nop
|
||||
addiu r31,r31,4
|
||||
j return
|
||||
nop
|
||||
|
||||
other_causes: j other_causes
|
||||
nop
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # return to the interrupted program #
|
||||
; ###--------------------------------------------------------###
|
||||
.org 0x800000d0
|
||||
return:
|
||||
rfe
|
||||
jr r31
|
||||
|
||||
.end
|
||||
|
|
@ -0,0 +1,49 @@
|
|||
|
||||
; ###----------------------------------------------------------------###
|
||||
; # file : exc023.u #
|
||||
; # date : Mar 26 1996 #
|
||||
; # descr. : functional test for mips #
|
||||
; ###----------------------------------------------------------------###
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # exceptions : #
|
||||
; # - data bus error (when storing a byte) #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
adr .equ 0x400000C8 ; data bus error address
|
||||
data .equ 0x9043ad6b ; data
|
||||
|
||||
.org 0x00400000
|
||||
.start init
|
||||
|
||||
init:
|
||||
loadi r1 , adr ; word's address
|
||||
loadi r2 , data ; init. r2 with a data
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # store a byte and dbe low (data bus error exception) #
|
||||
; # berr is driven by mips_dec.vbe... #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
sb r2, 0 (r1 ) ; EXCEPTION (data bus error)
|
||||
nop
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # check that the load has faild and the content of the #
|
||||
; # register has not been altered #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
back_from_exception:
|
||||
beq r3 ,r2, good
|
||||
nop
|
||||
j bad
|
||||
nop
|
||||
|
||||
.org 0x004000D0
|
||||
good: j good
|
||||
nop
|
||||
.org 0x004000D8
|
||||
bad: j bad
|
||||
nop
|
||||
|
||||
.end
|
||||
|
|
@ -0,0 +1,53 @@
|
|||
; ###----------------------------------------------------------------###
|
||||
; # file : exc024.s #
|
||||
; # date : Mar 26 1996 #
|
||||
; # descr. : functional test for mips #
|
||||
; ###----------------------------------------------------------------###
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # exceptions : #
|
||||
; # - instruction bus error #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
xcode_mask .equ 0x3C ; exc mask
|
||||
xcode_ibe .equ 0x18 ; instruction bus error
|
||||
|
||||
.org 0x80000080
|
||||
.start it_handler
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # interrupt and exception handler #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
it_handler:
|
||||
|
||||
sw r29, 0 (r30)
|
||||
sw r28, 4 (r30)
|
||||
|
||||
mfc0 r29,cause
|
||||
nop
|
||||
addiu r28,r0,xcode_mask
|
||||
and r29, r29, r28 ; instruction bus error ?
|
||||
addiu r27,r0,xcode_ibe
|
||||
bne r29,r27, other_causes
|
||||
nop
|
||||
|
||||
lw r29, 0 (r30)
|
||||
lw r28, 4 (r30)
|
||||
|
||||
restore_return_adr:
|
||||
j return
|
||||
nop
|
||||
|
||||
other_causes: j other_causes
|
||||
nop
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # return to the interrupted program #
|
||||
; ###--------------------------------------------------------###
|
||||
.org 0x800000d0
|
||||
return:
|
||||
rfe
|
||||
jr r31
|
||||
|
||||
.end
|
||||
|
|
@ -0,0 +1,40 @@
|
|||
|
||||
; ###----------------------------------------------------------------###
|
||||
; # file : exc024.u #
|
||||
; # date : Mar 26 1996 #
|
||||
; # descr. : functional test for mips #
|
||||
; ###----------------------------------------------------------------###
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # exceptions : #
|
||||
; # - instruction bus error #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
adr .equ 0x400000C8 ; bus error address
|
||||
|
||||
.org 0x00400000
|
||||
.start init
|
||||
|
||||
init:
|
||||
loadi r31 , good
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # jump at adr and dbe low (instruction bus error exception)#
|
||||
; # berr is driven by mips_dec.vbe... #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
loadi r1, adr
|
||||
jr r1 ; EXCEPTION (instruction bus error)
|
||||
nop
|
||||
|
||||
j bad
|
||||
nop
|
||||
|
||||
.org 0x004000D0
|
||||
good: j good
|
||||
nop
|
||||
.org 0x004000D8
|
||||
bad: j bad
|
||||
nop
|
||||
|
||||
.end
|
||||
|
|
@ -0,0 +1,25 @@
|
|||
entity foo is
|
||||
port (
|
||||
address : in bit_vector (5 downto 0);
|
||||
e_n : in bit;
|
||||
data : out mux_vector (7 downto 0) bus;
|
||||
vdd : in bit;
|
||||
vss : in bit);
|
||||
end foo;
|
||||
|
||||
architecture VBE of foo is
|
||||
|
||||
signal rom_out : bit_vector (7 downto 0);
|
||||
|
||||
begin
|
||||
|
||||
write_out : block (e_n = '0')
|
||||
begin
|
||||
data <= guarded rom_out;
|
||||
end block;
|
||||
|
||||
with address (5 downto 0) select
|
||||
rom_out <=
|
||||
X"00" when others;
|
||||
|
||||
end;
|
||||
|
|
@ -0,0 +1,9 @@
|
|||
#!/bin/sh
|
||||
|
||||
for I in *0*.u
|
||||
do
|
||||
BENCH=`basename $I .u`
|
||||
echo $BENCH
|
||||
./go-bench.sh $BENCH
|
||||
done
|
||||
|
||||
|
|
@ -0,0 +1,157 @@
|
|||
#!/bin/sh
|
||||
|
||||
LOG_RES=/tmp/res_mips_"$$"
|
||||
LOG_MSG=/tmp/msg_mips_"$$"
|
||||
|
||||
if [ $# -lt 1 ]; then
|
||||
echo "usage: $0 <bench_file>"
|
||||
exit 1
|
||||
fi
|
||||
if [ ! -f $1.u ]; then
|
||||
echo "error: can't find '$1.u'"
|
||||
exit 1
|
||||
fi
|
||||
|
||||
TOP=$ALLIANCE_TOP
|
||||
MBK_CATA_LIB=.:$TOP/cells/sclib:$TOP/cells/sxlib:$TOP/cells/padlib:$TOP/cells/dplib:$TOP/cells/dp_sxlib
|
||||
MBK_CATA_LIB=$MBK_CATA_LIB:$TOP/cells/fplib:$TOP/cells/rfg:$TOP/cells/dplib:$TOP/cells/rflib
|
||||
MBK_CATA_LIB=$MBK_CATA_LIB:../sce/
|
||||
export MBK_CATA_LIB
|
||||
MBK_IN_LO=vst
|
||||
export MBK_IN_LO
|
||||
|
||||
rm -f $LOG_RES $LOG_MSG
|
||||
|
||||
echo "################# ---- Test de : $1 ---- #################"
|
||||
|
||||
if [ -f $1.e ]; then
|
||||
cp -f $1.e rome.e
|
||||
$TOP/bin/mips_asm rome.e rome foo 1> /dev/null
|
||||
fi
|
||||
|
||||
if [ -f $1.u ]; then
|
||||
cp -f $1.u romu.u
|
||||
$TOP/bin/mips_asm romu.u romu foo 1> /dev/null
|
||||
fi
|
||||
|
||||
|
||||
|
||||
$TOP/bin/asimut -zerodelay -i 0 -bdd -p 100 mips_cpu mips_cpu $1 1> $LOG_MSG 2> $LOG_RES
|
||||
|
||||
#asimut -zerodelay -bdd -p 100 mips_cpu mips_cpu $1 2>$LOG_RES
|
||||
|
||||
#asimut -zerodelay -bdd -p 100 mips_cpu mips_cpu $1
|
||||
|
||||
|
||||
|
||||
grep -i bad $LOG_RES >/dev/null
|
||||
|
||||
#grep -i bad $LOG_RES
|
||||
|
||||
if [ $? -eq 0 ] ; then
|
||||
echo "ERROR !"
|
||||
fi
|
||||
|
||||
|
||||
grep -i good $LOG_RES > /dev/null
|
||||
|
||||
#grep -i good $LOG_RES
|
||||
|
||||
if [ $? -eq 0 ] ; then
|
||||
echo "No error, you're lucky !"
|
||||
fi
|
||||
|
||||
|
||||
|
||||
|
||||
grep -i "No such file or directory" $LOG_RES > /dev/null
|
||||
|
||||
if [ $? -eq 0 ] ; then
|
||||
echo "================= By jove ! a file is missing (asimut) ... ============== "
|
||||
grep -i "No such file or directory" $LOG_RES
|
||||
fi
|
||||
|
||||
|
||||
grep -i "No such file or directory" $LOG_MSG > /dev/null
|
||||
|
||||
if [ $? -eq 0 ] ; then
|
||||
echo "================= By jove ! Il manque un fichier (asimut) ... ============== "
|
||||
grep -i "No such file or directory" $LOG_MSG
|
||||
fi
|
||||
|
||||
|
||||
|
||||
|
||||
grep -i "core dump" $LOG_RES > /dev/null
|
||||
|
||||
if [ $? -eq 0 ] ; then
|
||||
echo "================= core dump (asimut) ... ========= "
|
||||
fi
|
||||
|
||||
grep -i "core dump" $LOG_MSG > /dev/null
|
||||
|
||||
if [ $? -eq 0 ] ; then
|
||||
echo "================= core dump (asimut) ... ========= "
|
||||
fi
|
||||
|
||||
|
||||
|
||||
grep "Error" $LOG_RES > /dev/null
|
||||
|
||||
if [ $? -eq 0 ] ; then
|
||||
echo "================= Error (asimut) ... ==== "
|
||||
grep -i "Error" $LOG_RES
|
||||
fi
|
||||
|
||||
grep "Error" $LOG_MSG > /dev/null
|
||||
|
||||
if [ $? -eq 0 ] ; then
|
||||
echo "================= Error ! (asimut) ... ==== "
|
||||
grep -i "Error" $LOG_MSG
|
||||
fi
|
||||
|
||||
|
||||
|
||||
grep "can't open file" $LOG_RES > /dev/null
|
||||
|
||||
if [ $? -eq 0 ] ; then
|
||||
echo "================= A file is missing (asimut) ... ========== "
|
||||
grep -i "can't open file" $LOG_RES
|
||||
fi
|
||||
|
||||
grep "can't open file" $LOG_MSG > /dev/null
|
||||
|
||||
if [ $? -eq 0 ] ; then
|
||||
echo "================= A file is missing (asimut) ... ========== "
|
||||
grep -i "can't open file" $LOG_MSG
|
||||
fi
|
||||
|
||||
|
||||
|
||||
grep "exception occured" $LOG_RES > /dev/null
|
||||
|
||||
if [ $? -eq 0 ] ; then
|
||||
grep "exc" $1.u > /dev/null
|
||||
if [ ! $? -eq 0 ] ; then
|
||||
echo "================= Exception (asimut) ... ======== "
|
||||
fi
|
||||
fi
|
||||
|
||||
grep "exception occured" $LOG_MSG > /dev/null
|
||||
|
||||
if [ $? -eq 0 ] ; then
|
||||
grep "exc" $1.u > /dev/null
|
||||
if [ ! $? -eq 0 ] ; then
|
||||
echo "================= Exception (asimut) ... ======== "
|
||||
fi
|
||||
fi
|
||||
|
||||
rm -f toto.vbe
|
||||
rm -f romu.u
|
||||
rm -f rome.e
|
||||
rm -f $LOG_RES
|
||||
rm -f $LOG_MSG
|
||||
|
||||
|
||||
|
||||
|
||||
|
|
@ -0,0 +1,73 @@
|
|||
; ###----------------------------------------------------------------###
|
||||
; # file : it000.s #
|
||||
; # date : Mar 26 1996 #
|
||||
; # descr. : functional test for mips #
|
||||
; ###----------------------------------------------------------------###
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # hardware interrupt #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
hardware_it0 .equ 0x00000400
|
||||
hardware_it1 .equ 0x00000800
|
||||
hardware_it2 .equ 0x00001000
|
||||
hardware_it3 .equ 0x00002000
|
||||
hardware_it4 .equ 0x00004000
|
||||
hardware_it5 .equ 0x00008000
|
||||
|
||||
timer_0 .equ 0x40000100
|
||||
timer_1 .equ 0x40000104
|
||||
timer_2 .equ 0x40000108
|
||||
timer_3 .equ 0x4000010C
|
||||
timer_4 .equ 0x40000110
|
||||
timer_5 .equ 0x40000114
|
||||
timer_rst .equ 0x40000118
|
||||
timer_sts .equ 0x4000011C
|
||||
|
||||
.org 0x80000080
|
||||
.start handler_body
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # interrupt and exception handler #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
|
||||
handler_body:
|
||||
sw r29, 0 (r30)
|
||||
sw r28, 4 (r30)
|
||||
|
||||
loadi r28, hardware_it0
|
||||
mfc0 r29, cause
|
||||
nop
|
||||
and r29, r29, r28 ; hardware interrupt 0 ?
|
||||
bne r29, r28,other_causes
|
||||
nop
|
||||
; ###---------------------------------------------###
|
||||
; # On releve la ligne it #
|
||||
; ###---------------------------------------------###
|
||||
loadi r28, timer_sts
|
||||
sw r0, 0(r28)
|
||||
|
||||
lw r29, 0 (r30)
|
||||
lw r28, 4 (r30)
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # restore return address before returning (from INTERRUPT) #
|
||||
; # to the user program (address must be saved by the user #
|
||||
; # prior to the EXCEPTION in r31) #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
return:
|
||||
rfe ; return from exception
|
||||
jr r31
|
||||
|
||||
other_causes: j other_causes
|
||||
nop
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # return to the interrupted program #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
|
||||
.end
|
||||
|
||||
|
|
@ -0,0 +1,56 @@
|
|||
; ###----------------------------------------------------------------###
|
||||
; # file : it000.u #
|
||||
; # date : Mar 26 1996 #
|
||||
; # descr. : functional test for mips #
|
||||
; ###----------------------------------------------------------------###
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # decrementation loop (with a hardware interrupt) #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
timer_0 .equ 0x40000100
|
||||
timer_1 .equ 0x40000104
|
||||
timer_2 .equ 0x40000108
|
||||
timer_3 .equ 0x4000010C
|
||||
timer_4 .equ 0x40000110
|
||||
timer_5 .equ 0x40000114
|
||||
timer_rst .equ 0x40000118
|
||||
timer_sts .equ 0x4000011C
|
||||
|
||||
value .equ 0x0008
|
||||
v_sts .equ 0x0001
|
||||
|
||||
.org 0x00400000
|
||||
.start init
|
||||
|
||||
init:
|
||||
loadi r31, back_from_int
|
||||
loadi r1 , timer_0
|
||||
addiu r2 , r0 , value
|
||||
sw r2,0(r1)
|
||||
loadi r1 , timer_sts
|
||||
addiu r2 , r0 , v_sts
|
||||
sw r2, 0(r1)
|
||||
|
||||
addiu r10, r0 , v_sts
|
||||
lui r20, 0xffff
|
||||
addiu r16, r0 , 0xfffa
|
||||
or r20, r16, r20
|
||||
loop:
|
||||
addu r20,r10,r20
|
||||
bne r20,r0, loop
|
||||
nop
|
||||
j bad
|
||||
nop
|
||||
|
||||
back_from_int:
|
||||
j good
|
||||
nop
|
||||
|
||||
.org 0x004000d0
|
||||
good: j good
|
||||
nop
|
||||
bad: j bad
|
||||
nop
|
||||
.end
|
||||
|
||||
|
|
@ -0,0 +1,73 @@
|
|||
; ###----------------------------------------------------------------###
|
||||
; # file : it001.s #
|
||||
; # date : Mar 26 1996 #
|
||||
; # descr. : functional test for mips #
|
||||
; ###----------------------------------------------------------------###
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # hardware interrupt #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
hardware_it0 .equ 0x00000400
|
||||
hardware_it1 .equ 0x00000800
|
||||
hardware_it2 .equ 0x00001000
|
||||
hardware_it3 .equ 0x00002000
|
||||
hardware_it4 .equ 0x00004000
|
||||
hardware_it5 .equ 0x00008000
|
||||
|
||||
timer_0 .equ 0x40000100
|
||||
timer_1 .equ 0x40000104
|
||||
timer_2 .equ 0x40000108
|
||||
timer_3 .equ 0x4000010C
|
||||
timer_4 .equ 0x40000110
|
||||
timer_5 .equ 0x40000114
|
||||
timer_rst .equ 0x40000118
|
||||
timer_sts .equ 0x4000011C
|
||||
|
||||
.org 0x80000080
|
||||
.start handler_body
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # interrupt and exception handler #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
|
||||
handler_body:
|
||||
sw r29, 0 (r30)
|
||||
sw r28, 4 (r30)
|
||||
|
||||
loadi r28, hardware_it1
|
||||
mfc0 r29, cause
|
||||
nop
|
||||
and r29, r29, r28 ; hardware interrupt 1 ?
|
||||
bne r29, r28,other_causes
|
||||
nop
|
||||
; ###---------------------------------------------###
|
||||
; # On releve la ligne it #
|
||||
; ###---------------------------------------------###
|
||||
loadi r28, timer_sts
|
||||
sw r0, 0(r28)
|
||||
|
||||
lw r29, 0 (r30)
|
||||
lw r28, 4 (r30)
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # restore return address before returning (from INTERRUPT) #
|
||||
; # to the user program (address must be saved by the user #
|
||||
; # prior to the EXCEPTION in r31) #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
return:
|
||||
rfe ; return from exception
|
||||
jr r31
|
||||
|
||||
other_causes: j other_causes
|
||||
nop
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # return to the interrupted program #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
|
||||
.end
|
||||
|
||||
|
|
@ -0,0 +1,56 @@
|
|||
; ###----------------------------------------------------------------###
|
||||
; # file : it001.u #
|
||||
; # date : Mar 26 1996 #
|
||||
; # descr. : functional test for mips #
|
||||
; ###----------------------------------------------------------------###
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # decrementation loop (with a hardware interrupt) #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
timer_0 .equ 0x40000100
|
||||
timer_1 .equ 0x40000104
|
||||
timer_2 .equ 0x40000108
|
||||
timer_3 .equ 0x4000010C
|
||||
timer_4 .equ 0x40000110
|
||||
timer_5 .equ 0x40000114
|
||||
timer_rst .equ 0x40000118
|
||||
timer_sts .equ 0x4000011C
|
||||
|
||||
value .equ 0x0008
|
||||
v_sts .equ 0x0002
|
||||
|
||||
.org 0x00400000
|
||||
.start init
|
||||
|
||||
init:
|
||||
loadi r31, back_from_int
|
||||
loadi r1 , timer_1
|
||||
addiu r2 , r0 , value
|
||||
sw r2, 0(r1)
|
||||
loadi r1 , timer_sts
|
||||
addiu r2 , r0 , v_sts
|
||||
sw r2, 0(r1)
|
||||
|
||||
addiu r10, r0 , 0x0001
|
||||
lui r20, 0xffff
|
||||
addiu r16, r0, 0xfffb
|
||||
or r20, r20, r16
|
||||
loop:
|
||||
addu r20,r10,r20
|
||||
bne r20,r10, loop
|
||||
nop
|
||||
j bad
|
||||
nop
|
||||
|
||||
back_from_int:
|
||||
j good
|
||||
nop
|
||||
|
||||
.org 0x004000d0
|
||||
good: j good
|
||||
nop
|
||||
bad: j bad
|
||||
nop
|
||||
.end
|
||||
|
||||
|
|
@ -0,0 +1,73 @@
|
|||
; ###----------------------------------------------------------------###
|
||||
; # file : it002.s #
|
||||
; # date : Mar 26 1996 #
|
||||
; # descr. : functional test for mips #
|
||||
; ###----------------------------------------------------------------###
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # hardware interrupt #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
hardware_it0 .equ 0x00000400
|
||||
hardware_it1 .equ 0x00000800
|
||||
hardware_it2 .equ 0x00001000
|
||||
hardware_it3 .equ 0x00002000
|
||||
hardware_it4 .equ 0x00004000
|
||||
hardware_it5 .equ 0x00008000
|
||||
|
||||
timer_0 .equ 0x40000100
|
||||
timer_1 .equ 0x40000104
|
||||
timer_2 .equ 0x40000108
|
||||
timer_3 .equ 0x4000010C
|
||||
timer_4 .equ 0x40000110
|
||||
timer_5 .equ 0x40000114
|
||||
timer_rst .equ 0x40000118
|
||||
timer_sts .equ 0x4000011C
|
||||
|
||||
.org 0x80000080
|
||||
.start handler_body
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # interrupt and exception handler #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
|
||||
handler_body:
|
||||
sw r29, 0 (r30)
|
||||
sw r28, 4 (r30)
|
||||
|
||||
loadi r28, hardware_it2
|
||||
mfc0 r29, cause
|
||||
nop
|
||||
and r29, r29, r28 ; hardware interrupt 2 ?
|
||||
bne r29, r28,other_causes
|
||||
nop
|
||||
; ###---------------------------------------------###
|
||||
; # On releve la ligne it #
|
||||
; ###---------------------------------------------###
|
||||
loadi r28, timer_sts
|
||||
sw r0, 0(r28)
|
||||
|
||||
lw r29, 0 (r30)
|
||||
lw r28, 4 (r30)
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # restore return address before returning (from INTERRUPT) #
|
||||
; # to the user program (address must be saved by the user #
|
||||
; # prior to the EXCEPTION in r31) #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
return:
|
||||
rfe ; return from exception
|
||||
jr r31
|
||||
|
||||
other_causes: j other_causes
|
||||
nop
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # return to the interrupted program #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
|
||||
.end
|
||||
|
||||
|
|
@ -0,0 +1,56 @@
|
|||
; ###----------------------------------------------------------------###
|
||||
; # file : it002.u #
|
||||
; # date : Mar 26 1996 #
|
||||
; # descr. : functional test for mips #
|
||||
; ###----------------------------------------------------------------###
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # decrementation loop (with a hardware interrupt) #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
timer_0 .equ 0x40000100
|
||||
timer_1 .equ 0x40000104
|
||||
timer_2 .equ 0x40000108
|
||||
timer_3 .equ 0x4000010C
|
||||
timer_4 .equ 0x40000110
|
||||
timer_5 .equ 0x40000114
|
||||
timer_rst .equ 0x40000118
|
||||
timer_sts .equ 0x4000011C
|
||||
|
||||
value .equ 0x0008
|
||||
v_sts .equ 0x0004
|
||||
|
||||
.org 0x00400000
|
||||
.start init
|
||||
|
||||
init:
|
||||
loadi r31, back_from_int
|
||||
loadi r1 , timer_2
|
||||
addiu r2 , r0 , value
|
||||
sw r2, 0(r1)
|
||||
loadi r1 , timer_sts
|
||||
addiu r2 , r0 , v_sts
|
||||
sw r2, 0(r1)
|
||||
|
||||
addiu r10, r0 , 0x0001
|
||||
lui r20, 0xffff
|
||||
addiu r16, r0, 0xfffa
|
||||
or r20, r20, r16
|
||||
loop:
|
||||
addu r20,r10,r20
|
||||
bne r20,r0, loop
|
||||
nop
|
||||
j bad
|
||||
nop
|
||||
|
||||
back_from_int:
|
||||
j good
|
||||
nop
|
||||
|
||||
.org 0x004000d0
|
||||
good: j good
|
||||
nop
|
||||
bad: j bad
|
||||
nop
|
||||
.end
|
||||
|
||||
|
|
@ -0,0 +1,73 @@
|
|||
; ###----------------------------------------------------------------###
|
||||
; # file : it003.s #
|
||||
; # date : Mar 26 1996 #
|
||||
; # descr. : functional test for mips #
|
||||
; ###----------------------------------------------------------------###
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # hardware interrupt #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
hardware_it0 .equ 0x00000400
|
||||
hardware_it1 .equ 0x00000800
|
||||
hardware_it2 .equ 0x00001000
|
||||
hardware_it3 .equ 0x00002000
|
||||
hardware_it4 .equ 0x00004000
|
||||
hardware_it5 .equ 0x00008000
|
||||
|
||||
timer_0 .equ 0x40000100
|
||||
timer_1 .equ 0x40000104
|
||||
timer_2 .equ 0x40000108
|
||||
timer_3 .equ 0x4000010C
|
||||
timer_4 .equ 0x40000110
|
||||
timer_5 .equ 0x40000114
|
||||
timer_rst .equ 0x40000118
|
||||
timer_sts .equ 0x4000011C
|
||||
|
||||
.org 0x80000080
|
||||
.start handler_body
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # interrupt and exception handler #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
|
||||
handler_body:
|
||||
sw r29, 0 (r30)
|
||||
sw r28, 4 (r30)
|
||||
|
||||
loadi r28, hardware_it3
|
||||
mfc0 r29, cause
|
||||
nop
|
||||
and r29, r29, r28 ; hardware interrupt 3 ?
|
||||
bne r29, r28,other_causes
|
||||
nop
|
||||
; ###---------------------------------------------###
|
||||
; # On releve la ligne it #
|
||||
; ###---------------------------------------------###
|
||||
loadi r28, timer_sts
|
||||
sw r0, 0(r28)
|
||||
|
||||
lw r29, 0 (r30)
|
||||
lw r28, 4 (r30)
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # restore return address before returning (from INTERRUPT) #
|
||||
; # to the user program (address must be saved by the user #
|
||||
; # prior to the EXCEPTION in r31) #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
return:
|
||||
rfe ; return from exception
|
||||
jr r31
|
||||
|
||||
other_causes: j other_causes
|
||||
nop
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # return to the interrupted program #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
|
||||
.end
|
||||
|
||||
|
|
@ -0,0 +1,56 @@
|
|||
; ###----------------------------------------------------------------###
|
||||
; # file : it003.u #
|
||||
; # date : Mar 26 1996 #
|
||||
; # descr. : functional test for mips #
|
||||
; ###----------------------------------------------------------------###
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # decrementation loop (with a hardware interrupt) #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
timer_0 .equ 0x40000100
|
||||
timer_1 .equ 0x40000104
|
||||
timer_2 .equ 0x40000108
|
||||
timer_3 .equ 0x4000010C
|
||||
timer_4 .equ 0x40000110
|
||||
timer_5 .equ 0x40000114
|
||||
timer_rst .equ 0x40000118
|
||||
timer_sts .equ 0x4000011C
|
||||
|
||||
value .equ 0x0008
|
||||
v_sts .equ 0x0008
|
||||
|
||||
.org 0x00400000
|
||||
.start init
|
||||
|
||||
init:
|
||||
loadi r31, back_from_int
|
||||
loadi r1 , timer_3
|
||||
addiu r2 , r0 , value
|
||||
sw r2, 0(r1)
|
||||
loadi r1 , timer_sts
|
||||
addiu r2 , r0 , v_sts
|
||||
sw r2, 0(r1)
|
||||
|
||||
addiu r10, r0 , 0x0001
|
||||
lui r20, 0xffff
|
||||
addiu r16, r0, 0xfffa
|
||||
or r20, r20, r16
|
||||
loop:
|
||||
addu r20,r10,r20
|
||||
bne r20,r0, loop
|
||||
nop
|
||||
j bad
|
||||
nop
|
||||
|
||||
back_from_int:
|
||||
j good
|
||||
nop
|
||||
|
||||
.org 0x004000d0
|
||||
good: j good
|
||||
nop
|
||||
bad: j bad
|
||||
nop
|
||||
.end
|
||||
|
||||
|
|
@ -0,0 +1,73 @@
|
|||
; ###----------------------------------------------------------------###
|
||||
; # file : it004.s #
|
||||
; # date : Mar 26 1996 #
|
||||
; # descr. : functional test for mips #
|
||||
; ###----------------------------------------------------------------###
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # hardware interrupt #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
hardware_it0 .equ 0x00000400
|
||||
hardware_it1 .equ 0x00000800
|
||||
hardware_it2 .equ 0x00001000
|
||||
hardware_it3 .equ 0x00002000
|
||||
hardware_it4 .equ 0x00004000
|
||||
hardware_it5 .equ 0x00008000
|
||||
|
||||
timer_0 .equ 0x40000100
|
||||
timer_1 .equ 0x40000104
|
||||
timer_2 .equ 0x40000108
|
||||
timer_3 .equ 0x4000010C
|
||||
timer_4 .equ 0x40000110
|
||||
timer_5 .equ 0x40000114
|
||||
timer_rst .equ 0x40000118
|
||||
timer_sts .equ 0x4000011C
|
||||
|
||||
.org 0x80000080
|
||||
.start handler_body
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # interrupt and exception handler #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
|
||||
handler_body:
|
||||
sw r29, 0 (r30)
|
||||
sw r28, 4 (r30)
|
||||
|
||||
loadi r28, hardware_it4
|
||||
mfc0 r29, cause
|
||||
nop
|
||||
and r29, r29, r28 ; hardware interrupt 4 ?
|
||||
bne r29, r28,other_causes
|
||||
nop
|
||||
; ###---------------------------------------------###
|
||||
; # On releve la ligne it #
|
||||
; ###---------------------------------------------###
|
||||
loadi r28, timer_sts
|
||||
sw r0, 0(r28)
|
||||
|
||||
lw r29, 0 (r30)
|
||||
lw r28, 4 (r30)
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # restore return address before returning (from INTERRUPT) #
|
||||
; # to the user program (address must be saved by the user #
|
||||
; # prior to the EXCEPTION in r31) #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
return:
|
||||
rfe ; return from exception
|
||||
jr r31
|
||||
|
||||
other_causes: j other_causes
|
||||
nop
|
||||
|
||||
; ###--------------------------------------------------------###
|
||||
; # return to the interrupted program #
|
||||
; ###--------------------------------------------------------###
|
||||
|
||||
|
||||
.end
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue