Modif pour Amal
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.\" $Id: fsm.5,v 1.1 1999/05/31 17:30:26 alliance Exp $
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.\" $Id: fsm.5,v 1.2 1999/09/28 08:47:50 syf Exp $
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.\" @(#)FSM.5 2.1 Sep 24 1995 UPMC ; Jacomme L.
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.\" @(#)FSM.5 2.1 Sep 24 1995 UPMC ; Jacomme L.
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.TH FSM 5 "October 1, 1997" "ASIM/LIP6" "VHDL subset of ASIM/LIP6/CAO-VLSI lab."
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.TH FSM 5 "October 1, 1997" "ASIM/LIP6" "VHDL subset of ASIM/LIP6/CAO-VLSI lab."
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@ -108,7 +108,7 @@ A case statement is used to describe, for each state, the next state and outputs
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The second process sensitivity list contains the clock signal, so this process
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The second process sensitivity list contains the clock signal, so this process
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is enabled whenever clock changes.
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is enabled whenever clock changes.
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Both Level sensitive latches, and falling edge triggered flip flops can be used for
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Both Level sensitive latches, and edge triggered flip flops can be used for
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state registers and stack implementation.
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state registers and stack implementation.
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.br
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.SH EXAMPLES
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.SH EXAMPLES
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