Ajout des objets (ana)logiques capacite, resistance et inductance.
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.\" $Id: GENLIB_LOCAP.3,v 1.1 2002/08/16 13:35:20 pnt Exp $
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.\" @(#)GENLIB_LOCAP.3 2.11 2002/08/16; Labo LIP6/ASIM; Author : Pierre Nguyen TUong
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.if t \{\
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.so man1/alc_contents.mac
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.XS \n%
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.ti 0.2i
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GENLIB_LOCAP
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.XE \}
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.TH GENLIB_LOCAP.3 "August 16, 2002" "ASIM/LIP6" "PROCEDURAL GENERATION LANGUAGE"
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.SH NAME
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GENLIB_LOCAP \- add a logical capacitor to the current netlist figure
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.SH SYNOPSYS
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.nf
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.if n \{\
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.ft B \}
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.if t \{\
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.ft CR \}
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#include <genlib.h>
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void GENLIB_LOCAP(type,capa,tcon,bcon,name)
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char type ;
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double capa ;
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char \(**tcon, \(**bcon ;
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char \(**name ;
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.ft R
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.fi
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.so man1/alc_origin.1
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.SH PARAMETERS
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.TP 20
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\fItype\fP
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Type of the capacitor to be created in the current figure
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.TP
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\fIcapa\fP
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Capacitance value.
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.TP
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\fItcon, bcon\fP
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Name of the signals on which the given capacitor connectors are to be linked. tcon is
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the top plate, bcon is the bottom plate.
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.TP
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\fIname\fP
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Capacitor name. The unicity of the name is not checked.
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.SH DESCRIPTION
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\fBLOCAP\fP adds a logical capacitor to the current
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working figure. This capacitor has each of its pin logicaly linked to the
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adequat signal given as parameter.
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The \fItype\fP attribut may take the following values:
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.TP
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\fBCAPMIM\fP
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for a MIM (metal/metal) type capacitor. The top plate (tcon) and the bottom
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plate (bcon) layers are different metal layers.
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.TP
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\fBCAPPNWELL\fP
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for a POLY/NWELL type capacitor. The top plate layer is POLY, the bottom plate
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is NWELL. Please note: this feature is not available in any technology.
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.SH ERROR
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.if n \{\
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.ft B \}
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.if t \{\
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.ft CR \}
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"GENLIB_LOCAP impossible : missing GENLIB_DEF_LOFIG"
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.ft R
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.RS
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No figure has been yet specified by a call to \fBDEF_LOFIG\fP. So it isn't
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possible to add anything. you must call \fBDEF_LOFIG\fP before any other
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netlist call.
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.RE
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.SH EXAMPLE
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.nf
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.if n \{\
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.ft B \}
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.if t \{\
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.ft CR \}
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#include <genlib.h>
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int main(int argc,char \(**argv[])
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{
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/\(** Create a figure to work on, a parallel capacitor \(**/
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GENLIB_DEF_LOFIG("parallel_cap") ;
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/\(** Define interface \(**/
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GENLIB_LOCON("i", IN, "input") ;
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GENLIB_LOCON("f", OUT, "output") ;
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/\(** Add capacitors \(**/
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GENLIB_LOCAP(CAPMIM,5.1,"input","output","cap1") ;
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GENLIB_LOCAP(CAPMIM,5.2,"input","output","cap2") ;
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/\(** Save all that on disk \(**/
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GENLIB_SAVE_LOFIG() ;
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return 0 ;
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}
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.ft R
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.fi
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.SH SEE ALSO
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.BR genlib (1),
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.BR GENLIB_BUS (3),
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.BR GENLIB_ELM (3),
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.BR GENLIB_LOINS (3),
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.BR GENLIB_LOCON (3).
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.so man1/alc_bug_report.1
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@ -0,0 +1,98 @@
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.\" $Id: GENLIB_LORES.3,v 1.1 2002/08/16 13:35:20 pnt Exp $
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.\" @(#)GENLIB_LORES.3 2.11 2002/08/16; Labo LIP6/ASIM; Author : Pierre Nguyen Tuong
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.if t \{\
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.so man1/alc_contents.mac
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.XS \n%
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.ti 0.2i
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GENLIB_LORES
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.XE \}
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.TH GENLIB_LORES.3 "August 16, 2002" "ASIM/LIP6" "PROCEDURAL GENERATION LANGUAGE"
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.SH NAME
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GENLIB_LORES \- add a logical resistor to the current netlist figure
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.SH SYNOPSYS
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.nf
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.if n \{\
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.ft B \}
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.if t \{\
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.ft CR \}
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#include <genlib.h>
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void GENLIB_LORES(type,resi,rcon1,rcon1,name)
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char type ;
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double resi ;
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char \(**rcon1, \(**rcon1 ;
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char \(**name ;
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.ft R
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.fi
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.so man1/alc_origin.1
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.SH PARAMETERS
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.TP 20
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\fItype\fP
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Type of the resistor to be created in the current figure
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.TP
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\fIresi\fP
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Resistance value.
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.TP
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\fIrcon1, rcon1\fP
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Name of the signals on which the given resistor connectors are to be linked.
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.TP
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\fIname\fP
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Resistor name. The unicity of the name is not checked.
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.SH DESCRIPTION
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\fBLORES\fP adds a logical resistor to the current
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working figure. This resistor has each of its pin logicaly linked to the adequat
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signal given as parameter. For the time being, the \fItype\fP attribut may take
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the following value:
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.TP
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\fBRESMIM\fP
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for a MIM (metal) type resistor.
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.SH ERROR
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.if n \{\
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.ft B \}
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.if t \{\
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.ft CR \}
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"GENLIB_LORES impossible : missing GENLIB_DEF_LOFIG"
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.ft R
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.RS
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No figure has been yet specified by a call to \fBDEF_LOFIG\fP. So it isn't
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possible to add anything. you must call \fBDEF_LOFIG\fP before any other
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netlist call.
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.RE
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.SH EXAMPLE
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.nf
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.if n \{\
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.ft B \}
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.if t \{\
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.ft CR \}
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#include <genlib.h>
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int main(int argc,char \(**argv[])
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{
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/\(** Create a figure to work on, a parallel resistor \(**/
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GENLIB_DEF_LOFIG("parallel_res") ;
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/\(** Define interface \(**/
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GENLIB_LOCON("i", IN, "input") ;
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GENLIB_LOCON("f", OUT, "output") ;
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/\(** Add resistors \(**/
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GENLIB_LORES(RESMIM,5.1,"input","output","res1") ;
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GENLIB_LORES(RESMIM,5.2,"input","output","res2") ;
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/\(** Save all that on disk \(**/
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GENLIB_SAVE_LOFIG() ;
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return 0 ;
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}
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.ft R
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.fi
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.SH SEE ALSO
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.BR genlib (1),
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.BR GENLIB_BUS (3),
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.BR GENLIB_ELM (3),
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.BR GENLIB_LOINS (3),
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.BR GENLIB_LOCON (3).
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.so man1/alc_bug_report.1
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.\" $Id: GENLIB_LOSELF.3,v 1.1 2002/08/16 13:35:20 pnt Exp $
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.\" @(#)GENLIB_LOSELF.3 2.11 2002/08/16; Labo LIP6/ASIM; Author : Pierre Nguyen Tuong
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.if t \{\
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.so man1/alc_contents.mac
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.XS \n%
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.ti 0.2i
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GENLIB_LOSELF
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.XE \}
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.TH GENLIB_LOSELF.3 "August 16, 2002" "ASIM/LIP6" "PROCEDURAL GENERATION LANGUAGE"
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.SH NAME
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GENLIB_LOSELF \- add a logical inductor to the current netlist figure
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.SH SYNOPSYS
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.nf
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.if n \{\
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.ft B \}
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.if t \{\
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.ft CR \}
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#include <genlib.h>
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void GENLIB_LOSELF(type,self,scon1,scon1,name)
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char type ;
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double self ;
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char \(**scon1, \(**scon1 ;
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char \(**name ;
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.ft R
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.fi
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.so man1/alc_origin.1
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.SH PARAMETERS
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.TP 20
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\fItype\fP
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Type of the inductor to be created in the current figure
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.TP
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\fIself\fP
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Inductance value.
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.TP
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\fIscon1, scon1\fP
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Name of the signals on which the given inductor connectors are to be linked.
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.TP
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\fIname\fP
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Inductor name. The unicity of the name is not checked.
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.SH DESCRIPTION
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\fBLOSELF\fP adds a logical inductor to the current
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working figure. This inductor has each of its pin logicaly linked to the adequat
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signal given as parameter. For the time being, the \fItype\fP attribut may take
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the following value:
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.TP
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\fBSELFMIM\fP
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for a MIM (metal) type inductor.
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.SH ERROR
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.if n \{\
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.ft B \}
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.if t \{\
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.ft CR \}
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"GENLIB_LOSELF impossible : missing GENLIB_DEF_LOFIG"
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.ft R
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.RS
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No figure has been yet specified by a call to \fBDEF_LOFIG\fP. So it isn't
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possible to add anything. you must call \fBDEF_LOFIG\fP before any other
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netlist call.
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.RE
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.SH EXAMPLE
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.nf
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.if n \{\
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.ft B \}
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.if t \{\
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.ft CR \}
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#include <genlib.h>
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int main(int argc,char \(**argv[])
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{
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/\(** Create a figure to work on, a parallel inductor \(**/
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GENLIB_DEF_LOFIG("parallel_self") ;
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/\(** Define interface \(**/
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GENLIB_LOCON("i", IN, "input") ;
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GENLIB_LOCON("f", OUT, "output") ;
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/\(** Add inductors \(**/
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GENLIB_LOSELF(SELFMIM,5.1,"input","output","self1") ;
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GENLIB_LOSELF(SELFMIM,5.2,"input","output","self2") ;
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/\(** Save all that on disk \(**/
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GENLIB_SAVE_LOFIG() ;
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return 0 ;
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}
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.ft R
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.fi
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.SH SEE ALSO
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.BR genlib (1),
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.BR GENLIB_BUS (3),
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.BR GENLIB_ELM (3),
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.BR GENLIB_LOINS (3),
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.BR GENLIB_LOCON (3).
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.so man1/alc_bug_report.1
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