From 8c38871484eb7db6112df19bc43afa6513c87196 Mon Sep 17 00:00:00 2001 From: Pierre Nguyen Tuong Date: Fri, 16 Aug 2002 13:35:20 +0000 Subject: [PATCH] Ajout des objets (ana)logiques capacite, resistance et inductance. --- alliance/src/genlib/man3/GENLIB_LOCAP.3 | 104 +++++++++++++++++++++++ alliance/src/genlib/man3/GENLIB_LORES.3 | 98 +++++++++++++++++++++ alliance/src/genlib/man3/GENLIB_LOSELF.3 | 98 +++++++++++++++++++++ 3 files changed, 300 insertions(+) create mode 100644 alliance/src/genlib/man3/GENLIB_LOCAP.3 create mode 100644 alliance/src/genlib/man3/GENLIB_LORES.3 create mode 100644 alliance/src/genlib/man3/GENLIB_LOSELF.3 diff --git a/alliance/src/genlib/man3/GENLIB_LOCAP.3 b/alliance/src/genlib/man3/GENLIB_LOCAP.3 new file mode 100644 index 00000000..cb05689d --- /dev/null +++ b/alliance/src/genlib/man3/GENLIB_LOCAP.3 @@ -0,0 +1,104 @@ +.\" $Id: GENLIB_LOCAP.3,v 1.1 2002/08/16 13:35:20 pnt Exp $ +.\" @(#)GENLIB_LOCAP.3 2.11 2002/08/16; Labo LIP6/ASIM; Author : Pierre Nguyen TUong +.if t \{\ +.so man1/alc_contents.mac +.XS \n% +.ti 0.2i +GENLIB_LOCAP +.XE \} +.TH GENLIB_LOCAP.3 "August 16, 2002" "ASIM/LIP6" "PROCEDURAL GENERATION LANGUAGE" +.SH NAME +GENLIB_LOCAP \- add a logical capacitor to the current netlist figure +.SH SYNOPSYS +.nf +.if n \{\ +.ft B \} +.if t \{\ +.ft CR \} +#include + +void GENLIB_LOCAP(type,capa,tcon,bcon,name) +char type ; +double capa ; +char \(**tcon, \(**bcon ; +char \(**name ; +.ft R +.fi +.so man1/alc_origin.1 +.SH PARAMETERS +.TP 20 +\fItype\fP +Type of the capacitor to be created in the current figure +.TP +\fIcapa\fP +Capacitance value. +.TP +\fItcon, bcon\fP +Name of the signals on which the given capacitor connectors are to be linked. tcon is +the top plate, bcon is the bottom plate. +.TP +\fIname\fP +Capacitor name. The unicity of the name is not checked. +.SH DESCRIPTION +\fBLOCAP\fP adds a logical capacitor to the current +working figure. This capacitor has each of its pin logicaly linked to the +adequat signal given as parameter. +The \fItype\fP attribut may take the following values: +.TP +\fBCAPMIM\fP +for a MIM (metal/metal) type capacitor. The top plate (tcon) and the bottom +plate (bcon) layers are different metal layers. +.TP +\fBCAPPNWELL\fP +for a POLY/NWELL type capacitor. The top plate layer is POLY, the bottom plate +is NWELL. Please note: this feature is not available in any technology. +.SH ERROR +.if n \{\ +.ft B \} +.if t \{\ +.ft CR \} +"GENLIB_LOCAP impossible : missing GENLIB_DEF_LOFIG" +.ft R +.RS +No figure has been yet specified by a call to \fBDEF_LOFIG\fP. So it isn't +possible to add anything. you must call \fBDEF_LOFIG\fP before any other +netlist call. +.RE +.SH EXAMPLE +.nf +.if n \{\ +.ft B \} +.if t \{\ +.ft CR \} +#include + +int main(int argc,char \(**argv[]) +{ + /\(** Create a figure to work on, a parallel capacitor \(**/ + GENLIB_DEF_LOFIG("parallel_cap") ; + + /\(** Define interface \(**/ + GENLIB_LOCON("i", IN, "input") ; + GENLIB_LOCON("f", OUT, "output") ; + + /\(** Add capacitors \(**/ + GENLIB_LOCAP(CAPMIM,5.1,"input","output","cap1") ; + GENLIB_LOCAP(CAPMIM,5.2,"input","output","cap2") ; + + /\(** Save all that on disk \(**/ + GENLIB_SAVE_LOFIG() ; + + return 0 ; +} +.ft R +.fi +.SH SEE ALSO +.BR genlib (1), +.BR GENLIB_BUS (3), +.BR GENLIB_ELM (3), +.BR GENLIB_LOINS (3), +.BR GENLIB_LOCON (3). + + +.so man1/alc_bug_report.1 + diff --git a/alliance/src/genlib/man3/GENLIB_LORES.3 b/alliance/src/genlib/man3/GENLIB_LORES.3 new file mode 100644 index 00000000..44d6449c --- /dev/null +++ b/alliance/src/genlib/man3/GENLIB_LORES.3 @@ -0,0 +1,98 @@ +.\" $Id: GENLIB_LORES.3,v 1.1 2002/08/16 13:35:20 pnt Exp $ +.\" @(#)GENLIB_LORES.3 2.11 2002/08/16; Labo LIP6/ASIM; Author : Pierre Nguyen Tuong +.if t \{\ +.so man1/alc_contents.mac +.XS \n% +.ti 0.2i +GENLIB_LORES +.XE \} +.TH GENLIB_LORES.3 "August 16, 2002" "ASIM/LIP6" "PROCEDURAL GENERATION LANGUAGE" +.SH NAME +GENLIB_LORES \- add a logical resistor to the current netlist figure +.SH SYNOPSYS +.nf +.if n \{\ +.ft B \} +.if t \{\ +.ft CR \} +#include + +void GENLIB_LORES(type,resi,rcon1,rcon1,name) +char type ; +double resi ; +char \(**rcon1, \(**rcon1 ; +char \(**name ; +.ft R +.fi +.so man1/alc_origin.1 +.SH PARAMETERS +.TP 20 +\fItype\fP +Type of the resistor to be created in the current figure +.TP +\fIresi\fP +Resistance value. +.TP +\fIrcon1, rcon1\fP +Name of the signals on which the given resistor connectors are to be linked. +.TP +\fIname\fP +Resistor name. The unicity of the name is not checked. +.SH DESCRIPTION +\fBLORES\fP adds a logical resistor to the current +working figure. This resistor has each of its pin logicaly linked to the adequat +signal given as parameter. For the time being, the \fItype\fP attribut may take +the following value: +.TP +\fBRESMIM\fP +for a MIM (metal) type resistor. +.SH ERROR +.if n \{\ +.ft B \} +.if t \{\ +.ft CR \} +"GENLIB_LORES impossible : missing GENLIB_DEF_LOFIG" +.ft R +.RS +No figure has been yet specified by a call to \fBDEF_LOFIG\fP. So it isn't +possible to add anything. you must call \fBDEF_LOFIG\fP before any other +netlist call. +.RE +.SH EXAMPLE +.nf +.if n \{\ +.ft B \} +.if t \{\ +.ft CR \} +#include + +int main(int argc,char \(**argv[]) +{ + /\(** Create a figure to work on, a parallel resistor \(**/ + GENLIB_DEF_LOFIG("parallel_res") ; + + /\(** Define interface \(**/ + GENLIB_LOCON("i", IN, "input") ; + GENLIB_LOCON("f", OUT, "output") ; + + /\(** Add resistors \(**/ + GENLIB_LORES(RESMIM,5.1,"input","output","res1") ; + GENLIB_LORES(RESMIM,5.2,"input","output","res2") ; + + /\(** Save all that on disk \(**/ + GENLIB_SAVE_LOFIG() ; + + return 0 ; +} +.ft R +.fi +.SH SEE ALSO +.BR genlib (1), +.BR GENLIB_BUS (3), +.BR GENLIB_ELM (3), +.BR GENLIB_LOINS (3), +.BR GENLIB_LOCON (3). + + +.so man1/alc_bug_report.1 + diff --git a/alliance/src/genlib/man3/GENLIB_LOSELF.3 b/alliance/src/genlib/man3/GENLIB_LOSELF.3 new file mode 100644 index 00000000..53aac538 --- /dev/null +++ b/alliance/src/genlib/man3/GENLIB_LOSELF.3 @@ -0,0 +1,98 @@ +.\" $Id: GENLIB_LOSELF.3,v 1.1 2002/08/16 13:35:20 pnt Exp $ +.\" @(#)GENLIB_LOSELF.3 2.11 2002/08/16; Labo LIP6/ASIM; Author : Pierre Nguyen Tuong +.if t \{\ +.so man1/alc_contents.mac +.XS \n% +.ti 0.2i +GENLIB_LOSELF +.XE \} +.TH GENLIB_LOSELF.3 "August 16, 2002" "ASIM/LIP6" "PROCEDURAL GENERATION LANGUAGE" +.SH NAME +GENLIB_LOSELF \- add a logical inductor to the current netlist figure +.SH SYNOPSYS +.nf +.if n \{\ +.ft B \} +.if t \{\ +.ft CR \} +#include + +void GENLIB_LOSELF(type,self,scon1,scon1,name) +char type ; +double self ; +char \(**scon1, \(**scon1 ; +char \(**name ; +.ft R +.fi +.so man1/alc_origin.1 +.SH PARAMETERS +.TP 20 +\fItype\fP +Type of the inductor to be created in the current figure +.TP +\fIself\fP +Inductance value. +.TP +\fIscon1, scon1\fP +Name of the signals on which the given inductor connectors are to be linked. +.TP +\fIname\fP +Inductor name. The unicity of the name is not checked. +.SH DESCRIPTION +\fBLOSELF\fP adds a logical inductor to the current +working figure. This inductor has each of its pin logicaly linked to the adequat +signal given as parameter. For the time being, the \fItype\fP attribut may take +the following value: +.TP +\fBSELFMIM\fP +for a MIM (metal) type inductor. +.SH ERROR +.if n \{\ +.ft B \} +.if t \{\ +.ft CR \} +"GENLIB_LOSELF impossible : missing GENLIB_DEF_LOFIG" +.ft R +.RS +No figure has been yet specified by a call to \fBDEF_LOFIG\fP. So it isn't +possible to add anything. you must call \fBDEF_LOFIG\fP before any other +netlist call. +.RE +.SH EXAMPLE +.nf +.if n \{\ +.ft B \} +.if t \{\ +.ft CR \} +#include + +int main(int argc,char \(**argv[]) +{ + /\(** Create a figure to work on, a parallel inductor \(**/ + GENLIB_DEF_LOFIG("parallel_self") ; + + /\(** Define interface \(**/ + GENLIB_LOCON("i", IN, "input") ; + GENLIB_LOCON("f", OUT, "output") ; + + /\(** Add inductors \(**/ + GENLIB_LOSELF(SELFMIM,5.1,"input","output","self1") ; + GENLIB_LOSELF(SELFMIM,5.2,"input","output","self2") ; + + /\(** Save all that on disk \(**/ + GENLIB_SAVE_LOFIG() ; + + return 0 ; +} +.ft R +.fi +.SH SEE ALSO +.BR genlib (1), +.BR GENLIB_BUS (3), +.BR GENLIB_ELM (3), +.BR GENLIB_LOINS (3), +.BR GENLIB_LOCON (3). + + +.so man1/alc_bug_report.1 +