* attila/src/MDRGrid.cpp,
attila/src/MDefs.h, attila/src/MNet.cpp, attila/src/MPri.cpp, attila/src/RMBK.cpp : - Bug : la modification pour router les RAMs (segments de taille nulle) a introduit un bug : pleins de petits segments de taille nulle apparaissaient superposes aux segments normaux. C'etait produit par le balayage dans la direction perpendiculaire a la direction preferentielle quant elle rencontrait un segment. Conclusion : pour l'instant on ne peut pas router une RAM seule. - Bug : dans "::newaccess()" je ne verifiait pas si le noeud etait deja pris par un autre signal. J'espere que c'est ce qui provo- quait les SIGABRT (du a un auto-ecrasement du programme...) - Bug : Et les VIAs patate ! Prise en compte des VIAs des alimentations et transformation en obstacles. - L'espacement des pistes de routage ALU5 et superieures est desormait de 2 pitchs (10 lambdas) pour faire plaisir a druc.
This commit is contained in:
parent
63d46c36db
commit
89d90c5430
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@ -1,7 +1,7 @@
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// -*- C++ -*-
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//
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// $Id: AAstar.cpp,v 1.3 2002/10/15 14:35:36 jpc Exp $
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// $Id: AAstar.cpp,v 1.4 2002/10/17 21:57:27 jpc Exp $
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//
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// /----------------------------------------------------------------\
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// | |
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@ -768,11 +768,13 @@ void CAStar::dump (void)
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iterations_reroute = 0;
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iterations_kind = &iterations_route;
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//if (pNet->name == "c2 0") cdebug.on ();
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//if (pNet->name == "acc_i_down") cdebug.on ();
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do {
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if (hysteresis) {
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cdebug << "About to clear." << "\n";
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clear ();
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cdebug << "cleared." << "\n";
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pri = 255 + (1 << increase++);
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@ -783,12 +785,18 @@ void CAStar::dump (void)
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else
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pri = 0;
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cdebug << "About to load net " << iterations_kind << "\n";
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load (pNet, pri, expand);
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cdebug << "loading done " << iterations_kind << "\n";
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cdebug << "About to route net " << iterations_kind << "\n";
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routed = !search ();
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cdebug << "routing done " << iterations_kind << "\n";
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*iterations_kind += iterations;
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cdebug << "mark 1.\n";
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hysteresis = true;
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cdebug << "mark 2.\n";
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} while ((increase < 15) && !routed);
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if (increase >= 15) throw reach_max_pri (pNet);
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@ -1,7 +1,7 @@
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// -*- C++ -*-
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//
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// $Id: MDRGrid.cpp,v 1.1 2002/10/02 21:23:47 jpc Exp $
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// $Id: MDRGrid.cpp,v 1.2 2002/10/17 21:57:27 jpc Exp $
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//
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// /----------------------------------------------------------------\
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// | |
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@ -336,6 +336,7 @@ CDRGrid::CDRGrid (int x, int y, int z)
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XYZ = XY * Z;
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size = XY * (Z - 1);
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nodes = new CMatrixNodes (this);
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pri = new CMatrixPri (this);
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@ -1,7 +1,7 @@
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// -*- C++ -*-
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//
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// $Id: MDefs.h,v 1.2 2002/10/15 14:35:37 jpc Exp $
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// $Id: MDefs.h,v 1.3 2002/10/17 21:57:27 jpc Exp $
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//
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// /-----------------------------------------------------------------\
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// | |
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@ -518,7 +518,8 @@
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public: CDRGrid::iterator &lowest (void);
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// Modifiers.
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public: CNode *newaccess (int x, int y, int z, int ident, CNet *net) throw (dup_term);
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public: CNode *newaccess (int x, int y, int z, int ident, CNet *net)
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throw (dup_term, bad_grab);
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public: void newaccess (CRect &rect, int z, int ident, CNet *net);
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public: void lockalone (bool global=false);
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public: void setid (int ident);
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@ -1,7 +1,7 @@
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// -*- C++ -*-
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//
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// $Id: MMBK.cpp,v 1.2 2002/10/13 14:22:47 jpc Exp $
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// $Id: MMBK.cpp,v 1.3 2002/10/17 21:57:27 jpc Exp $
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//
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// /-----------------------------------------------------------------\
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// | |
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@ -1105,6 +1105,50 @@ long cmpALU (char layer1, char layer2)
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// -------------------------------------------------------------------
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// Function : "topVIALayer()".
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char topVIALayer (char type)
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{
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switch (type) {
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case CONT_VIA: return (ALU1); break;
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case CONT_VIA2: return (ALU2); break;
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case CONT_VIA3: return (ALU3); break;
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case CONT_VIA4: return (ALU4); break;
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case CONT_VIA5: return (ALU5); break;
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case CONT_VIA6: return (ALU6); break;
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case CONT_VIA7: return (ALU7); break;
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}
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return (ALU8);
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}
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// -------------------------------------------------------------------
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// Function : "bottomVIALayer()".
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char bottomVIALayer (char type)
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{
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switch (type) {
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case CONT_VIA: return (ALU2); break;
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case CONT_VIA2: return (ALU3); break;
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case CONT_VIA3: return (ALU4); break;
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case CONT_VIA4: return (ALU5); break;
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case CONT_VIA5: return (ALU6); break;
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case CONT_VIA6: return (ALU7); break;
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case CONT_VIA7: return (ALU8); break;
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}
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return (ALU9);
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}
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// -------------------------------------------------------------------
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// End of MBK namespace.
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@ -1,7 +1,7 @@
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// -*- C++ -*-
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//
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// $Id: MMBK.h,v 1.1 2002/10/02 21:23:47 jpc Exp $
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// $Id: MMBK.h,v 1.2 2002/10/17 21:57:27 jpc Exp $
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//
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// /-----------------------------------------------------------------\
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// | |
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@ -94,6 +94,8 @@ namespace MBK {
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extern char layer2ALU (char layer);
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extern char layer2CALU (char layer);
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extern long cmpALU (char layer1, char layer2);
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extern char topVIALayer (char type);
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extern char bottomVIALayer (char type);
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@ -1,7 +1,7 @@
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// -*- C++ -*-
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//
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// $Id: MNet.cpp,v 1.2 2002/10/13 14:22:47 jpc Exp $
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// $Id: MNet.cpp,v 1.3 2002/10/17 21:57:27 jpc Exp $
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//
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// /----------------------------------------------------------------\
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// | |
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// -------------------------------------------------------------------
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// Method : "CTerm::newaccess()".
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CNode *CTerm::newaccess (int x, int y, int z, int ident, CNet *net) throw (dup_term)
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CNode *CTerm::newaccess (int x, int y, int z, int ident, CNet *net)
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throw (dup_term, bad_grab)
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{
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list<CDRGrid::iterator>::iterator itNode;
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CDRGrid::iterator coord;
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pNode = &coord.addnode ();
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}
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// Check if the node has already been took by another terminal.
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if (pNode->data.owner && (pNode->data.owner != net))
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throw bad_grab ( pNode->data.owner->terms[pNode->getid()]->name
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, net->name
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, coord.x()
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, coord.y()
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, coord.z()
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, 0
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, pNode->data.pri
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, pNode->terminal()
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, pNode->data.ident
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);
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pNode->data.owner = net;
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pNode->data.obstacle = false;
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pNode->setid (ident);
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// -*- C++ -*-
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//
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// $Id: MPri.cpp,v 1.2 2002/10/15 14:35:37 jpc Exp $
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// $Id: MPri.cpp,v 1.3 2002/10/17 21:57:27 jpc Exp $
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//
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// /----------------------------------------------------------------\
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// | |
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void CMatrixPri::clear (void)
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{
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memset (_grid, (char)0, _drgrid->size);
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memset (_grid, (char)0, (size_t)(_drgrid->size));
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cleared = true;
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offset = 0;
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// Enable z=1 (in case of global signal, no effet otherwise).
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if (coord.z() < _drgrid->Z - 1) (*this)[ coord.dz(1) ] = (char)1;
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if (global) {
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// Check for blocked upper nodes.
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other = (*_drgrid->nodes)[coord].data.owner;
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if ( (*_drgrid->nodes)[coord].data.obstacle
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cdebug << "Looking for an escape!\n" << "\n";
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findfree (coord, net);
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}
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}
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continue;
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}
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(*this)[ coord.dz(1) ] = nextPri (currentPri);
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nextBorder->push (new CDRGrid::iterator (coord));
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if (global) {
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// Check for blocked upper nodes.
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other = (*_drgrid->nodes)[coord].data.owner;
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if ( (*_drgrid->nodes)[coord].data.obstacle
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cdebug << "Looking for an escape!\n" << "\n";
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findfree (coord, net);
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}
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}
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// Enable z=2 (in case of global signal, no effet otherwise).
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(*this)[ coord.dz(1) ] = (char)1;
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// Look if the upper node is blocked, in that case expand the
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// allowed zone till a non-blocked node is found.
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if (global) {
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other = (*_drgrid->nodes)[coord].data.owner;
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if ( (*_drgrid->nodes)[coord].data.obstacle
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|| ((other != NULL) && (other != &net)) ) {
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}
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}
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}
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}
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// Set to one all the points inside the enclosing box.
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// (except those in the initial queues)
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cdebug << _bb << "\n";
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for (x = _bb.x1; x <= _bb.x2; x++) {
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for (y = _bb.y1; y <= _bb.y2; y++) {
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for (z = (global) ? 3 : 1; z < _drgrid->Z; z++) {
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@ -1,7 +1,7 @@
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// -*- C++ -*-
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//
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// $Id: RMBK.cpp,v 1.3 2002/10/15 14:35:37 jpc Exp $
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// $Id: RMBK.cpp,v 1.4 2002/10/17 21:57:27 jpc Exp $
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//
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// /----------------------------------------------------------------\
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// | |
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@ -44,6 +44,7 @@ void CRBox::mbkload (MBK::CFig *mbkfig, int z, int rtype)
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MBK::phcon_list *pPhcon;
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MBK::losig_list *pSig;
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MBK::phseg_list *pSeg, flatSeg;
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MBK::phvia_list *pVIA;
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MBK::phfig_list *pModel;
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MBK::CXRect *rect;
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MBK::CIns *pIns;
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@ -173,6 +174,33 @@ void CRBox::mbkload (MBK::CFig *mbkfig, int z, int rtype)
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}
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// Browse for obstacle VIAs.
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for (pVIA = fig->phfig.fig->PHVIA; pVIA != NULL; pVIA = pVIA->NEXT) {
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// Only power VIAs must be obstacles.
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if ( (! MBK::ISVDD (pVIA->NAME)) && (! MBK::ISVSS (pVIA->NAME)))
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continue;
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for (x = 0; x < 2; x++) {
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switch (x) {
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case 0: flatSeg.LAYER = MBK::topVIALayer (pVIA->TYPE); break;
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case 1: flatSeg.LAYER = MBK::bottomVIALayer (pVIA->TYPE); break;
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}
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}
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if (flatSeg.LAYER == MBK::CALU1) continue;
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flatSeg.X1 = pVIA->XVIA - pVIA->DX / 2;
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flatSeg.X2 = pVIA->XVIA - pVIA->DX / 2;
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flatSeg.Y1 = pVIA->YVIA;
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flatSeg.Y2 = pVIA->YVIA;
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flatSeg.WIDTH = pVIA->DY;
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rect->setSeg (flatSeg);
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drgrid->nodes->obstacle (rect->grid, MBK::env.layer2z (flatSeg.LAYER));
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}
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// Browse layout for terminals.
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for (pPhcon = fig->phfig.fig->PHCON; pPhcon != NULL; pPhcon = pPhcon->NEXT) {
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if (fig->lofig.signals.find(pPhcon->NAME) == endSig) {
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@ -343,6 +371,30 @@ void CRBox::mbkload (MBK::CFig *mbkfig, int z, int rtype)
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}
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}
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// On routing level above ALU4, use only half of the tracks.
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// Vertical tracks.
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for (zz = 4; zz < mZ; zz += 2) {
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for (x = 2; x < mX; x += 2) {
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for (y = 1; y < mY - 1; y++) {
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node = &( coord.set(x,y,zz).node() );
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if ( !node->terminal() ) node->data.obstacle = true;
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}
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}
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}
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// Horizontal tracks.
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for (zz = 5; zz < mZ; zz += 2) {
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for (y = 2; y < mY; y += 2) {
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for (x = 1; x < mX; x++) {
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node = &( coord.set(x,y,zz).node() );
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if ( !node->terminal() ) node->data.obstacle = true;
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}
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}
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}
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// This flag ensure that a figure has been successfully loaded.
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@ -402,7 +454,7 @@ void CRBox::mbksave (string &name)
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if (inseg && (pNextNet != pNet)) {
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// We are changing of segment owner.
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// Dump the current one.
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if (seg.X1 <= seg.X2) {
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if (seg.X1 < seg.X2) {
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// This is not a "dot" segment (i.e a VIA).
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fig->addphseg (seg);
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}
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@ -433,7 +485,7 @@ void CRBox::mbksave (string &name)
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} else {
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if (inseg) {
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// Dump the current one.
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if (seg.X1 <= seg.X2) {
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if (seg.X1 < seg.X2) {
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// This is not a "dot" segment (i.e a VIA).
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fig->addphseg (seg);
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}
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@ -467,7 +519,7 @@ void CRBox::mbksave (string &name)
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if (inseg && (pNextNet != pNet)) {
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// We are changing of segment owner.
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// Dump the current one.
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if (seg.Y1 <= seg.Y2) {
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if (seg.Y1 < seg.Y2) {
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// This is not a "dot" segment (i.e a VIA).
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fig->addphseg (seg);
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}
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|
@ -512,7 +564,7 @@ void CRBox::mbksave (string &name)
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if (inseg) {
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// This segment touch the AB.
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if (seg.Y1 <= seg.Y2) {
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if (seg.Y1 < seg.Y2) {
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// This is not a "dot" segment (i.e a VIA).
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fig->addphseg (seg);
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}
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|
|
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@ -1,7 +1,7 @@
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// -*- C++ -*-
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//
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// $Id: USys.cpp,v 1.1 2002/10/02 21:23:49 jpc Exp $
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// $Id: USys.cpp,v 1.2 2002/10/17 21:57:27 jpc Exp $
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//
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// /----------------------------------------------------------------\
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// | |
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|
@ -77,6 +77,7 @@ static void trap_sig(int aSig)
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case SIGFPE:
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||||
case SIGBUS:
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case SIGSEGV:
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||||
case SIGABRT:
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emergency ();
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// Ouch !! This may result from a program bug.
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|
@ -98,6 +99,7 @@ static void trap_sig(int aSig)
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cerr << "(core will be dumped).\n";
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if ( (signal(SIGFPE , SIG_DFL) == SIG_ERR)
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|| (signal(SIGBUS , SIG_DFL) == SIG_ERR)
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|| (signal(SIGABRT, SIG_DFL) == SIG_ERR)
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|| (signal(SIGSEGV, SIG_DFL) == SIG_ERR))
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exit (1);
|
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else {
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|
@ -201,6 +203,7 @@ CInterrupt::CInterrupt (void)
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// Set the trap function for SIGFPE, SIGBUS and SIGSEGV signals.
|
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if ( (signal(SIGFPE , trap_sig) == SIG_ERR)
|
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|| (signal(SIGBUS , trap_sig) == SIG_ERR)
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|| (signal(SIGABRT, trap_sig) == SIG_ERR)
|
||||
|| (signal(SIGSEGV, trap_sig) == SIG_ERR)) trap_sig (SIGTFLT);
|
||||
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||||
}
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