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encore plus de fruits

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Ludovic Jacomme 2002-08-07 13:23:58 +00:00
parent a26e6a86f7
commit 019a8d3616
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alliance/src/ctl/man5/ctl.5
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@ -24,10 +24,11 @@ by \fBmoka\fP(1) during the model checking.
The formulae statement part described all the CTL formulae that have to be verified. The formulae statement part described all the CTL formulae that have to be verified.
.br .br
All boolean VHDL operators are supported (see vbe(5)) and also the 8 CTL operators All boolean and relational VHDL operators are supported (see vbe(5)) and also
AF, AG, AX, AU, EF, EG, EX and EU. The CTL file format support also the imply the 8 CTL operators AF, AG, AX, AU, EF, EG, EX and EU. The CTL file format
boolean operator '->' and the equivalence operator '<=>'. support also the imply boolean operator '->' and the equivalence operator '<=>'.
.br .br
.SH EXAMPLE .SH EXAMPLE
.PP .PP
.nf .nf