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SOFA/SCRIPT/openfpga_shell_script
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tangxifan 3479502ab7 [Script] Update task template for testbench generation 2020-10-10 11:32:52 -06:00
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skywater_generate_fabric_example_script.openfpga [Script] Now use variables to redirect the output directory of Verilog/SDC files 2020-10-09 16:00:41 -06:00
skywater_generate_testbench_example_script.openfpga [Script] Update task template for testbench generation 2020-10-10 11:32:52 -06:00