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SOFA/FPGA1212_QLSOFA_HD_PNR
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Ganesh Gore c36e8d797a Updated all the results 2020-12-20 03:44:00 -07:00
..
FPGA1212_QLSOFA_HD_Verilog [QLSOFA_HD] Updated QLSOFA_HD netlist and task 2020-12-14 13:36:52 -07:00
FPGA1212_QLSOFA_HD_task [QLSOFA_HD] Updated QLSOFA_HD netlist and task 2020-12-14 13:36:52 -07:00
FPGA1212_RESET_HD_SKY_Verilog [Cleanup] Renamed projects to SOFA-HD and QLSOFA-HD 2020-12-14 00:45:11 -07:00
FPGA1212_RESET_HD_SKY_task [Cleanup] Renamed projects to SOFA-HD and QLSOFA-HD 2020-12-14 00:45:11 -07:00
Verification [QLSOFA_HD] Updated QLSOFA_HD Verification results 2020-12-14 13:38:08 -07:00
fpga_top Updated all the results 2020-12-20 03:44:00 -07:00
modules Updated all the results 2020-12-20 03:44:00 -07:00
README.md Updated all the results 2020-12-20 03:44:00 -07:00
config.sh Updated all the results 2020-12-20 03:44:00 -07:00

README.md

FPGA1212_FLAT_HD_SKY_PNR

12x12 FPGA designed using hierarchical flow and SKY130_FD_SC_HD. Flat Module design style