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SOFA/FPGA1212_SOFA_CHD_PNR
History
Ganesh Gore a1af3743ef [DRCfix] Swapped fill cell with decap 2021-02-08 22:58:28 -07:00
..
FPGA1212_QLSOFA_CHD_Verilog [SOFA-CHD] Bugfix to fix floating cin net 2020-12-22 00:23:12 -07:00
FPGA1212_SOFA_CHD_Verilog [SOFA-CHD] Bugfix to fix floating cin net 2020-12-22 00:23:12 -07:00
FPGA1212_SOFA_CHD_task Replacing deprecated tile_port syntax 2021-01-12 21:33:53 -08:00
Verification [SOFA-CHD] Updated design with mux-primitive bug fixed - Calibre DRC pending 2020-12-14 00:34:42 -07:00
fpga_top [DRCfix] Swapped fill cell with decap 2021-02-08 22:58:28 -07:00
modules [Cleanup] Converted .spef to .spef.gz 2020-12-20 02:10:51 -07:00
README.md [SOFA-CHD] Updated design with mux-primitive bug fixed - Calibre DRC pending 2020-12-14 00:34:42 -07:00
config.sh [SOFA-CHD] Bugfix to fix floating cin net 2020-12-22 00:23:12 -07:00

README.md

FPGA1212_SOFA_CHD_PNR

https://skywater-openfpga.readthedocs.io/en/latest/datasheet/qlsofa_hd/