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SOFA/FPGA1212_QLSOFA_HD_PNR/FPGA1212_QLSOFA_HD_task
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tangxifan 5183326946
Update generate_testbench.openfpga 
Address #124
 		2021-07-24 14:59:34 -07:00
..
arch [Flow] QLSOFA Updated flow and ARCH 2021-04-05 23:59:21 -06:00
config [SOFA] Updated task configuration 2021-05-31 12:05:36 -06:00
micro_benchmark [QLSOFA_HD] Updated QLSOFA_HD netlist and task 2020-12-14 13:36:52 -07:00
sc_verilog [QLSOFA_HD] Updated QLSOFA_HD netlist and task 2020-12-14 13:36:52 -07:00
BENCHMARK [Flow] QLSOFA Updated flow and ARCH 2021-04-05 23:59:21 -06:00
design_variables.yml [Flow] QLSOFA Updated flow and ARCH 2021-04-05 23:59:21 -06:00
generate_fabric.openfpga [Flow] QLSOFA Updated flow and ARCH 2021-04-05 23:59:21 -06:00
generate_testbench.openfpga Update generate_testbench.openfpga 2021-07-24 14:59:34 -07:00
process_top_def.sh [QLSOFA_HD] Updated QLSOFA_HD netlist and task 2020-12-14 13:36:52 -07:00
user_project_wrapper_empty.def [QLSOFA_HD] Updated QLSOFA_HD netlist and task 2020-12-14 13:36:52 -07:00
user_project_wrapper_template.def [QLSOFA_HD] Updated QLSOFA_HD netlist and task 2020-12-14 13:36:52 -07:00