Tim Ansell 286ebc7da2 Fix spelling of floorplan.		2021-02-13 14:05:46 -08:00
..
figures	[Doc] Add SOFA CHD to documentation. Clean up redundant document between HD FPGA IPs	2020-12-09 16:18:04 -07:00
index.rst	[Doc] Add SOFA CHD to documentation. Clean up redundant document between HD FPGA IPs	2020-12-09 16:18:04 -07:00
qlsofa_hd_circuit_design.rst	[Doc] Add MUX design information to documentation	2020-12-09 17:51:15 -07:00
qlsofa_hd_clb_arch.rst	[Doc] Reorganize documentation for SOFA HD device family	2020-12-04 12:02:30 -07:00
qlsofa_hd_fpga_arch.rst	Fix spelling of floorplan.	2021-02-13 14:05:46 -08:00
qlsofa_hd_io_resource.rst	[Doc] Add SOFA CHD to documentation. Clean up redundant document between HD FPGA IPs	2020-12-09 16:18:04 -07:00