4 Commits

Author	SHA1	Message	Date
Ganesh Gore	37e72cffb5	[HDL] Updated wrapper generation script	2020-11-18 23:15:26 -07:00
tangxifan	33824bf179	[HDL] Update caravel wrapper for new I/O assignment	2020-11-18 20:44:54 -07:00
tangxifan	a916ce7e03	[HDL] Bug fix in the caravel fpga wrapper built with hd cell library	2020-11-18 11:29:37 -07:00
tangxifan	d36cb8abe7	[HDL] Add behavoiral and tech-mapped caravel wrapper Verilog codes and code generator script	2020-11-17 21:44:13 -07:00