tangxifan
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58440b8c42
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[HDL] Bug fix in I/O cell
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2020-11-17 20:03:20 -07:00 |
tangxifan
|
8803b30b26
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[HDL] Rename por of I/O cell to be consistent with documentation
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2020-11-17 19:33:53 -07:00 |
tangxifan
|
5415af07cc
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[HDL] Add digitial I/O with protection circuitry
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2020-11-17 19:17:48 -07:00 |
tangxifan
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80655c5869
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[HDL] Digital I/O of embedded FPGA is now lib independent
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2020-11-13 10:00:30 -07:00 |
tangxifan
|
64d1113461
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[HDL] Add HDL codes for the FPGA I/O cell tuned for Caravel
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2020-11-05 10:18:52 -07:00 |
tangxifan
|
12881d7a31
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[HDL] Move verilog wrapper to HDL directory
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2020-11-03 09:19:43 -07:00 |