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SOFA
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2 Commits

Author SHA1 Message Date
tangxifan a916ce7e03 [HDL] Bug fix in the caravel fpga wrapper built with hd cell library 2020-11-18 11:29:37 -07:00
tangxifan d36cb8abe7 [HDL] Add behavoiral and tech-mapped caravel wrapper Verilog codes and code generator script 2020-11-17 21:44:13 -07:00