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SOFA
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2 Commits

Author SHA1 Message Date
tangxifan 64d1113461 [HDL] Add HDL codes for the FPGA I/O cell tuned for Caravel 2020-11-05 10:18:52 -07:00
tangxifan 12881d7a31 [HDL] Move verilog wrapper to HDL directory 2020-11-03 09:19:43 -07:00