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SOFA
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3 Commits

Author SHA1 Message Date
tangxifan b08b77994c [HDL] Bug fix in the wrapper generator; now Wishbone clock is wired to a gpio of FPGA 2020-11-20 18:13:37 -07:00
tangxifan 6fa5e935fa [HDL] Update wrapper generator to use tri-state buffer for outputs 2020-11-19 17:14:50 -07:00
Ganesh Gore 37e72cffb5 [HDL] Updated wrapper generation script 2020-11-18 23:15:26 -07:00