riscv
/
SOFA
mirror of https://github.com/lnis-uofu/SOFA.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity

[Script] Bug fix in modelsim task-run script

This commit is contained in:
tangxifan 2020-11-28 14:50:39 -07:00
parent 2380783808
commit ee92b15f0e
1 changed files with 1 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
MSIM/common/run_post_pnr_msim_task.py
View File

@ -68,7 +68,7 @@ for testbench_file in testbench_files:
cmd = "python3 " + msim_testrun_script_abspath \ cmd = "python3 " + msim_testrun_script_abspath \
+ " --verilog_testbench " + testbench_file \ + " --verilog_testbench " + testbench_file \
+ " --project_path " + msim_task_dir_abspath + "/" + testbench_name \ + " --project_path " + msim_task_dir_abspath + "/" + testbench_name \
+ " --testbench_name " + testbench_name + " --testbench_name " + testbench_name + "_autocheck_top_tb"
subprocess.run(cmd, shell=True, check=True) subprocess.run(cmd, shell=True, check=True)
num_sim_finished += 1 num_sim_finished += 1