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[Doc] Add motiviation figure and reworked introduction part

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tangxifan 2020-12-09 20:12:09 -07:00
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DOC/source/device/introduction.rst
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Introduction Introduction
------------ ------------
All the FPGA devices in this project are fully open-source, from the architecture description to the physical design outputs, e.g., GDSII. *Skywater Opensource FpgA* (SOFA) is a fully open-source embedded FPGA IP library, from the architecture description to production ready layouts.
All the devices are designed through the OpenFPGA framework and the Skywater 130nm PDK. As illustrated in :numref:`fig_sofa_motivation`, SOFA IPs are designed through the Skywater 130nm PDK, OpenFPGA framework and Synopsys IC Compiler II.
The devices are embedded FPGA IPs, which are designed to interface the caravel SoC interface. The runtime of the design flow for each IP is within 24 hours.
We aims to empower embedded applications with its low-cost design approach but high-density architecture.
Operating temperature ranging from 0 :math:`^\circ C` to 85 :math:`^\circ C` All the SOFA FPGAs are designed to interface the Caravel SoC interface.
We aims to empower embedded applications with its low-cost design approach but high-density architecture.
.. _fig_sofa_motivation:
.. figure:: ./figures/sofa_motivation.png
:scale: 15%
:alt: 24-hour FPGA IP development: from PDK to production-ready layout
24-hour FPGA IP development: from PDK to production-ready layout