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[Doc] Add motiviation figure and reworked introduction part
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Introduction
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------------
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All the FPGA devices in this project are fully open-source, from the architecture description to the physical design outputs, e.g., GDSII.
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All the devices are designed through the OpenFPGA framework and the Skywater 130nm PDK.
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The devices are embedded FPGA IPs, which are designed to interface the caravel SoC interface.
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We aims to empower embedded applications with its low-cost design approach but high-density architecture.
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Operating temperature ranging from 0 :math:`^\circ C` to 85 :math:`^\circ C`
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*Skywater Opensource FpgA* (SOFA) is a fully open-source embedded FPGA IP library, from the architecture description to production ready layouts.
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As illustrated in :numref:`fig_sofa_motivation`, SOFA IPs are designed through the Skywater 130nm PDK, OpenFPGA framework and Synopsys IC Compiler II.
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The runtime of the design flow for each IP is within 24 hours.
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All the SOFA FPGAs are designed to interface the Caravel SoC interface.
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We aims to empower embedded applications with its low-cost design approach but high-density architecture.
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.. _fig_sofa_motivation:
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.. figure:: ./figures/sofa_motivation.png
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:scale: 15%
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:alt: 24-hour FPGA IP development: from PDK to production-ready layout
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24-hour FPGA IP development: from PDK to production-ready layout
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