mirror of https://github.com/lnis-uofu/SOFA.git
64 lines
3.4 KiB
Coq
64 lines
3.4 KiB
Coq
|
//////////////////////////////////////////////////////////////////////
|
||
|
|
//// ////
|
||
|
|
//// WISHBONE SD Card Controller IP Core ////
|
||
|
|
//// ////
|
||
|
|
//// edge_detect.v ////
|
||
|
|
//// ////
|
||
|
|
//// This file is part of the WISHBONE SD Card ////
|
||
|
|
//// Controller IP Core project ////
|
||
|
|
//// http://opencores.org/project,sd_card_controller ////
|
||
|
|
//// ////
|
||
|
|
//// Description ////
|
||
|
|
//// Signal edge detection. If input signal transitions between ////
|
||
|
|
//// two states, output signal is generated for one clock cycle. ////
|
||
|
|
//// ////
|
||
|
|
//// Author(s): ////
|
||
|
|
//// - Marek Czerski, ma.czerski@gmail.com ////
|
||
|
|
//// ////
|
||
|
|
//////////////////////////////////////////////////////////////////////
|
||
|
|
//// ////
|
||
|
|
//// Copyright (C) 2013 Authors ////
|
||
|
|
//// ////
|
||
|
|
//// This source file may be used and distributed without ////
|
||
|
|
//// restriction provided that this copyright statement is not ////
|
||
|
|
//// removed from the file and that any derivative work contains ////
|
||
|
|
//// the original copyright notice and the associated disclaimer. ////
|
||
|
|
//// ////
|
||
|
|
//// This source file is free software; you can redistribute it ////
|
||
|
|
//// and/or modify it under the terms of the GNU Lesser General ////
|
||
|
|
//// Public License as published by the Free Software Foundation; ////
|
||
|
|
//// either version 2.1 of the License, or (at your option) any ////
|
||
|
|
//// later version. ////
|
||
|
|
//// ////
|
||
|
|
//// This source is distributed in the hope that it will be ////
|
||
|
|
//// useful, but WITHOUT ANY WARRANTY; without even the implied ////
|
||
|
|
//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
|
||
|
|
//// PURPOSE. See the GNU Lesser General Public License for more ////
|
||
|
|
//// details. ////
|
||
|
|
//// ////
|
||
|
|
//// You should have received a copy of the GNU Lesser General ////
|
||
|
|
//// Public License along with this source; if not, download it ////
|
||
|
|
//// from http://www.opencores.org/lgpl.shtml ////
|
||
|
|
//// ////
|
||
|
|
//////////////////////////////////////////////////////////////////////
|
||
|
|
|
||
|
|
module edge_detect (
|
||
|
|
input rst,
|
||
|
|
input clk,
|
||
|
|
input sig,
|
||
|
|
output rise,
|
||
|
|
output fall
|
||
|
|
);
|
||
|
|
|
||
|
|
reg [1:0] sig_reg;
|
||
|
|
|
||
|
|
always @(posedge clk or posedge rst)
|
||
|
|
if (rst == 1'b1)
|
||
|
|
sig_reg <= 2'b00;
|
||
|
|
else
|
||
|
|
sig_reg <= {sig_reg[0], sig};
|
||
|
|
|
||
|
|
assign rise = sig_reg[0] == 1'b1 && sig_reg[1] == 1'b0 ? 1'b1 : 1'b0;
|
||
|
|
assign fall = sig_reg[0] == 1'b0 && sig_reg[1] == 1'b1 ? 1'b1 : 1'b0;
|
||
|
|
|
||
|
|
endmodule
|