2020-11-12 20:07:10 -06:00
|
|
|
Configurable Logic Block User Guide
|
|
|
|
|
-----------------------------------
|
|
|
|
|
|
2020-11-12 22:59:14 -06:00
|
|
|
Each Configurable Logic Block (CLB) consists of 8 logic elements as shown in :numref:`fig_fle_arch`.
|
2020-11-12 20:07:10 -06:00
|
|
|
|
2020-11-12 22:59:14 -06:00
|
|
|
.. _fig_fle_arch:
|
2020-11-12 20:07:10 -06:00
|
|
|
|
2020-11-12 22:59:14 -06:00
|
|
|
.. figure:: ./figures/fle_arch.png
|
2020-11-12 23:05:44 -06:00
|
|
|
:scale: 40%
|
2020-11-12 20:07:10 -06:00
|
|
|
:alt: Logic element schematic
|
|
|
|
|
|
2020-11-12 22:59:14 -06:00
|
|
|
Schematic of a logic element
|
2020-11-12 20:07:10 -06:00
|
|
|
|
|
|
|
|
.. _fig_clb_arch:
|
|
|
|
|
|
|
|
|
|
.. figure:: ./figures/clb_arch.png
|
|
|
|
|
:scale: 60%
|
|
|
|
|
:alt: Configurable Logic Block schematic
|
|
|
|
|
|
|
|
|
|
Configurable logic block and its chain connections across FPGA
|
|
|
|
|
|
|
|
|
|
|
