mirror of https://github.com/lnis-uofu/SOFA.git
20 lines
216 B
Coq
20 lines
216 B
Coq
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module routing_test(IN0,IN1,IN2, clk, OUT0,OUT1,OUT2);
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input wire IN0,IN1,IN2,clk;
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output reg OUT0, OUT1, OUT2;
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always @(posedge clk)
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begin
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OUT0 <= IN0;
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OUT1 <= IN1;
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OUT2 <= IN2;
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end
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endmodule
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